CN110708073A - Switched capacitor dynamic feedback circuit of delta-sigma modulator - Google Patents

Switched capacitor dynamic feedback circuit of delta-sigma modulator Download PDF

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Publication number
CN110708073A
CN110708073A CN201910833720.9A CN201910833720A CN110708073A CN 110708073 A CN110708073 A CN 110708073A CN 201910833720 A CN201910833720 A CN 201910833720A CN 110708073 A CN110708073 A CN 110708073A
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module
circuit
electrically connected
digital
switch
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CN201910833720.9A
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Chinese (zh)
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陈晓飞
唐敔翔
丁鹤
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Huazhong University of Science and Technology
Shenzhen Huazhong University of Science and Technology Research Institute
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Huazhong University of Science and Technology
Shenzhen Huazhong University of Science and Technology Research Institute
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Priority to CN201910833720.9A priority Critical patent/CN110708073A/en
Publication of CN110708073A publication Critical patent/CN110708073A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/18—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging
    • H03M1/181—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/464—Details of the digital/analogue conversion in the feedback path
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/494—Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems
    • H03M3/496—Details of sampling arrangements or methods

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

The invention relates to a switched capacitor dynamic feedback circuit of a delta-sigma modulator, which comprises a Digital Combination Circuit (DCC) module, a DWA1 circuit module, a DWA2 circuit module, a DAC1 circuit module, a DAC2 circuit module and a transconductance amplifier (OTA) module. The input end of the DCC module is digital feedback signals D1 and D2, the output end of the DCC module is electrically connected with the input ends of the DWA1 circuit module and the DWA2 circuit module, the output ends of the DWA1 circuit module and the DWA2 circuit module are respectively electrically connected with the input ends of the DAC1 circuit module and the DAC2 circuit module, the output end of the DAC1 circuit module and the output end of the DAC2 circuit module are electrically connected with the input end of the OTA module, and the output end of the OTA module of the transconductance amplifier is the output end of the first integrator; the circuit realizes the dynamic feedback of the switch capacitor branch circuit, and reduces the equivalent load capacitance of the integrator, thereby reducing the power consumption of the integrator.

Description

Switched capacitor dynamic feedback circuit of delta-sigma modulator
Technical Field
The invention belongs to the technical field of analog-to-digital conversion signal processing, and particularly relates to a switching dynamic feedback circuit of a delta-sigma modulator.
Background
An analog-to-digital converter for medium-low frequency bandwidth signals is a key module in applications such as audio frequency and measurement, and with the reduction of CMOS process nodes, especially the development of wearable and portable devices puts higher requirements on the power consumption of integrated chips, and the lower power consumption means that the standby time of battery-powered devices is longer. The invention mainly aims at the low-power-consumption and high-precision analog-to-digital conversion application, and realizes the low-power-consumption and high-precision analog-to-digital conversion through system architecture design and circuit design.
The discrete delta-sigma modulator can achieve high precision (high SNR), has low requirements on process matching and circuits, and is very suitable for processing signals with medium-low frequency bandwidth. However, the discrete delta-sigma modulator has a problem in that the integrator in the delta-sigma modulator loop needs to achieve the required building accuracy in a predetermined integration period, so that power consumption is large, and particularly when the output swing of the integrator is large and the equivalent load capacitance is large, the integrator needs to output a larger current to complete the building.
Therefore, the equivalent load capacitance of the integrator in the delta-sigma modulator is reduced by dynamically adjusting the switched capacitor feedback branch in the invention to reduce the power consumption.
Disclosure of Invention
The invention provides a switched capacitor dynamic feedback circuit of a delta-sigma modulator, which comprises a digital combination circuit DCC module, a DWA1 circuit module, a DWA2 circuit module, a DAC1 circuit module, a DAC2 circuit module and a transconductance amplifier OTA module circuit module;
the digital combination circuit DCC module processes digital feedback signals D1 and D2;
in the DWA circuit module, the input end of the DWA1 circuit module is electrically connected with the output end T1 of the digital combination circuit DCC module, and the input end of the DWA2 circuit module is electrically connected with the output end T2 of the digital combination circuit DCC module;
the input end of the DAC1 circuit module is electrically connected with the output end H1 of the DWA1 circuit module;
the input end of the DAC2 circuit module is electrically connected with the output end H2 of the DWA2 circuit module; the input end of the DAC2 circuit module is also electrically connected with the output end F of the digital combination circuit module;
the positive input end of the transconductance amplifier OTA module is electrically connected with the output end V1 of the DAC1, and the positive input end of the transconductance amplifier OTA module is also electrically connected with the output end V2 of the DAC 2.
The invention has the beneficial effects that: according to the switched capacitor dynamic feedback circuit of the delta-sigma modulator, provided by the invention, the two switched capacitor feedback branches in the delta-sigma modulator are dynamically controlled through the digital combination circuit, the dynamic feedback of the switched capacitor branches is realized, the equivalent load capacitance of the first integrator in the delta-sigma modulator is reduced, and the power consumption is reduced.
The present invention will be described in further detail below with reference to the accompanying drawings.
Drawings
Fig. 1 is a system schematic diagram of a switched capacitor dynamic feedback circuit of a delta-sigma modulator.
Fig. 2 is a schematic diagram of a digital combining circuit DCC module of a switched capacitor dynamic feedback circuit of a delta-sigma modulator.
Fig. 3 is a circuit schematic of a switched capacitor dynamic feedback circuit of a delta-sigma modulator.
Fig. 4 is a timing diagram of a switched capacitor dynamic feedback circuit of a delta-sigma modulator.
Fig. 5 is a circuit node voltage simulation schematic diagram of a switched capacitor dynamic feedback circuit of a delta-sigma modulator.
Detailed Description
To further explain the technical means and effects of the present invention adopted to achieve the intended purpose, the following detailed description of the embodiments, structural features and effects of the present invention will be made with reference to the accompanying drawings and examples.
Example 1
The present embodiment provides a switched capacitor dynamic feedback circuit of a delta-sigma modulator as shown in fig. 1, fig. 2, and fig. 3, which includes a digital combining circuit DCC module, a DWA1 circuit module, a DWA2 circuit module, a DAC1 circuit module, a DAC2 circuit module, and a transconductance amplifier OTA module.
Fig. 3 is a circuit schematic diagram of a switched capacitor dynamic feedback circuit of a delta-sigma modulator, and the operation principle of the circuit is described with reference to the timing sequence in fig. 4. The nth ph2 clock phase time ASAR1 module generates the digital signal D1, and the n +1 ph1 clock phase time ASAR2 module generates the digital signal D2.
At the (n + 1) th ph1 clock phase, the 16 sampling capacitors Cs1[15: 0] of the DAC1 circuit block]Positive plate of1The switch is electrically connected with the ground wire, and the negative plate passes through phi1The switch is electrically connected to the input signal Vi.
At the (n + 1) th ph1 clock phase, the 16 sampling capacitors Cs2[15: 0] of the DAC2 circuit block]Positive plate of1The switch is electrically connected with the ground wire, and the negative plate passes through phi1The switch is electrically connected with the ground wire.
The digital combinational circuit DCC module completes processing of the digital feedback signals D1[2:0] and D2[2:0] at a clock gap between the (n + 1) th ph1 clock phase and the (n + 1) th ph2 clock phase. FIG. 2 is a schematic diagram of the DCC module, where the DCC module processes two paths of digital feedback signals D1[2:0] and D2[2:0], the 4-bit adder module adds the digital signals D1[2:0] and D2[2:0], and the overflow judgment module performs overflow judgment on output signals Co and Sum [3:0] of the adder and generates a flag bit signal F. The logic selector 1 module and the logic selector 2 module in the digital combination circuit DCC module process signals according to the flag bit signal F, if F is low level, no overflow exists, the input end of the logic selector 1 module is electrically connected with Sum [3:0], and the logic selector 1 module processes Sum [3:0] and outputs G1[3:0 ]; the input signals of the logic selector 2 block are all set to zero and the output signals G2[3:0] are set to zero. If F is high level, overflow exists, the input end of the logic selector 1 module is electrically connected with D1[2:0], and the logic selector 1 module processes D1[2:0] and outputs G1[3:0 ]; the inputs of the logic selector 2 block are electrically connected to D2[2:0], and the logic selector 2 block processes D2[2:0] and outputs G2[3:0 ]. Further, the output signals G1[3:0] and G2[3:0] of the logic selector 1 module and the logic selector 2 module are binary codes, and G1[3:0] and G2[3:0] are converted into thermometer codes T1[15:0] and T2[15:0] through the binary thermometer code 1 module and the binary thermometer code 2 module.
In the clock gaps between the (n + 1) th ph1 clock phase and the (n + 1) th ph2 clock phase, the DWA1 and DWA2 circuit modules respectively perform data weighted average processing on thermometer codes T1[15:0] and T2[15:0] and output digital codes H1[15:0] and H2[15:0 ].
At the (n + 1) th ph2 clock phase, the DAC1 circuit block completes the feedback of the signal in the delta-sigma modulator. 16 sampling capacitors Cs1[15: 0] in DAC1 circuit block]Is passed through phi2Switch sum F1[15:0]Electric connection, wherein F1[15:0]From H1[15:0]]Control if H1[15:0]Middle digit high F1[15: 0]]The corresponding digital bit is the power supply voltage; if H1[15:0]If the middle digit is low, F1[15: 0]]The corresponding digital bit is ground. 16 sampling capacitors Cs1[15: 0] in DAC1 circuit block]Positive plate of2And the switch is electrically connected with the positive input end of the transconductance amplifier OTA module, so that the feedback of the signal is completed.
At the (n + 1) th ph2 clock phase, the DAC2 circuit block completes the feedback of the signal in the delta-sigma modulator. 16 sampling capacitors Cs2[15: 0] in DAC2 circuit block]Is passed through phi2Switch sum F2[15:0]Electric connection, wherein F2[15:0]From H2[15:0]]Control if H2[15:0]Middle digit high F2[15: 0]]The corresponding digital bit is the power supply voltage; if H2[15:0]If the middle digit is low, F2[15: 0]]The corresponding digital bit is ground. The overflow signal F generated by the DCC module of the digital combining circuit controls the sampling capacitor Cs2[15: 0]]Whether positive plate of (1) passes through phi2The switch is electrically connected with the positive input end of the transconductance amplifier OTA module, and if the overflow signal F is at high level, the sampling capacitor Cs2[15: 0]]Positive plate of2The switch is electrically connected with the positive input end of the transconductance amplifier OTA module; if the overflow signal F is low, the sampling capacitor Cs2[15: 0]]Is not electrically connected to the positive input of the transconductance amplifier OTA module, i.e., the DAC2 circuit module does not feed back a signal. Therefore, dynamic feedback of the switch capacitance branch in the delta-sigma modulator to the signal is realized.
And in the (n + 1) th ph2 clock phase, the positive input end of the transconductance amplifier OTA module is electrically connected with feedback signals V1 and V2, and the integration operation is completed.
FIG. 5 is a simulation of the node voltages of the circuit, and it can be observed that V1 and V2 overflow only in some time periods, and the DAC2 circuit module is required for signal feedback; when no overflow occurs, only the DAC1 circuit block is needed for signal feedback.
In summary, the operation of one clock phase is completed, and dynamic feedback of signals is realized by using the DAC1 circuit block and the DAC2 circuit block in the delta-sigma modulator through the control of the digital combination circuit DCC module. That is, the equivalent load capacitance of the integrator in the Δ Σ modulator is dynamically adjusted, and during a period of time in which the Δ Σ modulator operates, the average equivalent load capacitance of the integrator is reduced, which can reduce the power consumption of the integrator, and thus, the power consumption of the Δ Σ modulator.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.

Claims (6)

1. A switched capacitor dynamic feedback circuit of a delta-sigma modulator, comprising: the digital combination circuit comprises a digital combination circuit DCC module, a DWA1 circuit module, a DWA2 circuit module, a DAC1 circuit module, a DAC2 circuit module and a transconductance amplifier OTA module, wherein the input end of the digital combination circuit DCC module is digital feedback signals D1 and D2, the output end of the digital combination circuit DCC module is electrically connected with the input ends of the DWA1 and DWA2 circuit modules, the output end of the DWA1 circuit module is electrically connected with the input end of the DAC1 circuit module, the output end of the DWA2 circuit module is electrically connected with the input end of the DAC2 circuit module, the output end of the DAC1 circuit module and the output end of the DAC2 circuit module are electrically connected with the input end of the transconductance amplifier OTA module, and the output end of the transconductance amplifier OTA module is the output end of a first integrator.
2. The switched-capacitor dynamic feedback circuit of a delta-sigma modulator of claim 1, wherein: the digital feedback signals (D1 and D2) are input to the input of the digital combinational circuit DCC module; the digital combination circuit DCC module comprises a 4-bit adder module, an overflow judging module, a logic selector 1 module, a binary thermometer code 1 converting module, a logic selector 2 module and a binary thermometer code 2 module; one end of the 4-bit adder is electrically connected with the digital feedback signal D1, and the other end of the 4-bit adder is electrically connected with the digital feedback signal D2; one end of the overflow judging module is electrically connected with the output end Co of the 4-bit adder, and the other input end of the overflow judging module is also electrically connected with the output end Sum of the 4-bit adder; one input end of the logic selector 1 module is connected with a digital feedback signal D1, one input end of the logic selector 1 module is electrically connected with an output port F of the overflow judging module, and the other input end of the logic selector 1 module is electrically connected with an output port Sum of the 4-bit adder; the input port of the binary thermometer code 1 conversion module is electrically connected with the output end G1 of the logic selector 1 module; one input port of the logic selector 2 module is electrically connected with the output port F of the overflow judgment module, and the other input port of the logic selector 2 module inputs a digital feedback signal D2; the input end of the binary thermometer code 2 module is electrically connected with the output end G2 of the logic selector 2 module.
3. The switched-capacitor dynamic feedback circuit of a delta-sigma modulator of claim 1, wherein: the DWA comprises two modules, namely a DWA1 module and a DWA2 module; the input of the DWA1 module is electrically connected with the output T1 of the digital combined DCC module; the input of the DWA2 module is electrically connected to the output T2 of the digital combined DCC module.
4. The switched-capacitor dynamic feedback circuit of a delta-sigma modulator of claim 1, wherein: the DAC1 circuit block comprises 16 sampling capacitors Cs1[15: 0]](ii) a Negative plate and phi of each sampling capacitor1Switch and phi2The switch is electrically connected; the 16 sampling capacitors Cs1[15: 0]]Positive plate and phi1Switch and phi2The switch is electrically connected; the positive plate of the sampling capacitor passes through phi2The switch is electrically connected to the positive input of the transconductance amplifier.
5. The switched-capacitor dynamic feedback circuit of a delta-sigma modulator of claim 1, wherein: the DAC2 circuit block comprises 16 sampling capacitors Cs2[15: 0]](ii) a Negative plate and phi of each sampling capacitor1Switch and phi2The switch is electrically connected; the 16 sampling capacitors Cs2[15: 0]]Positive plate and phi1Switch and phi2The switch is electrically connected; the positive plate of the sampling capacitor passes through phi2The switch is electrically connected with the positive input end of the transconductance amplifier OTA module.
6. The switched-capacitor dynamic feedback circuit of a delta-sigma modulator of claim 1, wherein: the positive input end of the transconductance amplifier OTA module is electrically connected with the positive plate of the integrating capacitor Ci 1; the positive input end of the transconductance amplifier OTA module is also connected with phi in DAC12One end V1 of the switch is electrically connected; the positive input end of the transconductance amplifier OTA module is also connected with phi in DAC22One end V2 of the switch is electrically connected; the negative input end of the transconductance amplifier OTA module is electrically connected with a ground wire; the output end of the transconductance amplifier OTA module is electrically connected with the negative plate of the integrating capacitor Ci 1.
CN201910833720.9A 2019-09-04 2019-09-04 Switched capacitor dynamic feedback circuit of delta-sigma modulator Pending CN110708073A (en)

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Application Number Priority Date Filing Date Title
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