CN110706994B - Process chamber and semiconductor processing equipment - Google Patents
Process chamber and semiconductor processing equipment Download PDFInfo
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- CN110706994B CN110706994B CN201810750345.7A CN201810750345A CN110706994B CN 110706994 B CN110706994 B CN 110706994B CN 201810750345 A CN201810750345 A CN 201810750345A CN 110706994 B CN110706994 B CN 110706994B
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- bracket
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- chamber
- process chamber
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32458—Vessel
- H01J37/32477—Vessel characterised by the means for protecting vessels or internal parts, e.g. coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32458—Vessel
- H01J37/32513—Sealing means, e.g. sealing between different parts of the vessel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
- H01J2237/334—Etching
Abstract
The invention discloses a process chamber and semiconductor processing equipment. Comprises a chamber body, a bracket, a support, a medium window and at least one sealing element; the support is clamped between the chamber body and the medium window, and the support is clamped between the medium window and the support; the edge areas of the medium window and the bracket, which are close to the outer side of the cavity body, are provided with accommodating structures so as to accommodate the supporting piece; and, a sealing member is provided between the supporter and the dielectric window and/or between the supporter and the supporter. And the edge areas of the medium window and the bracket, which are close to the outer side of the cavity body, are provided with accommodating structures so as to accommodate the supporting pieces. And a sealing member is provided at a portion where the support member contacts the dielectric window and the bracket. Therefore, when the process is carried out, the diffusion path of the plasma to the sealing element can be prolonged, the particle pollution phenomenon caused by the plasma etching of the sealing element is avoided, the cleanliness of the cavity body is improved, and the processing yield of the wafer is improved.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a process chamber and semiconductor processing equipment.
Background
In semiconductor etching equipment, the RF energy provided by the RF power source is generally transmitted into the process chamber to ionize special gases (such as Ar, He, N) in high vacuum state2Hydrogen gas H2Etc.), generating plasma containing a large amount of active particles such as electrons, ions, excited atoms, molecules, radicals, etc., and the active particles and the wafer placed in the process cavity and exposed to the plasma environment have complex interaction, so that various physical and chemical reactions occur on the surface of the wafer material, thereby changing the surface properties of the material and completing the etching process of the wafer.
However, when the process chamber is in the glow starting state, the plasma density between the dielectric window and the support, and between the support and the process chamber is relatively high. Therefore, the peripheral region (the region with higher plasma concentration) is greatly affected by the plasma bombardment etching, so that metal contamination and particle contamination are generated, resulting in the reduction of the wafer yield.
Disclosure of Invention
The invention aims to solve at least one technical problem in the prior art, and provides a process chamber and semiconductor processing equipment.
To achieve the above object, in a first aspect of the present invention, there is provided a process chamber including a chamber body, a support, a dielectric window, and at least one sealing member;
the bracket is clamped between the chamber body and the medium window, and the supporting piece is clamped between the medium window and the bracket; wherein the content of the first and second substances,
the medium window and the edge area of the bracket close to the outer side of the chamber body are provided with accommodating structures for accommodating the supporting piece; and the number of the first and second electrodes,
the seal is provided between the support and the dielectric window and/or between the support and the bracket.
Optionally, the dielectric window includes a first surface and a second surface recessed from the first surface in a direction away from the first surface;
the bracket comprises a first top surface and a second top surface formed by sinking from the first top surface to a direction far away from the first top surface;
the first surface and the first top surface are oppositely arranged at intervals, and the second surface and the second top surface are oppositely arranged at intervals;
the area between the second surface and the second top surface forms the containing structure, and the supporting piece is clamped between the second surface and the second top surface.
Optionally, the number of the sealing members is two, namely a first sealing member and a second sealing member;
the first sealing element is clamped between the second surface of the medium window and the supporting element, and the second sealing element is clamped between the second top surface of the support and the supporting element.
Optionally, the bracket further comprises a first side facing the inside of the chamber body;
a plasma resistant coating is disposed on the first side surface and/or the first top surface.
Optionally, the dimensional relationship among the dielectric window, the bracket and the support member at least satisfies the following one relation:
1mm≤H1≤2mm；
0mm＜H2≤1mm；
0mm＜H3≤1mm；
1mm≤H4≤2mm；
wherein H1Is the vertical distance between the first surface of the dielectric window and the first top surface of the bracket, H2Is the perpendicular distance between the second surface of the dielectric window and the support member, H3Is the vertical distance between the second top surface of the bracket and the supporting member, H4The vertical distance between the end part of the support piece close to the first surface of the dielectric window and the junction of the first surface and the second surface of the dielectric window.
Optionally, the process chamber further comprises:
the cavity liner comprises a shielding part and an installation part connected with the shielding part, the installation part is clamped between the cavity body and the bracket, and the shielding part is positioned on the inner side of the cavity body;
a plurality of matching structures which are arranged in a staggered mode are arranged among the bracket, the mounting part and the chamber body;
the seal is disposed between the bracket and the chamber body.
Optionally, the bracket comprises a first bottom surface and a second bottom surface protruding from the first bottom surface to a position far away from the first bottom surface;
the mounting portion includes a third surface facing the rack, the chamber body includes a fourth surface facing the rack, and the third surface of the mounting portion protrudes from the fourth surface of the chamber body;
the first bottom surface and the third surface are oppositely arranged at intervals, the second bottom surface and the fourth surface are oppositely arranged at intervals, the first bottom surface and the third surface are close to the inner side of the chamber body, and the second bottom surface and the fourth surface are far away from the inner side of the chamber body;
the first bottom surface and the third surface form a group of the matching structures, the second bottom surface and the fourth surface form a group of the matching structures, and the sealing element is arranged between the second bottom surface and the fourth surface.
Optionally, a plasma-resistant coating is disposed on both the first bottom surface of the bracket and a connection surface connecting the first bottom surface and the second bottom surface.
Optionally, the dimensional relationship between the support and the chamber liner satisfies at least one of the following relationships:
1mm≤H5≤2mm；
0mm＜H6≤1mm；
1mm≤H7≤2mm；
wherein H5Is the vertical distance, H, between the first bottom surface of the bracket and the third surface of the mounting portion6Is the vertical distance between the second bottom surface of the support and the fourth surface of the chamber body, H7The vertical distance between the connecting surface of the bracket, which is used for connecting the first bottom surface and the second bottom surface, and the outer side wall of the mounting part is provided.
In a second aspect of the invention, a semiconductor processing apparatus is provided, which comprises the process chamber described above.
According to the process chamber and the semiconductor processing equipment, the accommodating structure is arranged in the edge area, close to the outer side of the chamber body, of the medium window and the support so as to accommodate the supporting piece. And a sealing member is provided at a portion where the support member contacts the dielectric window and the bracket. Therefore, when the process is carried out, the diffusion path of the plasma to the sealing element can be prolonged, the particle pollution phenomenon caused by the plasma etching of the sealing element is avoided, the cleanliness of the cavity body is improved, and the processing yield of the wafer is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a simplified schematic diagram of a process chamber according to a first embodiment of the present invention;
FIG. 2 is an enlarged view of a portion of a dielectric window, a support member and a support in a process chamber according to a second embodiment of the present invention;
FIG. 3 is an enlarged view of a portion of a chamber liner and pedestal in a process chamber according to a third embodiment of the present invention.
Description of the reference numerals
100: a process chamber;
110: a chamber body;
111: a fourth surface;
120: a support;
121: a first top surface;
122: a second top surface;
123: a first side surface;
124: a first bottom surface;
125: a second bottom surface;
126: a first connection face;
130: a support member;
140: a dielectric window;
141: a first surface;
142: a second surface;
151: a first seal member;
152: a second seal member;
153: a third seal member;
160: a housing structure;
170: a chamber liner;
171: a shielding part;
172: an installation part;
172 a: a third surface;
180: a mating structure;
200: and (5) a wafer.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
As shown in fig. 1 and 2, a first aspect of the present invention relates to a process chamber 100, the process chamber 100 including a chamber body 110, a support 120, a support 130, a dielectric window 140, and at least one seal. The support 120 is sandwiched between the chamber body 110 and the dielectric window 140. The supporter 130 is sandwiched between the dielectric window 140 and the supporter 120.
As shown in fig. 2, a receiving structure 160 is disposed at an edge region of the dielectric window 140 and the bracket 120 close to the outer side of the chamber body 110 to receive the supporting member 130. That is, as shown in fig. 2, a receiving structure 160 is provided at a right portion of the dielectric window 140 and the supporter 120, and the supporter 130 is placed in the receiving structure 160. Further, in order to enable effective sealing between the media window 140 and the bracket 120, a first seal 151 may be provided between the support 130 and the media window 140, and/or a second seal 152 may be provided between the support 130 and the bracket 120. That is, as shown in fig. 2, a first sealing member 151 is provided between the top of the supporter 130 and the bottom of the media window 140, and a second sealing member 152 is provided between the bottom of the supporter 130 and the top of the supporter 120, so that effective sealing between the media window 140 and the supporter 120 can be effectively achieved.
Specifically, during the processing, a large amount of plasma is generated inside the chamber body 110, so that the wafer 200 is processed (e.g., etched or deposited) by the formed plasma. When plasma is formed inside the chamber body 110, the plasma density is concentrated in the region where the dielectric window 140 and the support 120 are located, and the plasma easily enters the gap between the dielectric window 140 and the support 120. However, in the process chamber 100 with the structure of the present embodiment, the sealing element is far away from the inner side of the chamber body 110, that is, the diffusion path of the plasma from the inner side of the chamber body 110 to the sealing element is prolonged, so that the plasma etching of the sealing element can be weakened or even completely avoided, and further, the particle contamination caused by the etching of the sealing element can be avoided, the cleanliness in the chamber body 110 is improved, and the processing yield of the wafer 200 is improved.
In the process chamber 100 of the present embodiment, the receiving structure 160 is disposed at the edge regions of the dielectric window 140 and the support 120 near the outer side of the chamber body 110 to receive the supporting member 130. A seal member is provided at a portion where the supporter 130 contacts the dielectric window 140 and the bracket 120. Thus, during the process, the diffusion path of the plasma to the sealing member can be extended, the particle contamination phenomenon caused by the plasma etching of the sealing member can be avoided, and the cleanliness of the chamber body 110 can be improved, so as to improve the processing yield of the wafer 200.
Specifically, as shown in fig. 2, the dielectric window 140 includes a first surface 141 and a second surface 142 concavely formed from the first surface 141 toward a direction away from the first surface 141, that is, the first surface 141 and the second surface 142 form a step-plane structure. The support 120 includes a first top surface 121 and a second top surface 122 recessed from the first top surface 121 in a direction away from the first top surface 121, that is, the first top surface 121 and the second top surface 122 form a step surface structure.
As shown in fig. 2, the first surface 141 of the dielectric window 140 is spaced apart from and opposite to the first top surface 121 of the supporter 120. The second surface 142 of the dielectric window 140 is spaced opposite the second top surface 122 of the shelf 120. Thus, the area between the second surface 142 of the dielectric window 140 and the second top surface 122 of the bracket 120 forms the receiving structure 160. The supporting member 130 is sandwiched between the second surface 142 and the second top surface 122.
The process chamber 100 of the present embodiment forms the receiving structure 160 by providing a step surface on the surfaces of the dielectric window 140 and the support 120 opposite to each other. The accommodating structure 160 has a simple manufacturing process, and can effectively reduce the manufacturing cost of the process chamber 100 and improve the economic benefit.
As shown in fig. 2, a first sealing member 151 is interposed between the second surface 142 of the dielectric window 140 and the supporter 130, and a second sealing member 152 is interposed between the second top surface 122 of the supporter 120 and the supporter 130.
In the process chamber 100 of the present embodiment, the sealing members are disposed between the dielectric window 140 and the supporting member 130, and between the supporting member 130 and the support 120, so that the sealing between the dielectric window 140 and the support 120 can be effectively realized. Meanwhile, the position of the arranged sealing element is far away from the inner side of the chamber body 110, so that the diffusion path of the plasma diffused to the sealing element can be prolonged, the risk of particle pollution caused by the plasma etching of the sealing element is reduced, the processing yield of the wafer 200 is improved, and the manufacturing cost is reduced.
As shown in fig. 2, the bracket 120 further includes a first side 123 facing the inside of the chamber body 110. A plasma-resistant coating P is provided on the first side 123 and on the first top surface 121 thereof.
As mentioned above, a large amount of plasma is generated near the dielectric window 140 and the support 120 during the process, and in order to avoid etching the support 120 by the plasma, the plasma-resistant coating P may be applied to areas with higher plasma density, for example, near the first side 123 and the first top 121 of the plasma generation area. Therefore, the process chamber 100 of the present embodiment can further effectively avoid the plasma etching support 120, so as to avoid metal contamination caused by the plasma etching support, thereby improving the processing yield of the wafer 200 and reducing the manufacturing cost.
It should be noted that the first side 123 of the stent 120 can be coated as desired without the entire first side 123 being coated with the plasma-resistant coating P.
As shown in fig. 2, in order to effectively prevent metal contamination caused by plasma etching the support 120 and particle contamination caused by etching the sealing member, the inventors of the present invention conducted experimental studies on the dimensions of the dielectric window 140, the support 120 and the support 130, and found that when the following relationship is satisfied, the plasma etching the support 120 and the sealing member can be effectively prevented.
1mm≤H1≤2mm (1)
0mm＜H2≤1mm (2)
0mm＜H3≤1mm (3)
1mm≤H4≤2mm (4)
Wherein H1Is the perpendicular distance between the first surface 141 of the dielectric window 140 and the first top surface 121 of the bracket 120Ion, H2Is the vertical distance, H, between the second surface 142 of the dielectric window 140 and the support 1303Is the vertical distance between the second top surface 122 of the bracket 120 and the supporting member 130, H4Is the perpendicular distance between the end of the support 130 near the first surface 141 of the dielectric window 140 and the intersection of the first surface 141 and the second surface 142 of the dielectric window 140.
As shown in fig. 1 and 3, the process chamber 100 further includes a chamber liner 170, the chamber liner 170 includes a shielding portion 171 and a mounting portion 172 connected to the shielding portion 171, the mounting portion 172 is interposed between the chamber body 110 and the support 120, and the shielding portion 171 is located inside the chamber body 110. The bracket 120, the mounting portion 172 and the chamber body 110 have a plurality of fitting structures 180 arranged alternately. A third seal 153 is disposed between the bracket 120 and the chamber body 110.
As described above, during the process, a large amount of plasma is generated inside the chamber body 110, and the plasma density is also higher in the regions of the pedestal 120 and the chamber liner 170, so that the process chamber 100 of the present embodiment has a plurality of matching structures 180 disposed between the pedestal 120, the mounting portion 172 and the chamber body 110, and a third sealing member 153 disposed between the chamber body 110 and the pedestal 120 (the third sealing member 153 is disposed outside the chamber body 110), so as to extend the diffusion path of the plasma, thereby reducing or even completely preventing the third sealing member 153 from being etched by the plasma, further avoiding particle contamination caused by etching the third sealing member 153, improving the cleanliness inside the chamber body 110, and improving the process yield of the wafer 200.
Specifically, as shown in fig. 3, the bracket 120 includes a first bottom surface 124 and a second bottom surface 125 protruding from the first bottom surface 124 to a position far away from the first bottom surface 124, that is, the first bottom surface 124 and the second bottom surface 125 form a stepped surface structure. The mounting part 172 includes a third surface 172a facing the supporter 120, the chamber body 110 includes a fourth surface 111 facing the supporter 120, and the third surface 172a of the mounting part 172 protrudes from the fourth surface 111 of the chamber body 110. That is, the third surface 172a and the fourth surface 111 form a stepped surface structure. Wherein the first bottom surface 124 of the bracket 120 is spaced opposite to the third surface 172a of the mounting part 172, the second bottom surface 125 of the bracket 120 is spaced opposite to the fourth surface 111 of the chamber body 110, and, as shown in fig. 3, the first bottom surface 124 of the bracket 120 and the third surface 172a of the mounting part 172 are both close to the inside of the chamber body 110 (i.e., on the right side as viewed in fig. 3), and the second bottom surface 125 of the bracket 120 and the fourth surface 111 of the chamber body 110 are both far from the inside of the chamber body 110 (i.e., on the left side as viewed in fig. 3).
The first bottom surface 124 of the bracket 120 and the third surface 172a of the mounting portion 172 form a set of matching structures 180, and the second bottom surface 125 of the bracket 120 and the fourth surface 111 of the chamber body 110 form a set of matching structures 180. A third seal 153 is located between the second bottom surface 125 and the fourth surface 111.
The process chamber 100 of the present embodiment forms the fitting structure 180 by providing a step surface structure on the surfaces of the support 120, the mounting portion 172, and the chamber body 110 opposite to each other. The manufacturing process of the matching structure 180 is simple, the manufacturing cost of the process chamber 100 can be effectively reduced, and the economic benefit is improved.
As shown in fig. 3, the first bottom surface 124 of the support 120 and the first connection surface 126 connecting the first bottom surface 124 and the second bottom surface 125 are provided with the plasma-resistant coating P.
As noted above, a large amount of plasma may be generated near the chamber liner 170 and the pedestal 120 during processing, and in order to avoid plasma etching of the pedestal 120, plasma-resistant coatings may be applied to areas of higher plasma density, such as the first bottom surface 124 and the first connection surface 126. Therefore, the process chamber 100 of the present embodiment can further effectively avoid the plasma etching support 120, so as to avoid metal contamination caused by the plasma etching support, thereby improving the processing yield of the wafer and reducing the manufacturing cost.
As shown in fig. 3, in order to effectively prevent metal contamination caused by plasma etching the support 120 and particle contamination caused by etching the third sealing member 153, the inventors of the present invention conducted experimental studies on the size between the chamber liner 170 and the support 120, and found that the plasma etching the support 120 and the third sealing member 153 can be effectively prevented when the following relationship is satisfied.
1mm≤H5≤2mm (5)
0mm＜H6≤1mm (6)
1mm≤H7≤2mm (7)
Wherein H5Is the vertical distance, H, between the first bottom surface 124 of the bracket 120 and the third surface 172a of the mounting portion 1726Is a vertical distance, H, between the second bottom surface 125 of the supporter 120 and the fourth surface 111 of the chamber body 1107Is the vertical distance between the first connection surface 126 of the bracket 120 connecting the first bottom surface 124 and the second bottom surface 125 and the outer sidewall (e.g., the sidewall on the left side in fig. 3) of the mounting portion 172.
In a second aspect of the invention, a semiconductor processing apparatus is provided, the semiconductor processing apparatus comprising the process chamber described above.
The semiconductor processing apparatus of the present embodiment has the process chamber 100 as described above, and the accommodating structure 160 is disposed at the edge regions of the dielectric window 140 and the support 120 close to the outer side of the chamber body 110 to accommodate the support 130. A seal member is provided at a portion where the supporter 130 contacts the dielectric window 140 and the bracket 120. Therefore, when the process is carried out, the diffusion path of the plasma to the sealing element can be prolonged, the particle pollution phenomenon caused by the plasma etching of the sealing element can be avoided, the cleanliness of the chamber body 110 is improved, and the processing yield of the wafer is improved.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (9)
1. A process chamber comprising a chamber body, a support, a media window, and at least one seal;
the bracket is clamped between the chamber body and the medium window, and the supporting piece is clamped between the medium window and the bracket; wherein the content of the first and second substances,
the medium window and the edge area of the bracket close to the outer side of the chamber body are provided with accommodating structures for accommodating the supporting piece; and the number of the first and second electrodes,
the seal is provided between the support and the dielectric window and/or between the support and the bracket.
2. The process chamber of claim 1,
the dielectric window comprises a first surface and a second surface which is formed by sinking from the first surface towards the direction far away from the first surface;
the bracket comprises a first top surface and a second top surface formed by sinking from the first top surface to a direction far away from the first top surface;
the first surface and the first top surface are oppositely arranged at intervals, and the second surface and the second top surface are oppositely arranged at intervals;
the area between the second surface and the second top surface forms the containing structure, and the supporting piece is clamped between the second surface and the second top surface.
3. The process chamber of claim 2, wherein the number of seals is two, a first seal and a second seal;
the first sealing element is clamped between the second surface of the medium window and the supporting element, and the second sealing element is clamped between the second top surface of the support and the supporting element.
4. The process chamber of claim 2 or 3, wherein the support further comprises a first side facing an inside of the chamber body;
a plasma resistant coating is disposed on the first side surface and/or the first top surface.
5. The process chamber of claim 2 or 3, wherein the dimensional relationship between the dielectric window, the support, and the support satisfies at least one of the following relationships:
1mm≤H1≤2mm；
0mm＜H2≤1mm；
0mm＜H3≤1mm；
1mm≤H4≤2mm；
wherein H1Is the vertical distance between the first surface of the dielectric window and the first top surface of the bracket, H2Is the perpendicular distance between the second surface of the dielectric window and the support member, H3Is the vertical distance between the second top surface of the bracket and the supporting member, H4The vertical distance between the end part of the support piece close to the first surface of the dielectric window and the junction of the first surface and the second surface of the dielectric window.
6. The process chamber of claim 1, further comprising:
the cavity liner comprises a shielding part and an installation part connected with the shielding part, the installation part is clamped between the cavity body and the bracket, and the shielding part is positioned on the inner side of the cavity body;
a plurality of matching structures which are arranged in a staggered mode are arranged among the bracket, the mounting part and the chamber body;
the sealing element is arranged between the bracket and the chamber body;
the bracket comprises a first bottom surface and a second bottom surface protruding from the first bottom surface to a position far away from the first bottom surface;
the mounting portion includes a third surface facing the rack, the chamber body includes a fourth surface facing the rack, and the third surface of the mounting portion protrudes from the fourth surface of the chamber body;
the first bottom surface and the third surface are oppositely arranged at intervals, the second bottom surface and the fourth surface are oppositely arranged at intervals, the first bottom surface and the third surface are close to the inner side of the chamber body, and the second bottom surface and the fourth surface are far away from the inner side of the chamber body;
the first bottom surface and the third surface form a group of the matching structures, the second bottom surface and the fourth surface form a group of the matching structures, and the sealing element is arranged between the second bottom surface and the fourth surface.
7. The process chamber of claim 6, wherein the first bottom surface of the support and a connection surface connecting the first bottom surface and the second bottom surface are each provided with a plasma resistant coating.
8. The process chamber of claim 6 or 7, wherein the dimensional relationship between the support and the chamber liner satisfies at least one of the following relationships:
1mm≤H5≤2mm；
0mm＜H6≤1mm；
1mm≤H7≤2mm；
wherein H5Is the vertical distance, H, between the first bottom surface of the bracket and the third surface of the mounting portion6Is the vertical distance between the second bottom surface of the support and the fourth surface of the chamber body, H7The vertical distance between the connecting surface of the bracket, which is used for connecting the first bottom surface and the second bottom surface, and the outer side wall of the mounting part is provided.
9. A semiconductor processing apparatus comprising the process chamber of any of claims 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810750345.7A CN110706994B (en) | 2018-07-10 | 2018-07-10 | Process chamber and semiconductor processing equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810750345.7A CN110706994B (en) | 2018-07-10 | 2018-07-10 | Process chamber and semiconductor processing equipment |
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|---|---|
| CN110706994A CN110706994A (en) | 2020-01-17 |
| CN110706994B true CN110706994B (en) | 2022-04-22 |
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| CN201810750345.7A Active CN110706994B (en) | 2018-07-10 | 2018-07-10 | Process chamber and semiconductor processing equipment |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63145781A (en) * | 1986-12-09 | 1988-06-17 | Canon Inc | Device for forming functional deposited film by microwave plasma cvd method |
| CN105590880A (en) * | 2014-11-18 | 2016-05-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Reaction cavity |
| CN105682962A (en) * | 2013-09-24 | 2016-06-15 | 法国圣戈班玻璃厂 | Sealing arrangement for a vehicle window |
| CN105789009A (en) * | 2014-12-26 | 2016-07-20 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Upper cover for plasma etching equipment and plasma etching equipment |
-
2018
- 2018-07-10 CN CN201810750345.7A patent/CN110706994B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63145781A (en) * | 1986-12-09 | 1988-06-17 | Canon Inc | Device for forming functional deposited film by microwave plasma cvd method |
| CN105682962A (en) * | 2013-09-24 | 2016-06-15 | 法国圣戈班玻璃厂 | Sealing arrangement for a vehicle window |
| CN105590880A (en) * | 2014-11-18 | 2016-05-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Reaction cavity |
| CN105789009A (en) * | 2014-12-26 | 2016-07-20 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Upper cover for plasma etching equipment and plasma etching equipment |
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| CN110706994A (en) | 2020-01-17 |
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