CN110704348A - Circuit, server and computer compatible with standard PCIE card and non-standard PCIE card - Google Patents

Circuit, server and computer compatible with standard PCIE card and non-standard PCIE card Download PDF

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Publication number
CN110704348A
CN110704348A CN201910797129.2A CN201910797129A CN110704348A CN 110704348 A CN110704348 A CN 110704348A CN 201910797129 A CN201910797129 A CN 201910797129A CN 110704348 A CN110704348 A CN 110704348A
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capacitor
terminal
resistor
power supply
module
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CN110704348B (en
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梁秋妹
刘全仲
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SHENZHEN ZHONGDIAN CHANGCHENG INFORMATION SAFETY SYSTEM Co Ltd
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SHENZHEN ZHONGDIAN CHANGCHENG INFORMATION SAFETY SYSTEM Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Dc-Dc Converters (AREA)

Abstract

A circuit, a server and a computer compatible with standard PCIE cards and non-standard PCIE cards comprise a PCIE slot module, a control module, a voltage conversion module and a switch module; the PCIE slot module transmits a PCIE signal; the PCIE signals include a reservation signal; the reserved signal is forwarded by a reserved pin of the PCIE slot module; the control module generates a voltage transformation enabling signal and a switch control signal according to the reserved signal; the voltage conversion module performs voltage conversion on the first power supply according to the voltage transformation enabling signal to generate a second power supply to supply power to the non-standard PCIE card; the switch module is used for connecting or disconnecting the first power supply according to the switch control signal to supply power to the standard PCIE card; the method and the device realize the compatible use of the standard PCIE card and the non-standard PCIE card in the same PCIE slot, achieve the purposes of resource integration, reduction of the use of components, cost reduction and volume reduction, avoid burning the non-standard PCIE card due to mistaken insertion of the non-standard PCIE card into the PCIE slot of the standard PCIE card, and improve the compatibility and reliability of the PCIE slot.

Description

Circuit, server and computer compatible with standard PCIE card and non-standard PCIE card
Technical Field
The invention belongs to the technical field of server switching card equipment, and particularly relates to a circuit compatible with a standard PCIE card and a non-standard PCIE card, a server and a computer.
Background
PCI-E (Peripheral Component Interconnect Express), a high-speed serial computer expansion bus standard, is a latest bus and interface standard, and PCI-E slots are all known as PCI-Express. The PCI-E bus and interface standard has high data transmission rate and considerable development potential, and the PCI Express has various specifications, can meet the requirements of low-speed equipment and high-speed equipment appearing at present and in a certain time in the future, is compatible with the present PCI technology and equipment on a software level, and supports the initialization of the PCI equipment and a memory module, so that the PCI-E becomes the mainstream of the interface of the display card at present.
Most servers and desktops on the market currently have PCIE slots for expansion, but PCIE cards are divided into standard and non-standard ones. The power supply voltages of a common standard PCIE card and a non-standard PCIE card are different, and the power supply voltages of the non-standard PCIE card have diversity, so that the PCIE card can be burnt out when the non-standard PCIE card is inserted into a standard PCIE slot, and the existing server and desktop use the standard PCIE card and the non-standard PCIE card in different PCIE slots, which can cause resource waste to a certain extent, and increase the volume of a circuit board, thereby increasing the volume of equipment such as a server.
Therefore, in the conventional technical scheme, the problems of PCIE slot resource waste, high cost and large size caused by the fact that the standard PCIE card and the non-standard PCIE card need to be separately provided with corresponding PCIE slots exist.
Disclosure of Invention
In view of this, embodiments of the present invention provide a circuit, a server, and a computer compatible with a standard PCIE card and a non-standard PCIE card, which are intended to solve the problems of PCIE slot resource waste, high cost, and large volume caused by the fact that the standard PCIE card and the non-standard PCIE card need to be separately provided with corresponding PCIE slots in the conventional technical solution.
A first aspect of an embodiment of the present invention provides a circuit compatible with a standard PCIE card and a non-standard PCIE card, including:
a PCIE slot module for forwarding PCIE signals; the PCIE signals include a reservation signal; the reservation signal is forwarded by a reservation pin of the PCIE slot module;
the control module is connected with the PCIE slot module and used for generating a voltage transformation enabling signal and a switch control signal according to the retention signal;
the voltage conversion module is connected with the control module and the PCIE slot module and is used for performing voltage conversion on a first power supply according to the voltage transformation enabling signal so as to generate a second power supply to supply power to the non-standard PCIE card;
and the switch module is connected with the control module and the PCIE slot module and used for connecting or disconnecting the first power supply to supply power to the standard PCIE card according to the switch control signal.
In one embodiment, the circuit compatible with the standard PCIE card and the non-standard PCIE card further includes:
and the power supply module is used for generating a power supply according to the direct current power supply to supply power to each functional module.
In one embodiment, the control module comprises a programmable logic processor, a first magnetic bead, a first capacitor, a second capacitor and a third capacitor;
an input/output power supply end of the programmable logic processor is connected with a first end of the first capacitor and a first end of the first magnetic bead, a second end of the first magnetic bead is connected with a first power supply, a second end of the first capacitor is connected with a power ground, an analog power supply end of the programmable logic processor is connected with a first end of the second capacitor and a first end of the first magnetic bead, a second end of the second capacitor is connected with a power ground, an on-chip voltage stabilizing power supply end of the programmable logic processor is connected with a first end of the third capacitor and a first end of the first magnetic bead, a second end of the third capacitor is connected with the power ground, and a ground end of the programmable logic processor is connected with the power ground;
the first input and output end of the programmable logic processor is a reserved signal input end of the control module;
a second input/output end of the programmable logic processor is a reset enabling signal output end of the control module;
the third input/output end of the programmable logic processor is a voltage transformation enabling signal output end of the control module;
and a fourth input/output end of the programmable logic processor is a switch control signal output end of the control module.
In one embodiment, the switch module comprises a first resistor, a second resistor, a third resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a first field effect transistor, a second field effect transistor and a third field effect transistor;
the grid electrode of the first field effect transistor and the first end of the first resistor are jointly formed into a switch control signal input end of the switch module;
the grid electrode of the first field effect transistor is connected with the second end of the first resistor, the first end of the first resistor is connected with a second power supply, the source electrode of the first field effect transistor is connected with a power ground, the drain electrode of the first field effect transistor is connected with the second end of the second resistor, the first end of the fourth capacitor and the grid electrode of the second field effect transistor, the first end of the second resistor is connected with the first end of the fifth capacitor and the third power supply, the second end of the fifth capacitor is connected with the power ground, the second end of the fourth capacitor and the source electrode of the second field effect transistor are connected with the power ground, the drain electrode of the second field effect transistor is connected with the second end of the third resistor and the grid electrode of the third field effect transistor, the source electrode of the third field effect transistor, the first end of the third resistor and the first end of the seventh capacitor are connected with the first power supply, the drain electrode of the third field effect transistor is connected with the first end of the sixth capacitor, and the second end of the sixth capacitor is connected with the power ground;
the drain electrode of the third field effect transistor and the first end of the sixth capacitor are jointly formed into a first power output end of the switch module.
In one embodiment, the voltage conversion module includes a first synchronous buck chip, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a first inductor, a second magnetic bead, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, and a fifteenth capacitor;
a mode selection terminal of the first synchronous buck chip is connected to a first terminal of the fourth resistor, a second terminal of the fourth resistor and a ground terminal of the first synchronous buck chip are connected to a power ground, a first switching power terminal of the first synchronous buck chip, a second switching power terminal of the first synchronous buck chip and a first terminal of the eighth capacitor are connected to the first power supply, a second terminal of the eighth capacitor is connected to the power ground, an auxiliary monitoring voltage input terminal of the first synchronous buck chip is connected to a first terminal of the eighth resistor, a first terminal of the thirteenth capacitor and a first terminal of the ninth resistor, a second terminal of the eighth resistor, a second terminal of the thirteenth capacitor and a first terminal of the twelfth capacitor are connected to the second power supply, and a second terminal of the twelfth capacitor is connected to the power ground, the ground terminal of the first synchronous buck chip, the second terminal of the ninth resistor, the first terminal of the fourteenth capacitor, and the first terminal of the fifteenth capacitor are connected to ground, the second terminal of the fifteenth capacitor is connected to the first terminal of the tenth resistor, the second terminal of the tenth resistor and the second terminal of the fourteenth capacitor are connected to the error signal amplification output terminal of the first synchronous buck chip, the slow start terminal of the first synchronous buck chip is connected to the first terminal of the eleventh capacitor, the second terminal of the eleventh capacitor is connected to ground, the enable terminal of the first synchronous buck chip is connected to the first terminal of the sixth resistor, the bootstrap terminal of the first synchronous buck chip is connected to the first terminal of the ninth capacitor, the first switch node terminal of the first synchronous buck chip, the second switch node terminal of the first synchronous buck chip, and the second terminal of the ninth capacitor are connected to the first terminal of the first inductor One end of the first synchronous buck chip is connected, a second end of the first inductor is connected with a first end of the second magnetic bead, a second end of the second magnetic bead, a first end of the seventh resistor and a first end of the tenth capacitor are connected with the second power supply, a second end of the seventh resistor and a second end of the tenth capacitor are connected with a power ground, a power source goodness judgment end of the first synchronous buck chip is connected with a first end of the fifth resistor, and a second end of the fifth resistor is connected with a fourth power supply;
and the second end of the sixth resistor is a transformation enabling signal input end of the voltage conversion module.
In one embodiment, the switch module comprises at least one of a transistor, a relay, a field effect transistor, and a diode.
A second aspect of the embodiments of the present invention provides a server, where the server includes the above-mentioned circuit compatible with the standard PCIE card and the non-standard PCIE card.
A third aspect of the embodiments of the present invention provides a computer, where the computer includes the above-mentioned circuit compatible with the standard PCIE card and the non-standard PCIE card.
According to the embodiment of the invention, a PCIE signal comprising a retention signal is forwarded through a PCIE slot module, a control module generates a transformation enabling signal and a switch control signal according to the retention signal, a voltage conversion module performs voltage conversion on a first power supply according to the transformation enabling signal to generate a second power supply to supply power to a non-standard PCIE card, and a switch module communicates or turns off the first power supply to supply power to the standard PCIE card according to the switch control signal, so that the standard PCIE card and the non-standard PCIE card can be used in the same PCIE slot in a compatible manner, and the purposes of resource integration, component use reduction, cost reduction and volume reduction are achieved; meanwhile, the phenomenon that the ordinary non-standard PCIE card is mistakenly connected into the PCIE slot of the standard PCIE card to burn the non-standard PCIE card is avoided, and the compatibility and the reliability of the PCIE slot are improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a circuit compatible with a standard PCIE card and a non-standard PCIE card according to an embodiment of the present invention;
fig. 2 is another schematic structural diagram of a circuit compatible with a standard PCIE card and a non-standard PCIE card according to an embodiment of the present invention;
fig. 3 is a schematic diagram of an exemplary circuit of a circuit compatible with a standard PCIE card and a non-standard PCIE card according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, a schematic structural diagram of a circuit compatible with a standard PCIE card and a non-standard PCIE card according to an embodiment of the present invention is shown, for convenience of description, only parts related to the embodiment are shown, and detailed descriptions are as follows:
a circuit compatible with standard PCIE cards and non-standard PCIE cards comprises a PCIE slot module 11, a control module 12, a voltage conversion module 13 and a switch module 14.
The PCIE slot module 11 is configured to forward a PCIE signal; the PCIE signals include a reservation signal; the reservation signal is forwarded by a reservation pin of the PCIE slot module 11; the control module 12 is connected to the PCIE slot module 11, and is configured to generate a voltage transformation enable signal and a switch control signal according to the reservation signal; the voltage conversion module 13 is connected with the control module 12 and the PCIE slot module 11, and is configured to perform voltage conversion on the first power supply according to the voltage transformation enabling signal to generate a second power supply for supplying power to the non-standard PCIE card; the switch module 14 is connected to the control module 12 and the PCIE slot module 11, and is configured to connect or disconnect the first power supply to supply power to the standard PCIE card according to the switch control signal.
In a specific implementation, the PCIE slot module 11 includes a PCI-E slot. The control module 12 is further configured to generate a reset enable signal after the power-on and the power-on, and output the reset enable signal to the PCIE slot module 11 to control the PCIE slot to reset. The control module 12 detects a retention signal forwarded by a retention pin of the PCIE slot module 11, the PCIE slot module 11 accesses different PCIE cards, the retention signal forwarded by the retention pin of the PCIE slot module 11 is different, for example, the PCIE slot module 11 accesses a standard PCIE card, it is detected that the voltage of the retention pin of the PCIE slot module 11 is a first voltage (12V or 3V3), the PCIE slot module 11 accesses a non-standard PCIE card, it is detected that the voltage of the retention pin of the PCIE slot module 11 is a second voltage (5V, 1.8V or other voltages), and the control module 12 determines whether the PCIE slot module 11 accesses the standard PCIE card or the non-standard PCLE card according to the retention signal forwarded by the retention pin of the PCIE slot module 11. When the control module 12 determines that the standard PCIE card is accessed according to the reservation signal, it generates a first level switch control signal and a second level voltage transformation enable signal, and controls the switch module 14 to turn on the first power supply to supply power to the standard PCIE card, and stop performing voltage conversion to generate a second power supply; when the control module 12 determines that the non-standard PCIE card is accessed according to the reservation signal, it generates a switch control signal of the second level and a voltage transformation enabling signal of the first level, controls the switch module 14 to turn off the first power supply to supply power to the standard PCIE card, and controls the enabling voltage conversion module 13 to convert the first power supply into the second power supply to supply power to the non-standard PCIE card. Optionally, the first level is a high level, the second level is a low level, and a voltage of the first power supply is different from a voltage of the second power supply. Therefore, the voltage required by the PCIE card which is connected into the PCIE slot module 11 in a matching mode is automatically adjusted and output, the standard PCIE card and the non-standard PCIE card are compatible to be used in the same PCIE slot, and the purposes of resource integration, use reduction of components, cost reduction and volume reduction are achieved; meanwhile, the phenomenon that the ordinary non-standard PCIE card is mistakenly connected into the PCIE slot of the standard PCIE card to burn the non-standard PCIE card is avoided, and the compatibility and the reliability of the PCIE slot are improved.
Referring to fig. 2, in one embodiment, the circuit compatible with the standard PCIE card and the non-standard PCIE card further includes a power module 01.
The power module 01 is used for generating a power supply according to the direct current power supply to supply power to each functional module.
In specific implementation, the dc power supply may be a battery power supply, or may be a dc power supply obtained by converting an externally accessed power supply, and the power module 01 includes a voltage conversion and voltage stabilization chip, and can convert the dc power supply to generate each power supply, thereby satisfying the power demand of each functional module, and ensuring normal and stable operation.
Referring to fig. 3, in one embodiment, the control module 12 includes a programmable logic processor U1, a first magnetic bead FB1, a first capacitor C1, a second capacitor C2, and a third capacitor C3.
An input and output power supply terminal VCCIO of the programmable logic processor U1 is connected with a first end of a first capacitor C1 and a first end of a first magnetic bead FB1, a second end of the first magnetic bead FB1 is connected with a first power supply P3V3_ STBY, a second end of a first capacitor C1 is connected with a power ground, an analog power supply terminal VCCA of the programmable logic processor U1 is connected with a first end of a second capacitor C2 and a first end of the first magnetic bead FB1, a second end of a second capacitor C2 is connected with the power ground, an on-chip voltage stabilizing power supply terminal VCC _ ONE of the programmable logic processor U1 is connected with a first end of a third capacitor C3 and a first end of the first magnetic bead FB1, a second end of a third capacitor C3 is connected with the power ground, and a ground terminal of the programmable logic processor GND U1 is connected with the power ground.
The first input/output terminal IO _1A _ L1P of the programmable logic processor U1 is a reserved signal input terminal of the control module 12.
A second input/output terminal IO _1A _ L3N of the programmable logic processor U1 is a reset enable signal output terminal of the control module 12.
The third input/output terminal IO _1A _ L3P of the programmable logic processor U1 is a voltage transformation enable signal output terminal of the control module 12.
A fourth input/output terminal IO _1A _ L10P of the programmable logic processor U1 is a switch control signal output terminal of the control module 12.
Referring to fig. 3, in one embodiment, the switch module 14 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, a first fet Q1, a second fet Q2, and a third fet Q3.
The gate of the first fet Q1 and the first terminal of the first resistor R1 together form a switch control signal input terminal of the switch module 14.
The grid of the first field effect transistor Q1 is connected with the second end of the first resistor R1, the first end of the first resistor R1 is connected with the second power supply P3V3_ STBY, the source of the first field effect transistor Q1 is connected with the power ground, the drain of the first field effect transistor Q1 is connected with the second end of the second resistor R2, the first end of the fourth capacitor C4 and the second end of the fourth capacitor C4
A gate of the second fet Q2, a first terminal of the second resistor R2 is connected to the first terminal of the fifth capacitor C5 and the third power supply P5V, a second terminal of the fifth capacitor C5 is connected to the power ground, a second terminal of the fourth capacitor C4 and a source of the second fet Q2 are connected to the power ground, a drain of the second fet Q2 is connected to the second terminal of the third resistor R3 and the gate of the third fet Q3, a source of the third fet Q3, a first terminal of the third resistor R3, and a first terminal of the seventh capacitor C7 are connected to the first power supply, a drain of the third fet Q3 is connected to the first terminal of the sixth capacitor C6, and a second terminal of the sixth capacitor C6 is connected to the power ground.
The drain of the third fet Q3 and the first terminal of the sixth capacitor C6 together form a first power output of the switch module 14.
Referring to fig. 3, in an embodiment, the voltage conversion module 13 includes a first synchronous buck chip U2, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a first inductor L1, a second magnetic bead FB2, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, and a fifteenth capacitor C15.
The mode selection terminal RT/CLK of the first synchronous buck chip U2 is connected to the first terminal of the fourth resistor R4, the second terminal of the fourth resistor R4 and the ground terminal GND of the first synchronous buck chip U2 are connected to ground, the first switching power terminal PVIN of the first synchronous buck chip U2, the second switching power terminal VIN of the first synchronous buck chip U2 and the first terminal of the eighth capacitor C8 are connected to the first power supply, the second terminal of the eighth capacitor C8 is connected to ground, the auxiliary monitoring voltage input terminal VSENSE of the first synchronous buck chip U2 is connected to the first terminal of the eighth resistor R8, the first terminal of the thirteenth capacitor C13 and the first terminal of the ninth resistor R9, the second terminal of the eighth resistor R8, the second terminal of the thirteenth capacitor C13 and the first terminal of the twelfth capacitor C12 are connected to the second power supply, the second terminal of the twelfth capacitor C12 is connected to ground, and the ground terminal GND terminal of the first synchronous buck chip U2 is connected to ground, A second end of the ninth resistor R9, a first end of the fourteenth capacitor C14 and a first end of the fifteenth capacitor C15 are connected to the power ground, a second end of the fifteenth capacitor C15 is connected to a first end of the tenth resistor R10, a second end of the tenth resistor R10 and a second end of the fourteenth capacitor C14 are connected to the error signal amplification output terminal COMP of the first synchronous buck chip U2, the slow start terminal SS/TR of the first synchronous buck chip U2 is connected to a first end of the eleventh capacitor C11, a second end of the eleventh capacitor C11 is connected to the power ground, the enable terminal EN of the first synchronous buck chip U2 is connected to a first end of the sixth resistor R8, the bootstrap terminal BOOT of the first synchronous buck chip U2 is connected to a first end of the ninth capacitor C9, the first switch node PH terminal 1 of the first synchronous buck chip U2, the second switch node PH 3984 of the first synchronous buck chip U3727 and the second end of the ninth capacitor C1, the second end of the first inductor L1 is connected to the first end of the second magnetic bead FB2, the second end of the second magnetic bead FB2, the first end of the seventh resistor R7, and the first end of the tenth capacitor C10 are connected to the second power supply, the second end of the seventh resistor R7 and the second end of the tenth capacitor C10 are connected to the power ground, the PWRGD of the power source goodness determination end of the first synchronous buck chip U2 is connected to the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is connected to the fourth power supply P3V 3.
The second end of the sixth resistor R6 is the transformer enable signal input end of the voltage converting module 13.
In specific implementation, the first power supply is a 12V dc power supply, the second power supply is a 5V dc power supply, and the second power supply may also be different dc power supplies such as 3.3V and 1.8V. Optionally, the power supply includes a first power supply, a second power supply, a first power supply, a second power supply, a third power supply, and a fourth power supply, and the first power supply, the second power supply, the third power supply, and the fourth power supply may be the same or different. The first field effect transistor Q1 and the second field effect transistor Q2 are N-type field effect transistors, and the third field effect transistor Q3 is a P-type field effect transistor.
In one embodiment, the switch module 13 includes at least one of a transistor, a relay, a field effect transistor, and a diode. The connection and disconnection control of the first power supply can be realized according to the switch control signal, so that the first power supply can be switched on to supply power to the standard PCIE card when the standard PCIE card is accessed, and the power supply (the first power supply) is switched off when the non-standard PCIE card is accessed.
The following will briefly describe the working principle of a circuit compatible with a standard PCIE card and a non-standard PCIE card with reference to fig. 3:
after power-on, the programmable logic processor U1 generates a reset enable signal to the PCIE slot module 11 to control the PCIE slot reset ready to work.
The PCIE slot module 11 is connected to a standard PCIE card or a non-standard PCIE card, the reserved pin of the PCIE slot module 11 forwards the reserved signal, and the reserved signal is generated by a PCIE card connected to the PCIE slot module 11. When the PCIE slot module 11 is connected to a standard PCIE CARD, the voltage of the reserved pin of the PCIE slot module 11 is the first voltage (12V or 3V3), that is, the reserved pin forwards the first voltage to the first input/output terminal IO _1A _ L1P of the programmable logic processor U1, the programmable logic processor U1 generates the transform enable signal of the second level and the switch control signal of the first level according to the reserved signal, the transform enable signal of the second level is output to the second terminal of the sixth resistor R6 through the third input/output terminal IO _1A _ L3P of the programmable logic processor U1 and then the first synchronous buck chip U2, the first synchronous buck chip U2 stops converting the first power supply P12V into the second power supply P5 _ V _ d according to the transform enable signal of the second level, the switch control signal of the first level is output to the gate fet 1 through the fourth input/output terminal IO _1A _ L6310 of the programmable logic processor U1, the switch control signal of the first level controls the conduction of a first field effect transistor Q1, the cut-off of a second field effect transistor Q2 and the conduction of a third field effect transistor Q3, so that a first power supply P12V is communicated to supply power to the standard PCIE card; when the PCIE slot module 11 is connected to a non-standard PCIE CARD, the voltage of the reserved pin of the PCIE slot module 11 is a second voltage (5V, 1.8V or others), that is, the reserved pin forwards the second voltage to the first input/output terminal IO _1A _ L1P of the programmable logic processor U1, the programmable logic processor U1 generates a first level transformation enable signal and a second level switch control signal according to the reserved signal, the first level transformation enable signal is output to the second terminal of the sixth resistor R6 through the third input/output terminal IO _1A _ L3P of the programmable logic processor U1 and then the first synchronous buck chip U2, the first synchronous buck chip U2 converts the first power source P12V into the second power source P5V _ CARD d according to the first level transformation enable signal to supply power to the non-standard PCIE CARD, the switch control signal is output to the first gate field effect transistor Q1 through the fourth input/output terminal IO _1A _ L3 86523 of the programmable logic processor U734, the second level of the switch control signal controls the first fet Q1 to turn off, the second fet Q2 to turn on, and the third fet Q3 to turn off the first power supply P12V.
When detecting that the PCIE slot is accessed to the standard PCIE card, the programmable logic processor U1 controls and conducts the first power supply to supply power to the standard PCIE card, and when the non-standard PCIE card is accessed, the programmable logic processor U3578 controls the first synchronous buck chip U2 to convert the first power supply into the second power supply to supply power to the non-standard PCIE card, so that the standard PCIE card and the non-standard PCIE card can be used in the same PCIE slot in a compatible manner, and the purposes of resource integration, reduction of the use of components, cost reduction and volume reduction are achieved; meanwhile, the phenomenon that the ordinary non-standard PCIE card is mistakenly connected into the PCIE slot of the standard PCIE card to burn the non-standard PCIE card is avoided, and the compatibility and the reliability of the PCIE slot are improved. The power supply is continuously filtered and denoised and peak interference is inhibited through the capacitor and the magnetic bead in the circuit, and the precision, the stability and the reliability of the circuit are improved.
According to the PCIE protocol, the working power voltage required by the standard PCIE card is the first voltage, the standard PCIE card is inserted into the PCIE slot module 11, and the reservation signal correspondingly forwarded through the reservation pin of the PCIE slot module 11 is the first voltage (for example, 12V or 3V 3); the working power voltage required by the non-standard PCIE card is the second voltage, the non-standard PCIE card is inserted into the PCIE slot module 11, and the reservation signal correspondingly forwarded through the reservation pin of the PCIE slot module 11 is the second voltage (for example, 5V, 1.8V, or other voltages).
A second aspect of the embodiments of the present invention provides a server, where the server includes the above-mentioned circuit compatible with the standard PCIE card and the non-standard PCIE card. The standard PCIE card and the non-standard PCIE card can be used in a PCIE slot of the server in a compatible mode, resources are integrated, the use of components is reduced, the cost is reduced, and the size is reduced; meanwhile, the compatibility, the practicability and the reliability of the server are improved.
A third aspect of the embodiments of the present invention provides a computer, where the computer includes the above-mentioned circuit compatible with the standard PCIE card and the non-standard PCIE card. The standard PCIE card and the non-standard PCIE card can be used in a PCIE slot of a computer in a compatible mode, resources are integrated, the use of components is reduced, the cost is reduced, and the size is reduced; meanwhile, the compatibility, the practicability and the reliability of the computer, especially a desktop computer, are improved.
Although certain embodiments have been described above with a certain degree of particularity, those skilled in the art could make numerous alterations to the disclosed embodiments without departing from the scope of this disclosure. Joinder references (e.g., attached, coupled, connected, and the like) are to be construed broadly and may include intermediate members between a connection of elements and relative movement between elements. Thus, connection references do not necessarily imply that two elements are directly connected/coupled and in a fixed relationship to each other. The use of "for example" throughout this specification should be interpreted broadly and used to provide non-limiting examples of embodiments of the disclosure, and the disclosure is not limited to such examples. It is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative only and not limiting. Changes in detail or structure may be made without departing from the disclosure.
It is obvious to those skilled in the art that, for convenience and simplicity of description, the foregoing functional units and modules are merely illustrated in terms of division, and in practical applications, the foregoing functional allocation may be performed by different functional units and modules as needed, that is, the internal structure of the circuit is divided into different functional units or modules to perform all or part of the above described functions. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (8)

1. A circuit compatible with a standard PCIE card and a non-standard PCIE card is characterized in that the circuit compatible with the standard PCIE card and the non-standard PCIE card comprises:
a PCIE slot module for forwarding PCIE signals; the PCIE signals include a reservation signal; the reservation signal is forwarded by a reservation pin of the PCIE slot module;
the control module is connected with the PCIE slot module and used for generating a voltage transformation enabling signal and a switch control signal according to the retention signal;
the voltage conversion module is connected with the control module and the PCIE slot module and is used for performing voltage conversion on a first power supply according to the voltage transformation enabling signal so as to generate a second power supply to supply power to the non-standard PCIE card;
and the switch module is connected with the control module and the PCIE slot module and used for connecting or disconnecting the first power supply to supply power to the standard PCIE card according to the switch control signal.
2. The circuit of claim 1, wherein the circuit compatible with standard and non-standard PCIE cards further comprises:
and the power supply module is used for generating a power supply according to the direct current power supply to supply power to each functional module.
3. The circuit of claim 1, wherein the control module comprises a programmable logic processor, a first magnetic bead, a first capacitor, a second capacitor, and a third capacitor;
an input/output power supply end of the programmable logic processor is connected with a first end of the first capacitor and a first end of the first magnetic bead, a second end of the first magnetic bead is connected with a first power supply, a second end of the first capacitor is connected with a power ground, an analog power supply end of the programmable logic processor is connected with a first end of the second capacitor and a first end of the first magnetic bead, a second end of the second capacitor is connected with a power ground, an on-chip voltage stabilizing power supply end of the programmable logic processor is connected with a first end of the third capacitor and a first end of the first magnetic bead, a second end of the third capacitor is connected with the power ground, and a ground end of the programmable logic processor is connected with the power ground;
the first input and output end of the programmable logic processor is a reserved signal input end of the control module;
a second input/output end of the programmable logic processor is a reset enabling signal output end of the control module;
the third input/output end of the programmable logic processor is a voltage transformation enabling signal output end of the control module;
and a fourth input/output end of the programmable logic processor is a switch control signal output end of the control module.
4. The circuit of claim 1, wherein the switch module comprises a first resistor, a second resistor, a third resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a first field effect transistor, a second field effect transistor, and a third field effect transistor;
the grid electrode of the first field effect transistor and the first end of the first resistor are jointly formed into a switch control signal input end of the switch module;
the grid electrode of the first field effect transistor is connected with the second end of the first resistor, the first end of the first resistor is connected with a second power supply, the source electrode of the first field effect transistor is connected with a power ground, the drain electrode of the first field effect transistor is connected with the second end of the second resistor, the first end of the fourth capacitor and the grid electrode of the second field effect transistor, the first end of the second resistor is connected with the first end of the fifth capacitor and the third power supply, the second end of the fifth capacitor is connected with the power ground, the second end of the fourth capacitor and the source electrode of the second field effect transistor are connected with the power ground, the drain electrode of the second field effect transistor is connected with the second end of the third resistor and the grid electrode of the third field effect transistor, the source electrode of the third field effect transistor, the first end of the third resistor and the first end of the seventh capacitor are connected with the first power supply, the drain electrode of the third field effect transistor is connected with the first end of the sixth capacitor, and the second end of the sixth capacitor is connected with the power ground;
the drain electrode of the third field effect transistor and the first end of the sixth capacitor are jointly formed into a first power output end of the switch module.
5. The circuit of claim 1, wherein the voltage conversion module comprises a first synchronous buck chip, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a first inductor, a second magnetic bead, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, and a fifteenth capacitor;
a mode selection terminal of the first synchronous buck chip is connected to a first terminal of the fourth resistor, a second terminal of the fourth resistor and a ground terminal of the first synchronous buck chip are connected to a power ground, a first switching power terminal of the first synchronous buck chip, a second switching power terminal of the first synchronous buck chip and a first terminal of the eighth capacitor are connected to the first power supply, a second terminal of the eighth capacitor is connected to the power ground, an auxiliary monitoring voltage input terminal of the first synchronous buck chip is connected to a first terminal of the eighth resistor, a first terminal of the thirteenth capacitor and a first terminal of the ninth resistor, a second terminal of the eighth resistor, a second terminal of the thirteenth capacitor and a first terminal of the twelfth capacitor are connected to the second power supply, and a second terminal of the twelfth capacitor is connected to the power ground, the ground terminal of the first synchronous buck chip, the second terminal of the ninth resistor, the first terminal of the fourteenth capacitor, and the first terminal of the fifteenth capacitor are connected to ground, the second terminal of the fifteenth capacitor is connected to the first terminal of the tenth resistor, the second terminal of the tenth resistor and the second terminal of the fourteenth capacitor are connected to the error signal amplification output terminal of the first synchronous buck chip, the slow start terminal of the first synchronous buck chip is connected to the first terminal of the eleventh capacitor, the second terminal of the eleventh capacitor is connected to ground, the enable terminal of the first synchronous buck chip is connected to the first terminal of the sixth resistor, the bootstrap terminal of the first synchronous buck chip is connected to the first terminal of the ninth capacitor, the first switch node terminal of the first synchronous buck chip, the second switch node terminal of the first synchronous buck chip, and the second terminal of the ninth capacitor are connected to the first terminal of the first inductor One end of the first synchronous buck chip is connected, a second end of the first inductor is connected with a first end of the second magnetic bead, a second end of the second magnetic bead, a first end of the seventh resistor and a first end of the tenth capacitor are connected with the second power supply, a second end of the seventh resistor and a second end of the tenth capacitor are connected with a power ground, a power source goodness judgment end of the first synchronous buck chip is connected with a first end of the fifth resistor, and a second end of the fifth resistor is connected with a fourth power supply;
and the second end of the sixth resistor is a transformation enabling signal input end of the voltage conversion module.
6. The circuit of claim 1, wherein the switch module comprises at least one of a transistor, a relay, a fet, and a diode.
7. A server, characterized in that the server comprises circuitry compatible with standard PCIE cards and non-standard PCIE cards as claimed in any one of claims 1 to 6.
8. A computer comprising circuitry compatible with standard PCIE cards and non-standard PCIE cards as claimed in any one of claims 1 to 6.
CN201910797129.2A 2019-08-27 2019-08-27 Circuit, server and computer compatible with standard PCIE card and non-standard PCIE card Active CN110704348B (en)

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