CN110688331B - SoC chip and data reading method - Google Patents
SoC chip and data reading method Download PDFInfo
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- CN110688331B CN110688331B CN201810729610.3A CN201810729610A CN110688331B CN 110688331 B CN110688331 B CN 110688331B CN 201810729610 A CN201810729610 A CN 201810729610A CN 110688331 B CN110688331 B CN 110688331B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1673—Details of memory controller using buffers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention provides an SoC chip, comprising: the device comprises a DRAM control unit, a plurality of hosts, a read command management unit and a read data control unit; the read command management unit is used for receiving first read commands sent by all hosts; determining a read command set corresponding to each host in all the first read commands; sequentially forwarding all second read commands in each read command set to a DRAM control unit according to the receiving time of the second read commands, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read commands; a read data control unit for receiving read data; and sequentially forwarding the read data corresponding to each second read command to the host corresponding to each second read command according to the receiving time of the second read command. The invention also discloses a method for reading data, which realizes the data transmission control with the maximum efficiency through the least resources and effectively reduces the cost and the power consumption of the SoC by implementing the scheme.
Description
Technical Field
The invention relates to the technical field of chips, in particular to an SoC chip and a data reading method.
Background
In SoC (System on Chip), in order to ensure that a host accesses a DRAM (Dynamic Random Access Memory) without an error, it is necessary to ensure that a data return sequence in the DRAM read by the same host is consistent with a read command transmission sequence, and read accesses among different hosts do not have a requirement for order guarantee, and each independent host is allocated with a respective read command BUFFER and a read data BUFFER, and read data of each host returns independently without mutual influence; and the single host caches all read transmission corresponding data by using the special read data BUFFER, and then returns the read data according to the sequence of the read commands.
In order to realize the read transmission order preservation of each host, an independent read command BUFFER and a read data BUFFER are allocated to each host, and in order to ensure the access efficiency of a single host, the read command BUFFER depth of each host must be consistent with the read command queue depth of a DRAM controller, in the actual working process, all hosts do not have read data access at all times, so that the read command BUFFER and BUFFER utilization rate of the hosts is not high, and the waste phenomenon is more serious as the number of the hosts increases, and the SoC cost is directly influenced.
Disclosure of Invention
The invention provides a data reading method, data reading equipment and a computer readable storage medium, which are used for solving the problem that in the prior art, the cost of an SoC is too high because a read command BUFFER and a read data BUFFER are set for each host in the SoC.
The technical scheme adopted by the invention is to provide a system-on-chip (SoC) chip, which comprises a Dynamic Random Access Memory (DRAM) control unit and a plurality of hosts, and the SoC chip further comprises: the read command management unit is respectively connected with the DRAM control unit and each host, and the read data control unit is respectively connected with the DRAM control unit and each host;
the read command management unit is used for receiving first read commands sent by all the hosts; determining a read command set corresponding to each host in all the first read commands; sequentially forwarding all second read commands in each read command set to the DRAM control unit according to the receiving time of the second read commands, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read commands;
the read data control unit is used for receiving the read data; and sequentially forwarding the read data corresponding to each second read command to the host corresponding to each second read command according to the receiving time of the second read command.
Optionally, the read command management unit includes: the read command control unit is connected with each host, and the read command queue units are connected with the read command control units;
the read command control unit is used for receiving all the first read commands sent by the host and sequentially storing the first read commands into each read command queue unit; determining a read command queue unit set corresponding to each host in all the read command queue units, wherein each read command queue unit set comprises all the read command queue units storing second read commands sent by the corresponding host; according to the receiving time of the second read command, the second read commands stored in all the read command queue units in each read command queue unit set are sequentially forwarded to the DRAM control unit, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read command;
the read command queue unit is configured to store the first read command received by the read command control unit.
Optionally, the SoC chip further includes: the counter unit is connected with the read data control unit;
the counter unit is used for counting all the received first read commands when the read command control unit receives any first read command, and sending the obtained count value to the read command control unit;
the read command control unit is specifically configured to:
when any first read command is received, storing any first read command into a read command queue unit with a queue serial number as the count value according to a queue serial number preset by each read command queue unit;
determining a read command queue unit set corresponding to each host in all the read command queue units, wherein each read command queue unit set comprises all the read command queue units storing second read commands sent by the corresponding host;
according to the queue serial number of each read command queue unit in the read command queue unit set, sequentially forwarding a second read command stored in each read command queue unit in the read command queue unit set to the DRAM control unit, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read command; and the second read command carries a queue sequence number of a corresponding read command queue unit.
Optionally, the read data control unit includes: the data reading control unit comprises a data reading input control unit connected with the DRAM control unit, a plurality of data reading queue units connected with the data reading input control unit, and a data reading output control unit respectively connected with each host and each data reading queue unit;
the read data input control unit is used for receiving the read data and sequentially storing the read data into a read data queue unit with a set queue number; the set queue sequence number is a queue sequence number carried by a second read command corresponding to the read data;
the read data output control unit is used for determining a read data queue unit set corresponding to each host in all the read data queue units, wherein each read data queue unit set comprises all the read data queue units storing read data of the corresponding host; sequentially forwarding the read data stored in each read data queue unit in the read data queue unit set to a corresponding host according to the queue serial number of each read data queue unit in the read data queue unit set;
and the read data queue unit is used for storing the read data received by the read data input control unit.
Optionally, the counter unit is further configured to, when the read data output control unit forwards the read data stored in any one of the read data queue units to the corresponding host, subtract one from the count value and send the count value to the read command control unit;
the read data output control unit is further configured to set a current queue serial number of any read data queue unit as a maximum queue serial number when the read data stored in any read data queue unit is forwarded to the corresponding host, and subtract one from an original queue serial number of the read data queue unit larger than the current queue serial number;
the read command control unit is further configured to, when the read data output control unit forwards the read data stored in any one of the read data queue units to the corresponding host, obtain a current queue number of the any one of the read data queue units, set a queue number of the read command queue unit corresponding to the current queue number as a maximum queue number, and subtract an original queue number of the read command queue unit larger than the current queue number by one.
Optionally, the queue number of each read command queue unit in any read command queue unit set is less than or equal to the count value.
Optionally, the read command control unit is further configured to stop receiving the first read command when the count value is greater than a set threshold.
Optionally, the set threshold is the number of the read command queue units.
Optionally, the number of read data queue units is greater than or equal to the number of read command queue units.
The invention also provides a method for reading data, which is applied to a system-on-chip (SoC) chip, wherein the SoC chip comprises a Dynamic Random Access Memory (DRAM) control unit and a plurality of hosts, the SoC chip also comprises a read command management unit which is respectively connected with the DRAM control unit and each host, and a read data control unit which is respectively connected with the DRAM control unit and each host, and the method comprises the following steps:
the read command management unit receives first read commands sent by all the hosts; determining a read command set corresponding to each host in all the first read commands; sequentially forwarding all second read commands in each read command set to the DRAM control unit according to the receiving time of the second read commands, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read commands;
and the read data control unit receives the read data and sequentially forwards the read data corresponding to each second read command to the host corresponding to each second read command according to the receiving time of the second read command.
Optionally, the read command management unit includes a read command control unit connected to each host, and a plurality of read command queue units connected to the read command control unit; the method further comprises the following steps:
the read command control unit receives all first read commands sent by the host and stores the first read commands in each read command queue unit in sequence; determining a read command queue unit set corresponding to each host in all the read command queue units, wherein each read command queue unit set comprises all the read command queue units storing second read commands sent by the corresponding host; and according to the receiving time of the second read command, sequentially forwarding the second read commands stored in all the read command queue units in each read command queue unit set to the DRAM control unit, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read command.
Optionally, the SoC chip further includes a counter unit connected to the read data control unit; the method further comprises the following steps:
when the read command control unit receives any one first read command, the counter unit counts all the received first read commands and sends the obtained count value to the read command control unit;
when the read command control unit receives any one first read command, the read command control unit stores any one first read command into a read command queue unit with a queue serial number as the count value according to a queue serial number preset by each read command queue unit; determining a read command queue unit set corresponding to each host in all the read command queue units, wherein each read command queue unit set comprises all the read command queue units storing second read commands sent by the corresponding host; according to the queue serial number of each read command queue unit in the read command queue unit set, sequentially forwarding a second read command stored in each read command queue unit in the read command queue unit set to the DRAM control unit, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read command; and the second read command carries a queue sequence number of a corresponding read command queue unit.
Optionally, the read data control unit includes a read data input control unit connected to the DRAM control unit, a plurality of read data queue units connected to the read data input control unit, and a read data output control unit respectively connected to each host and each read data queue unit; the method further comprises the following steps:
the read data input control unit receives the read data and sequentially stores the read data into a read data queue unit with a set queue number; the set queue sequence number is a queue sequence number carried by a second read command corresponding to the read data;
the read data output control unit determines a read data queue unit set corresponding to each host in all the read data queue units, wherein each read data queue unit set comprises all the read data queue units which store read data of the corresponding host; and sequentially forwarding the read data stored in each read data queue unit in the read data queue unit set to the corresponding host according to the queue serial number of each read data queue unit in the read data queue unit set.
Optionally, the method further includes:
when the read data output control unit forwards the read data stored in any read data queue unit to a corresponding host, the counter unit subtracts one from the count value and sends the count value to the read command control unit;
when the read data stored in any read data queue unit is forwarded to the corresponding host, the read data output control unit sets the current queue serial number of any read data queue unit as the maximum queue serial number, and subtracts one from the original queue serial number of the read data queue unit larger than the current queue serial number;
when the read data output control unit forwards the read data stored in any read data queue unit to the corresponding host, the read command control unit acquires the current queue serial number of any read data queue unit, sets the queue serial number of the read command queue unit corresponding to the current queue serial number as the maximum queue serial number, and subtracts one from the original queue serial number of the read command queue unit larger than the current queue serial number.
Optionally, the queue number of each read command queue unit in any read command queue unit set is less than or equal to the count value.
Optionally, the method further includes:
when the count value is larger than a set threshold, the read command control unit stops receiving the first read command.
Optionally, the set threshold is the number of the read command queue units.
Optionally, the number of read data queue units is greater than or equal to the number of read command queue units.
By adopting the technical scheme, the invention at least has the following advantages:
the SoC chip and the data reading method realize the data transmission control with the maximum efficiency through the minimum resources, and effectively reduce the cost and the power consumption of the SoC chip.
Drawings
Fig. 1 is a schematic diagram of a SoC chip structure according to a first embodiment of the present invention;
fig. 2 is a schematic diagram of a SoC chip structure according to a second embodiment of the present invention;
fig. 3 is a schematic diagram of a SoC chip structure according to a third embodiment of the present invention;
FIG. 4 is a flowchart of a method for reading data according to a fourth embodiment of the present invention;
FIG. 5 is a flowchart of a method for reading data according to a fifth embodiment of the present invention;
FIG. 6 is a flowchart illustrating a method for reading data according to a sixth embodiment of the present invention;
fig. 7 is a schematic diagram of a SoC chip according to a seventh embodiment of the present invention;
FIG. 8 is a diagram illustrating a read command queue storing read commands according to a seventh embodiment of the present invention;
FIG. 9 is a diagram illustrating a read command queue and a read data queue for transmitting read data to a corresponding host according to a seventh embodiment of the present invention;
FIG. 10 is a diagram illustrating a comparison of queue numbers of a read command queue unit according to a seventh embodiment of the present invention;
FIG. 11 is a flowchart illustrating a method for reading data according to a seventh embodiment of the present invention.
Detailed Description
To further explain the technical means and effects of the present invention adopted to achieve the intended purpose, the present invention will be described in detail with reference to the accompanying drawings and preferred embodiments.
The SoC chip provided by the embodiment of the invention is used for realizing the high-efficiency reading of DRAM data by the host in the SoC chip, effectively reducing the cost and power consumption of the SoC chip and solving the problem of high SoC cost caused by setting a read command BUFFER and reading data BUFFER for each host in the SoC in the prior art.
A first embodiment of the present invention is an SoC chip, as shown in fig. 1, including the following components:
a DRAM control unit 100, a plurality of hosts 200, a read command management unit 300 respectively connected to the DRAM control unit 100 and each host 200, and a read data control unit 400 respectively connected to the DRAM control unit 100 and each host 200.
A read command management unit 300, configured to receive first read commands sent by all hosts 200; determining a read command set corresponding to each host 200 in all the first read commands; and sequentially forwarding all the second read commands in each read command set to the DRAM control unit 100 according to the receiving time of the second read commands, so that the DRAM control unit 100 feeds back corresponding read data to the read data control unit 400 according to the second read commands.
In the present embodiment, the number of hosts 200 is not particularly limited; each host 200 corresponds to a set of read commands, wherein each set of read commands includes all second read commands sent by the corresponding host 200.
Optionally, the manner of sequentially forwarding all the second read commands in each read command set to the DRAM control unit 100 according to the receiving time of the second read commands includes, but is not limited to:
executing data reading operation to all the reading command sets in parallel; the method for executing data reading operation includes: all the second read commands in each read command set are sequentially forwarded to the DRAM control unit 100 according to the receiving time of the second read commands.
The read command management unit 300 determines the read command set corresponding to each host 200, and performs data reading operation on all the read command sets in parallel, thereby effectively avoiding the high SoC chip cost and power consumption caused by setting the read command BUFFER for each host 200.
A read data control unit 400 for receiving read data; and sequentially forwarding the read data corresponding to each second read command to the host 200 corresponding to each second read command according to the receiving time of the second read command.
The read data acquired by the read command set corresponding to each host 200 is sequentially forwarded to the corresponding host 200 through the read data control unit 400, so that the problem that the SoC chip cost and power consumption are too high due to the fact that read data BUFFERs are set for each host 200 is effectively avoided.
The SoC chip according to the first embodiment of the present invention realizes data transmission control with maximum efficiency by using minimum resources, thereby effectively reducing the cost and power consumption of the SoC chip.
A second embodiment of the present invention is an SoC chip, as shown in fig. 2, including the following components:
a DRAM control unit 100, a plurality of hosts 200, a read command management unit 300 respectively connected to the DRAM control unit 100 and each host 200, and a read data control unit 400 respectively connected to the DRAM control unit 100 and each host 200.
The read command management unit 300 includes: a read command control unit 301 connected to each host 200, and a plurality of read command queue units 302 connected to the read command control unit 301.
The read command control unit 301 is configured to receive first read commands sent by all hosts 200, and store the first read commands in each read command queue unit 302 in sequence; determining a set of read command queue units corresponding to each host 200 in all the read command queue units 302, wherein each set of read command queue units includes all the read command queue units 302 storing second read commands sent by the corresponding host 200; according to the receiving time of the second read command, the second read commands stored in all the read command queue units 302 in each read command queue unit set are sequentially forwarded to the DRAM control unit 100, so that the DRAM control unit 100 feeds back corresponding read data to the read data control unit 400 according to the second read command;
a read command queue unit 302, configured to store the first read command received by the read command control unit 301.
In this embodiment, the number of the read command queue units 302 is not specifically limited, and may be set according to engineering experience of an SoC chip designer, or may obtain the number of the optimal read command queue units 302 according to a limited number of tests, or may obtain the number of the optimal read command queue units 302 according to a limited number of computer simulations.
In the present embodiment, the number of hosts 200 is not particularly limited; each host 200 corresponds to a set of read commands, wherein each set of read commands includes all second read commands sent by the corresponding host 200.
Optionally, a manner of sequentially forwarding the second read commands stored in all the read command queue units 302 in each read command queue unit set to the DRAM control unit 100 according to the receiving time of the second read command includes:
performing data reading operation on all the read command queue unit sets and merging rows; wherein. The data reading operation includes: the second read commands stored by all the read command queue units 302 in each set of read command queue units are sequentially forwarded to the DRAM control unit 100 according to the receiving time of the second read commands.
Storing a read command received by the read command control unit 301 through each read command queue unit 302; the read command control unit 301 determines the set of read command queue units corresponding to each host 200, and performs data reading operation on all the sets of read command queue units in parallel, thereby effectively avoiding the high SoC chip cost and power consumption caused by setting a read command BUFFER for each host 200.
The read data control unit 400 includes: a read data input control unit 401 connected to the DRAM control unit 100, a plurality of read data queue units 402 connected to the read data input control unit 401, and a read data output control unit 403 connected to each host 200 and each read data queue unit 402, respectively;
the read data input control unit 401 is configured to receive read data and sequentially store the read data in the read data queue unit 402 with a set queue number;
a read data output control unit 403, configured to determine a read data queue unit set corresponding to each host 200 in all read data queue units 402, where each read data queue unit set includes all read data queue units 402 storing read data of the corresponding host 200; sequentially forwarding the read data stored by each read data queue unit 402 in the read data queue unit set to the corresponding host 200 according to the queue serial number of each read data queue unit 402 in the read data queue unit set;
a read data queue unit 402, configured to store read data received by the read data input control unit 401.
Optionally, the number of read data queue elements 402 is greater than or equal to the number of read command queue elements 302.
The read command management unit 300 determines the read command set corresponding to each host 200, and performs data reading operation on all the read command sets in parallel, thereby effectively avoiding the high SoC chip cost and power consumption caused by setting the read command BUFFER for each host 200.
The read data output control unit 403 sequentially forwards the read data stored in the read data queue unit set corresponding to each host 200 to the corresponding host 200, thereby effectively avoiding the high SoC chip cost and power consumption caused by setting read data BUFFER for each host 200.
The SoC chip according to the second embodiment of the present invention realizes the data transmission control with the maximum efficiency by the minimum resources, thereby effectively reducing the cost and power consumption of the SoC chip.
In a third embodiment of the present invention, an SoC chip, as shown in fig. 3, includes the following components:
a DRAM control unit 100, a plurality of hosts 200, a read command management unit 300 respectively connected to the DRAM control unit 100 and each host 200, a read data control unit 400 respectively connected to the DRAM control unit 100 and each host 200, and a counter unit 500 connected to the read command control unit 300.
The read command management unit 300 includes: a read command control unit 301 connected to each host 200, and a plurality of read command queue units 302 connected to the read command control unit 301.
The counter unit 500 is configured to count all received first read commands when the read command control unit 301 receives any one of the first read commands, and send an obtained count value to the read command control unit 301;
a read command control unit 301, configured to, when receiving any first read command, store the any first read command in the read command queue unit 302 whose queue sequence number is a count value according to a queue sequence number preset in each read command queue unit 302; determining a set of read command queue units corresponding to each host 200 in all the read command queue units 302, wherein each set of read command queue units includes all the read command queue units 302 storing second read commands sent by the corresponding host 200; according to the queue number of each read command queue unit 302 in the read command queue unit set, the second read command stored in each read command queue unit 302 in the read command queue unit set is sequentially forwarded to the DRAM control unit 100, so that the DRAM control unit 100 feeds back corresponding read data to the read data control unit 400 according to the second read command; wherein, the second read command carries the queue number of the corresponding read command queue unit 302; the queue number of each read command queue element 302 in any read command queue element set is less than or equal to the count value.
A read command queue unit 302, configured to store the first read command received by the read command control unit 301.
Optionally, the read command control unit 301 is further configured to stop receiving the first read command when the count value is greater than the set threshold; wherein the threshold is set to the number of read command queue elements 302.
In this embodiment, the number of the read command queue units 302 is not specifically limited, and may be set according to engineering experience of an SoC chip designer, or may obtain the number of the optimal read command queue units 302 according to a limited number of tests, or may obtain the number of the optimal read command queue units 302 according to a limited number of computer simulations.
In the present embodiment, the number of hosts 200 is not particularly limited; each host 200 corresponds to a set of read commands, wherein each set of read commands includes all second read commands sent by the corresponding host 200.
Optionally, a manner of sequentially forwarding the second read commands stored in all the read command queue units 302 in each read command queue unit set to the DRAM control unit 100 according to the receiving time of the second read command includes:
performing data reading operation on all the read command queue unit sets and merging rows; wherein the data reading operation comprises: the second read commands stored by all the read command queue units 302 in each set of read command queue units are sequentially forwarded to the DRAM control unit 100 according to the receiving time of the second read commands.
Storing a read command received by the read command control unit 301 through each read command queue unit 302; the read command control unit 301 determines the set of read command queue units corresponding to each host 200, and performs data reading operation on all the sets of read command queue units in parallel, thereby effectively avoiding the high SoC chip cost and power consumption caused by setting a read command BUFFER for each host 200.
The read data control unit 400 includes: a read data input control unit 401 connected to the DRAM control unit 100, a plurality of read data queue units 402 connected to the read data input control unit 401, and a read data output control unit 403 connected to each host 200 and each read data queue unit 402, respectively;
the read data input control unit 401 is configured to receive read data and sequentially store the read data in the read data queue unit 402 with a set queue number; and setting the queue sequence number as the queue sequence number carried by the second read command corresponding to the read data.
A read data output control unit 403, configured to determine a read data queue unit set corresponding to each host 200 in all read data queue units 402, where each read data queue unit set includes all read data queue units 402 storing read data of the corresponding host 200; and sequentially forwarding the read data stored by each read data queue unit 402 in the read data queue unit set to the corresponding host 200 according to the queue number of each read data queue unit 402 in the read data queue unit set.
A read data queue unit 402, configured to store read data received by the read data input control unit 401.
The counter unit 500 is further configured to, when the read data output control unit 403 forwards the read data stored in any one of the read data queue units 402 to the corresponding host 200, decrement the count value and send the count value to the read command control unit 301.
The read data output control unit 403 is further configured to set the current queue number of any read data queue unit 402 to the maximum queue number when the read data stored in the read data queue unit 402 is forwarded to the corresponding host 200, and subtract one from the original queue number of the read data queue unit 402 that is greater than the current queue number.
The read command control unit 301 is further configured to, when the read data output control unit 403 forwards the read data stored in any read data queue unit 402 to the corresponding host 200, obtain a current queue number of the any read data queue unit 402, set the queue number of the read command queue unit 302 corresponding to the current queue number as the maximum queue number, and subtract the original queue number of the read command queue unit 302 greater than the current queue number by one.
Optionally, the number of read data queue elements 402 is greater than or equal to the number of read command queue elements 302.
The read command management unit 300 determines the read command set corresponding to each host 200, and performs data reading operation on all the read command sets in parallel, thereby effectively avoiding the high SoC chip cost and power consumption caused by setting the read command BUFFER for each host 200.
The read data output control unit 403 sequentially forwards the read data stored in the read data queue unit set corresponding to each host 200 to the corresponding host 200, thereby effectively avoiding the high SoC chip cost and power consumption caused by setting read data BUFFER for each host 200.
The SoC chip according to the third embodiment of the present invention realizes the data transmission control with the maximum efficiency by the minimum resources, thereby effectively reducing the cost and power consumption of the SoC chip.
The method for reading data provided by the embodiment of the invention is used for realizing the high-efficiency reading of DRAM data by the host in the SoC chip, effectively reducing the cost and power consumption of the SoC chip and solving the problem of high SoC cost caused by setting the read command BUFFER and the read data BUFFER for each host in the SoC in the prior art.
A fourth embodiment of the present invention provides a method for reading data, as shown in fig. 4, applied to an SoC chip, where the SoC chip includes: the DRAM control unit, a plurality of host computers, a read command management unit which is respectively connected with the DRAM control unit and each host computer, and a read data control unit which is respectively connected with the DRAM control unit and each host computer, the method comprises the following steps:
in step S401, the read command management unit receives first read commands sent by all hosts.
Step S402, in all the first read commands, a read command set corresponding to each host is determined.
In step S403, the read command management unit sequentially forwards all the second read commands in each read command set to the DRAM control unit according to the receiving time of the second read commands, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read commands.
Optionally, the manner in which the read command management unit forwards all the second read commands in each read command set to the DRAM control unit in sequence according to the receiving time of the second read commands includes, but is not limited to:
the read command management unit performs data read operation on all the read command sets in parallel; the method for executing data reading operation includes: and sequentially forwarding all the second read commands in each read command set to the DRAM control unit according to the receiving time of the second read commands.
The read command management unit determines the read command set corresponding to each host, and performs data reading operation on all the read command sets in parallel, so that the problem that the cost and power consumption of the SoC chip are too high because a read command BUFFER is set for each host is effectively avoided.
In step S404, the read data control unit receives the read data.
Step S405, the read data control unit sequentially forwards the read data corresponding to each second read command to the host corresponding to each second read command according to the receiving time of the second read command.
The read data acquired by the read command set corresponding to each host is sequentially forwarded to the corresponding host through the read data control unit, so that the problem that the cost and power consumption of the SoC chip are too high due to the fact that read data BUFFER is set for each host is effectively avoided.
The method for reading data according to the fourth embodiment of the present invention realizes the data transmission control with the maximum efficiency by the minimum resources, and effectively reduces the cost and power consumption of the SoC chip.
A fifth embodiment of the present invention provides a method for reading data, as shown in fig. 5, applied to an SoC chip, where the SoC chip includes: the system comprises a DRAM control unit, a plurality of hosts, a read command management unit, a read data control unit and a counter unit, wherein the read command management unit is respectively connected with the DRAM control unit and each host; wherein, read the command administrative unit to include: a read command control unit connected with each host, and a plurality of read command queue units connected with the read command control unit; the read data control unit includes: the data reading system comprises a data reading input control unit connected with a DRAM control unit, a plurality of data reading queue units connected with the data reading input control unit, and a data reading output control unit respectively connected with each host and each data reading queue unit; the method comprises the following steps:
step S501, the read command control unit receives the first read commands sent by all hosts, and sequentially stores the first read commands in each read command queue unit.
In this embodiment, the number of read command queue units is not specifically limited, and may be set according to engineering experience of an SoC chip designer, or may obtain the number of optimal read command queue units according to a limited number of tests, or may obtain the number of optimal read command queue units according to a limited number of computer simulations.
In this embodiment, the number of hosts is not specifically limited; each host corresponds to one read command set, wherein each read command set comprises all second read commands sent by the corresponding host.
In step S502, the read command control unit determines a set of read command queue units corresponding to each host in all the read command queue units, where each set of read command queue units includes all the read command queue units storing the second read command sent by the corresponding host.
In step S503, the read command control unit sequentially forwards the second read commands stored in all the read command queue units in each read command queue unit set to the DRAM control unit according to the receiving time of the second read command, so that the DRAM control unit feeds back corresponding read data to the read command control unit according to the second read command.
Optionally, the manner that the read command control unit sequentially forwards the second read commands stored in all the read command queue units in each read command queue unit set to the DRAM control unit according to the receiving time of the second read command includes:
the read command control unit performs data read operation on all the read command queue unit sets and merging rows; wherein. The data reading operation includes: and sequentially forwarding the second read commands stored in all the read command queue units in each read command queue unit set to the DRAM control unit according to the receiving time of the second read commands.
Storing a read command received by the read command control unit through each read command queue unit; the read command control unit determines the read command queue unit set corresponding to each host, and performs data reading operation on all the read command queue unit sets and rows, so that the problem that the cost and power consumption of the SoC chip are too high due to the fact that a read command BUFFER is set for each host is effectively avoided.
Step S504, the read data input control unit receives the read data, and sequentially stores the read data in the read data queue unit with the set queue number.
In step S505, the read data output control unit determines a read data queue unit set corresponding to each host in all the read data queue units, where each read data queue unit set includes all the read data queue units storing read data of the corresponding host.
Step S506, the read data output control unit sequentially forwards the read data stored in each read data queue unit in the read data queue unit set to the corresponding host according to the queue number of each read data queue unit in the read data queue unit set.
Optionally, the number of read data queue elements is greater than or equal to the number of read command queue elements.
The read command management unit determines the read command set corresponding to each host, and performs data reading operation on all the read command sets in parallel, so that the problem that the cost and power consumption of the SoC chip are too high because a read command BUFFER is set for each host is effectively avoided.
The method for reading data according to the fifth embodiment of the present invention realizes the most efficient data transmission control with the least resources, thereby effectively reducing the cost and power consumption of the SoC chip.
A sixth embodiment of the present invention provides a method for reading data, as shown in fig. 5, applied to an SoC chip, where the SoC chip includes: the system comprises a DRAM control unit, a plurality of hosts, a read command management unit, a read data control unit and a counter unit, wherein the read command management unit is respectively connected with the DRAM control unit and each host; wherein, read the command administrative unit to include: a read command control unit connected with each host, and a plurality of read command queue units connected with the read command control unit; the read data control unit includes: the data reading system comprises a data reading input control unit connected with a DRAM control unit, a plurality of data reading queue units connected with the data reading input control unit, and a data reading output control unit respectively connected with each host and each data reading queue unit; the method comprises the following steps:
step S601, when the read command control unit receives any one of the first read commands, the counter unit counts all the received first read commands, and sends the obtained count value to the read command control unit.
Step S602, when receiving any first read command, the read command control unit stores any first read command in the read command queue unit with the queue number as the count value according to the queue number preset in each read command queue unit.
Optionally, step S602 further includes:
when the counting value is larger than the set threshold value, the reading command control unit stops receiving the first reading command; wherein the threshold is set as the number of read command queue units.
Step S603, the read command control unit determines a read command queue unit set corresponding to each host in all the read command queue units, where each read command queue unit set includes all the read command queue units storing the second read command sent by the corresponding host.
Optionally, the queue number of each read command queue unit in any read command queue unit set is less than or equal to the count value.
Step S604, the read command control unit sequentially forwards the second read command stored in each read command queue unit in the read command queue unit set to the DRAM control unit according to the queue number of each read command queue unit in the read command queue unit set, so that the DRAM control unit feeds back corresponding read data to the read command control unit according to the second read command.
Wherein, the second read command carries the queue serial number of the corresponding read command queue unit; the queue number of each read command queue element in any set of read command queue elements is less than or equal to the count value.
Optionally, the manner that the read command control unit sequentially forwards the second read commands stored in all the read command queue units in each read command queue unit set to the DRAM control unit according to the receiving time of the second read command includes:
performing data reading operation on all the read command queue unit sets and merging rows; wherein. The data reading operation includes: and sequentially forwarding the second read commands stored in all the read command queue units in each read command queue unit set to the DRAM control unit according to the receiving time of the second read commands.
In this embodiment, the number of read command queue units is not specifically limited, and may be set according to engineering experience of an SoC chip designer, or may obtain the number of optimal read command queue units according to a limited number of tests, or may obtain the number of optimal read command queue units according to a limited number of computer simulations.
In this embodiment, the number of hosts is not specifically limited; each host corresponds to one read command set, wherein each read command set comprises all second read commands sent by the corresponding host.
Storing a read command received by the read command control unit through each read command queue unit; the read command control unit determines the read command queue unit set corresponding to each host, and performs data reading operation on all the read command queue unit sets and rows, so that the problem that the cost and power consumption of the SoC chip are too high due to the fact that a read command BUFFER is set for each host is effectively avoided.
Step S604, the read data input control unit receives the read data and stores the read data in the read data queue unit with the set queue number in sequence; and setting the queue sequence number as the queue sequence number carried by the second read command corresponding to the read data.
In step S605, the read data output control unit determines a read data queue unit set corresponding to each host in all the read data queue units, where each read data queue unit set includes all the read data queue units storing read data of the corresponding host.
Step S606, the read data output control unit sequentially forwards the read data stored in each read data queue unit in the read data queue unit set to the corresponding host according to the queue number of each read data queue unit in the read data queue unit set.
In step S607, when the read data output control unit forwards the read data stored in any one of the read data queue units to the corresponding host, the counter unit subtracts one from the count value and sends the count value to the read command control unit.
In step S608, when the read data stored in any read data queue unit is forwarded to the corresponding host, the read data output control unit sets the current queue serial number of the read data queue unit to the maximum queue serial number, and decrements the original queue serial number of the read data queue unit greater than the current queue serial number by one.
Step S609, when the read data output control unit forwards the read data stored in any read data queue unit to the corresponding host, the read command control unit obtains the current queue number of any read data queue unit, sets the queue number of the read command queue unit corresponding to the current queue number as the maximum queue number, and decrements the original queue number of the read command queue unit greater than the current queue number by one.
Optionally, the number of read data queue elements is greater than or equal to the number of read command queue elements.
The read data output control unit sequentially forwards the read data stored in the read data queue unit set corresponding to each host to the corresponding host, so that the problem that the cost and power consumption of the SoC chip are too high due to the fact that read data BUFFER is set for each host is effectively avoided.
The method for reading data according to the sixth embodiment of the present invention realizes the most efficient data transmission control with the least resources, thereby effectively reducing the cost and power consumption of the SoC chip.
A seventh embodiment of the present invention is based on the above embodiments, and an application example of the present invention is described with reference to fig. 6 to 9 by taking a method for reading data as an example.
The present embodiment is applied to an SoC chip, and as shown in fig. 6, the SoC chip includes: the DRAM control unit, a plurality of hosts and a read transmission channel management unit which is respectively connected with the DRAM control unit and each host;
a read transmission channel management unit comprising: the read command management unit is respectively connected with the DRAM control unit and each host, the read data control unit is respectively connected with the DRAM control unit and each host, and the counter unit is connected with the read data control unit;
wherein, read the command administrative unit to include: a read command control unit connected with each host, and a plurality of read command queue units connected with the read command control unit; the read data control unit includes: the data reading system comprises a data reading input control unit connected with a DRAM control unit, a plurality of data reading queue units connected with the data reading input control unit, and a data reading output control unit respectively connected with each host and each data reading queue unit.
The method for reading data in this embodiment includes the following steps:
step S701, the read transmission channel management unit is initialized, queue numbers are distributed to the read command queue units according to the unit numbers of the read command queue units, count values of the counter units are cleared by 0, read commands of all the read command queue units are set to be invalid, and read data of all the read data queue units are also set to be invalid.
In step S702, when any host sends a read command, the read command management unit fills the read command and the corresponding host number into the read command queue unit, and the count value of the counter unit is incremented by 1.
For example: as shown in fig. 7, when the host 0 issues two read commands, the read command management unit fills the two commands and the corresponding host numbers into the empty read command queue units, and the count value of the counter unit is incremented by 2.
Step S703, the read command management unit judges whether there is a read command of the same host in all the current read command queue units; if the read commands of the same host do not exist in all the current read command queue units, setting the read command queue unit for storing the read commands to be effective; if the read commands of the same host exist in all the current read command queue units, the read command queue unit storing the read commands is not set to be effective.
Step S704, under the condition that the read command queue unit for storing the read command is set to be effective, the read command management unit sends the DRAM read command to the DRAM controller; wherein the DRAM read command comprises: the read command and the queue number of the read command queue unit for storing the read command.
Step S705, when the read command management unit receives the read command sent by any host again, the steps S702-S704 are executed until the count value of the counter unit reaches the N value; wherein the value of N is the number of read command queue elements.
When the count value of the counter unit reaches the N value, the read command queue unit is full, and the read command management unit does not receive the read command sent by any host.
Step S706, when the DRAM controller obtains the corresponding read data based on the DRAM read command, the read data is sent to the read data input control unit, and the read data input control unit stores the read data into the read data queue unit with the same queue number according to the queue number of the read command queue unit carried by the read data, and sets the read data queue unit to be valid.
In step S707, the read data output control unit monitors all the read data queue units, and when any read data queue unit is monitored to be valid, sends the read data stored in the read data queue unit to the corresponding host.
As shown in fig. 9, the manner of sending the read data stored in any read data queue unit to the corresponding host includes, but is not limited to:
the read data output control unit sets any read data queue unit as invalid, subtracts 1 from the count value of the counter unit, and sends the read data stored in any read data queue unit to the corresponding host;
the read command management unit sets a read command queue unit which stores the read command corresponding to the read data as invalid; and for all read command queue units with queue serial numbers larger than the queue serial number of the queue unit storing any read data, subtracting 1 from the queue serial number of the queue unit, setting the queue serial number of the read command queue unit storing the read command corresponding to the read data to be N, and keeping the original queue serial number of the rest read command queue units unchanged.
As shown in fig. 10, the read command management unit collects the queue serial numbers of the read command queue units, and expands the high bits of the queue serial numbers according to the matching condition of the host, if the host information stored in the read command queue unit is the same as the read command queue unit currently being processed, the high bits are expanded to 0, otherwise, the high bits are expanded to 1;
the expanded queue serial numbers are compared pairwise to find the minimum value of the queue serial numbers; under the condition that a read command of a host which is the same as the read command queue unit currently processed is found, setting the read command queue unit corresponding to the minimum value of the queue serial number to be effective; under the condition that all read command queue units do not have read commands of the same host, the read command queue units keep the original command states of all the read command queue units.
Under the condition that the read commands of the same host do not exist in all the read command queue units, the earliest command or empty queue unit of other hosts in the queue is found at this time, and the read command queue control logic can keep the original command states of all the read command queue units because the read commands of different hosts are not related to each other.
Step 708, when the storage read command is executed to the read command queue unit at the same time, and the read data reading operation is executed to the read data queue unit, the count value of the counter unit remains unchanged; wherein, executing the storage read command to the read command queue unit is executed according to the steps 702-704; the read data operation is performed on the read data queue element as per step 707.
The method for reading data according to the seventh embodiment of the present invention realizes the most efficient data transmission control with the least resources, thereby effectively reducing the cost and power consumption of the SoC chip.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal (such as a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present invention.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (16)
1. A system-on-chip (SoC) chip comprises a Dynamic Random Access Memory (DRAM) control unit and a plurality of hosts, and is characterized in that the SoC chip further comprises: the read command management unit is respectively connected with the DRAM control unit and each host, and the read data control unit is respectively connected with the DRAM control unit and each host;
the read command management unit is used for receiving first read commands sent by all the hosts; determining a read command set corresponding to each host in all the first read commands; sequentially forwarding all second read commands in each read command set to the DRAM control unit according to the receiving time of the second read commands, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read commands;
the read data control unit is used for receiving the read data; according to the receiving time of the second read commands, sequentially forwarding the read data corresponding to each second read command to the host corresponding to each second read command;
the read command management unit includes: the read command control unit is connected with each host, and the read command queue units are connected with the read command control units;
the read command control unit is used for receiving all the first read commands sent by the host and sequentially storing the first read commands into each read command queue unit; determining a read command queue unit set corresponding to each host in all the read command queue units, wherein each read command queue unit set comprises all the read command queue units storing second read commands sent by the corresponding host; according to the receiving time of the second read command, the second read commands stored in all the read command queue units in each read command queue unit set are sequentially forwarded to the DRAM control unit, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read command;
the read command queue unit is configured to store the first read command received by the read command control unit.
2. The SoC chip of claim 1, further comprising: the counter unit is connected with the read data control unit;
the counter unit is used for counting all the received first read commands when the read command control unit receives any first read command, and sending the obtained count value to the read command control unit;
the read command control unit is specifically configured to:
when any first read command is received, storing any first read command into a read command queue unit with a queue serial number as the count value according to a queue serial number preset by each read command queue unit;
determining a read command queue unit set corresponding to each host in all the read command queue units, wherein each read command queue unit set comprises all the read command queue units storing second read commands sent by the corresponding host;
according to the queue serial number of each read command queue unit in the read command queue unit set, sequentially forwarding a second read command stored in each read command queue unit in the read command queue unit set to the DRAM control unit, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read command; and the second read command carries a queue sequence number of a corresponding read command queue unit.
3. The SoC chip of claim 2, wherein the read data control unit comprises: the data reading control unit comprises a data reading input control unit connected with the DRAM control unit, a plurality of data reading queue units connected with the data reading input control unit, and a data reading output control unit respectively connected with each host and each data reading queue unit;
the read data input control unit is used for receiving the read data and sequentially storing the read data into a read data queue unit with a set queue number; the set queue sequence number is a queue sequence number carried by a second read command corresponding to the read data;
the read data output control unit is used for determining a read data queue unit set corresponding to each host in all the read data queue units, wherein each read data queue unit set comprises all the read data queue units storing read data of the corresponding host; sequentially forwarding the read data stored in each read data queue unit in the read data queue unit set to a corresponding host according to the queue serial number of each read data queue unit in the read data queue unit set;
and the read data queue unit is used for storing the read data received by the read data input control unit.
4. The SoC chip of claim 3, wherein the counter unit is further configured to subtract one from the count value and send the count value to the read command control unit when the read data output control unit forwards the read data stored in any one of the read data queue units to the corresponding host;
the read data output control unit is further configured to set a current queue serial number of any read data queue unit as a maximum queue serial number when the read data stored in any read data queue unit is forwarded to the corresponding host, and subtract one from an original queue serial number of the read data queue unit larger than the current queue serial number;
the read command control unit is further configured to, when the read data output control unit forwards the read data stored in any one of the read data queue units to the corresponding host, obtain a current queue number of the any one of the read data queue units, set a queue number of the read command queue unit corresponding to the current queue number as a maximum queue number, and subtract an original queue number of the read command queue unit larger than the current queue number by one.
5. The SoC chip of any of claims 2-4, wherein a queue number of each read command queue element in any of the sets of read command queue elements is less than or equal to the count value.
6. The SoC chip of any of claims 2-4, wherein the read command control unit is further configured to stop receiving the first read command when the count value is greater than a set threshold.
7. The SoC chip of claim 6, wherein the set threshold is a number of the read command queue elements.
8. The SoC chip of claim 3, wherein the number of read data queue elements is greater than or equal to the number of read command queue elements.
9. A method for reading data is applied to a system on a chip (SoC) chip, the SoC chip comprises a Dynamic Random Access Memory (DRAM) control unit and a plurality of hosts, and is characterized in that the SoC chip also comprises a read command management unit which is respectively connected with the DRAM control unit and each host, and a read data control unit which is respectively connected with the DRAM control unit and each host, and the method comprises the following steps:
the read command management unit receives first read commands sent by all the hosts; determining a read command set corresponding to each host in all the first read commands; sequentially forwarding all second read commands in each read command set to the DRAM control unit according to the receiving time of the second read commands, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read commands;
the read data control unit receives the read data and sequentially forwards the read data corresponding to each second read command to the host corresponding to each second read command according to the receiving time of the second read command;
the read command management unit comprises a read command control unit connected with each host and a plurality of read command queue units connected with the read command control unit; the method further comprises the following steps:
the read command control unit receives all first read commands sent by the host and stores the first read commands in each read command queue unit in sequence; determining a read command queue unit set corresponding to each host in all the read command queue units, wherein each read command queue unit set comprises all the read command queue units storing second read commands sent by the corresponding host; and according to the receiving time of the second read command, sequentially forwarding the second read commands stored in all the read command queue units in each read command queue unit set to the DRAM control unit, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read command.
10. The method of claim 9, wherein the SoC chip further comprises a counter unit coupled to the read data control unit; the method further comprises the following steps:
when the read command control unit receives any one first read command, the counter unit counts all the received first read commands and sends the obtained count value to the read command control unit;
when the read command control unit receives any one first read command, the read command control unit stores any one first read command into a read command queue unit with a queue serial number as the count value according to a queue serial number preset by each read command queue unit; determining a read command queue unit set corresponding to each host in all the read command queue units, wherein each read command queue unit set comprises all the read command queue units storing second read commands sent by the corresponding host; according to the queue serial number of each read command queue unit in the read command queue unit set, sequentially forwarding a second read command stored in each read command queue unit in the read command queue unit set to the DRAM control unit, so that the DRAM control unit feeds back corresponding read data to the read data control unit according to the second read command; and the second read command carries a queue sequence number of a corresponding read command queue unit.
11. The method of claim 10, wherein the read data control unit comprises a read data input control unit coupled to the DRAM control unit, a plurality of read data queue units coupled to the read data input control unit, and a read data output control unit coupled to each of the host and each of the read data queue units, respectively; the method further comprises the following steps:
the read data input control unit receives the read data and sequentially stores the read data into a read data queue unit with a set queue number; the set queue sequence number is a queue sequence number carried by a second read command corresponding to the read data;
the read data output control unit determines a read data queue unit set corresponding to each host in all the read data queue units, wherein each read data queue unit set comprises all the read data queue units which store read data of the corresponding host; and sequentially forwarding the read data stored in each read data queue unit in the read data queue unit set to the corresponding host according to the queue serial number of each read data queue unit in the read data queue unit set.
12. The method of claim 11, further comprising:
when the read data output control unit forwards the read data stored in any read data queue unit to a corresponding host, the counter unit subtracts one from the count value and sends the count value to the read command control unit;
when the read data stored in any read data queue unit is forwarded to the corresponding host, the read data output control unit sets the current queue serial number of any read data queue unit as the maximum queue serial number, and subtracts one from the original queue serial number of the read data queue unit larger than the current queue serial number;
when the read data output control unit forwards the read data stored in any read data queue unit to the corresponding host, the read command control unit acquires the current queue serial number of any read data queue unit, sets the queue serial number of the read command queue unit corresponding to the current queue serial number as the maximum queue serial number, and subtracts one from the original queue serial number of the read command queue unit larger than the current queue serial number.
13. The method of any of claims 10 to 12, wherein a queue number of each read command queue element in any of the sets of read command queue elements is less than or equal to the count value.
14. The method according to any one of claims 10 to 12, further comprising:
when the count value is larger than a set threshold, the read command control unit stops receiving the first read command.
15. The method of claim 14, wherein the set threshold is a number of the read command queue elements.
16. The method of claim 12, wherein the number of read data queue elements is greater than or equal to the number of read command queue elements.
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| CN102541808A (en) * | 2011-12-06 | 2012-07-04 | 苏州希图视鼎微电子有限公司 | Soc (System on chip) chip system and method for realizing configurable buffer in Soc chip |
| CN103389961A (en) * | 2012-05-08 | 2013-11-13 | 三星电子株式会社 | Multi-CPU system and computing system having the same |
| CN103106177A (en) * | 2013-01-08 | 2013-05-15 | 西安电子科技大学 | Chip interconnection structure and chip interconnection method of multi-core network processor |
| CN104461399A (en) * | 2014-12-19 | 2015-03-25 | 上海新储集成电路有限公司 | Writing cache system of nonvolatile memory and data read-write method thereof |
| CN105117179A (en) * | 2015-09-22 | 2015-12-02 | 天津瑞发科半导体技术有限公司 | Method for data interaction of host and storage device and storage controller |
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