CN110687429A - Single board testing method, single board and system - Google Patents

Single board testing method, single board and system Download PDF

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Publication number
CN110687429A
CN110687429A CN201910879114.0A CN201910879114A CN110687429A CN 110687429 A CN110687429 A CN 110687429A CN 201910879114 A CN201910879114 A CN 201910879114A CN 110687429 A CN110687429 A CN 110687429A
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test
single board
host
program file
interface
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蔡显志
范志刚
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Xian Wanxiang Electronics Technology Co Ltd
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Xian Wanxiang Electronics Technology Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • G01R31/2815Functional tests, e.g. boundary scans, using the normal I/O contacts

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The present disclosure provides a single board testing method, a single board and a system, relating to the technical field of single board testing, wherein the method comprises the following steps: the single board receives a test instruction of a test host; wherein the test instruction carries test configuration parameters; the single board obtains a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process; the single board starts at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.

Description

Single board testing method, single board and system
Technical Field
The present disclosure relates to the field of single board testing technologies, and in particular, to a single board testing method, a single board, and a system.
Background
In practical applications, in order to ensure the shipment quality of the single boards, a factory needs to detect the basic functions of peripheral interfaces of each produced single board, such as a network port, a video input/output interface (HDMI, DVI, VGA, etc.), a USB port, an LED lamp, a SIM card seat, an acquisition card, etc.
Because the zero-terminal product is characterized in that the flash is extremely small, usually below 64M, only a reduced operating system and a necessary service program storage space are reserved, the periphery of the single board also provides a plurality of interfaces for service connection, and the interfaces include but are not limited to: the interface comprises a network port, a video input/output interface, a USB port, an LED, a collection card, an audio input/output interface and the like, and the form of the interface is various and is changed frequently.
How to put forward a low-cost and high-efficiency test scheme under the condition that the internal storage space of the equipment is limited, so that each equipment to be tested and each test item can be independently tested, and the problem which is still to be solved is similar to the engineering self-checking machine (self-checking mode) of a mobile phone.
Disclosure of Invention
The embodiment of the disclosure provides a single board testing method and device, which can solve the problem of complicated calculation in the existing single board testing. The technical scheme is as follows:
according to a first aspect of the embodiments of the present disclosure, a single board testing method is provided, where the method includes:
the single board receives a test instruction of a test host, wherein the test instruction carries test configuration parameters;
the single board obtains a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process;
the single board starts at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
In one embodiment, the method further comprises:
the single board records the operation result of the test item; and the operation result adopts a JS object numbered musical notation format.
In one embodiment, the operational results include at least one of: the name of the test item, the running state of the current test item and the intermediate data generated by the current test item.
In one embodiment, the configuration parameters include at least a test item name.
In one embodiment, the method further comprises:
and the single board deletes the single board test program file.
According to a second aspect of the embodiments of the present disclosure, there is provided a single board, including:
the system comprises a receiving module, a test module and a processing module, wherein the receiving module is used for testing a test instruction of a host, and the test instruction carries test configuration parameters;
the acquisition module is used for acquiring a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process;
the test module is used for starting at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
In one embodiment, the single board further includes:
the recording module is used for recording the operation result of the test item; and the operation result adopts a JS object numbered musical notation format.
In one embodiment, the single board further includes:
and the deleting module is used for deleting the single board test program file.
In one embodiment, the operational results include at least one of: the name of the test item, the running state of the current test item and the intermediate data generated by the current test item.
In one embodiment, the configuration parameters include at least a test item name.
According to a third aspect of the embodiments of the present disclosure, a single board is provided, where the single board includes at least one type of interface and a processor, where the processor is configured to execute:
receiving a test instruction of a test host, wherein the test instruction carries test configuration parameters;
acquiring a single board test program file of a test host; wherein, the single board test program file comprises a starting file of at least one process;
starting at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
In one embodiment, the interface comprises at least one of:
LED interface, USB interface, audio interface, HDMI interface, DVI interface, HDMI-in interface, VGA interface.
According to a fourth aspect of the embodiments of the present disclosure, there is provided a board testing system, including: the system comprises a test host and a single board, wherein the test host comprises an operation interface unit and a storage unit, and a single board test program file is stored in the storage unit;
the operation interface unit receives the configured test configuration parameters, generates a test instruction, and sends the test instruction and the single board test program file to the single board;
the single board receives a test instruction of a test host, wherein the test instruction carries test configuration parameters;
the single board obtains a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process;
the single board starts at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
In the present disclosure, a low-cost and efficient test framework is proposed for zero-terminal products (below flash 64M), which covers the whole production test link of the zero terminal.
Specifically, the veneer test program can be separated from the veneer to be tested, and the veneer test program is stored in the test host, so that the veneer test program does not need to be stored in the veneer to be tested, and excessive programs irrelevant to services can be prevented from being stored (flash) in the veneer.
In addition, because the test program is stored on the test host, the host can be connected with a plurality of single boards simultaneously, the host can send the test program to the plurality of single boards, and the plurality of single boards can run the test program simultaneously. The operation results of a plurality of single boards can be displayed on the host operation interface of one host.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a flowchart of a single board testing method according to an embodiment of the present disclosure;
fig. 2 is a structural diagram of a single board according to an embodiment of the present disclosure;
fig. 3 is a structural diagram of a single board according to an embodiment of the present disclosure;
fig. 4 is a structure diagram of a single board provided in the embodiment of the present disclosure;
fig. 5 is a structure diagram of a single board provided in the embodiment of the present disclosure;
FIG. 6 is a block diagram of a single board test system according to an embodiment of the present disclosure;
fig. 7 is a schematic view of a usage scenario of a single board testing method according to an embodiment of the present disclosure.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.
The embodiment of the present disclosure provides a single board testing method, as shown in fig. 1, the single board testing method includes the following steps:
step 101, a single board receives a test instruction of a test host;
wherein the test instruction carries test configuration parameters;
illustratively, the configuration parameters include at least a test item name.
The configuration parameters can be input by a user through an operation interface on the host side.
Step 102, the single board obtains a single board test program file of the test host;
wherein, the single board test program file comprises a starting file of at least one process.
103, the single board starts at least one corresponding test item according to the test instruction;
each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
Optionally, the embodiment may further include:
the single board records the operation result of the test item; and the operation result adopts a JS object numbered musical notation format.
And sending the recorded testability operation result to the host for displaying on a host interface.
Specifically, the operation result is sent to the host computer in a web page manner, for example: a numeric format, a text format, or a chart format.
The operation result at least comprises at least one of the following: the name of the test item, the running state of the current test item and the intermediate data generated by the current test item.
Optionally, the embodiment may further include:
and the single board deletes the single board test program file.
In this embodiment, the single board side does not need to store the single board test program, thereby saving space.
Fig. 2 is a single board structure diagram provided in the embodiment of the present disclosure, and the single board 20 shown in fig. 2 includes a receiving module 201, an obtaining module 202, and a testing module 203, where,
the receiving module 201 is configured to receive a test instruction of a test host, where the test instruction carries a test configuration parameter;
in one embodiment, the configuration parameters include at least a test item name.
The obtaining module 202 is configured to obtain a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process;
the test module 203 is configured to start at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
Fig. 3 is a block diagram of a board according to an embodiment of the present disclosure, where the board 30 shown in fig. 3 includes a receiving module 301, an obtaining module 302, a testing module 303, and a recording module 304, where,
the recording module 304 is used for recording the operation result of the test item; and the operation result adopts a JS object numbered musical notation format.
The operation result at least comprises at least one of the following: the name of the test item, the running state of the current test item and the intermediate data generated by the current test item.
Fig. 4 is a single board structure diagram provided in the embodiment of the present disclosure, and the single board 40 shown in fig. 4 includes a receiving module 401, an obtaining module 402, a testing module 403, and a deleting module 404, where,
the deleting module 404 is configured to delete the single board test program file.
Fig. 5 is a single board structure diagram provided in the embodiment of the present disclosure, where the single board 50 shown in fig. 5 includes at least one type of interface 501 and a processor 502, where the processor 502 is configured to execute:
receiving a test instruction of a test host, wherein the test instruction carries test configuration parameters;
acquiring a single board test program file of a test host; wherein, the single board test program file comprises a starting file of at least one process;
starting at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
In one embodiment, the interface comprises at least one of:
LED interface, USB interface, audio interface, HDMI interface, DVI interface, HDMI-in interface, VGA interface.
Fig. 6 is an architecture diagram of a single board test system provided in an embodiment of the present disclosure, where a single board test system 60 shown in fig. 6 includes: the system comprises a test host 601 and a single board 602, wherein the test host 601 comprises an operation interface unit 6011 and a storage unit 6012, and a single board test program file is stored in the storage unit 6012;
the operation interface unit 6011 receives the configured test configuration parameters, generates a test instruction, and sends the test instruction and the single board test program file to the single board;
the single board 602 receives a test instruction of a test host, where the test instruction carries test configuration parameters;
the single board 602 obtains a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process;
the single board 602 starts at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
Fig. 7 is a schematic view of a usage scenario of an embodiment of the present disclosure, as shown in fig. 7,
the host is connected with a plurality of single boards (ZeroClient) through the Router, the host is connected with the Router through a network (ethernet), and the Router is connected with the single boards through the network.
MainUI (i.e., the operation interface unit on the test host in the above embodiment): and the operation interface is arranged on the test host and runs on the windows system. Different test configurations can be realized according to the configured script, and a TCP protocol interacts with the Tsp module of the board (i.e., the receiving module and the obtaining module in the board in the above embodiment), and issues a test instruction to the Tsp module of the board or receives a report. Wherein, the synchronous operation and the asynchronous operation can be defined by themselves.
The test service process (Tsp) is arranged in a CPU of the single board to be tested, executes the functions of the single board receiving module and the obtaining module in the embodiment, is mainly used as a data transmission interface between the Tep and the MainUI operation interface, transmits the test instruction downwards, namely to the Tep, and feeds back the operation result upwards, namely to the MainUI. Tsp is an independent program, which runs in the background of the board to be tested after being powered on, and only communicates with Tep (the function of the test module in the above embodiment) and MainUI.
Tep (Test Execute Packet): the specific test execution operation for each interface is mainly provided, and is a process called up and executed by Tsp according to a test instruction from the MainUI. Tep is a separate program or programs. The initial Tep is a file on the test host side, and is transmitted to the device to be tested and started to run when the test is started.
And aiming at a file of which the Tep is started to be the testing host side, transmitting the file to the single board to be tested and starting to run when the testing is started. It should be noted that the Tep may be one or more specific test programs, such as a file named local _ test. Initially, the system version of the board to be tested does not include the file, and only when the test is needed, the file is copied to the board to be tested through an adb push (through an adb or scp) command; then, the resident process TSP selectively calls the file of local _ test to perform the test according to the test instruction.
The test flow is as follows:
step 1, the MainUI tries to query the IP of the board to be tested when the board to be tested is accessed (for example, the board to be tested is connected to the test host through the USB cable), and immediately connects with the IP. If the TCP connection is properly established, a test ready state is made. And receiving a test instruction of a user, and sending the test instruction to the Tsp on the single board to be tested.
And 2, receiving the test instruction of the mainUI by the Tsp, starting a related test item, and sending the test item to the Tep. Each test item can be an independent Tsp small process or can be different threads in one process.
And step 3, executing the test items from the Tsp by the Tep, wherein each test item can be an independent Tsp process (or thread), and each process (or thread) only corresponds to the test items of one type of interface, such as test _ led, test _ usb, test _ hdmi and the like, so that the processes (or threads) are independent from each other, do not interfere with each other during running, and send report data to the Tsp. The Tsp feeds the report data back to the MainUI, and the MainUI analyzes the relevant fields after receiving the report data and then performs display updating.
Wherein, the report data adopts a JS Object Notation (JSON) format; the report data mainly comprises the name of a test item Tep _ name: a report indicating which test item is; the current test item state Tep _ status indicates that the current test item is in a running state, a ready state, a completed state or other states; tep _ data: intermediate data indicating the current test item production, such as progress, results, debugging information, and the like.
Additionally, the following operational profiles for specific interfaces include, but are not limited to:
if the test configuration parameters indicate that the name of the test item is an LED, the LED displays the test item alternately for 200ms according to seven colors after receiving a test instruction LED start 0;
if the test configuration parameter indicates that the test item name is USB, after receiving the test instruction USB start0, the single board starts USB hot plug detection, and after all the USB flash disk interfaces detect an insertion event, a success is prompted.
If the test configuration parameter indicates that the test item name is audio, after receiving a test instruction audio start0, the two audio ports start to perform one-way communication, and a sound signal input from one audio port is broadcasted by the other audio port, so that the purpose of testing the functions of the two ports is achieved.
If the test configuration parameter indicates that the name of the test item is HDMI, after receiving the test instruction HDMI start0, the test configuration parameter outputs red, green and blue screens in sequence for alternate display.
If the test configuration parameter indicates that the test item name is DVI, then after receiving the test command DVI start0, the three screens of red, green and blue are sequentially output, and + - +3247+98 × - +653223564+879 × - + 965432145 +798/, which are alternately displayed.
And if the test configuration parameters indicate that the name of the test item is HDMI-in, after receiving a test instruction HDMI-cap start0, the main UI sequentially plays red, green and blue screens, the single board performs acquisition action, and then the result is stored and compared with the original image.
If the test configuration parameters indicate that the name of the test item is VGA, after a test instruction is received, a main UI is received to play a specific screen, and the specific screen is usually a pure white screen and can be used for VGA calibration; specifically, a pure white screen is injected at the VGA input, then a single chip microcomputer program burnt to a single board in advance runs, and the pin states of related chips are set or reset. Because the input is pure white, which is equivalent to a known condition, the singlechip program can adjust the input signal.
Based on the single board testing method described in the embodiment corresponding to fig. 1, an embodiment of the present disclosure further provides a computer-readable storage medium, for example, the non-transitory computer-readable storage medium may be a Read Only Memory (ROM), a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like. The storage medium stores computer instructions for executing the single board testing method described in the embodiment corresponding to fig. 1, which is not described herein again.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims (11)

1. A single board testing method is characterized in that the method comprises the following steps:
the single board receives a test instruction of a test host; wherein the test instruction carries test configuration parameters;
the single board obtains a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process;
the single board starts at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
2. The method of testing of claim 1, further comprising:
the single board records the operation result of the test item; and the operation result adopts a JS object numbered musical notation format.
3. The test method of claim 2, wherein the operational results include at least one of: the name of the test item, the running state of the current test item and the intermediate data generated by the current test item.
4. The method of claim 1, wherein the configuration parameters comprise at least a test item name.
5. The test method according to claim 1 or 2, characterized in that the method further comprises:
and the single board deletes the single board test program file.
6. A single board, comprising:
the receiving module is used for testing a test instruction of the host; wherein the test instruction carries test configuration parameters;
the acquisition module is used for acquiring a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process;
the test module is used for starting at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
7. The veneer according to claim 6, further comprising:
the recording module is used for recording the operation result of the test item; and the operation result adopts a JS object numbered musical notation format.
8. The veneer according to claim 6, further comprising:
and the deleting module is used for deleting the single board test program file.
9. A single board, comprising an interface and a processor, wherein the processor is configured to execute:
receiving a test instruction of a test host; wherein the test instruction carries test configuration parameters;
acquiring a single board test program file of a test host; wherein, the single board test program file comprises a starting file of at least one process;
starting at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces. .
10. The single board according to claim 9, wherein said interface comprises at least one of:
LED interface, USB interface, audio interface, HDMI interface, DVI interface, HDMI-in interface, VGA interface.
11. A single board test system, said system comprising: the system comprises a test host and a single board, wherein the test host comprises an operation interface unit and a storage unit, and a single board test program file is stored in the storage unit;
the operation interface unit receives the configured test configuration parameters, generates a test instruction, and sends the test instruction and the single board test program file to the single board;
the single board receives a test instruction of a test host, wherein the test instruction carries test configuration parameters;
the single board obtains a single board test program file of the test host; wherein, the single board test program file comprises a starting file of at least one process;
the single board starts at least one corresponding test item according to the test instruction; each test item comprises an independent process or different threads in the process, and one process or thread corresponds to the test items of one type of interfaces.
CN201910879114.0A 2019-09-18 2019-09-18 Single board testing method, single board and system Pending CN110687429A (en)

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Cited By (1)

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CN113267347A (en) * 2021-05-17 2021-08-17 阳光电源股份有限公司 Method, device and system for testing slope-parking auxiliary function of electric automobile

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CN1725027A (en) * 2004-07-23 2006-01-25 中兴通讯股份有限公司 Method of realizing single board station testing and its system
CN102621432A (en) * 2012-04-11 2012-08-01 北京四方继保自动化股份有限公司 Method for automatically testing single board of protective relay device

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Publication number Priority date Publication date Assignee Title
CN1725027A (en) * 2004-07-23 2006-01-25 中兴通讯股份有限公司 Method of realizing single board station testing and its system
CN102621432A (en) * 2012-04-11 2012-08-01 北京四方继保自动化股份有限公司 Method for automatically testing single board of protective relay device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113267347A (en) * 2021-05-17 2021-08-17 阳光电源股份有限公司 Method, device and system for testing slope-parking auxiliary function of electric automobile

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