CN110683221A

CN110683221A - Chip packaging box and chip packaging method

Info

Publication number: CN110683221A
Application number: CN201910809150.XA
Authority: CN
Inventors: 边兵兵; 焦洁; 王港善
Original assignee: Suzhou Tong Fu Chaowei Semiconductor Co Ltd
Current assignee: Suzhou Tong Fu Chaowei Semiconductor Co Ltd
Priority date: 2019-08-29
Filing date: 2019-08-29
Publication date: 2020-01-14

Abstract

The application discloses a chip packaging box and a chip packaging method, wherein the chip packaging box comprises a first cover body and a second cover body, the first cover body and the second cover body are of a three-dimensional structure formed by hot pressing or vacuum forming of a mold, and a first groove for placing a chip and a second groove for placing auxiliary materials are respectively arranged on the first cover body; the outer side of the first cover body is provided with a first lap edge, the outer side of the second cover body is provided with a second lap edge, the second cover body is buckled on the first cover body, and the first lap edge and the second lap edge are subjected to heat sealing to complete the packaging of the chip, so that the operation is simple and the efficiency is high; at first lid and second lid have good intensity and shock-absorbing capacity, and the protection to the chip is good, and difficult damage is difficult for falling the bits, can effectively prevent that the chip from being contaminated. And the packaging box has good barrier property after heat sealing, can be used for transportation, and can be directly used for chip drying packaging, so that the material cost of a drying packaging bag is saved.

Description

Chip packaging box and chip packaging method

Technical Field

The present application relates generally to the field of packaging technology, and more particularly to a chip packaging box and a chip packaging method.

Background

The chip, especially the high-end chip, has high value, but is easy to damage or lose efficacy, and has extremely high requirements on the package protection. The chip is used as a humidity sensitive element, and some elements are easily oxidized and need to be stored in a low humidity environment or even a low oxygen environment. The main form of chip packaging in the packaging and testing industry at present is: the chip is loaded in an injection molding tray, then is put into an aluminum foil bag or a similar vacuum packaging bag with high barrier property and desiccant, the bag is vacuumized, then the bag opening is sealed by heat, and then is packed by using a buffer material and then is put into a paper box. However, the above method has the following problems:

1. at present, the chips are manufactured, stored and transported by using the injection molding tray with the industrial standard, the materials are hard engineering plastics, when the weight of the chips is larger, the chips are continuously shaken and rubbed in the tray by vibration impact in the transportation process, the structure of the chips is easily damaged or loses efficacy, the chips are frequently shaken or rubbed in the tray, and the chips are easily polluted by falling chips of tray materials.

2. The barrier bag made of aluminum foil and similar high polymer materials has a multi-layer structure due to structural and technological limitations, but the barrier bag is very thin and easy to damage or damage in the transportation process to cause air leakage, so that the vacuum packaging fails.

3. The packaging operation is complicated, the tray needs to be packaged, bagged, vacuumized, sealed, wrapped with the buffer material, boxed and the like for multiple times, and the efficiency is low.

Disclosure of Invention

In view of the above-mentioned drawbacks and deficiencies of the prior art, it is desirable to provide a chip packaging box and a chip packaging method.

The first aspect of the invention provides a chip packaging box, which is characterized by comprising a first cover body and a second cover body, wherein the first cover body and the second cover body are both of a three-dimensional structure formed by hot pressing or vacuum forming of a mold, at least one first groove for placing a chip and at least one second groove for placing auxiliary materials are respectively arranged on the first cover body, and the second cover body is buckled on the first cover body; the outer side of the first cover body is provided with a first lap edge, the outer side of the second cover body is provided with a second lap edge, and the first lap edge and the second lap edge are mutually attached and can be subjected to heat sealing or high-frequency sealing.

Further, the first cover body and the second cover body are both resin sheets with uniform thickness, and the thickness of the resin sheets is 0.2 mm-2 mm.

Furthermore, at least one third groove is further arranged on the boss, the bottom surfaces of the third groove, the second groove and the first lap are located on the same horizontal plane, and the bottom surface of the first groove is higher than the horizontal plane.

Further, the at least one first groove comprises a plurality of first grooves, the at least one third groove comprises a plurality of third grooves, the plurality of first grooves are distributed in a two-dimensional array along the length direction of the first cover body, and the plurality of third grooves are arranged among the plurality of first grooves in a staggered mode.

Further, the lateral wall of first recess includes first section and second section, first section with the second section connects gradually, the first section is 5-7 with the contained angle of vertical direction, the contained angle of second section and vertical direction is 40-50.

Furthermore, the side wall of the first groove also comprises a third section, the third section is horizontally arranged, and the third section is connected between the first section and the second section.

Further, the included angle between the side wall of the first groove and the vertical direction is 5-7 degrees.

Furthermore, a plurality of first lock catches are arranged on the outer side of the first cover body, a plurality of second lock catches are arranged at corresponding positions on the outer side of the second cover body, and the first lock catches and the second lock catches are mutually buckled.

Furthermore, four corners of the top of the second cover body are provided with raised L-shaped anti-skidding check blocks, and the height of each L-shaped anti-skidding check block is smaller than the depth of the inner cavity of the first cover body.

In a second aspect, the present invention provides a chip packaging method, which is characterized in that the method comprises:

a chip is placed in a first groove on the first cover body, and auxiliary materials are placed in a second groove;

the second cover body and the first cover body are buckled together, and the first lap and the second lap which are mutually jointed are subjected to heat sealing or high-frequency sealing;

a plurality of chip packaging boxes are stacked up and down and then are placed in a paper box.

Compared with the prior art, the invention has the following advantages: the chip packaging box comprises a first cover body and a second cover body, wherein the first cover body and the second cover body are of three-dimensional structures formed by hot pressing or vacuum forming of a mold, and a first groove for placing a chip and a second groove for placing auxiliary materials are respectively formed in the first cover body; the outer side of the first cover body is provided with a first lap edge, the outer side of the second cover body is provided with a second lap edge, a chip is placed in the first groove, after auxiliary materials are placed in the second groove, the second cover body is buckled on the first cover body, and the first lap edge and the second lap edge are subjected to heat sealing to complete packaging of the chip, so that the operation is simple and the efficiency is high; at first lid and second lid have good intensity and shock-absorbing capacity, and the protection to the chip is good, and difficult damage is difficult for falling the bits, can effectively prevent that the chip from being contaminated. And the packaging box has good barrier property after heat sealing, can be used for transportation while further preventing pollution, and can be directly used for chip drying and packaging, so that the material cost of a drying packaging bag is saved.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:

fig. 1 is a perspective view of a first cover according to an embodiment of the present invention;

FIG. 2 is a top view of FIG. 1;

FIG. 3 is a cross-sectional view taken along line A-A of FIG. 2;

FIG. 4 is a cross-sectional view taken along line B-B of FIG. 2;

fig. 5 is a perspective view of a first cover according to an embodiment of the present invention;

FIG. 6 is a top view of FIG. 5;

FIG. 7 is a cross-sectional view taken along line A-A of FIG. 6;

FIG. 8 is a cross-sectional view taken along line B-B of FIG. 6;

FIG. 9 is a perspective view of a chip package in accordance with an embodiment of the present invention;

FIG. 10 is a top view of FIG. 9;

FIG. 11 is a sectional view taken along line A-A of FIG. 10;

FIG. 12 is a cross-sectional view taken along line B-B of FIG. 10;

fig. 13 is a perspective view of a stacked chip packaging box according to an embodiment of the present invention;

FIG. 14 is a top view of FIG. 13;

FIG. 15 is a cross-sectional view taken along line A-A of FIG. 14;

FIG. 16 is a cross-sectional view taken in the direction B-B of FIG. 14;

FIG. 17 is a first block diagram of a first recess according to an embodiment of the present invention;

FIG. 18 is a second block diagram of a first recess provided in accordance with an embodiment of the present invention;

FIG. 19 is a third block diagram of a first recess provided in accordance with an embodiment of the present invention;

FIG. 20 is a block diagram of a chip provided by an embodiment of the invention;

fig. 21 is a diagram illustrating a chip packaging method according to an embodiment of the present invention.

1-a first cover body, 11-a first groove, 111-a first section, 112-a second section, 113-a third section, 12-a second groove, 13-a third groove, 2-a second cover body, 21-an L-shaped anti-slip stop block, 3-a first overlap edge, 4-a second overlap edge, 5-a first lock catch, 6-a second lock catch, 7-a chip, 71-a chip substrate, 72-a chip bottom and 8-auxiliary materials.

Detailed Description

The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.

It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.

As mentioned in the background, the main form of chip packaging in the packaging and testing industry today is: the chip is loaded in an injection molding tray, then is put into an aluminum foil bag or a similar vacuum packaging bag with high barrier property and desiccant, the bag is vacuumized, then the bag opening is sealed by heat, and then is packed by using a buffer material and then is put into a paper box. The method has the following problems that 1, the existing chip generally uses an injection molding tray with an industrial standard in the manufacturing, storage and transportation processes, the material is hard engineering plastics, when the weight of the chip is larger, the chip is continuously shaken and rubbed in the tray by vibration impact in the transportation process, the structure of the chip is easily damaged or loses efficacy, the chip is frequently shaken or rubbed in the tray, and the tray material is easily chipped to pollute the chip. 2. The barrier bag made of aluminum foil and similar high polymer materials has a multi-layer structure due to structural and technological limitations, but the barrier bag is very thin and easy to damage or damage in the transportation process to cause air leakage, so that the vacuum packaging fails. 3. The packaging operation is complicated, the tray needs to be packaged, bagged, vacuumized, sealed, wrapped with the buffer material, boxed and the like for multiple times, and the efficiency is low.

Therefore, how to achieve good protection of the chip, improve the sealing performance, and improve the packaging efficiency of the chip will become an improvement direction of the chip packaging box and the chip packaging method.

Referring to fig. 1 to 16, schematic structural diagrams of the chip packaging box of the embodiment of the present application are shown. The chip packaging box comprises a first cover body 1 and a second cover body 2, the first cover body 1 and the second cover body 2 are of a three-dimensional structure formed by hot pressing or vacuum forming of a mold, a first groove 11 for placing a chip 7 and a second groove 12 for placing an auxiliary material 8 are respectively formed in the first cover body 1, and the second cover body 2 is buckled on the first cover body 1; the outer side of the first cover body 1 is provided with a first lap edge 3, the outer side of the second cover body 2 is provided with a second lap edge 4, and the first lap edge 3 and the second lap edge 4 are mutually attached and can be subjected to heat sealing or high-frequency sealing.

The first overlap edge 3 and the second overlap edge 4 are subjected to heat sealing to complete the packaging of the chip 7, so that the operation is simple and the efficiency is high; the first cover body 1 and the second cover body 2 have good strength and buffering performance, and the chip 7 is well protected; the packaging box has good barrier property after heat sealing, is not easy to damage, and can effectively prevent the chip 7 from being polluted.

The primary purpose of the first and

second flaps

3, 4 is to achieve heat or high frequency sealing of the first and

second lids

1, 2. Therefore, the first cover 1 and the second cover 2 are both made of a material suitable for heat sealing or high frequency sealing. Preferably, the first cover 1 and the second cover 2 are both resin sheets having a uniform thickness, and the base material of the resin sheets may be PVC, PETG, or the like, and the thickness of the resin sheets is 0.2mm to 2 mm. The first cover body 1 and the second cover body 2 can also adopt a three-dimensional structure formed by hot pressing or vacuum forming of a multi-layer co-extruded composite material besides a three-dimensional structure formed by hot pressing or vacuum forming of a mold. The structure can improve the integral strength of the first cover body 1, improve the buffer performance of the first cover body, and effectively protect the chip 7 in the storage and transportation process. Further, the resin sheet may be transparent, translucent or opaque.

On the basis of the above embodiment, the boss is further provided with at least one third groove 13, the bottom surfaces of the third groove 13, the second groove 12 and the first lap 3 are located on the same horizontal plane, and the bottom surface of the first groove 11 is higher than the horizontal plane. First recess 11, second recess 12 and first scrap (bridge) 3 can effectual support packing carton, and the chip 7 that sets up in first recess 11 is unsettled state, keeps the buffer space of first recess 11 bottom. The bottom of the chip 7 is protected from direct impact.

It should be noted that, the size and shape of the first groove 11 are adapted to the shape of the chip 7 to be packaged, at least one first groove includes a plurality of first grooves 11, the plurality of first grooves 11 are distributed in a two-dimensional array along the length direction of the first cover 1, the second groove 12 is disposed in an area of the first cover 1 where no first groove 11 is disposed, the number, position, size and shape of the second groove are not limited, the main purpose of disposing the second groove 12 is to place the auxiliary material 8, the auxiliary material 8 includes a drying agent and a deoxidizing agent, and the auxiliary material 8 is disposed such that a low-humidity low-oxygen storage environment is formed in the packaging box. The desiccant can be molecular sieve, montmorillonite, silica gel, etc. A humidity indicator card may also be provided in the second recess 12 for determining whether the low humidity environment inside the package has failed during unpacking. When the resin sheet is made of a translucent material or a transparent material, the color of the indicator card can be seen before unpacking, and the humidity value of the low-humidity environment in the packaging box can be continuously observed.

On the basis of the above embodiment, the at least one third groove includes a plurality of third grooves 13, the third grooves 13 are disposed on the first cover 1 except for the first grooves 11 and the second grooves 12, and it is preferable that the third grooves 13 are alternately disposed among the plurality of first grooves 11. The third groove 13 is also provided to improve the overall strength of the first cover 1, because if the weight of the chip 7 is relatively large, the outer edge of the first cover 1 and the first lap 3 provided on the outer edge are not enough to support the weight of the chip 7, and a recess is easily caused, so that the chip 7 and the first cover 1 or the second cover 2 generate friction, and damage is caused to the chip 7.

On the basis of the above embodiment, the outer side of the first cover body 1 is provided with a plurality of first latches 5, the outer side of the second cover body 2 is provided with a plurality of second latches 6 at corresponding positions, and the first latches 5 and the second latches 6 are fastened with each other. When the first cover body 1 and the second cover body 2 are closed, the first lock catch 5 and the second lock catch 6 are buckled with each other, so that the packaging box is locked.

On the basis of the above embodiment, the four corners of the top of the second cover 2 are provided with raised L-shaped anti-slip blocks 21, and the height of the L-shaped anti-slip blocks 21 is smaller than the depth of the inner cavity of the first cover 1. When the chip packaging boxes are stacked up and down, the L-shaped anti-slip stop block 21 can limit the top chip packaging box to slide along the horizontal direction or the vertical direction, so that the chip packaging boxes are prevented from sliding down when being stacked.

On the basis of the above-described embodiment, referring to fig. 17 to 20, the structure of the first groove 11 includes the following three cases.

The first situation is that the side wall of the first groove 11 forms an angle of 3-7 degrees with the vertical direction, and the preferred scheme is 7 degrees. The inclined arrangement of the side walls of the first recess 11 facilitates the loading of the chip 7 into the first recess 11, the lower edge of the chip substrate 71 being supported on the side walls of the first recess 11, and the chip bottom 72 being in direct contact with the bottom of the first recess 11.

The second situation is that the side wall of the first groove 11 includes a first section 111 and a second section 112, the first section 111 is connected with the second section 112 in sequence, and the included angle between the first section 111 and the vertical direction is 3-7 °, and the preferred scheme is 7 °. The angle between the second section 112 and the vertical is 30-60 °, preferably 45 °. The lower edge of the chip substrate 71 is supported on the sidewall of the first recess 11, and the protruding components (e.g., solder balls, pins, capacitors) on the bottom 72 of the chip are spaced from the bottom of the first recess 11 to prevent damage to the protruding components on the bottom 72 of the chip due to friction or impact.

The third situation is that the sidewall of the first groove 11 in the second situation further includes a third section 113, the third section 113 is horizontally disposed, and the third section 113 is connected between the first section 111 and the second section 112. The contact between the parts (such as solder balls, pins and capacitors) protruding from the bottom 72 of the chip and the bottom of the first groove 11 is prevented, and the possibility of damaging the parts protruding from the bottom 72 of the chip is further avoided. The lower edge of the chip substrate 71 is supported on the third segment 113, which is a surface support or surface contact, which is more reliable and safer than the edge contact in the second case.

Referring to fig. 21, a flow chart of a chip packaging method of an embodiment of the present application is shown.

In step 110, a chip 7 is placed in the first groove 11 of the first cover body 1, and an auxiliary material 8 is placed in the second groove 12;

in step 120, the second cover body 2 and the first cover body 1 are fastened together, and the first lap 3 and the second lap 4 which are mutually attached are subjected to heat sealing or high-frequency sealing;

in step 130, a number of chip packages are stacked one on top of the other and loaded into a carton.

The chip 7 and the auxiliary material 8 can be loaded manually or by a manipulator, and the paper box is not different from the existing packaging box and is not described in detail.

The above description is only a preferred embodiment of the application and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the invention herein disclosed is not limited to the particular combination of features described above, but also encompasses other arrangements formed by any combination of the above features or their equivalents without departing from the inventive concept. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.

Claims

1. A chip packaging box is characterized by comprising a first cover body and a second cover body, wherein the first cover body and the second cover body are of three-dimensional structures formed by hot pressing or vacuum forming of a mold, at least one first groove for placing a chip and at least one second groove for placing auxiliary materials are respectively arranged on the first cover body, and the second cover body is buckled on the first cover body; the outer side of the first cover body is provided with a first lap edge, the outer side of the second cover body is provided with a second lap edge, and the first lap edge and the second lap edge are mutually attached and can be subjected to heat sealing or high-frequency sealing.

2. The chip packaging box according to claim 1, wherein the first cover and the second cover are both resin sheets having a uniform thickness, and the thickness of the resin sheets is 0.2mm to 2 mm.

3. The chip packaging box according to claim 1 or 2, wherein the boss is further provided with at least one third groove, the second groove and the bottom surface of the first lap are in the same horizontal plane, and the bottom surface of the first groove is higher than the horizontal plane.

4. The chip packaging box according to claim 3, wherein the at least one first groove comprises a plurality of first grooves, the at least one third groove comprises a plurality of third grooves, the plurality of first grooves are distributed in a two-dimensional array along the length direction of the first cover body, and the plurality of third grooves are arranged among the plurality of first grooves in a staggered manner.

5. The chip packaging box according to claim 4, wherein the side wall of the first groove comprises a first section and a second section, the first section and the second section are sequentially connected, an included angle between the first section and the vertical direction is 5-7 degrees, and an included angle between the second section and the vertical direction is 40-50 degrees.

6. The chip packaging box of claim 5, wherein the sidewall of the first groove further comprises a third section, the third section is horizontally disposed, and the third section is connected between the first section and the second section.

7. The chip packaging box according to claim 4, wherein the angle between the side wall of the first groove and the vertical direction is 5-7 °.

8. The chip packaging box of claim 1, wherein a plurality of first locking latches are disposed on an outer side of the first cover, a plurality of second locking latches are disposed at corresponding positions on an outer side of the second cover, and the first locking latches and the second locking latches are fastened to each other.

9. The chip packaging box of claim 1, wherein raised L-shaped anti-slip blocks are arranged at four corners of the top of the second cover body, and the height of each L-shaped anti-slip block is smaller than the depth of the inner cavity of the first cover body.

10. A method of chip packaging, the method comprising: