CN110677554A - Video amplification method and device, electronic equipment and storage medium - Google Patents
Video amplification method and device, electronic equipment and storage medium Download PDFInfo
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- CN110677554A CN110677554A CN201911055132.3A CN201911055132A CN110677554A CN 110677554 A CN110677554 A CN 110677554A CN 201911055132 A CN201911055132 A CN 201911055132A CN 110677554 A CN110677554 A CN 110677554A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/148—Video amplifiers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0135—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving interpolation processes
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Abstract
The invention relates to a video amplification method and a device thereof, electronic equipment and a storage medium, wherein the video amplification method comprises the following steps: processing and amplifying the input video to a reference value; calculating and cutting the input video reaching the reference value into blocks; respectively amplifying the input video of the cutting blocks again; the invention saves the input of various interfaces such as a plurality of video processors and a plurality of HDMI or DP, can realize the video amplification effect without a plurality of video controllers, reduces the use amount of equipment and saves hardware resources and power resources. The invention fully meets the use condition of large data volume, effectively reduces the working quantity of the amplification module, reasonably configures the working flow and frequency of the amplification module, ensures that the amplification module can stably work, and outputs and stores high-definition videos in real time.
Description
Technical Field
The invention belongs to the technical field of video image processing, and particularly relates to a video amplification method and device and a machine-readable storage medium.
Background
In modern commercial environments, the LED video display industry, whether HDMI or DP interface, has a single-port video input of 720P or 1080P (1920x1080), which can reach a resolution of 4Kx2K (3840x2160 or 4096x2160) at most. Generally, a video processor can provide a video amplification function, and an HDMI input interface or a DP input interface is finally output through the HDMI or DP interface after video processing is completed, so that the video amplification function is limited by the output capability of the HDMI and DP interfaces. The HDMI or DP video input typically ranges from 480P to a maximum of 4Kx2K, and the HDMI or DP video output also ranges from 480P to 4Kx2K resolution, which limits the video amplification capability of a single video processor to within 4Kx 2K. The input interface of a general LED video controller is an HDMI or DP interface, after input video is intercepted and processed, the input video is finally output to an LED screen through a gigabit network port, if the resolution video of the general 4Kx2K is output through the gigabit network port, nearly 20 gigabit network cables are needed to completely output the video to the LED screen, the interfaces of the controller are many, if a single video controller can carry a larger resolution, more gigabit network interfaces are needed, the volume of the video controller is larger, and therefore the carrying capacity of the general single LED video controller is within 4Kx2K resolution.
In order to pursue a clearer, finer and more realistic viewing experience, 1080P, 4K, 8K and higher resolution and more field of view supporting display terminals appear on display devices: such as 3D video, etc. This puts higher demands on the video image processing technology.
The prior art has distortion phenomenon when amplifying the image. This is because there are some pixel positions in the image after the transformation that were not present in the image before the transformation. The prior art solves this problem by image gray level interpolation. There are three commonly used interpolation methods: nearest neighbor interpolation, bilinear interpolation, bicubic interpolation. Interpolation is to find the rule according to the known data sequence; then, based on this rule, a numerical estimate is made for points where no data has yet been recorded.
The nearest neighbor interpolation is a floating point coordinate obtained by inverse transformation, and is simply rounded to obtain an integer coordinate, and a pixel value corresponding to the integer coordinate is a pixel value of a target pixel, that is, a pixel value corresponding to the nearest upper left corner of the floating point coordinate is taken. Therefore, the nearest interpolation is simple and visual, but the obtained image quality is not high, the effect is the least good, the amplified image has mosaic, and the reduced image is seriously distorted. The bilinear interpolation is linear interpolation which is carried out in a quadratic one-dimensional way. The bilinear interpolation algorithm is a floating-point coordinate obtained by inverse transformation of a target pixel, and the pixel value can be determined by the values of four surrounding pixels corresponding to the coordinates in the original image, namely: the bilinear difference rule determines the value of a new point from four points around the new point. The bilinear interpolation method has large calculation amount, high image quality after amplification and no discontinuous pixel value. Since bilinear interpolation has the property of a low-pass filter, high-frequency components are damaged, and therefore, the image contour may be blurred to some extent. The double cubic (cubic convolution) interpolation overcomes the defects of the two algorithms through a cubic convolution method, a target pixel value can be obtained by an interpolation formula, and 16 adjacent points around a floating point coordinate need to be determined, so that along with high calculation precision, the number of calculation tasks is large, system loading resources are occupied, the response time of the system is delayed, and the operation of a user is inconvenient.
In the case where high-resolution display apparatuses are gradually popularized, a video source matching the resolution is a necessary condition for good image quality. However, in the present situation, 720P and 1080P video sources are abundant, and 4K and higher video sources are relatively deficient. In order to make the display device with 4K and higher resolution have good display effect, the video source with 720P, 1080P and other resolution needs to be interpolated and enlarged. Due to the increase in resolution, data throughput rises dramatically. At the same frame rate, taking 4K resolution as an example, the pixel amount of one frame of picture is 4 times of 1080P resolution and 9 times of 720P resolution. If a single amplification module is adopted to amplify the video image, the working frequency of the single amplification module is increased by corresponding times along with the resolution of the display terminal. Taking 1080P @60Hz as an example of an input video source, the pixel clock frequency is 148.5MHz, when the input video source is amplified to 4K resolution, the data throughput is increased to 4 times, and the working frequency of a single amplification module reaches 594 MHz. Therefore, when the resolution of the display terminal is increased to 8K, 16K or even higher, the operating frequency of the display terminal using a single module needs to reach up to giga.
A video controller having an output loading capacity of at most 4Kx2K, and therefore having a maximum amplification capacity of only 4Kx2K resolution, is provided. When the actual resolution of the LED display screen exceeds the resolution of 4Kx2K, a plurality of video controllers and video processors are needed for control. If one path of input video is required to be displayed on the full screen of the LED, the path of video is required to be input into a plurality of video processors, then output to a plurality of video controllers and finally output to the LED screen. With the development of small-spacing LED display screens, the resolution of a single screen of the LED display screen is larger and larger, and the carrying capacity of a single video processor and a video controller is far exceeded. A single oversized LED screen of 8Kx4K, 16Kx4K, or even 64Kx4K requires dozens of video processors and dozens of video controllers to meet the load capacity requirements. As the resolution of the LED screen is increased, the video processor and the video controller at the front end of the LED screen are increased by geometric multiples.
Disclosure of Invention
The present invention is directed to a video amplification method, a video amplification apparatus, and a machine-readable storage medium, to solve the above technical problems. The invention arranges the video source to reach the reference value, and circularly amplifies the secondary video, thereby realizing the amplification of the input video by a single control device. For the amplification function which can be realized only by outputting a plurality of HDMI or DP interfaces to a plurality of video controllers by a plurality of video processors, the invention saves the input of various interfaces such as a plurality of video processors and a plurality of HDMI or DP, can realize the video amplification effect without a plurality of video controllers, reduces the use amount of equipment and saves hardware resources and power resources. The invention fully satisfies the data throughput, effectively reduces the working quantity of the amplification module, reasonably configures the working flow and frequency of the amplification module, ensures that the amplification module can stably work, and outputs and stores the high-definition video in real time.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, an embodiment of the present application provides a video amplification method, including:
processing and amplifying the input video to a reference value;
calculating and cutting the input video reaching the reference value into blocks;
the input cut and blocked videos are respectively amplified again.
Preferably, before the processing of the input video is amplified to the reference value, the method further comprises:
setting the reference value;
judging whether the video needs to be amplified according to a set reference value, if so, entering the next step, and otherwise, outputting the video;
preferably, the range at the reference value is 2Kx1K to 8Kx 2K.
Preferably, the method for calculating and cutting the input video reaching the reference value comprises:
A. judging the size of the input video and the size of the finally amplified video;
B. if the finally amplified video is smaller than the maximum reference value, only the first-stage video amplification is needed; if the amplified video is larger than the maximum reference value, the reference amplification is needed to be carried out firstly, and then the secondary amplification after the division is carried out; the maximum reference value is 8Kx 2K.
C. Comparing the size of the amplified video with the maximum reference value, and calculating to obtain a horizontal amplification factor and a vertical amplification factor;
D. calculating the total magnification according to the formula whz wz hz, which is the total magnification of the lateral magnification and the vertical magnification; in the formula whz wz hz, whz is the total magnification, wz is the lateral magnification, and hz is the vertical magnification. .
Preferably, the transverse magnification wz calculated in the step C is used for calculating the number of required transverse secondary magnification units; the number of the horizontal quadratic amplification units is the number of the quadratic amplification units to be divided.
Preferably, the number of the horizontal quadratic amplification units is used for calculating the size of each cutting unit and the number of blocks of the cutting unit required for the horizontal input video; when the horizontal magnification is an integer, pixels of a horizontal input video are equally divided, and then the pixels are uniformly amplified by the same magnification; when the horizontal magnification is not an 8K integer, 8K is divided by the magnification, the integer cutting pixels are placed in the front vertical secondary magnification unit, and the redundant decimal part cutting pixels are placed in the last horizontal secondary magnification unit.
Preferably, the vertical amplification factor hz calculated in the step C is used for calculating the number of required vertical quadratic amplification units; the number of the vertical secondary amplification units is the number of the secondary amplification units to be divided.
Preferably, the number of the vertical quadratic amplification units is used for calculating the size of each cutting unit and the number of blocks of the cutting unit required for the vertical input video; when the vertical amplification factor is an integer, equally dividing pixels of a vertical input video, and uniformly performing the same amplification factor; when the vertical amplification factor is not 2K integer, dividing the amplification factor by 2K, putting the integer cutting pixel to the front vertical secondary amplification unit, and putting the redundant decimal part cutting pixel to the last vertical secondary amplification unit.
Preferably, after the respectively re-amplifying the input video of the cut blocks, the method further includes: storing; the storage comprises the storage of the video information before the interception, the video information after the interception and the integration method thereof.
Preferably, before the step of storing, further comprises:
setting a display screen required value;
and judging whether the video is amplified to the required value of the display screen, if so, carrying out the next step, and if not, respectively amplifying the input cut and blocked video again.
Preferably, the set display screen requirement value is 64Kx 4K.
Preferably, after the step of storing, the method further comprises:
carrying out interception conversion on the kilomega network port;
and outputting the video to a display screen through the network cable.
In a second aspect, an embodiment of the present application provides a video amplification apparatus, including:
the reference amplifying module is used for processing and amplifying the input video of the video primary processing module to a reference value;
the video primary processing module is used for carrying out primary processing on an input video; the video primary processing module further comprises: the interpolation unit is used for calculating the pixel value of the corresponding pixel according to the basic pixel value extracted by the decimation unit, and the decimation unit is used for extracting the most adjacent pixel values and using the pixel values as the basic value for calculating the corresponding pixel value;
the segmentation calculation module is used for calculating, cutting and partitioning the input video reaching the reference value; the segmentation calculation module comprises: a dividing unit and a calculating unit; the dividing unit is used for dividing the reference video into a plurality of video modules according to the calculation result of the calculating unit; the calculation unit is used for calculating how to divide the reference video according to the comparison between the size of the amplified video and the reference value;
the secondary amplification module is used for amplifying the input video of the cutting blocks again by the plurality of video sub-processing modules respectively;
the main video processing unit is used for receiving the video subjected to the primary amplification from the sub-processing module 32, calculating and dividing the video according to the amplification requirement, and outputting the video to each other sub-processing module 32 for re-amplification.
Preferably, the video amplification apparatus further includes:
the judging module comprises a reference value judging unit and a required value judging unit, wherein the reference value judging unit is used for judging whether the video needs to be amplified according to a set reference value, and the required value judging unit is used for judging whether the video is amplified to a required value of a display screen;
and the intercepting and converting module is used for intercepting the video amplified to the final video size from the video according to the loading positions of different network ports and converting the video into a video data format output by the network ports.
The high-speed connection interface is used for transmitting video data between each secondary amplification unit and the total exchange processing unit; the method comprises the steps that a plurality of pairs of 10GSerdes communication interfaces are adopted, and video input and output of 8Kx2K can be completed; or video transmission between the 8Kx2K sub-processing module 32 and the video capture unit or video capture and conversion module 30.
The video acquisition unit is used for inputting videos; including video access using HDMI or DP interfaces, and then output to the 8Kx2K sub-processing module 32.
A sub-processing module 32 for receiving the video received from the video capture unit; judging whether the video needs to be amplified to a reference value for the first time according to the requirement; outputting the video to the main video processing unit, and receiving the video divided by the main video processing unit; simultaneously outputting the amplified video to a video output unit; and basic amplification processing of the video;
a storage unit 38 for storing the video cut out by the cutting and blocking and enlarged again;
and the video output unit is used for receiving the finally amplified video from the sub-processing module 32, storing the finally amplified video, intercepting the video according to the loading area of each network port loaded in the video, and outputting the video through the network port or an optical fiber.
In a third aspect, an embodiment of the present application provides an electronic device, including a processor and a machine-readable storage medium storing machine-executable instructions executable by the processor, the processor-executable instructions, when invoked and executed by the processor, causing the processor to: the method steps described in the embodiments of the present application are implemented.
In a fourth aspect, embodiments of the present application provide a machine-readable storage medium having stored thereon machine-executable instructions that, when invoked and executed by a processor, cause the processor to: the method steps described in the embodiments of the present application are implemented.
As can be seen from the above, in the solution provided in the embodiment of the present application, compared with the prior art, the present invention has the following beneficial effects: the invention saves the input of various interfaces such as a plurality of video processors and a plurality of HDMI or DP, can realize the video amplification effect without a plurality of video controllers, reduces the use amount of equipment and saves hardware resources and power resources. The invention fully satisfies the data throughput, effectively reduces the working quantity of the amplification module, reasonably configures the working flow and frequency of the amplification module, ensures that the amplification module can stably work, and outputs and stores the high-definition video in real time.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Drawings
FIG. 1 is a flow chart of a video amplification method according to an embodiment of the invention;
fig. 2 is a flowchart illustrating a method for calculating and dividing blocks of an input video reaching a reference value according to another embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a video amplifier according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a video amplifier according to yet another embodiment of the present invention.
Detailed Description
So that the manner in which the above recited objects, features and advantages of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. In addition, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Referring to fig. 1, fig. 1 is a flow chart of a video amplification method according to an embodiment of the invention,
s100, processing and amplifying the input video to a reference value;
s102, calculating, cutting and partitioning the input video reaching the reference value;
and S103, respectively amplifying the input video of the cutting and the blocking again.
Specifically, the video primary processing module processes and amplifies the input video to a reference value; calculating and cutting the input video reaching the reference value into blocks; and the plurality of video sub-processing modules respectively amplify the input video of the cutting blocks again.
Before the step of processing and amplifying the input video to the reference value, the method further comprises the following steps of S100: setting the reference value; judging whether the video needs to be zoomed according to a set reference value, if so, entering the next step, and if not, outputting the video; the video output is the video output through a gigabit network port after being intercepted and converted; the reference value range is any integer value between 2Kx1K and 8Kx2K, and the maximum value is 8Kx 2K.
After the re-amplifying is performed on the input cut and blocked videos, the method further includes: storing; the storage comprises the storage of the video information before interception and the video information after interception; before the step of storing, further comprising: setting a display screen required value; and judging whether the video is amplified to the required value of the display screen, if so, carrying out the next step, and if not, respectively amplifying the input cut and blocked video again. The display screen requirement value is 64Kx4K, or 32Kx4K, or 16Kx4K, or 128Kx4K, etc.; the display screen demand value can be changed by setting. After the step of storing, further comprising: the gigabit network port performs interception conversion, and the gigabit network port comprises interception and conversion functions and converts video output into a data format output by the gigabit network port; and outputting the video to a display screen through the network cable.
Referring to fig. 2, fig. 2 is a flowchart illustrating a method for calculating and dividing a block of an input video reaching a reference value according to another embodiment of the present invention;
the method for calculating and cutting the input video reaching the reference value into blocks comprises the following steps:
s200: judging the size of the input video and the size of the finally amplified video;
s202: if the finally amplified video is smaller than the maximum reference value, only the first-stage video amplification is needed; if the amplified video is larger than the maximum reference value, the reference amplification is needed to be carried out firstly, and then the secondary amplification after the division is carried out;
s204: comparing the size of the amplified video with the maximum reference value, and calculating to obtain a horizontal amplification factor and a vertical amplification factor;
s206: the total magnification is calculated from the formula whz wz hz.
Specifically, a video is input through a video primary processing module; calculating the pixel value of the corresponding pixel by using an interpolation unit of the video primary processing module according to the basic pixel value extracted by a decimation unit, and extracting several nearest pixel values by using the decimation unit of the video primary processing module to be used as the basic value for calculating the corresponding pixel value; judging the size of the input video and the size of the finally amplified video by using a judging module; judging whether the video needs to be amplified or not by using a reference value judgment unit of a judgment module according to a set reference value, and judging whether the video is amplified to a required value of a display screen or not by using a required value judgment unit of the judgment module; 204, comparing the size of the amplified video with a maximum reference value, and calculating to obtain a horizontal amplification factor and a vertical amplification factor; if the width/height of the amplified video is W/H respectively, comparing W with a reference value horizontal maximum value of 8K, if W is less than or equal to 8K, transversely performing first-stage reference amplification, and if W is greater than 8K, judging the multiple relation between the W and the reference value, wherein the transverse multiple of secondary amplification is wz, and the wz is the transverse amplification multiple; comparing H with a reference value vertical maximum value 2K, if H is less than or equal to 2K, only performing first-stage reference amplification in the horizontal direction, and if H is greater than 2K, judging the multiple relation between the H and the reference value, wherein the vertical multiple of secondary amplification is hz, and the hz represents the vertical amplification;
the number of the horizontal secondary amplifying units is used for calculating the size of each cutting unit and the number of cutting unit blocks of the horizontal input video; when the horizontal magnification is an integer, pixels of a horizontal input video are equally divided, and then the pixels are uniformly amplified by the same magnification; when the horizontal magnification is not an 8K integer, 8K is divided by the magnification, the integer cutting pixels are placed in the front vertical secondary magnification unit, and the redundant decimal part cutting pixels are placed in the last horizontal secondary magnification unit.
The vertical amplification factor hz calculated in the step is used for calculating the number of required vertical secondary amplification units; the number of the vertical secondary amplification units is the number of the secondary amplification units to be divided.
The number of the vertical secondary amplifying units is used for calculating the size of each cutting unit and the number of cutting unit blocks of the vertical input video; when the vertical amplification factor is an integer, equally dividing pixels of a vertical input video, and uniformly performing the same amplification factor; when the vertical amplification factor is not 2K integer, dividing the amplification factor by 2K, putting the integer cutting pixel to the front vertical secondary amplification unit, and putting the redundant decimal part cutting pixel to the last vertical secondary amplification unit.
206: calculating the total magnification by using a formula whz wz hz; the total magnification factor is the lateral magnification factor and the vertical magnification factor; in the formula whz wz hz, whz is the total magnification, wz is the lateral magnification, and hz is the vertical magnification.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a video amplifying device according to an embodiment of the present invention; the video amplification apparatus of the embodiment includes:
a reference amplification module 16 for amplifying the input video processing of the video primary processing module 12 to a reference value;
the video primary processing module 12 is configured to perform primary processing on an input video; the video primary processing module 12 further includes: an interpolation unit 20, a decimation unit 22, the interpolation unit 20 for calculating the pixel value of the corresponding pixel according to the basic pixel value extracted by the decimation unit, the decimation unit 22 for extracting the nearest neighboring pixel value to be used as the basic value for calculating the corresponding pixel value; the nearest neighboring pixel value may be plural or one.
A segmentation calculation module 14, configured to calculate and segment the input video reaching the reference value; the segmentation computation module 14 includes: a dividing unit 24, a calculating unit 26; the dividing unit 24 is used for dividing the reference video into a plurality of video modules according to the calculation result of the calculating unit; the calculating unit 26 is configured to calculate how to divide the reference video according to a comparison between the size of the amplified video and the reference value;
the secondary amplification module 18 is used for amplifying the input video of the cutting blocks again by the plurality of video sub-processing modules respectively;
the main video processing unit 10 is configured to receive the video subjected to the primary amplification from the sub-processing modules 32, calculate and divide the video according to the amplification requirement, and output the video to each of the other sub-processing modules 32 for re-amplification. For example, the total video processing unit may be a 64Kx4K total video processing unit.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a video amplifier according to another embodiment of the present invention; the video amplification apparatus of the embodiment further includes:
the judging module 28 comprises a reference value judging unit and a required value judging unit, wherein the reference value judging unit is used for judging whether the video needs to be amplified according to a set reference value, and the required value judging unit is used for judging whether the video is amplified to a required value of a display screen;
and the intercepting and converting module 30 is used for intercepting the video of each network port from the video according to the loading position of each different network port and converting the video into a video data format output by the network port.
The high-speed connection interface is used for transmitting video data between each secondary amplification unit and the total exchange processing unit; the method comprises the steps that a plurality of pairs of 10GSerdes communication interfaces are adopted, and video input and output of 8Kx2K can be completed; or video transmission between the 8Kx2K sub-processing module 32 and the video acquisition unit 36 or the video capture conversion module 30;
a video acquisition unit 36 for video input; video access by an HDMI or DP interface is adopted, and then the video is output to the 8Kx2K sub-processing module 32;
a sub-processing module 32 for receiving the video received from the video capture unit 36; judging whether the video needs to be amplified to a reference value for the first time according to the requirement; and outputting the video to the overall video processing unit 10, and receiving the video divided by the overall video processing unit 10; simultaneously outputting the amplified video to a video output unit; and basic amplification processing of the video; for example, the sub-processing module 32 determines whether the video needs to be amplified to 8Kx2K of the reference value for the first time as required; and outputting the video to the 64Kx4K overall video processing unit 10 while receiving the video divided by the 64Kx4K overall video processing unit 10; simultaneously outputting the amplified video to a video output unit; and basic amplification processing of the video;
a storage unit 38 for storing the video cut out by the cutting and blocking and enlarged again;
the video output unit 34 is used for receiving the finally amplified video from the sub-processing module 32, storing the video, intercepting the video according to the loading area of each network port loaded in the video, and outputting the video through the network port or an optical fiber; the finally amplified video is received from the 8Kx2K sub-processing module 32, stored in the storage unit 38, and then intercepted according to the loading area of each net port loaded in the video, and output through the net port or optical fiber.
An embodiment of the present invention further provides a storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the video amplification method according to any one of the above embodiments.
The system/computer device integrated components/modules/units, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow in the method according to the above embodiments may be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable storage medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, etc. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.
In the several embodiments provided in the present invention, it should be understood that the disclosed system and method may be implemented in other ways. For example, the system embodiments described above are merely illustrative, and for example, the division of the components is only one logical division, and other divisions may be realized in practice.
In addition, each functional module/component in each embodiment of the present invention may be integrated into the same processing module/component, or each module/component may exist alone physically, or two or more modules/components may be integrated into the same module/component. The integrated modules/components can be implemented in the form of hardware, or can be implemented in the form of hardware plus software functional modules/components.
It will be evident to those skilled in the art that the embodiments of the present invention are not limited to the details of the foregoing illustrative embodiments, and that the embodiments of the present invention are capable of being embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the embodiments being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. Several units, modules or means recited in the system, apparatus or terminal claims may also be implemented by one and the same unit, module or means in software or hardware. The terms first, second, etc. are used to denote names, but not any particular order.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (16)
1. A method of video amplification, comprising:
processing and amplifying the input video to a reference value;
calculating and cutting the input video reaching the reference value into blocks;
the input cut and blocked videos are respectively amplified again.
2. The video amplification method of claim 1, further comprising, before the processing the input video to amplify to the reference value:
setting the reference value;
and judging whether the video needs to be amplified according to the set reference value, if so, entering the next step, and otherwise, outputting the video.
3. The video amplification method of claim 1, wherein the reference value is in a range of 2Kx1K to 8Kx 2K.
4. The method of claim 1, wherein the method of calculating and dividing the input video reaching the reference value comprises:
A. judging the size of the input video and the size of the finally amplified video;
B. if the finally amplified video is smaller than the maximum reference value, only the first-stage video amplification is needed; if the amplified video is larger than the maximum reference value, the reference amplification is needed to be carried out firstly, and then the secondary amplification after the division is carried out;
C. comparing the size of the amplified video with the maximum reference value, and calculating to obtain a horizontal amplification factor and a vertical amplification factor;
D. calculating the total magnification according to the formula whz wz hz, which is the total magnification of the lateral magnification and the vertical magnification; in the formula whz wz hz, whz is the total magnification, wz is the lateral magnification, and hz is the vertical magnification.
5. The method for video amplification according to claim 4, wherein the horizontal magnification wz calculated in the step C is used to calculate the required number of horizontal quadratic amplification units.
6. The video amplification method of claim 5, wherein the number of horizontal quadratic amplification units is used to calculate the size of each cut unit and the number of cut unit blocks required for the horizontal input video; when the horizontal magnification is an integer, pixels of a horizontal input video are equally divided, and then the pixels are uniformly amplified by the same magnification; when the horizontal magnification is not an 8K integer, 8K is divided by the magnification, the integer cutting pixels are placed in the front vertical secondary magnification unit, and the redundant decimal part cutting pixels are placed in the last horizontal secondary magnification unit.
7. The method of claim 4, wherein the vertical magnification hz calculated in the step C is used to calculate the number of vertical quadratic magnification units required.
8. The video amplification method of claim 7, wherein the number of vertical quadratic amplification units is used to calculate the size of each cutting unit and the number of cutting unit blocks required for the vertical input video; when the vertical amplification factor is an integer, equally dividing pixels of a vertical input video, and uniformly performing the same amplification factor; when the vertical amplification factor is not 2K integer, dividing the amplification factor by 2K, putting the integer cutting pixel to the front vertical secondary amplification unit, and putting the redundant decimal part cutting pixel to the last vertical secondary amplification unit.
9. The video amplification method according to claim 1, wherein after the re-amplifying the input cut and blocked video, respectively, further comprises: storing; the storing comprises storing the video information before the interception and the video information after the interception.
10. The video amplification method of claim 5, wherein the step of storing further comprises, prior to:
setting a display screen required value;
and judging whether the video is amplified to the required value of the display screen, if so, carrying out the next step, and if not, respectively amplifying the input cut and blocked video again.
11. The video amplification method of claim 10, wherein the set display screen demand value is 64Kx 4K.
12. The video amplification method of claim 10, wherein the step of storing further comprises, after:
carrying out interception conversion on the kilomega network port;
and outputting the video to a display screen through the network cable.
13. A video amplification apparatus, characterized in that the video amplification apparatus comprises:
the reference amplifying module is used for processing and amplifying the input video of the video primary processing module to a reference value;
the video primary processing module is used for carrying out primary processing on an input video; the video primary processing module further comprises: the interpolation unit is used for calculating the pixel value of the corresponding pixel according to the basic pixel value extracted by the decimation unit, and the decimation unit is used for extracting the most adjacent pixel values and using the pixel values as the basic value for calculating the corresponding pixel value;
the segmentation calculation module is used for calculating, cutting and partitioning the input video reaching the reference value; the segmentation calculation module comprises: a dividing unit and a calculating unit; the dividing unit is used for dividing the reference video into a plurality of video modules according to the calculation result of the calculating unit; the calculation unit is used for calculating how to divide the reference video according to the comparison between the size of the amplified video and the reference value;
the secondary amplification module is used for amplifying the input video of the cutting blocks again by the plurality of video sub-processing modules respectively;
the main video processing unit is used for receiving the video subjected to the primary amplification from the sub-processing module 32, calculating and dividing the video according to the amplification requirement, and outputting the video to each other sub-processing module 32 for re-amplification.
14. The video amplification apparatus of claim 13, further comprising:
the judging module comprises a reference value judging unit and a required value judging unit, wherein the reference value judging unit is used for judging whether the video needs to be amplified according to a set reference value, and the required value judging unit is used for judging whether the video is amplified to a required value of a display screen;
and the intercepting and converting module is used for intercepting the video amplified to the final video size from the video according to the loading positions of different network ports and converting the video into a video data format output by the network ports.
The high-speed connection interface is used for transmitting video data between each secondary amplification unit and the total exchange processing unit;
the video acquisition unit is used for inputting videos;
a sub-processing module 32 for receiving the video received from the video capture unit; judging whether the video needs to be amplified to a reference value for the first time according to the requirement; outputting the video to the main video processing unit, and receiving the video divided by the main video processing unit; simultaneously outputting the amplified video to a video output unit; and basic amplification processing of the video;
a storage unit 38 for storing the video cut out by the cutting and blocking and enlarged again;
and the video output unit is used for receiving the finally amplified video from the sub-processing module 32, storing the finally amplified video, intercepting the video according to the loading area of each network port loaded in the video, and outputting the video through the network port or an optical fiber.
15. An electronic device comprising a processor and a machine-readable storage medium storing machine-executable instructions executable by the processor, the processor-executable instructions, when invoked and executed by the processor, causing the processor to: carrying out the method steps of any one of claims 1 to 12.
16. A machine-readable storage medium having stored thereon machine-executable instructions that, when invoked and executed by a processor, cause the processor to: carrying out the method steps of any one of claims 1 to 12.
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| PCT/CN2020/075532 WO2021082300A1 (en) | 2019-10-31 | 2020-02-17 | Video magnification method and apparatus, electronic device and storage medium |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112637516A (en) * | 2020-11-12 | 2021-04-09 | 深圳市奥拓电子股份有限公司 | Multi-level data processing method and system for video windowing and/or roaming |
| WO2021082300A1 (en) * | 2019-10-31 | 2021-05-06 | 深圳市奥拓电子股份有限公司 | Video magnification method and apparatus, electronic device and storage medium |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113438502B (en) * | 2021-05-27 | 2022-07-12 | 卡莱特云科技股份有限公司 | Video frame image transmission method, sending card and video frame image display system |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101764982A (en) * | 2008-12-23 | 2010-06-30 | 康佳集团股份有限公司 | Method and device for processing high-definition video image |
| CN103177430A (en) * | 2011-12-20 | 2013-06-26 | 深圳万兴信息科技股份有限公司 | Image processing method and device and video processing method |
| CN103685859A (en) * | 2012-09-12 | 2014-03-26 | 瑞昱半导体股份有限公司 | Image processing method, image output processing method and image receiving processing method |
| CN104767910A (en) * | 2015-04-27 | 2015-07-08 | 京东方科技集团股份有限公司 | Video image stitching system and method |
| CN104853059A (en) * | 2014-02-17 | 2015-08-19 | 台达电子工业股份有限公司 | Super-resolution image processing method and device |
| CN106603885A (en) * | 2015-10-20 | 2017-04-26 | 腾讯科技（深圳）有限公司 | Video image processing method and apparatus |
| CN107155131A (en) * | 2016-03-02 | 2017-09-12 | 王进洪 | A kind of video image resolution processes system and method |
| CN109658332A (en) * | 2017-10-10 | 2019-04-19 | 凌云光技术集团有限责任公司 | A kind of image magnification method and terminal based on stream data processing |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7656461B2 (en) * | 2003-03-27 | 2010-02-02 | Sony Corporation | Method of and apparatus for utilizing video buffer in a multi-purpose fashion to extend the video buffer to multiple windows |
| CN201607923U (en) * | 2009-12-18 | 2010-10-13 | 康佳集团股份有限公司 | LED video processing and amplifying integration control device |
| CN103929599B (en) * | 2014-04-30 | 2017-01-25 | 哈尔滨工程大学 | Digital video image real-time zooming method based on FPGA |
| CN104104888A (en) * | 2014-07-01 | 2014-10-15 | 大连民族学院 | Parallel multi-core FPGA digital image real-time zooming processing method and device |
| CN104660951A (en) * | 2015-01-21 | 2015-05-27 | 上海交通大学 | Super-resolution amplification method of ultra-high definition video image converted from high definition video image |
| CN106373090B (en) * | 2016-08-31 | 2019-11-15 | 广州视睿电子科技有限公司 | Image processing method and device |
| CN110677554B (en) * | 2019-10-31 | 2021-09-24 | 深圳市奥拓电子股份有限公司 | Video amplification method and device, electronic equipment and storage medium |
-
2019
- 2019-10-31 CN CN201911055132.3A patent/CN110677554B/en active Active
-
2020
- 2020-02-17 WO PCT/CN2020/075532 patent/WO2021082300A1/en active Application Filing
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101764982A (en) * | 2008-12-23 | 2010-06-30 | 康佳集团股份有限公司 | Method and device for processing high-definition video image |
| CN103177430A (en) * | 2011-12-20 | 2013-06-26 | 深圳万兴信息科技股份有限公司 | Image processing method and device and video processing method |
| CN103685859A (en) * | 2012-09-12 | 2014-03-26 | 瑞昱半导体股份有限公司 | Image processing method, image output processing method and image receiving processing method |
| CN104853059A (en) * | 2014-02-17 | 2015-08-19 | 台达电子工业股份有限公司 | Super-resolution image processing method and device |
| CN104767910A (en) * | 2015-04-27 | 2015-07-08 | 京东方科技集团股份有限公司 | Video image stitching system and method |
| CN106603885A (en) * | 2015-10-20 | 2017-04-26 | 腾讯科技（深圳）有限公司 | Video image processing method and apparatus |
| CN107155131A (en) * | 2016-03-02 | 2017-09-12 | 王进洪 | A kind of video image resolution processes system and method |
| CN109658332A (en) * | 2017-10-10 | 2019-04-19 | 凌云光技术集团有限责任公司 | A kind of image magnification method and terminal based on stream data processing |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021082300A1 (en) * | 2019-10-31 | 2021-05-06 | 深圳市奥拓电子股份有限公司 | Video magnification method and apparatus, electronic device and storage medium |
| CN112637516A (en) * | 2020-11-12 | 2021-04-09 | 深圳市奥拓电子股份有限公司 | Multi-level data processing method and system for video windowing and/or roaming |
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| Publication number | Publication date |
|---|---|
| CN110677554B (en) | 2021-09-24 |
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