CN110661439A - Device and method for reducing digital switching power supply ripple - Google Patents

Device and method for reducing digital switching power supply ripple Download PDF

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CN110661439A
CN110661439A CN201911033770.5A CN201911033770A CN110661439A CN 110661439 A CN110661439 A CN 110661439A CN 201911033770 A CN201911033770 A CN 201911033770A CN 110661439 A CN110661439 A CN 110661439A
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current
unit
voltage
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power supply
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CN110661439B (en
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张涛
高露
张凯
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Dalian Haifu Technology Co Ltd
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Dalian Haifu Technology Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • H02M1/143—Arrangements for reducing ripples from dc input or output using compensating arrangements

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a device and a method for reducing digital switching power supply ripples, which comprises the following steps: the main loop module and the control circuit module; the main loop module includes: the device comprises an input rectification unit for converting input alternating current into pulsating direct current, a PFC module for controlling the current flowing into a bus energy storage capacitor and enabling the phase of the current to be close to the voltage phase to improve the power factor, a rectification bus energy storage capacitor unit for converting the pulsating direct current into relatively stable direct current, a power tube inversion unit for converting the direct current of a bus into high-frequency alternating current, a step-up transformer unit, a high-voltage rectification unit for converting the high-frequency high-voltage alternating current output by a transformer into high-voltage direct current and a filtering unit. The invention restrains low-frequency ripple waves, memorizes the compensation coefficient under the current working condition on the nonvolatile memory in the digital power supply, and automatically adjusts the appropriate compensation coefficient when meeting the same working condition next time.

Description

Device and method for reducing digital switching power supply ripple
Technical Field
The invention relates to the technical field of switching power supply ripples, in particular to a device and a method for reducing digital switching power supply ripples.
Background
The actual output waveform of the switching power supply has ripples which are divided into high-frequency ripples and low-frequency ripples. The high-frequency ripple, i.e. the ripple caused by the switching of the power device, is generated due to the discontinuous energy transmission in the process of inversion and transformation. Since the high frequency ripple frequency is high (typically 2 times the switching frequency), it is easy to improve the high frequency ripple frequency by using a secondary filter circuit, such as increasing the filter capacitance, adding one or more stages of LC or RC filters, and the like. In the case of an ac-powered switching power supply, the low-frequency ripple is generated due to the discontinuity of the energy supplied.
The current common commercial power input direct current switching power supply comprises the following parts: the commercial power input is rectified and filtered to obtain direct current bus voltage, then the direct current bus voltage is obtained through a power device, high-frequency alternating current is obtained through a transformer, the voltage is increased and decreased, and then the direct current with expected voltage is obtained through a rectifier device. Because the AC energy input by the commercial power is discontinuous and the DC energy output by the commercial power is continuous, 2f is generated on the filter capacitor on the DC busacLow frequency ripple. Such ripple will be transferred to the final dc output through switching devices, transformers, etc. Although the voltage closed loop of the switching power supply has a certain suppression effect on the low-frequency ripple, the low-frequency ripple needs to be further processed in the situation with high requirements. Especially, in a switching power supply without a PFC circuit, the discontinuity of the mains input energy may further increase, and the voltage fluctuation on the dc bus may exhibit asymmetric fluctuation, which results in that it is difficult to eliminate the low-frequency ripple by a voltage closed loop alone.
In order to meet the ripple requirement of the output voltage, a number of methods are proposed, one of which is to add a bypass energy storage capacitor on the input dc bus side from the viewpoint of stabilizing the dc bus voltage, release the energy stored in the bypass energy storage capacitor to the dc bus by the cooperation of the power device and the inductor when the commercial power energy is input in the valley, and store a part of the energy in the bypass energy storage capacitor for standby when the commercial power energy is input in the peak. Therefore, voltage fluctuation on the direct current bus can be reduced, output low-frequency ripples are reduced, an additional set of energy storage capacitor, inductor, switching device and corresponding control are needed, and the cost, complexity, size and the like of the circuit are increased. The other is that starting from the control circuit, the duty ratio of the PWM modulation circuit is properly increased under the condition that the bus voltage is lower by collecting the voltage on the direct current bus, so that the output capacity is improved, the output voltage drop is restrained, and the duty ratio of the PWM modulation circuit is properly reduced under the condition that the bus voltage is higher, so that the low-frequency ripple wave is improved. However, in practice, it is very difficult to make this adjustment, and firstly, the relationship between duty cycle and output capability is non-linear, since the main loop current is a varying curve. The output range of the AC/DC converter with wide-range output is often adjustable from 0V to rated voltage, and all load conditions cannot be adapted through a simple proportional relation. Therefore, the technology can only be applied to the occasions with fixed output voltage and relatively fixed load, such as systems of a storage battery charging power supply and the like.
With the development of digital integrated circuits, more and more industries introduce digital control circuits, and the switch power supply industry is no exception. It is possible to cope with a wide range of outputs by controlling the scheme of duty compensation, and since the relationship between the duty ratio of the PWM modulation circuit and the output energy is non-linear, how to obtain the composition of the compensation number in different output cases is critical. One method is to calculate a compensation scheme according to a transfer function of the whole switching power supply system by collecting the voltage of a direct current bus, but in the case, a large amount of early-stage calculation is needed, a complex mathematical model is established, and the requirement on the mathematical capability of a power supply designer is extremely high. The other is a sectional compensation scheme, the output condition of the switching power supply is divided into limited types in advance, and the compensation quantity of each section is tested in the design stage, so that a large amount of work is required to be carried out in the early design stage, and whether the setting of the compensation quantity has a reasonable influence on the output effect is great.
Disclosure of Invention
In view of the above-mentioned problems, an apparatus and method for reducing ripple of a digital switching power supply are provided. The invention mainly utilizes a device for reducing digital switching power supply ripples, which is characterized by comprising:
the main loop module and the control circuit module; the main loop module includes: the power factor improving device comprises a direct current input rectifying unit, a PFC module, a rectifying bus energy storage capacitor unit, a power tube inverting unit, a boosting transformer unit, a high-voltage rectifying unit and a filtering unit, wherein the direct current input rectifying unit is used for converting input alternating current into pulsating direct current, the PFC module is used for controlling current flowing into a bus energy storage capacitor and enabling the phase of the current to be close to voltage phase so as to improve power factor, the rectifying bus energy storage capacitor unit is used for converting the pulsating direct current into stable direct current, the power tube inverting unit is used for converting the direct current of a bus into;
the control circuit module includes: the device comprises a phase-locked loop unit for alternating current phase detection, a power tube driving unit, an analog quantity acquisition and transmission unit, an embedded processor MCU unit of a control center of a digital power supply, a nonvolatile storage unit, a human-computer interaction unit, namely a front panel and an upper computer interface;
setting the output state, voltage, current and power state of the power supply through the man-machine interaction unit, namely a front panel and/or an upper computer interface; when the MCU unit of the embedded processor normally operates, the MCU unit of the embedded processor controls the output power of the power device through a driving module of the PWM peripheral, the ADC peripheral collects the current voltage and current, and the current value and the set value are dynamically adjusted by calculating the duty ratio of the driving through a PID operation unit in the MCU unit, so that the output is always stable and output near the set value.
Further, the phase-locked loop unit: detecting the input phase of power frequency alternating current, and loading a driving signal generated by the MCU to the power tube by the power module driving unit for power amplification and potential isolation to control the power tube to be switched on and off; the digital power supply enables the actual output and the set value of the power supply to be achieved by converging all control signals and controlled signals to the MCU, judging when the MUC outputs the control signals and the controlled signals through preset working logic and judging the duty ratio of PWM output.
Furthermore, the present invention also includes a method for reducing digital switching power supply ripple, which is characterized by comprising the following steps:
s1: segmenting the voltage and the current, judging the current voltage and the current according to segmented data after acquiring the voltage and the current, determining the coordinates of the voltage and the current to obtain the current segmentation, and writing the current segmentation into a nonvolatile storage unit when the compensation data changes; the starting point of the power frequency period is a trigger signal output by the phase-locked loop to ensure no accumulated error;
s2: after the PWM interruption is started, firstly carrying out PID operation, and then judging whether the compensation signal of the previous switching period is proper or not by the system according to the comparison between the current output condition and the expected output condition; comparing the current output voltage with the expected output voltage, and if the output voltage is greater than the expected output voltage + the ripple threshold, indicating that the compensation coefficient of the last switching period is larger, reducing the compensation coefficient by one; if the output voltage is less than the expected output voltage-ripple threshold, which indicates that the compensation coefficient of the previous period is smaller, adding one to the compensation coefficient; if the ripple does not exceed the set threshold, the compensation coefficient is appropriate, processing is not needed, and the compensation coefficient is output according to the current compensation coefficient;
s3: correcting the waveform;
s4: when the ripple compensation function is started for the first time, the values in the nonvolatile memory are all 0, the current output state can be automatically learned after the corresponding working condition segmentation is started, the low-frequency ripple is stable after being rapidly reduced, the duration of the process is usually less than 1 second, and then the compensation data are automatically loaded after the working condition is started again.
Further, the PID operation in step S2:
ΔUn＝Kp(εn-εn-1)+Kiεn+Kd(εn-2εn-1+εn-2)；
wherein, Kp、Ki、KdRespectively representing proportional, integral and differential parameters of the PID; epsilonn、εn-1、εn-2Epsilon represents the error, i.e. the deviation between the set value and the actual value, respectively, and because of the PID calculation, the switching cycles are performed one by oneCalculated, the set value is stable, and the feedback value is always in the changed epsilonnRepresenting the deviation, epsilon, of the current periodn-1Representing the deviation of the last switching period, and so onn-2 represents the deviation of the last cycle; delta UnIndicating the increment after PID calculation, and finally adding the last calculation Un-1The final result of the PID operation is obtained;
Un＝Un-1+ΔUn。
compared with the prior art, the invention has the following advantages:
the invention aims to provide a digital switching power supply device and a control method, which restrain low-frequency ripples. The control method can automatically generate ripple compensation coefficients according to the current working condition and control PWM output on the PID operation result according to the current working condition in the power supply operation process so as to achieve the purpose of inhibiting low-frequency ripples, and the compensation coefficients under the current working condition can be memorized in a nonvolatile memory in the digital power supply, and the appropriate compensation coefficients can be automatically adjusted when the same working condition is met next time. The whole process does not need human intervention, and a switching power supply designer does not need to accurately model a switching power supply transfer function and does not need to match compensation coefficients in a segmented mode by using the method.
The low-frequency ripple of the power supply of the method is rapidly improved, and the main loop structure is not changed and is only upgraded in control. Compared with the traditional digital power supply, only the power frequency phase-locked loop and the nonvolatile memory are added, the system is slightly changed, and the material cost is slightly increased. The introduction of the phase-locked loop eliminates the accumulated error in time, and can still accurately judge the compensation data corresponding to the current moment after the ripple wave low-frequency ripple wave is eliminated. Due to the introduction of the nonvolatile memory, the current segmented existing data is directly read for compensation after the power supply enters a new working condition, the compensation operation does not need to be waited, and the improvement on the dynamic effect is obvious. The method is also suitable for three-phase power supply equipment without any change. In addition, if the voltage of three-phase power supply has difference (three-phase imbalance), the compensation array is a basic unit with a power frequency period, and low-frequency ripples caused by the difference of the three-phase voltage can be eliminated while the power frequency ripples are eliminated.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic view of the overall structure of the present invention.
FIG. 2 is a schematic view of the overall process of the present invention.
FIG. 3 is a schematic diagram of waveforms according to the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
As a preferred aspect of the present invention, the high-frequency ripple is a problem that the power tube converts dc power into high-frequency ac power by switching high-frequency switches, so that energy is not continuously transmitted but intermittently transmitted to the output side by a transformer at a frequency 2 times the switching frequency, and if the switching frequency is 20kHz, the frequency of the high-frequency ripple is 40kHz, which is eliminated by secondary filtering. The power frequency ripple is that the input energy of the AC input power supply is not straight, and is intermittent energy input with the frequency twice as high as the power frequency. This leads to fluctuations in the bus voltage and thus in the final output, which is preferably compensated for by duty cycle and eliminated at the output. The influence of high-frequency ripples on sampling is eliminated, the high-frequency ripples are caused by switching of power tubes, the shapes of the ripples are relatively fixed, and if the sampling frequency of the ADC is equal to the switching frequency, and the phases of the ripples are relatively fixed, the values acquired each time are not influenced by the high-frequency ripples. And finally outputting a waveform: the ideal output waveform of the high-frequency direct-current switching power supply is a straight line, namely, the voltage is set according to the voltage, and the voltage does not fluctuate at all. But there is in fact a superposition of high frequency ripple and low frequency ripple.
As shown in fig. 1 to 3, as a preferred embodiment of the present application, an apparatus for reducing ripple of a digital switching power supply according to the present invention includes: the main loop module and the control circuit module; the main loop module includes: the device comprises an input rectification unit for converting input alternating current into pulsating direct current, a PFC module for controlling the current flowing into a bus energy storage capacitor and enabling the phase of the current to be close to the voltage phase to improve the power factor, a rectification bus energy storage capacitor unit for converting the pulsating direct current into relatively stable direct current, a power tube inversion unit for converting the direct current of a bus into high-frequency alternating current, a step-up transformer unit, a high-voltage rectification unit for converting the high-frequency high-voltage alternating current output by a transformer into high-voltage direct current and a filtering unit.
As a preferred embodiment, the control circuit module includes: the device comprises a phase-locked loop unit for alternating current phase detection, a power tube driving unit, an analog quantity acquisition and transmission unit, an embedded processor MCU unit of a control center of a digital power supply, a nonvolatile storage unit, a human-computer interaction unit, namely a front panel and an upper computer interface.
As a preferred embodiment of the present application, the phase-locked loop unit: and detecting the input phase of the power frequency alternating current. In the application, for example, the trigger is set at a position of +50V and set as rising edge trigger, the waveform of 220V alternating current falls from +310V to-310V and rises to +310V again in a sine wave manner to form a period, and the phase-locked loop is used for outputting a trigger signal to the MCU at the moment that the voltage rises to 50V in each voltage rising process.
Further, in the present application, the power module driving unit performs power amplification and potential isolation on a driving signal generated by the MCU and loads the driving signal to the power tube to control the power tube to be turned on or off; the output capacity of the driving signal generated by the MCU is weaker, the MCU does not have the carrying capacity, meanwhile, the power tubes are often multiple, the electric potentials are different and cannot be directly driven, and the analog quantity acquisition and transmission unit of the power tube driving unit: the voltage output by the power supply is higher and cannot be directly measured, the acquisition unit divides the voltage through a resistor, a capacitor and the like, and reduces the voltage to a range which can be accepted by an ADC (analog-to-digital converter) according to a certain proportion, so that the MCU can read the actual output voltage and current of the power supply through the ADC peripheral in the chip; the embedded processor MCU unit MCU (microprocessor) unit: the control center of the digital power supply internally comprises a plurality of on-chip peripherals, such as a PWM peripheral for generating a driving signal, a GPIO interface peripheral for receiving a power frequency trigger signal of a phase-locked loop, a button and an indicator light signal on a man-machine interaction unit and the like, and an ADC peripheral for converting an analog quantity signal sent by an analog quantity acquisition and transmission unit into a digital signal; the UART peripherals are used for communicating with an upper computer, a front panel, a nonvolatile memory and the like; non-volatile memory: the system is used for storing data in the power supply operation process, and the data cannot be lost after the system is powered off so as to be read and used in the next operation; a front panel: the power supply can be operated by an operator through a button, a display and the like; an upper computer interface: the power supply can be remotely monitored and operated by communicating with a computer.
Compared with the traditional analog power supply, the digital power supply has the greatest characteristic that all control signals and controlled signals are converged to the MCU on a hardware circuit, and the MUC judges when to output through preset working logic and the duty ratio of PWM output so that the actual output of the power supply is equal to a set value.
Setting the output state, voltage, current and power state of the power supply through the man-machine interaction unit, namely a front panel and/or an upper computer interface; when the MCU unit of the embedded processor normally operates, the MCU unit of the embedded processor controls the output power of the power device through a driving module of the PWM peripheral, the ADC peripheral collects the current voltage and current, and the current value and the set value are dynamically adjusted by calculating the duty ratio of the driving through a PID operation unit in the MCU unit, so that the output is always stable and output near the set value.
As a preference in this application, the present invention also includes a method of reducing ripple in a digital switching power supply, comprising the steps of:
step S1: segmenting the voltage and the current, judging the current voltage and the current according to segmented data after acquiring the voltage and the current, determining the coordinates of the voltage and the current to obtain the current segmentation, and writing the current segmentation into a nonvolatile storage unit when the compensation data changes; the starting point of the power frequency period is the trigger signal output by the phase-locked loop, and no accumulated error is ensured.
For the judgment of the segmented data, as a preferred embodiment, the application includes two conditions, one is that the working condition is judged by the output voltage and the current: voltage and current are segmented, for example, the voltage and the current are segmented into a two-dimensional matrix of 20 x 20 according to 5% of segment, and the current voltage and the current are judged to belong to the segment according to segmented data after the voltage and the current are collected, so that the coordinates of the voltage and the current are determined to obtain the current segment; the current ripple of the main loop is positively correlated with the power, the power is equal to the product of voltage and current, and the other working condition segmentation method is segmentation according to the power, so that a two-dimensional matrix is changed into a bit array, the capacity requirement on a memory is further reduced, the current power is calculated, and the current segmentation is determined according to the power.
S2: after the PWM interruption is started, firstly carrying out PID operation, and then judging whether the compensation signal of the previous switching period is proper or not by the system according to the comparison between the current output condition and the expected output condition; when the current output condition and the expected output condition are greater than the set ripple threshold, correcting the compensation coefficient of the previous switching period, and storing the compensation coefficient into a ripple compensation array to be called when the next power frequency period is reached; adding the result of the current PID and the compensation data of the current period into a PWM automatic loading register to wait for the output of the next switching period;
s3: correcting the waveform;
s4: when the ripple compensation function is started for the first time, the values in the nonvolatile memory are all 0, the current output state can be automatically learned after the corresponding working condition segmentation is started, the low-frequency ripple is stable after being rapidly reduced, the duration of the process is usually less than 1 second, and then the compensation data are automatically loaded after the working condition is started again.
As a preferable example in this application, the PID operation in step S2 is:
ΔUn＝Kp(εn-εn-1)+Kiεn+Kd(εn-2εn-1+εn-2)；
wherein, Kp、Ki、KdRespectively representing proportional, integral and differential parameters of the PID; epsilonn、εn-1、εn-2Epsilon represents the error, i.e. the deviation between the set value and the actual value, respectively, and since the PID is calculated one by one in the switching period, the set value is relatively stable, and the feedback value is always in the changing epsilonnRepresenting the deviation, epsilon, of the current periodn-1Representing the deviation of the last switching period, and so onn-2Represents the deviation of the last period; delta UnIndicating the increment after PID calculation, and finally adding the last calculation Un-1The final result of the PID operation is obtained;
Un＝Un-1+ΔUn。
and adding a duty ratio compensation array to the PID operation result to stabilize the output voltage near a set value and counteract the influence of the fluctuation of the bus voltage on the output voltage. Because the fluctuation of the input voltage is stable, the array of the compensation secondary fluctuation is also stable, and the array which changes in 50Hz frequency period, i only need to store data of one period, for a power supply with 20kHz switching frequency, the PWM switching frequency of one power frequency period is 400, and the compensation data of each working condition is 400. Fig. 3 shows a schematic diagram of the compensation data and the bus voltage, and it can be seen that the two are almost complementary, when the bus voltage is low, the compensation data is larger, the energy output in a single switching period can be properly increased, and the output becomes stable as a result of the combined action. How to obtain the 400 compensation data, the 400 data in the initial state are all 0, and when the power supply is in the stable output state, the delta U is obtained due to the adoption of the incremental PID algorithmnThe increment of the PID is just, the small increment indicates that the PID output result is stable, and then the | Delta Un|＜5％×Un-1The PID output is considered to have stabilized. Entering a learning state after the PID is stabilized, comparing the current output voltage with an expected output voltage, and if the output voltage is stable>The expected output voltage + ripple threshold, which indicates that the compensation coefficient of the previous switching period is larger, is reduced by one; if the output voltage is less than the expected output voltage-ripple threshold, the compensation coefficient of the previous period is smaller, and the compensation coefficient is increased by one; if the ripple does not exceed the set threshold, the compensation coefficient is appropriate, processing is not needed, and the compensation coefficient is output according to the current compensation coefficient. After several cycles of iteration, the compensation coefficient should tend to be stable, and the low-frequency ripple of the output voltage is within the set ripple threshold range, which indicates that the low-frequency ripple of the output voltage is effectively suppressed at this time.
As a preferred embodiment, forIn the nonvolatile memory capacity calculation: byte number N-fp occupied by compensation data under single working conditionwm/facCapacity-voltage fraction-current fraction. For example, a 20kHz switching frequency switching power supply, with an AC 50Hz input, requires a minimum capacity of 160kB for the non-volatile memory for every 5% voltage current. The advantage of segmented storage is that the optimal low-frequency ripple compensation coefficient can be superposed all the time in the process of rapid change of voltage and current. For a switching power supply with fixed voltage or current, power segmentation can be used, so that segmented data is changed into a one-dimensional array from a two-bit matrix, the number of segments is greatly reduced, and the required capacity is correspondingly reduced. In addition, the switching power supply is always in a learning mode in the output process, and the compensation data can be automatically adjusted after the output ripple is larger than a set threshold value, so that the steady-state output ripple of the power supply is not influenced by the sectional density.
The method has no special requirements on a main loop or a topological structure of a controlled power supply, is suitable for a high-frequency switching power supply powered by alternating current mains supply, and has certain requirements on an MCU (microprogrammed control unit) and a nonvolatile memory. The MCU must integrate an on-chip ADC and can realize PWM cycle-by-cycle sampling, a floating point operation unit is provided for ensuring PID operation rate, and an SPI interface must be provided for communicating with a nonvolatile memory to access data. Most of the medium-high end MCUs on the market can meet the requirements, and as a preferred implementation method, the embodiment in the application is as follows: adopting Fuji MB85RS4MTPF capacity of 500KB with the nonvolatile memory; the MCU adopts NXP MKV31F512VLL 12; the drive module adopts an Annemei FOD3120 SD; the power tube adopts an English flying IKW50N65H 5.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (4)

1. An apparatus for reducing digital switching power supply ripple, comprising:
the main loop module and the control circuit module; the main loop module includes: the power factor improving device comprises a direct current input rectifying unit, a PFC module, a rectifying bus energy storage capacitor unit, a power tube inverting unit, a boosting transformer unit, a high-voltage rectifying unit and a filtering unit, wherein the direct current input rectifying unit is used for converting input alternating current into pulsating direct current, the PFC module is used for controlling current flowing into a bus energy storage capacitor and enabling the phase of the current to be close to voltage phase so as to improve power factor, the rectifying bus energy storage capacitor unit is used for converting the pulsating direct current into stable direct current, the power tube inverting unit is used for converting the direct current of a bus into;
the control circuit module includes: the device comprises a phase-locked loop unit for alternating current phase detection, a power tube driving unit, an analog quantity acquisition and transmission unit, an embedded processor MCU unit of a control center of a digital power supply, a nonvolatile storage unit, a human-computer interaction unit, namely a front panel and an upper computer interface;
setting the output state, voltage, current and power state of the power supply through the man-machine interaction unit, namely a front panel and/or an upper computer interface; when the MCU unit of the embedded processor normally operates, the MCU unit of the embedded processor controls the output power of the power device through a driving module of the PWM peripheral, the ADC peripheral collects the current voltage and current, and the current value and the set value are dynamically adjusted by calculating the duty ratio of the driving through a PID operation unit in the MCU unit, so that the output is always stable and output near the set value.
2. The apparatus for reducing digital switching power supply ripple of claim 1, further comprising:
the phase-locked loop unit: detecting the input phase of power frequency alternating current, and loading a driving signal generated by the MCU to the power tube by the power module driving unit for power amplification and potential isolation to control the power tube to be switched on and off; the digital power supply enables the actual output and the set value of the power supply to be achieved by converging all control signals and controlled signals to the MCU, judging when the MUC outputs the control signals and the controlled signals through preset working logic and judging the duty ratio of PWM output.
3. A method for reducing digital switching power supply ripple using the apparatus of claims 1-2, comprising the steps of:
s1: segmenting the voltage and the current, judging the current voltage and the current according to segmented data after acquiring the voltage and the current, determining the coordinates of the voltage and the current to obtain the current segmentation, and writing the current segmentation into a nonvolatile storage unit when the compensation data changes; the starting point of the power frequency period is a trigger signal output by the phase-locked loop to ensure no accumulated error;
s2: after the PWM interruption is started, firstly carrying out PID operation, and then judging whether the compensation signal of the previous switching period is proper or not by the system according to the comparison between the current output condition and the expected output condition; comparing the current output voltage with the expected output voltage, and if the output voltage is larger than the expected output voltage plus the ripple threshold, indicating that the compensation coefficient of the last switching period is larger, reducing the compensation coefficient by one; if the output voltage is less than the expected output voltage-ripple threshold, the compensation coefficient of the previous period is smaller, and the compensation coefficient is increased by one; if the ripple does not exceed the set threshold, the compensation coefficient is appropriate, processing is not needed, and the compensation coefficient is output according to the current compensation coefficient;
s3: correcting the waveform;
s4: when the ripple compensation function is started for the first time, the values in the nonvolatile memory are all 0, the current output state can be automatically learned after the corresponding working condition segmentation is started, the low-frequency ripple is stable after being rapidly reduced, the duration of the process is usually less than 1 second, and then the compensation data are automatically loaded after the working condition is started again.
4. The apparatus for reducing digital switching power supply ripple of claim 3, further comprising:
the PID operation in step S2:
ΔUn＝Kp(εn-εn-1)+Kiεn+Kd(εn-2εn-1+εn-2)；
wherein, Kp、Ki、KdRespectively representing proportional, integral and differential parameters of the PID; epsilonn、εn-1、εn-2Epsilon represents the error, i.e. the deviation between the set value and the actual value, respectively, and since the PID is calculated one by one in the switching period, the set value is relatively stable, and the feedback value is always in the changing epsilonnRepresenting the deviation, epsilon, of the current periodn-1Representing the deviation of the last switching period, and so onn-2Represents the deviation of the last period; delta UnIndicating the increment after PID calculation, and finally adding the last calculation Un-1The final result of the PID operation is obtained;
Un＝Un-1+ΔUn。
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