CN110661408A - Discharge circuit, power supply and display device - Google Patents
Discharge circuit, power supply and display device Download PDFInfo
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- CN110661408A CN110661408A CN201910874843.7A CN201910874843A CN110661408A CN 110661408 A CN110661408 A CN 110661408A CN 201910874843 A CN201910874843 A CN 201910874843A CN 110661408 A CN110661408 A CN 110661408A
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- power supply
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/322—Means for rapidly discharging a capacitor of the converter for protecting electrical components or for preventing electrical shock
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Abstract
The application discloses discharge circuit, power and display device. The discharge circuit includes: the voltage division circuit is used for providing a control signal according to the driving signal; a first resistor for receiving an input power; and the control end of the switch tube receives the control signal, the first path end is connected to the first resistor, the second path end is connected to the reference ground, and the switch tube is used for providing a discharge path from the input power supply to the reference ground according to the control signal, wherein the resistance value of the first resistor is selected according to the expected discharge time of the input power supply, the voltage value of the driving signal in the power-on state is less than or equal to zero, and the driving signal rises to enable the control signal to conduct the switch tube when the power is off. The discharging circuit provides a discharging path from the input power supply to the reference ground, and controls the discharging time of the input power supply by controlling the size of the first resistor, so that the input power supply can be rapidly discharged, the stability of a load is improved, and the problem of shutdown ghost shadow is avoided.
Description
Technical Field
The invention relates to the technical field of display, in particular to a discharge circuit, a power supply and a display device.
Background
With the popularization of electronic products, power supplies are applied to various electronic products. The response time of the power supply is an important parameter, and for example, the Video Electronics Standards Association (VESA) standard requires that the power-off time of the display device be controlled within 10ms to effectively eliminate the image sticking.
In the prior art, as shown in fig. 1, a power supply 100 includes a power management circuit 110 and a level shift circuit 120, where the power management circuit 110 is configured to receive a logic power Vin and provide an initial signal VGL _ P required by a load, and the level shift circuit 120 performs level shift on the initial signal provided by the power management circuit 110 to obtain an operating voltage VGL. When the load stops working, the logic power Vin is converted from high level to low level, so that the power-off of the load is completed. However, in the actual operation of the power supply, it takes a certain time for the logic power Vin to change from high level to low level, as shown in fig. 2a, the charge on the power equivalent capacitor C is discharged to the ground via the circuit resistor R0, and the discharging path is shown in the direction of the arrow in the figure. Fig. 2b illustrates a discharge timing diagram of the power supply by taking the power supply of the liquid crystal display module as an example, where a discharge time Δ t required for the logic power supply Vin to discharge from 0.9Vin to 0.1Vin is about 470ms, the discharge time Δ t is much longer than within 10ms required by the VESA standard, the discharge time is too large, and the discharge time is not controllable, which easily causes the problems of shutdown ghost, reduction in load stability, and the like.
Therefore, further improvements to the prior art power supplies are needed to solve the above problems.
Disclosure of Invention
In view of the above problems, it is an object of the present invention to provide a discharge circuit, a power supply, and a display device, in which a discharge time of an input power supply is controlled by a magnitude of a first resistor, thereby rapidly discharging the input power supply.
According to a first aspect of the present invention, there is provided a discharge circuit comprising: the voltage division circuit is used for providing a control signal according to the driving signal; a first resistor for receiving an input power; and the control end of the switch tube receives the control signal, the first path end is connected to the first resistor, the second path end is connected to the reference ground, the switch tube is used for providing a first discharge path from the input power supply to the reference ground according to the control signal, the resistance value of the first resistor is selected according to the expected discharge time of the input power supply, the voltage value of the driving signal in the power-on state is less than or equal to zero, and the driving signal rises when the power is off so as to enable the control signal to conduct the switch tube.
Preferably, the first resistor is an adjustable resistor.
Preferably, the voltage dividing circuit includes: a first resistor; and a second resistor in series with the first resistor between the driver and ground, wherein a series node between the first and second resistors provides the control signal.
Preferably, the discharge time of the input power supply is positively correlated with the magnitude of the first resistor.
Preferably, the switch tube is an NMOS field effect transistor.
Preferably, the method further comprises the following steps: and the equivalent resistance to the ground receives the input power supply and provides a second discharge path from the input power supply to the reference ground, and the first discharge path and the second discharge path are connected between the input power supply and the reference ground in parallel.
According to a second aspect of the present invention, there is provided a power supply for supplying a drive signal to a load, comprising: the power management circuit is used for providing a first initial signal and a second initial signal according to an input power supply; the level conversion circuit is connected to the power management circuit and used for providing the driving signal according to the first initial signal and the second initial signal; and the discharging circuit is connected between the level conversion circuit and the power management circuit and used for providing a first discharging path from the input power supply to the reference ground according to the driving signal.
Preferably, when the load starts to operate, the driving voltage is provided according to the second initial signal, and when the load stops operating, the driving voltage is provided according to the first initial signal, and the input power starts to discharge, wherein the voltage value of the first initial signal is greater than zero, and the voltage value of the second initial signal is less than or equal to zero.
According to a third aspect of the present invention, there is provided a display device comprising: a timing controller for providing a third initial signal; the power supply as described above, for providing a start signal, a plurality of timing signals, and a driving signal according to an input power supply and the third initial signal; and the display panel is used for displaying pictures according to the starting signal, the plurality of timing signals and the driving signal.
Preferably, when the display panel displays a picture, the voltage value of the driving signal is less than or equal to zero, and when the display panel stops displaying the picture, the voltage value of the driving signal rises.
According to the discharge circuit, the power supply and the display device, the first discharge path from the input power supply to the reference ground is provided by the discharge circuit, and the discharge time of the input power supply is controlled by controlling the size of the first resistor, so that the input power supply can be rapidly discharged, the stability of a load is improved, and the problem of shutdown ghost shadow is avoided.
Furthermore, the discharge circuit, the power supply and the display device can control the discharge time of the input power supply by adjusting the size of the first resistor, and are conveniently applied to various different scenes according to the requirements of the discharge time.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 shows a schematic diagram of a power supply according to the prior art;
fig. 2a shows a discharge principle diagram of a power supply according to the prior art;
FIG. 2b shows a timing diagram for the discharge of a power supply according to the prior art;
fig. 3a to 3f show discharge timing diagrams of the conventional power supply, respectively;
FIG. 4 shows a schematic diagram of a discharge circuit according to an embodiment of the invention;
FIG. 5a shows a schematic diagram of a power supply according to an embodiment of the invention;
FIG. 5b shows a discharge principle diagram of a power supply according to an embodiment of the invention;
FIG. 6 shows a timing diagram of drive signals according to an embodiment of the invention;
FIG. 7 shows a timing diagram for discharging of a power supply according to an embodiment of the invention;
fig. 8 is a schematic diagram of a display device according to an embodiment of the present invention.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples.
Fig. 3a to 3F respectively show a discharge timing chart of a conventional power supply, fig. 3a shows a discharge timing chart of a conventional power supply by taking a power supply of a liquid crystal display module as an example, and a dotted line part of fig. 3a shows a natural discharge timing chart after a capacitor is charged to 3.3V, wherein the resistor is 2.67k Ω and the capacitor is 70 μ F. Unlike the process of natural discharge of the capacitor, the discharge speed of the 3.3V power supply is faster in the early period, but the discharge speed gradually becomes slower with the passage of time, and particularly after the power supply is reduced to 1.5V, the trend of the discharge speed becoming slower is more obvious, and about 470ms is needed for reducing from 2.97V to 0.33V.
Fig. 3b to 3f show timing charts of power discharge in periods T1 to T5, respectively, in which the solid line indicates the actual power discharge timing and the dotted line indicates the power discharge timing with approximate fitting. The discharge time sequence of the power supply is approximately fitted by adopting a capacitance discharge curve, the capacitance is 70 mu F, and the discharge time sequence is obtained according to a capacitance discharge formula
R is 1/(k × C), wherein U0The equivalent capacitance C of the power supply is 70 muF for the initial voltage of the discharge time sequence of the segment, and k is a fitting index which is approximately fitted to the discharge time sequence of the power supply. According to the formula of capacitive discharge and according to the k values in the time periods T1 to T5 of-5.34,138.0, -38.3, -8.65, -1.54, which can be calculated as 2671 Ω, 104 Ω, 373 Ω, 1657 Ω and 9271 Ω of the power supply in the time period from T1 to T5. In the time period from T2 to T5, as the residual charge of the capacitor decreases, the resistance value gradually increases, and the discharging process is time-consuming and cannot be adjusted or controlled.
Fig. 4 shows a schematic diagram of a discharge circuit according to an embodiment of the present invention, and the discharge circuit 230 includes a voltage division module and a switch module for providing a first discharge path according to the driving signal VGL, so as to rapidly discharge the logic power Vin (input power).
The voltage division module comprises a second resistor R2 and a third resistor R3, a first end of the second resistor R2 receives a driving signal VGL, a second end of the second resistor R3526 is connected with a first end of the third resistor R3 to provide a control signal VGS, and a second end of the third resistor R3 is grounded, so that the situation that the driving signal VGL is directly loaded to a control end of the switching tube Q1 and exceeds the limit voltage of the control end, and the switching tube Q1 is broken down is avoided.
The switch module comprises a first resistor R1 and a switch tube Q1, wherein a first end of the switch tube Q1 is connected to the logic power Vin, a second end of the switch tube Q1 is connected to a first path end of the switch tube Q1, a control end of the switch tube Q1 receives the control signal VGS, and a second path end of the switch tube Q1 is connected to the reference ground. The discharge time of the logic power Vin is controlled by the magnitude of the first resistor R1, and the resistance value of the first resistor R1 is determined according to the expected discharge time of the logic power Vin, wherein the discharge time refers to the time required for the logic power Vin to discharge from 0.9Vin to 0.1 Vin. Preferably, the first resistor R1 is an adjustable resistor, and the discharge time of the logic power Vin is controlled by adjusting the size of the first resistor R1.
When the load is in a working state, the driving signal VGL is kept in a low level state, the voltage value is less than or equal to zero, the control signal VGS is also in a low level state, the switching tube Q1 is turned off, and the logic power Vin does not discharge; when the load stops working, the driving signal VGL is pulled up instantly, i.e. is in a high level state for a period of time, the control signal VGS is also in a high level state, the switching tube Q1 is turned on and provides a first discharging path between the logic power Vin and the reference ground, so that the logic power Vin is discharged rapidly.
FIG. 5a shows a schematic diagram of a power supply according to an embodiment of the invention; fig. 6 shows a timing diagram of driving signals according to an embodiment of the present invention.
As shown in fig. 5, the power supply 200 includes a power management circuit 210, a level shift circuit 220, and a discharge circuit 230.
The power management circuit 210 receives the logic power Vin and provides an initial signal required by the load, and the level conversion circuit 220 performs level conversion on the initial signal provided by the power management circuit 210 to obtain a working voltage; the level shifter circuit 220 provides a driving signal VGL as an input signal to the discharge circuit 230.
After the logic power Vin is inputted to the power management circuit 210, the logic power Vin generates a first initial signal VGH _ P (e.g., 18V) and a second initial signal VGL _ P (e.g., -11V) for the level shift circuit 220 to operate, and the level shift circuit 220 generates the driving signal VGL according to the first initial signal VGH _ P (e.g., 18V) and the second initial signal VGL _ P (e.g., -11V).
Fig. 5b shows a discharge principle diagram of the power supply according to the embodiment of the invention, as shown in fig. 5b, a charge discharge path of the equivalent capacitor C of the power supply is shown in an arrow direction in the diagram, and the discharge circuit 230 is the same as the discharge circuit 230 shown in fig. 4, and is not repeated herein. In this embodiment, the charge on the equivalent capacitor C of the power supply is released through the second discharge path, i.e. through the circuit resistor R0 to the ground reference, the circuit resistor R0 is the equivalent resistor to the ground of the circuit (power supply), the resistance of the circuit resistor R0 will gradually increase with the decrease of the residual charge of the capacitor C, and the discharge process is time-consuming, unable to adjust, and unable to control; on the other hand, the charge on the power equivalent capacitor C is discharged through the first discharge path, i.e. through the discharge circuit 230 to the ground, the resistance of the resistor R1 is fixed, even if R0 is gradually increased, the parallel resistance of R0 and R1 is limited to be smaller than that of R1, so that the discharge path provided by the discharge circuit 230 conforms to the discharge rule of the capacitor, and a fast discharge path can be provided.
As shown in fig. 6, when the load is in the working state, the driving signal VGL is-11V, and when the load stops working, the logic power Vin is turned off, and the driving signal VGL is pulled up to 18V instantly to eliminate the residual charge in the load circuit.
In this embodiment, when the load is in the operating state, the driving signal VGL is maintained in the low state, and the discharging circuit 230 is turned off. When the load stops working, the driving signal VGL is pulled up instantly, i.e. is in a high level state for a period of time, and at this time, the discharging circuit 230 starts working to provide a discharging path between the logic power Vin and the reference ground, so that the logic power Vin is discharged rapidly.
Fig. 7 is a timing diagram illustrating the discharging of the power supply according to the embodiment of the invention, in the discharging circuit, when the load is in the working state, the driving signal VGL is kept at the low level, the control signal VGS is also at the low level, the switching tube Q1 is turned off, and the logic power Vin does not discharge; when the load stops working, the driving signal VGL is pulled up instantly, i.e. in a high level state within a period of time, the control signal VGS is also in a high level, and the switching tube Q1 is turned on and provides a discharging path between the logic power Vin and the reference ground, so that the logic power Vin is discharged rapidly.
The discharging time delta t required by the logic power Vin to discharge from 0.9Vin to 0.1Vin can be controlled by adjusting the resistance value of the first resistor R1, and when the discharging circuit discharges the logic power Vin, the discharging rule of the logic power Vin is consistent with that of the capacitor. Therefore, the discharge time Δ t of the power supply can be set, and the first resistor R1 with a proper size can be selected according to the discharge time Δ t. For example, if the capacitance of the power supply is 70 μ F and the discharge time Δ t needs to be controlled to be 1.5ms, then the capacitance discharge formula shows that:
t1＝-R1×C×ln(0.9Vin/Vin)
t2＝-R1×C×ln(0.1Vin/Vin)
Δt＝t2-t1＝1.5ms
C＝70μF
by combining the above formula, R1 is 9.75 Ω, in the actual circuit, the first resistor R1 with a resistance of 10 Ω is selected, the actual operating voltage at each position of the discharge circuit is as shown in fig. 7, the discharge time Δ t of the logic power Vin is 1.9ms, and the discharge time Δ t is substantially consistent with the calculated design value. When the load stops working, the driving signal VGL output by the level conversion circuit is instantly pulled up to 12.6V from-10.6V; the control signal VGS is instantaneously pulled up to 1.96V from-1.56V; the discharge current I _ Vin flowing through the switching tube Q1 momentarily rises from 0A to 0.166A and then falls to 0V.
Fig. 8 is a schematic diagram of a display device according to an embodiment of the invention, and as shown in fig. 8, the display device includes a power supply 200, a display panel 300 and a timing controller 310, wherein the power supply 200 includes a power management circuit 210, a level conversion circuit 220 and a discharge circuit 230. The power management circuit 210, the level shifter circuit 220, and the discharge circuit 230 of this embodiment have the same structure as the power management circuit, the level shifter circuit, and the discharge circuit shown in fig. 5, and the description thereof is omitted here for brevity.
Taking the liquid crystal display device as an example, the timing controller 310 provides a third initial signal, the third initial signal includes a start signal L _ STVx and a plurality of timing signals L _ CLKx, and the like, and the level shifter 220 performs level shifting on the start signal L _ STVx and the plurality of timing signals L _ CLKx, and the like provided by the timing controller 310, so as to provide the start signal STVx and the plurality of timing signals CLKx, and the like, required by the display panel 300, to the timing controller 310. The power management circuit 210 is coupled to the logic power Vin and provides an initial signal VGL _ P and an initial signal VGH _ P, and the level shifter 220 receives the initial signal VGL _ P and the initial signal VGH _ P and provides a driving signal VGL. The display panel 300 further includes a gate driver and a source driver (not shown), and the display panel 300 displays a picture according to the start signal STVx, the plurality of timing signals CLKx, and the driving signal VGL.
In this embodiment, the connection relationship of the power source inside the display device is described by taking the liquid crystal display device as an example, but the display device of the present invention is not limited to the liquid crystal display device, and the display device may be a plasma display device, an LED display device, an OLED display device, or another type of display device, and the internal structure of the display device is not limited thereto.
While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.
Claims (10)
1. A discharge circuit, comprising:
the voltage division circuit is used for providing a control signal according to the driving signal;
a first resistor for receiving an input power; and
a switch tube, a control end of the switch tube receiving the control signal, a first path end connected to the first resistor, a second path end connected to a reference ground, the switch tube providing a first discharge path from the input power source to the reference ground according to the control signal,
wherein a resistance value of the first resistor is selected according to a desired discharge time of the input power source,
the voltage value of the driving signal in the power-on state is less than or equal to zero, and the driving signal rises when the power is off so that the control signal conducts the switch tube.
2. The discharge circuit of claim 1, wherein the first resistor is an adjustable resistor.
3. The discharge circuit of claim 1, wherein the voltage divider circuit comprises:
a first resistor; and
a second resistor in series with the first resistor between the drive signal and a reference ground,
wherein a series node between the first resistance and the second resistance provides the control signal.
4. The discharge circuit according to claim 1, wherein a discharge time of the input power source is positively correlated with a magnitude of the first resistor.
5. The discharge circuit of claim 1, wherein the switching transistor is an NMOS field effect transistor.
6. The discharge circuit of claim 1, further comprising: and the equivalent resistance to the ground receives the input power supply and provides a second discharge path from the input power supply to the reference ground, and the first discharge path and the second discharge path are connected between the input power supply and the reference ground in parallel.
7. A power supply for providing a drive signal to a load, comprising:
the power management circuit is used for providing a first initial signal and a second initial signal according to an input power supply;
the level conversion circuit is connected to the power management circuit and used for providing the driving signal according to the first initial signal and the second initial signal; and
the discharge circuit of any of claims 1 to 6, connected between the level shift circuit and the power management circuit, for providing a first discharge path of the input power to ground reference according to the driving signal.
8. The power supply of claim 7,
providing the driving voltage according to the second initial signal when the load starts to work,
when the load stops working, the driving voltage is provided according to the first initial signal, the input power supply starts discharging,
the voltage value of the first initial signal is greater than zero, and the voltage value of the second initial signal is less than or equal to zero.
9. A display device, comprising:
a timing controller for providing a third initial signal;
the power supply of claim 7 or 8, configured to provide a start signal, a plurality of timing signals, and a driving signal according to an input power and the third initial signal; and
and the display panel is used for displaying pictures according to the starting signal, the plurality of timing signals and the driving signal.
10. The display device according to claim 9, wherein a voltage value of the driving signal is equal to or less than zero when the display panel displays a picture,
when the display panel stops displaying the picture, the voltage value of the driving signal rises.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112735346A (en) * | 2020-12-30 | 2021-04-30 | 昆山龙腾光电股份有限公司 | Shutdown control circuit, shutdown control method and display device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101101385A (en) * | 2006-07-05 | 2008-01-09 | 群康科技(深圳)有限公司 | Discharge circuit and liquid crystal display device adopting the discharge circuit |
| WO2017143762A1 (en) * | 2016-02-25 | 2017-08-31 | 中兴通讯股份有限公司 | Terminal, crash reset control circuit and method |
| CN108172179A (en) * | 2017-12-14 | 2018-06-15 | 昆山龙腾光电有限公司 | Electric power management circuit |
| CN108257570A (en) * | 2018-02-09 | 2018-07-06 | 京东方科技集团股份有限公司 | Eliminate control circuit, its control method and the liquid crystal display device of power-off ghost shadow |
| CN108398981A (en) * | 2018-02-12 | 2018-08-14 | 南京中电熊猫平板显示科技有限公司 | A kind of control circuit of display device, display device and its control method |
| CN108538267A (en) * | 2018-04-20 | 2018-09-14 | 昆山龙腾光电有限公司 | Driving circuit and liquid crystal display device |
| US20190057668A1 (en) * | 2017-08-15 | 2019-02-21 | Boe Technology Group Co., Ltd. | Display drive circuit, display device and method for driving the same |
-
2019
- 2019-09-17 CN CN201910874843.7A patent/CN110661408B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101101385A (en) * | 2006-07-05 | 2008-01-09 | 群康科技(深圳)有限公司 | Discharge circuit and liquid crystal display device adopting the discharge circuit |
| WO2017143762A1 (en) * | 2016-02-25 | 2017-08-31 | 中兴通讯股份有限公司 | Terminal, crash reset control circuit and method |
| US20190057668A1 (en) * | 2017-08-15 | 2019-02-21 | Boe Technology Group Co., Ltd. | Display drive circuit, display device and method for driving the same |
| CN108172179A (en) * | 2017-12-14 | 2018-06-15 | 昆山龙腾光电有限公司 | Electric power management circuit |
| CN108257570A (en) * | 2018-02-09 | 2018-07-06 | 京东方科技集团股份有限公司 | Eliminate control circuit, its control method and the liquid crystal display device of power-off ghost shadow |
| CN108398981A (en) * | 2018-02-12 | 2018-08-14 | 南京中电熊猫平板显示科技有限公司 | A kind of control circuit of display device, display device and its control method |
| CN108538267A (en) * | 2018-04-20 | 2018-09-14 | 昆山龙腾光电有限公司 | Driving circuit and liquid crystal display device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112735346A (en) * | 2020-12-30 | 2021-04-30 | 昆山龙腾光电股份有限公司 | Shutdown control circuit, shutdown control method and display device |
| CN112735346B (en) * | 2020-12-30 | 2022-03-25 | 昆山龙腾光电股份有限公司 | Shutdown control circuit, shutdown control method and display device |
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