CN110661405B

CN110661405B - Load protection circuit

Info

Publication number: CN110661405B
Application number: CN201910947121.XA
Authority: CN
Inventors: 苏敬喆
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2019-09-29
Filing date: 2019-09-29
Publication date: 2021-06-29
Anticipated expiration: 2039-09-29
Also published as: CN110661405A

Abstract

The present application provides a load protection circuit, the circuit comprising: the timing module, the control module and at least two switching tubes; wherein: the timing module is used for timing the working time length of the switching tube working at present, if the working time length is equal to the preset safe working time length, a control instruction for closing the switching tube working at present is generated, and meanwhile, a control instruction for opening any one switching tube except the switching tube working at present is generated; sending the control instruction to a control module; and the control module is used for acquiring the control instruction and controlling the switch of the corresponding switch tube based on the control instruction. The timing module is arranged in the circuit, the working time length of the switch tube working at present is timed, when the working time length of the timing is equal to the preset safe working time length, the other switch tube is switched to work, the safety of the MOS tube can be guaranteed in the mode, and the electric parameters required for stabilizing can be provided for the load.

Description

Load protection circuit

Technical Field

The present application relates to the field of circuit design technologies, and in particular, to a load protection circuit.

Background

Some components (such as a CPU, a memory, a GPU, a hard disk, and the like) exist in the server, and such components have requirements on electrical parameters of the power supply, that is, the current of the power supply and the duration of the current are required to meet the requirements of such components (such as 80A current maintaining for 3ms, and the like) so as to ensure the normal operation of such components.

At present, there is a current regulation method, which regulates and controls the current output from a power supply through a load protection circuit to satisfy the current required by a load and the duration of the current; specifically, at least two MOS tubes exist in the protection circuit, a control pin of the control module controls the on and off of each MOS tube, and the current required by the load can be obtained after the current of each MOS tube is superposed.

However, when the MOS transistor operates at a certain operating current, there is a safety operating time, for example: the safe working time of the MOS transistor under the current of 80A is 1ms, and the safe working time of the MOS transistor under the current of 20A is 10 ms. When the duration of the current required by the load exceeds the safe operating time of the MOS transistor, the MOS transistor may be burned out.

Disclosure of Invention

In view of this, the present disclosure provides a load protection circuit to ensure that each MOS transistor can provide a required current for a load.

In order to achieve the above purpose, the embodiments of the present application provide the following technical solutions:

in a first aspect, an embodiment of the present application provides a load protection circuit, where the load protection circuit includes: the timing module, the control module and at least two switching tubes; wherein:

the timing module is used for timing the working time length of the switching tube working at present, if the working time length is equal to the preset safe working time length, a control instruction for closing the switching tube working at present is generated, and meanwhile, a control instruction for opening any switching tube except the switching tube working at present is generated; sending the control instruction to the control module;

the control module is used for acquiring the control instruction and controlling the switch of the corresponding switch tube based on the control instruction;

the control module is connected with the control end of the switch tube through a control pin, and each switch tube corresponds to one control pin.

Optionally, the circuit further includes: a capacitance adjustment module;

and the capacitance adjusting module is used for acquiring the output signal of the switching tube and taking the adjusted output signal as the output of the circuit.

Optionally, the circuit further comprises a detection module;

the detection module comprises a detection pin and is used for collecting the output of the capacitance adjusting module through the detection pin.

Optionally, when the detection module collects the output of the capacitance adjusting module through the detection pin, the detection module is specifically configured to:

when the voltage value of the detection pin is detected to meet a preset voltage value, generating a full-open instruction;

and inputting the full-opening instruction to the control module to instruct the control module to open all the switch tubes.

Optionally, the input ends of the switching tubes are connected, the connection point serves as the input end of the circuit, the output end of each switching tube is connected, and the connection point serves as the output end of the circuit.

Optionally, the capacitance adjusting module includes a first capacitor and a second capacitor;

the first end of the first capacitor is connected with the first end of the second capacitor, a connection point is used as the input end of the capacitor adjusting module, and the second end of the first capacitor is connected with the ground;

and the first end of the second capacitor is used as the output end of the capacitor adjusting module, and the second end of the second capacitor is connected with the ground.

Optionally, the switching tube may be any one of the following: NMOS transistor, PMOS transistor and various three-stage transistors.

In a second aspect, the present application provides an electronic device, comprising: a load protection circuit as claimed in any preceding claim.

As can be seen from the above technical solutions, the present application provides a load protection circuit, including: the timing module, the control module and at least two switching tubes; wherein: the timing module is used for timing the working time of the switching tube, if the working time of the switching tube working at present is equal to the preset safe working time, a control instruction for closing the switching tube at present is generated, and meanwhile, a control instruction for opening other switching tubes except the switching tube at present is generated; sending the control instruction to a control module; the control module is used for acquiring a control instruction and controlling the switching condition of the switching tube based on the control instruction; the control module is connected with the control ends of the switch tubes through control pins, and each switch tube corresponds to one control pin. The timing module is arranged in the circuit, the switch tube which works at present is timed, when the timed working duration is equal to the preset safe working duration, the other switch tube is switched to work, the safety of the MOS tube can be ensured in the mode, and the electrical parameters required for stabilizing can be provided for the load.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

FIG. 1 shows a prior art load protection circuit block diagram;

fig. 2 shows a structure diagram of a load protection circuit provided in the present application;

FIG. 3 illustrates another load protection circuit block diagram provided herein;

FIG. 4 illustrates another load protection circuit block diagram provided herein;

FIG. 5 illustrates a block diagram of a capacitance adjustment module provided herein;

fig. 6 shows another load protection circuit structure provided in the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In this application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Currently, there is a load protection circuit. Referring to fig. 1, the circuit includes: a control module 101 and at least two switching tubes 102; wherein, the input ends of the switch tubes are connected as the input end of the load protection circuit; the output ends of the switching tubes are connected and used as the output end of the load protection circuit; and the control end of each switching tube is connected with one control pin of the control module, and when the control module generates a starting instruction, the starting instruction is sent to each MOS tube through the control pin so as to indicate that each MOS tube is started simultaneously. After the electrical parameters output by the MOS tube are superposed, the requirement of the load can be met.

However, the MOS transistor has a long safe operating time, and when the control module controls the on time of the MOS transistor to exceed the long safe operating time of the MOS transistor, the MOS transistor may be damaged. For example: under the current of 80A, the safe working time of a certain MOS tube is 1ms, the current duration required by the load is 3ms, the corresponding control module can control the MOS tube to last for 3ms under the current, and the MOS tube is damaged due to the fact that the corresponding control module provides the required electrical parameters for the load.

To this end, the embodiment of the application provides a load protection circuit. Referring to fig. 2, the circuit includes: at least two switching tubes 201, a timing module 202 and a control module 203. Wherein:

the switch tube 201 may be any type of switch tube, such as: NMOS transistor, PMOS transistor, and various types of triode. The switch tubes in the load protection circuit can be of the same type or different types, and can be designed by a manager.

The timing module 202 is configured to perform timing operation on the working time length of the currently working switching tube, and if the working time length is equal to a preset safe working time length, generate a control instruction for turning off the currently working switching tube, and simultaneously generate a control instruction for turning on any one switching tube except the currently working switching tube; the control instruction is sent to the control module 203.

For ease of understanding, the switching transistors are illustrated as MOS transistors.

It should be noted that the timing module is a certain functional module in the control chip, and is used to time the working duration of the switching tube that is currently working, and the preset safe working duration is set by the administrator according to the limit working duration of the switching tube, for example: under the current of 80A, the limit working time of a certain MOS tube is 1ms, and then a manager can set the safe working time according to the limit working time, such as 0.5ms, so that the safety of the MOS tube is ensured.

The control chip may be an ADM1278 control chip, or may be another type of control chip, and is not specifically described here.

If the working time length of the switching tube working at present is timed to reach the preset safe working time length (namely the working time length of the switching tube working at present is equal to the preset safe working time length), a control instruction for closing the switching tube working at present is generated, a control instruction for opening other switching tubes connected with the switching tube working at present in parallel is generated, the generated control instruction is sent to the control module, and the control module executes corresponding operation on each switching tube.

And the control module 203 is used for acquiring the control instruction and controlling the on-off condition of the switching tube based on the control instruction.

The control module 203 is connected to the control ends of the switching tubes through control pins, and each switching tube corresponds to one control pin.

When the number of the MOS tubes in the circuit is only 2, the MOS tube which works at present is closed through the corresponding control pin according to a control instruction which is generated by the timing module and used for closing the switching tube which works at present; and according to a control instruction for opening the switching tubes except the current switching tube, another MOS tube is opened through the corresponding control pin, and the MOS is circularly switched to work in such a way.

When the number of the MOS tubes in the circuit is more than 2, according to a control instruction generated by the timing module for closing the current switching tube, the MOS tube which works at present is closed through the corresponding control pin; and randomly starting an MOS tube except the current switching tube according to a control instruction for starting any one of the switching tubes except the current switching tube to replace the currently working MOS.

It should be noted that the control module also belongs to a functional module of the control chip, and the control chip further includes control pins, and each control pin is butted with one MOS transistor to display the step-by-step management of each MOS transistor.

In one example, referring to fig. 3, the input terminals of the switching tubes of the load protection circuit are connected, the connection point serves as the input terminal of the circuit, the output terminals of the switching tubes are connected, and the connection point serves as the output terminal of the circuit.

As shown in fig. 3, in the circuit diagram, the D poles of the MOS transistors (i.e., the drains of the MOS transistors) are all connected, and the connection point is used as the input end of the load protection circuit, and is used for interfacing with a power supply, i.e., P12V _ PSU in the figure; the S poles (namely the source electrodes of the MOS tubes) of the MOS tubes are connected, and the connection point is used as the output end of the LOAD protection circuit and is used for butting a LOAD, namely a LOAD module in the figure; the G pole of each MOS tube (namely the grid electrode of the MOS tube) is connected with the corresponding pin of the control module.

It should be noted that, in the above embodiment, the MOS transistors operate alternately to avoid breakdown of the MOS transistors due to spike current. The server circuit is comparatively complicated, and the electric capacity that inserts is also more and more, has increased the spike current when the server starts, and the MOS pipe can only work for a certain duration under the spike current, for example: when the peak current is 80A, the MOS tube can only work for 1ms, in order to ensure that the MOS tube is not punctured by the peak current, the safe working time length is set for the MOS tube, when the working time length of the MOS tube reaches the safe working time length, the MOS tube is closed, and the MOS tube is replaced by other MOS tubes to bear the peak current, so that the peak current is alternately borne in such a way until the peak current disappears, and the current tends to be stable.

In one example, referring to fig. 4, the load protection circuit further includes: a capacitance adjusting module 204 and a detection module 205; wherein:

and the capacitance adjusting module 204 is configured to obtain an output signal of the switching tube, and use the adjusted output signal as an output of the circuit.

And the capacitance adjusting module is used for finely adjusting the output signal of the switching tube by a user so that the adjusted output signal is more stable and the optimization such as fluctuation is reduced.

Referring to fig. 5: the capacitance adjusting module specifically comprises: a first capacitor C1 and a second capacitor C2;

the first end of the first capacitor is connected with the first end of the second capacitor, the connection point is used as the input end of the capacitor adjusting module, and the second end of the first capacitor is connected with the ground;

And a detection module 205, which includes a detection pin, for collecting an output of the capacitance adjusting module through the detection pin.

Specifically, the detection module is a functional module inside the control chip, and is configured to monitor an output of the load protection circuit, that is, connect an output terminal of the load protection circuit to a control pin of the control chip.

In one example, when the detection module collects the output of the capacitance adjusting module through the detection pin, the detection module is specifically configured to:

when the voltage value of the detection pin is detected to meet the preset voltage value, generating a full-open instruction; and inputting a full-opening instruction to the control module to instruct the control module to open all the switch tubes.

It should be noted that, if the voltage value of the detection pin satisfies the preset voltage value, it indicates that the peak current disappears and the current tends to be stable, and therefore, all MOS transistors need to be turned on. The electrical parameter requirement that the load normally worked is higher, and managers sets up the quantity of MOS pipe according to actual need, and when the MOS pipe was opened entirely, the demand of load could be satisfied to the electrical parameter that provides.

Specifically, when the output voltage of the load protection circuit acquired by the detection pin is greater than the preset voltage value, that is, the current state can provide the load with the required electrical parameters, a turn-on instruction is generated at this time, and the control module turns on all the MOS transistors connected to the control pin of the control module according to the turn-on instruction, so that all the MOS transistors have current flowing through them, and the electrical parameters (for example, current) capable of meeting the load requirements are obtained after the outputs of the MOS transistors are superposed.

For convenience of explanation, a load protection circuit including two MOS transistors will be described.

As shown in fig. 6, the circuit includes a power supply module P12V _ PSU, a switching tube MOS1, a switching tube MOS2, a control chip ADM1278, a capacitor C1, a capacitor C2, and a LOAD. Wherein: the MOS1 is connected with the drain (D pole) of the MOS2, and the connection point is connected with the power supply module P12V _ PSU; the MOS1 is connected with the source (S pole) of the MOS2, and the connecting point is connected with the capacitor C1; c1 is connected with C2, the connection point is connected with LOAD, and the other ends of C1 and C2 are grounded; the control terminal (i.e. Gate) G1 of the MOS1 is connected with the control pin Gate1 of the control chip ADM 1278; the control terminal (i.e., Gate) G2 of the MOS2 is connected to the control pin Gate2 of the control chip ADM 1278.

The power supply module P12V _ PSU is configured to output a 12V working voltage (the power supply voltage of the server is generally 12V), the MOS1 that is first turned on by the control chip ADM1278 has MOS1 to bear the peak current, when the turn-on time of the MOS1 is equal to a preset safe operation time, the MOS1 is turned off, the MOS2 bears the peak current, the switching is continued until the peak current disappears, when the control pin of the control chip ADM1278 detects that the output voltage value meets the preset voltage value (i.e., the peak current disappears), all the MOS transistors are turned on, and the electrical parameters output by the MOS transistors are superimposed, and the superimposed electrical parameters are used by the LOAD.

An embodiment of the present application provides an electronic device, which includes the load protection circuit in the above embodiment. The specific implementation process of the load protection circuit is consistent with the implementation principle and the load protection circuit shown in the above embodiments, and reference may be made to this implementation process, which is not described herein again. In particular implementations, the electronic device may include, but is not limited to, a mobile phone, a tablet, a server, or other serial bus (USB) interface devices.

The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the system or system embodiments are substantially similar to the method embodiments and therefore are described in a relatively simple manner, and reference may be made to some of the descriptions of the method embodiments for related points. The above-described system and system embodiments are only illustrative, wherein the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.

Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A load protection circuit, the circuit comprising: the timing module, the control module and at least two switching tubes; wherein:

each switching tube is connected in parallel in the load protection circuit;

the timing module is used for timing the working time of the switching tube working at present, if the working time is equal to the preset safe working time, a control instruction for closing the switching tube working at present is generated, and meanwhile, a control instruction for opening any one of the switching tubes connected in parallel except the switching tube working at present is generated; sending the control instruction to the control module; the preset safe working time of each switching tube is set according to the limit working time of the switching tube;

2. The load protection circuit of claim 1, wherein the circuit further comprises: a capacitance adjustment module;

and the capacitance adjusting module is used for acquiring the output electrical parameters of the switching tube and taking the adjusted output signals as the output of the circuit.

3. The load protection circuit of claim 2, wherein the circuit further comprises a detection module;

4. The load protection circuit according to claim 3, wherein the detection module is configured to, when acquiring the output of the capacitance adjustment module through the detection pin, specifically:

5. The load protection circuit of claim 1, wherein each of the switching tubes has an input connected to a node serving as an input of the circuit and an output connected to a node serving as an output of the circuit.

6. The load protection circuit of claim 2, wherein the capacitance adjustment module comprises a first capacitance and a second capacitance;

7. The load protection circuit of claim 1, wherein the switching tube is any one of: NMOS transistor, PMOS transistor and various three-stage transistors.

8. An electronic device, comprising: the load protection circuit of any of claims 1 to 7.