Disclosure of Invention
Therefore, it is necessary to overcome the defects of the prior art, and provide a communication device, a dielectric waveguide filter and a method for adjusting a capacitive coupling bandwidth thereof, which can simplify the structure, reduce the production difficulty, facilitate mass production, and improve the design flexibility due to a large design range of the capacitive coupling bandwidth.
The technical scheme is as follows: a dielectric waveguide filter comprising: the device comprises two dielectric blocks and a connecting block, wherein the two dielectric blocks are connected through the connecting block to form a combined block, and a groove positioned on the side surface of the combined block is formed by matching the two dielectric blocks and the connecting block;
the metal layer is arranged on the surface of the combined block, and each dielectric block and the metal layer on the surface of the dielectric block are equivalent to form a dielectric waveguide resonant cavity;
the metal layer on the top surface or the bottom surface of the combined block is provided with hollowed-out openings, each hollowed-out opening comprises two first hollowed-out openings and a second hollowed-out opening arranged between the two first hollowed-out openings, the first hollowed-out openings are communicated with the second hollowed-out openings, the two first hollowed-out openings are respectively and correspondingly arranged on the metal layers of the two dielectric blocks, and the second hollowed-out openings are arranged on the metal layer of the connecting block.
In the dielectric waveguide filter, the first hollow opening generates negative coupling by cutting surface current on the surface of the waveguide resonant cavity, so that an attenuation pole outside a frequency response passband is generated, and the frequency selection performance of the dielectric waveguide filter can be improved; secondly, the hollow-out openings are positioned on the surfaces of two adjacent waveguide resonant cavities on the same layer, so that the hollow-out structure is flexible to apply and is not limited by a cavity arrangement structure; thirdly, the hollowed-out part is a metal removing structure with a certain shape, so that the process is easy to control, the processing process is simple, and the processing efficiency is improved; fourthly, the width (corresponding to the depth D of the groove) of the inductance diaphragm is changed, and the width and the length of the hollow part can both control the size of the capacitive coupling bandwidth, so that the design range of the capacitive coupling bandwidth is large, the design flexibility is high, the design efficiency is improved, the debugging is convenient and simple, the debugging efficiency is improved, and the cost is reduced. Meanwhile, the structure is simplified, the production difficulty is reduced, and the mass production is facilitated.
In one embodiment, two tuning holes corresponding to the two dielectric blocks are formed in one of the top surface and the bottom surface of the combination block, and the metal layer is further formed on the hole walls of the tuning holes;
the tuning hole and the hollowed-out opening are positioned on the same surface of the combined block, and the first hollowed-out opening is arranged beside the tuning hole; or the tuning hole and the hollow opening are respectively positioned on the top surface and the bottom surface of the combined block, and the first hollow opening is arranged beside the edge of the medium block.
In one embodiment, the tuning hole and the hollowed-out opening are located on the same surface of the combination block, and the first hollowed-out opening is arranged around the tuning hole; or the tuning hole and the hollow opening are respectively positioned on the top surface and the bottom surface of the combined block, and the first hollow opening is arranged along the edge of the medium block.
In one embodiment, one of the top surface and the bottom surface of the combination block is provided with a tuning hole corresponding to one of the dielectric blocks, and the metal layer is further arranged on the hole wall of the tuning hole;
the tuning hole and the hollowed-out opening are positioned on the same surface of the combined block, and the first hollowed-out opening is arranged beside the tuning hole; or the tuning hole and the hollow opening are respectively positioned on the top surface and the bottom surface of the combined block, and the first hollow opening is arranged beside the edge of the medium block.
In one embodiment, no tuning hole is arranged on the top surface and the bottom surface of the combination block, and the first hollow opening is arranged along the edge of the dielectric block.
In one embodiment, the number of the grooves is two, and the two grooves are respectively located on two opposite side surfaces of the combination block.
In one embodiment, the dielectric block and the connecting block are both ceramic dielectric blocks.
In one embodiment, the two dielectric blocks and the connecting block are of an integrated structure; the top surface of the medium block and the top surface of the connecting block are located on the same plane, and the bottom surface of the medium block and the bottom surface of the connecting block are located on the same plane.
A capacitive coupling bandwidth adjusting method of a dielectric waveguide filter comprises the following steps: and the size of the capacitive coupling bandwidth between the two medium resonant cavities is adjusted by adjusting the width and the length of the hollow-out opening.
According to the capacitive coupling bandwidth adjusting method, firstly, the hollowed-out openings generate negative coupling by cutting surface current on the surface of the waveguide resonant cavity, so that an attenuation pole outside a frequency response passband is generated, and the frequency selection performance of the dielectric waveguide filter can be improved; secondly, the hollow-out openings are positioned on the surfaces of two adjacent waveguide resonant cavities on the same layer, so that the hollow-out structure is flexible to apply and is not limited by a cavity arrangement structure; thirdly, the hollowed-out part is a metal removing structure with a certain shape, so that the process is easy to control, the processing process is simple, and the processing efficiency is improved; fourthly, the width and the length of the hollow part are changed to control the size of the capacitive coupling bandwidth, so that the design range of the capacitive coupling bandwidth is large, the design flexibility is high, the design efficiency is improved, the debugging is convenient and simple, the debugging efficiency is improved, and the cost is reduced. Meanwhile, the structure is simplified, the production difficulty is reduced, and the mass production is facilitated.
A communication device comprises the dielectric waveguide filter.
In the communication device, the first step is that the hollow opening generates negative coupling by cutting surface current on the surface of the waveguide resonant cavity so as to generate an attenuation pole outside a frequency response passband, so that the frequency selection performance of the dielectric waveguide filter can be improved; secondly, the hollow-out openings are positioned on the surfaces of two adjacent waveguide resonant cavities on the same layer, so that the hollow-out structure is flexible to apply and is not limited by a cavity arrangement structure; thirdly, the hollowed-out part is a metal removing structure with a certain shape, so that the process is easy to control, the processing process is simple, and the processing efficiency is improved; fourthly, the width (corresponding to the depth D of the groove) of the inductance diaphragm is changed, and the width and the length of the hollow part can both control the size of the capacitive coupling bandwidth, so that the design range of the capacitive coupling bandwidth is large, the design flexibility is high, the design efficiency is improved, the debugging is convenient and simple, the debugging efficiency is improved, and the cost is reduced. Meanwhile, the structure is simplified, the production difficulty is reduced, and the mass production is facilitated.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.
In the description of the present invention, it is to be understood that the terms "first", "second" and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the description of the present invention, it should be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly connected" to another element, there are no intervening elements present.
In one embodiment, referring to fig. 1 to 6, a dielectric waveguide filter includes a dielectric block 11, a connection block 12 and a metal layer 13. The number of the dielectric blocks 11 is two, the two dielectric blocks 11 are connected through the connecting block 12 to form a combined block 10, and the two dielectric blocks 11 are matched with the connecting block 12 to form a groove 14 located on the side face of the combined block 10. The metal layer 13 is provided on the surface of the block assembly 10. Each dielectric block 11 and the metal layer 13 on the surface of the dielectric block 11 are equivalent to form a dielectric waveguide resonant cavity. The metal layer 13 on the top surface or the bottom surface of the combination block 10 is provided with a hollow 20, and the hollow 20 includes two first hollow 21 and a second hollow 22 disposed between the two first hollow 21. The first hollowed-out openings 21 are communicated with the second hollowed-out openings 22, the two first hollowed-out openings 21 are respectively and correspondingly arranged on the metal layers 13 of the two dielectric blocks 11, and the second hollowed-out openings 22 are arranged on the metal layers 13 of the connecting block 12.
The metal layer 13 is not covered at the hollow-out portion 20, and the wall surface of the combination block 10 is exposed. Specifically, the metal layer 13 at the hollow-out opening 20 exposes the wall surface by removing. Of course, the wall surface of the combination block 10 corresponding to the hollow-out opening 20 may be exposed by not plating or spraying the metal layer 13.
It should be noted that the terms "side surface", "top surface" and "bottom surface" refer to that the upper surface of the dielectric waveguide filter is the "top surface", the lower surface of the dielectric waveguide filter is the "bottom surface" and the rest of the dielectric waveguide filter is the "side surface" when the dielectric waveguide filter is placed as shown in fig. 1, that is, the above-mentioned terms "top surface", "bottom surface" and "side surface" are relative expressions, and should not be construed as limiting the embodiment of the present invention.
In the dielectric waveguide filter, the first hollow-out opening 20 generates negative coupling by cutting surface current on the surface of the waveguide resonant cavity, so as to generate an attenuation pole outside a frequency response passband, thereby improving the frequency selectivity of the dielectric waveguide filter; secondly, the hollow-out openings 20 are positioned on the surfaces of two adjacent waveguide resonant cavities on the same layer, so that the hollow-out structure is flexible to apply and is not limited by a cavity arrangement structure; thirdly, the part of the hollowed-out opening 20 is a demetallization structure with a certain shape, so that the process is easy to control, the processing process is simple, and the processing efficiency is improved; fourthly, the width (corresponding to the depth D of the groove 14) of the inductance diaphragm is changed, and the width and the length of the hollow-out opening 20 can control the size of the capacitive coupling bandwidth, so that the design range of the capacitive coupling bandwidth is large, the design flexibility is high, the design efficiency is improved, the debugging is convenient and simple, the debugging efficiency is improved, and the cost is reduced. Meanwhile, the structure is simplified, the production difficulty is reduced, and the mass production is facilitated.
Further, referring to fig. 1 to 6, two tuning holes 15 corresponding to the two dielectric blocks 11 are disposed on one of the top surface and the bottom surface of the combination block 10, and the metal layer 13 is further disposed on the hole walls of the tuning holes 15.
The tuning hole 15 and the hollowed-out opening 20 are located on the same surface of the combination block 10, and the first hollowed-out opening 21 is disposed beside the tuning hole 15. Or, the tuning hole 15 and the hollowed-out opening 20 are respectively located on the top surface and the bottom surface of the combination block 10, and the first hollowed-out opening 21 is disposed beside the edge 111 of the dielectric block 11.
Specifically, referring to fig. 1 or fig. 2, two tuning holes 15 corresponding to the two dielectric blocks 11 are disposed on the top surface of the combination block 10, and the metal layer 13 is further disposed on the hole walls of the tuning holes 15. The tuning hole 15 and the hollowed-out opening 20 are both located on the top surface of the combination block 10, and the first hollowed-out opening 21 is disposed beside the tuning hole 15.
Or, two tuning holes 15 corresponding to the two dielectric blocks 11 are provided on the top surface of the combination block 10, and the metal layer 13 is further provided on the hole walls of the tuning holes 15. The hollowed-out opening 20 is located on the bottom surface of the combination block 10, and the first hollowed-out opening 21 is disposed beside the edge 111 of the dielectric block 11.
Or, two tuning holes 15 corresponding to the two dielectric blocks 11 are provided on the bottom surface of the combination block 10, and the metal layer 13 is further provided on the hole walls of the tuning holes 15. The hollowed-out openings 20 are located on the bottom surface of the combination block 10, and the first hollowed-out openings 21 are disposed beside the tuning holes 15.
Or, two tuning holes 15 corresponding to the two dielectric blocks 11 are provided on the bottom surface of the combination block 10, and the metal layer 13 is further provided on the hole walls of the tuning holes 15. The hollow 20 is located on the top surface of the combination block 10, and the first hollow 21 is disposed beside the edge 111 of the dielectric block 11.
Thus, when the tuning hole 15 and the hollowed-out opening 20 are located on the same surface of the combination block 10, a better capacitive coupling effect can be achieved because the first hollowed-out opening 21 is arranged beside the tuning hole 15, and when the distance between the first hollowed-out opening 21 and the tuning hole 15 is shorter, the capacitive coupling bandwidth is larger; when the tuning hole 15 and the hollowed-out opening 20 are respectively located on the top surface and the bottom surface of the combination block 10, because the first hollowed-out opening 21 is disposed beside the edge 111 of the dielectric block 11, a better capacitive coupling effect can be achieved, and when the distance between the first hollowed-out opening 21 and the edge 111 of the dielectric block 11 is shorter, the capacitive coupling bandwidth is larger.
Furthermore, the tuning hole 15 and the hollowed-out opening 20 are located on the same surface of the combination block 10, and the first hollowed-out opening 21 is disposed around the tuning hole 15. Alternatively, the tuning hole 15 and the hollowed-out opening 20 are respectively located on the top surface and the bottom surface of the combination block 10, and the first hollowed-out opening 21 is disposed along the edge 111 of the dielectric block 11. Thus, when the first hollowed-out opening 21 is disposed around the tuning hole 15, for example, the first hollowed-out opening 21 is an arc-shaped opening, a wavy-shaped opening, or a folded-line-shaped opening disposed around the tuning hole 15, and has a better capacitive coupling effect. Of course, the first hollow 21 may also be a straight strip-shaped opening disposed at one side of the tuning hole 15, and also has a better capacitive coupling effect.
Further, referring to any one of fig. 1, fig. 2, fig. 4 and fig. 5, the size of the capacitive coupling bandwidth may be adjusted by changing the length of the hollow 20. For example, the hollow 20 further includes a third hollow 23 communicated with the first hollow 21, and the third hollow 23 is disposed around the tuning hole 15.
Similarly, when the first hollow 21 is disposed along the edge 111 of the dielectric block 11, specifically, for example, the first hollow 21 is a straight bar, and the first hollow 21 and the edge 111 of the dielectric block 11 are disposed in parallel, so that a better capacitive coupling effect is achieved. Of course, the first hollowed-out opening 21 may also be an arc-shaped opening, a wavy line-shaped opening, or a broken line-shaped opening, etc. disposed along the edge 111 of the dielectric block 11, and also has the effect of improving the size of the capacitive coupling bandwidth.
It should be noted that the shape, the width, and the length of the first hollow-out opening 21 corresponding to one of the dielectric blocks 11 may be the same as or different from the shape, the width, and the length of the first hollow-out opening 21 corresponding to another one of the dielectric blocks 11, which is not limited herein.
It should be noted that the aperture and the depth of the tuning hole 15 provided in one of the dielectric blocks 11 may be the same as or different from the aperture and the depth of the tuning hole 15 provided in the other dielectric block 11, which is not limited herein.
As an optional scheme, one of the top surface and the bottom surface of the combination block 10 is provided with a tuning hole 15 corresponding to one of the dielectric blocks 11, and the metal layer 13 is further provided on a hole wall of the tuning hole 15.
The tuning hole 15 and the hollowed-out opening 20 are located on the same surface of the combination block 10, and the first hollowed-out opening 21 is arranged beside the tuning hole 15; or, the tuning hole 15 and the hollowed-out opening 20 are respectively located on the top surface and the bottom surface of the combination block 10, and the first hollowed-out opening 21 is disposed beside the edge 111 of the dielectric block 11.
Specifically, the top surface of one of the dielectric blocks 11 is provided with a tuning hole 15, the other dielectric block 11 is not provided with the tuning hole 15 (that is, the hole depth of the tuning hole 15 is 0), and the metal layer 13 is further provided on the hole wall of the tuning hole 15. The hollowed-out opening 20 is located on the top surface of the combination block 10, and the first hollowed-out opening 21 is disposed beside the tuning hole 15.
Or, the top surface of one of the dielectric blocks 11 is provided with a tuning hole 15, the other dielectric block 11 is not provided with the tuning hole 15 (that is, the hole depth of the tuning hole 15 is 0), and the metal layer 13 is further provided on the hole wall of the tuning hole 15. The hollowed-out opening 20 is located on the bottom surface of the combination block 10, and the first hollowed-out opening 21 is disposed beside the edge 111 of the dielectric block 11.
Or, a tuning hole 15 is provided on the bottom surface of one of the dielectric blocks 11, the tuning hole 15 is not provided on the other dielectric block 11 (that is, the hole depth of the tuning hole 15 is 0), and the metal layer 13 is further provided on the hole wall of the tuning hole 15. The hollowed-out openings 20 are located on the bottom surface of the combination block 10, and the first hollowed-out openings 21 are disposed beside the tuning holes 15.
Or, a tuning hole 15 is provided on the bottom surface of one of the dielectric blocks 11, the tuning hole 15 is not provided on the other dielectric block 11 (that is, the hole depth of the tuning hole 15 is 0), and the metal layer 13 is further provided on the hole wall of the tuning hole 15. The hollow 20 is located on the top surface of the combination block 10, and the first hollow 21 is disposed beside the edge 111 of the dielectric block 11.
Similarly, similar to the principle of the two tuning holes 15, when the tuning holes 15 and the hollowed-out openings 20 are located on the same surface of the combined block 10, because the first hollowed-out opening 21 is disposed beside the tuning holes 15, a better capacitive coupling effect can be achieved, and when the distance between the first hollowed-out opening 21 and the tuning holes 15 is shorter, the capacitive coupling bandwidth is larger; when the tuning hole 15 and the hollowed-out opening 20 are respectively located on the top surface and the bottom surface of the combination block 10, because the first hollowed-out opening 21 is disposed beside the edge 111 of the dielectric block 11, a better capacitive coupling effect can be achieved, and when the distance between the first hollowed-out opening 21 and the edge 111 of the dielectric block 11 is shorter, the capacitive coupling bandwidth is larger.
In another embodiment, referring to fig. 5, the top surface and the bottom surface of the combination block 10 are not provided with tuning holes 15, and the first hollow 21 is disposed along the edge 111 of the dielectric block 11. Thus, since the first hollow 21 is disposed beside the edge 111 of the dielectric block 11, a better capacitive coupling effect can be achieved, and when the distance between the first hollow 21 and the edge 111 of the dielectric block 11 is closer, the capacitive coupling bandwidth is larger.
In yet another embodiment, the metal layer 13 on the top surface and the bottom surface of the combination block 10 are provided with the hollowed-out openings 20. When the tuning hole 15 and the hollowed-out opening 20 are both formed on the same surface of the combination block 10, the first hollowed-out opening 21 is disposed beside the tuning hole 15. Thus, because the first hollow 21 is disposed beside the tuning hole 15, a better capacitive coupling effect can be achieved, and when the distance between the first hollow 21 and the tuning hole 15 is shorter, the capacitive coupling bandwidth is larger.
When only the hollowed-out openings 20 are formed on the top surface or the bottom surface of the combination block 10, the first hollowed-out openings 21 are formed beside the edge 111 of the dielectric block 11. Because the first hollow 21 is disposed beside the edge 111 of the dielectric block 11, a better capacitive coupling effect can be achieved, and the closer the distance between the first hollow 21 and the edge 111 of the dielectric block 11 is, the larger the capacitive coupling bandwidth is.
In one embodiment, referring to fig. 2 to 5, the number of the grooves 14 is two, and the two grooves 14 are respectively located on two opposite side surfaces of the combination block 10. Thus, adjusting the distance between the bottom walls of the two grooves 14 can correspondingly adjust the size of the capacitive coupling bandwidth between the two dielectric resonators.
As an alternative, referring to fig. 1 again, the number of the grooves 14 may be only one, and the groove 14 is located on one side surface of the combination block 10. Thus, the depth D of the groove 14 can be adjusted to adjust the capacitive coupling bandwidth between the two dielectric resonators.
In one embodiment, the dielectric block 11 and the connecting block 12 are both ceramic dielectric blocks.
In one embodiment, the two dielectric blocks 11 and the connecting block 12 are of an integrated structure; the top surface of the dielectric block 11 and the top surface of the connecting block 12 are located on the same plane, and the bottom surface of the dielectric block 11 and the bottom surface of the connecting block 12 are located on the same plane.
In an embodiment, referring to fig. 1 or fig. 2, a method for adjusting a capacitive coupling bandwidth of a dielectric waveguide filter includes the following steps: the size of the capacitive coupling bandwidth between the two dielectric resonant cavities is adjusted by adjusting the width and the length of the hollow-out opening 20.
First, the hollowed-out opening 20 generates negative coupling by cutting surface current on the surface of the waveguide resonant cavity, so as to generate an attenuation pole outside a frequency response passband, thereby improving the frequency selectivity of the dielectric waveguide filter; secondly, the hollow-out openings 20 are positioned on the surfaces of two adjacent waveguide resonant cavities on the same layer, so that the hollow-out structure is flexible to apply and is not limited by a cavity arrangement structure; thirdly, the part of the hollowed-out opening 20 is a demetallization structure with a certain shape, so that the process is easy to control, the processing process is simple, and the processing efficiency is improved; fourthly, the size of the capacitive coupling bandwidth can be controlled by changing the width and the length of the hollow-out opening 20, so that the design range of the capacitive coupling bandwidth is large, the design flexibility is high, the design efficiency is improved, the debugging is convenient and simple, the debugging efficiency is improved, and the cost is reduced. Meanwhile, the structure is simplified, the production difficulty is reduced, and the mass production is facilitated.
Further, referring to fig. 1 or fig. 2, by controlling the depth D of the groove 14, that is, controlling the width of the inductance diaphragm, the size of the capacitive coupling bandwidth between the two dielectric resonators can be adjusted accordingly. Therefore, the strength of the attenuation pole outside the frequency response passband is further controlled, and the frequency selectivity of the dielectric waveguide filter can be improved.
In one embodiment, a communication device comprises a dielectric waveguide filter as described in any of the above embodiments.
In the communication device, firstly, the hollow-out opening 20 generates negative coupling by cutting surface current on the surface of the waveguide resonant cavity, so as to generate an attenuation pole outside a frequency response passband, thereby improving the frequency selection performance of the dielectric waveguide filter; secondly, the hollow-out openings 20 are positioned on the surfaces of two adjacent waveguide resonant cavities on the same layer, so that the hollow-out structure is flexible to apply and is not limited by a cavity arrangement structure; thirdly, the part of the hollowed-out opening 20 is a demetallization structure with a certain shape, so that the process is easy to control, the processing process is simple, and the processing efficiency is improved; fourthly, the width (corresponding to the depth D of the groove 14) of the inductance diaphragm is changed, and the width and the length of the hollow-out opening 20 can control the size of the capacitive coupling bandwidth, so that the design range of the capacitive coupling bandwidth is large, the design flexibility is high, the design efficiency is improved, the debugging is convenient and simple, the debugging efficiency is improved, and the cost is reduced. Meanwhile, the structure is simplified, the production difficulty is reduced, and the mass production is facilitated.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.