CN110649816A - Step-down switch converter - Google Patents

Step-down switch converter Download PDF

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Publication number
CN110649816A
CN110649816A CN201910892409.1A CN201910892409A CN110649816A CN 110649816 A CN110649816 A CN 110649816A CN 201910892409 A CN201910892409 A CN 201910892409A CN 110649816 A CN110649816 A CN 110649816A
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capacitor
transformer
terminal
dotted
secondary winding
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Inventor
王志燊
尹智群
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Mornsun Guangzhou Science and Technology Ltd
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Mornsun Guangzhou Science and Technology Ltd
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Priority to CN201910892409.1A priority Critical patent/CN110649816A/en
Publication of CN110649816A publication Critical patent/CN110649816A/en
Priority to CN202010778084.7A priority patent/CN111865093B/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a switch converter, which is characterized in that one path of forward output is added on the basis of a common flyback circuit, and the final output voltage is formed by utilizing the difference of two paths of output voltages of forward and flyback, so that the converter can realize low-voltage output. The topology is applied to the ACDC converter, so that the number of turns of the transformer is reduced, the planar transformer can be used at low cost, and the manufacturing cost is reduced.

Description

Step-down switch converter
Technical Field
The present invention relates to switching converters, and more particularly, to a converter capable of achieving ultra-low voltage gain.
Background
Because the windings of the planar transformer are printed on the PCB, compared with the traditional transformer, the planar transformer has higher automation degree and lower cost of batch production. However, in the situation of a large number of turns of the transformer winding, the winding of the planar transformer needs more layers or occupies more PCB area, and cannot meet the requirements of low-cost and small-volume power supply products.
In ACDC application, the switching converter is often required to output a relatively low voltage such as 5V or 3.3V, and the AC input terminal is often rectified and filtered to have a voltage of 100V-400V, which is much higher than the output voltage. Therefore, the converter is required to realize an ultra-low voltage gain to reduce the input voltage to a very low output voltage. In a traditional switching converter, no matter flyback or forward, if ultra-low voltage gain is to be realized, the turn ratio of a transformer is often required to be large, the number of turns of a primary winding is large, and the number of turns of a secondary winding is small. If a planar transformer is adopted, the number of primary turns is large, the number of required PCB layers is large, the production cost is high, and the production is not beneficial.
Disclosure of Invention
In view of this, the technical problem to be solved by the present invention is to overcome the disadvantages of the existing methods, and to provide a step-down switching converter scheme, which can reduce the turn ratio of the transformer, thereby reducing the number of turns, and enabling a planar transformer to be used at low cost.
The traditional forward or flyback circuit only adopts one output voltage, and if the turn ratio of a transformer is reduced, the output voltage is increased, so that low-voltage output is difficult to realize. The invention adopts two intermediate output voltages, and realizes the final output voltage according to the difference of the two intermediate output voltages.
The invention is realized by the following technical scheme:
on the basis of a common synchronous rectification flyback circuit, a path of forward output is added, the positive end of a forward output capacitor is connected with the positive end of a flyback output capacitor, the negative end of the flyback capacitor is the positive end of the overall output, and the negative end of the forward capacitor is the negative end of the overall output, so that the output of the whole converter is the difference between the forward voltage and the flyback voltage. If the turn ratio of the transformer is small, the forward output voltage and the flyback output voltage are both high, and the difference between the forward voltage and the flyback voltage can be kept at a small value by adjusting the duty ratio of the switching tube, so that the whole converter realizes low-voltage output.
The scheme can be applied to not only common flyback but also active clamp flyback and asymmetric half-bridge flyback circuits, forward and flyback intermediate outputs are constructed at the output end, and then the final output is formed by the difference between the forward output and the flyback output.
As a specific implementation manner of the above scheme, the positive end of the voltage source Vin is connected to one end of a resistor R2, the negative end of a capacitor Cr, and the dotted end of a primary winding P1 of a transformer TX1, the other end of the resistor R2 and the positive end of the capacitor Cr are connected to the cathode of a diode D2, the anode of the diode D2 is connected to the drain of a MOS transistor Q1 and the dotted end of a primary winding P1 of the transformer TX1, and the source of the MOS transistor Q1 is connected to the negative end of the voltage source Vin; the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is connected with the drain electrode of an MOS tube Q2, and the source electrode of the MOS tube Q2 is connected with the dotted terminal of the secondary winding S1 of the transformer TX 1; the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the anode of a diode D1, the cathode of the diode D1 is respectively connected with the positive terminal of a capacitor Co1 and the positive terminal of a capacitor Co2, and the negative terminal of a capacitor Co2 is respectively connected with the dotted terminal of the secondary winding S2 of the transformer TX1, the negative terminal of a capacitor Co3 and the other end of a load resistor R1.
As another specific implementation manner of the above scheme, the positive terminal of the voltage source Vin is connected to the negative terminal of the capacitor Cr and the dotted terminal of the primary winding P1 of the transformer TX1, respectively, the positive terminal of the capacitor Cr is connected to the drain of the clamping MOS transistor Q3, the source of the clamping MOS transistor Q3 is connected to the drain of the MOS transistor Q1 and the dotted terminal of the primary winding P1 of the transformer TX1, respectively, and the source of the MOS transistor Q1 is connected to the negative terminal of the voltage source Vin; the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is connected with the drain electrode of an MOS tube Q2, and the source electrode of the MOS tube Q2 is connected with the dotted terminal of the secondary winding S1 of the transformer TX 1; the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the anode of a diode D1, the cathode of the diode D1 is respectively connected with the positive terminal of a capacitor Co1 and the positive terminal of a capacitor Co2, and the negative terminal of a capacitor Co2 is respectively connected with the dotted terminal of the secondary winding S2 of the transformer TX1, the negative terminal of a capacitor Co3 and the other end of a load resistor R1.
As another specific implementation manner of the above scheme, the positive terminal of the voltage source Vin is connected to the drain of the clamping transistor Q2 and the dotted terminal of the primary winding P1 of the transformer TX1, the dotted terminal of the primary winding P1 of the transformer TX1 is connected to the positive terminal of the capacitor Cr, the negative terminal of the capacitor Cr is connected to the drain of the clamping MOS transistor Q1 and the source of the MOS transistor Q2, and the source of the MOS transistor Q1 is connected to the negative terminal of the voltage source Vin; the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is respectively connected with the drain of an MOS tube Q3, the drain of an MOS tube Q4 and the positive terminal of the capacitor Co2, and the source of an MOS tube Q3 is connected with the different-dotted terminal of the secondary winding S1 of the transformer TX 1; the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the source of the MOS transistor Q4, and the different-dotted terminal of the secondary winding S2 of the transformer TX1 is respectively connected with the negative terminal of the capacitor Co2, the negative terminal of the capacitor Co3 and the other end of the load resistor R1.
Preferably, the capacitance Co3 is 0F.
Preferably, the load resistor R1 is replaced by a circuit constituted by electronic components.
Preferably, the transformer TX1 is a planar transformer.
Preferably, the diode D1 is replaced by a synchronous rectification MOS transistor.
Preferably, the driving of MOS transistor Q1 and MOS transistor Q3 are complementary.
Preferably, the driving drives of the MOS transistor Q1 and the MOS transistor Q3 are non-complementary.
Preferably, the driving of MOS transistor Q1 and MOS transistor Q2 are complementary.
Preferably, the driving of MOS transistor Q1 and MOS transistor Q2 are non-complementary.
The scheme provided by the invention overcomes the defects of the existing switch converter, and compared with a flyback circuit, the low-voltage output can be realized only by a lower transformer turn ratio, so that a planar transformer can be adopted in the ACDC application occasion of low-voltage output.
Drawings
FIG. 1 is a schematic circuit diagram of a first embodiment of the present invention;
FIG. 2 is a graph illustrating the operation of the first embodiment of the present invention;
FIG. 3 is a schematic circuit diagram of a second embodiment of the present invention;
fig. 4 is a schematic circuit diagram of a third embodiment of the present invention.
Detailed Description
The invention is designed to utilize the difference of two output voltages to form the final output voltage, so that the converter can realize low-voltage output.
First embodiment
Fig. 1 is a schematic diagram of a first embodiment of a switching converter power stage according to the present invention. The voltage source Vin is an external input voltage, and the load resistor R1 is a load of the switching power supply. The transformer converter comprises a resistor R2, a capacitor Cr, a diode D2, an MOS transistor Q1, an MOS transistor Q2, a transformer TX1 (comprising a primary winding P1, a secondary winding S1 of the transformer TX1 and a secondary winding S2 of the transformer TX 1), an MOS transistor Q2, a diode D1, a capacitor Co1, a capacitor Co2 and a capacitor Co 3.
The connection relationship of this embodiment is as follows:
the positive end of a voltage source Vin is respectively connected with one end of a resistor R2, the negative end of a capacitor Cr and the dotted end of a primary winding P1 of a transformer TX1, the other end of the resistor R2 and the positive end of the capacitor Cr are connected with the cathode of a diode D2, the anode of the diode D2 is respectively connected with the drain of an MOS tube Q1 and the dotted end of the primary winding P1 of the transformer TX1, and the source of the MOS tube Q1 is connected with the negative end of the voltage source Vin; the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is connected with the drain electrode of an MOS tube Q2, and the source electrode of the MOS tube Q2 is connected with the dotted terminal of the secondary winding S1 of the transformer TX 1; the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the anode of a diode D1, the cathode of the diode D1 is respectively connected with the positive terminal of a capacitor Co1 and the positive terminal of a capacitor Co2, and the negative terminal of a capacitor Co2 is respectively connected with the dotted terminal of the secondary winding S2 of the transformer TX1, the negative terminal of a capacitor Co3 and the other end of a load resistor R1.
The working process of this embodiment:
by adopting the circuit of the embodiment of the invention, the switching converter with the input voltage of 370V, the output voltage of 5V and the output power of 5W is designed, and the feasibility of the topology is verified through simulation. The switching frequency is 300kHz, Q1 and Q2 are complementary, the driving duty ratio of Q1 is 23.8%, the excitation inductance Lm is 50uH, the leakage inductance Lr is 500nH, the transformer turn ratio N is 3:3:1, the capacitance Cr is 1nF, the resistance R2 is 1k omega, the capacitance Co1 is Co2 is Co3 is 10uF, and the load resistance R1 is 5 omega. The working curve Is shown in fig. 2, Vg1 Is the driving voltage of Q1, Vds1 Is the drain-source voltage of Q1, Ir Is the primary current of the transformer, iLm Is the excitation current, Is2 Is the current of Q2, Id1 Is the current of D1, Vo1 Is the voltage of Co1, Vo2 Is the voltage of Co2, and Vo Is the voltage of Co 3. If a traditional flyback converter circuit is adopted, the secondary side adopts synchronous rectification, the synchronous rectification tube is conducted in a complementary mode with the primary side MOS tube, under the condition of the same duty ratio, the transformer turn ratio needs to be 23:1, and the transformer turn ratio of the topology is 3:3:1, so that the turn ratio is greatly reduced, the number of turns of the transformer is reduced, and a foundation is provided for adopting a planar transformer.
Assuming that the duty ratio of the MOS transistor Q1 is D, the turn ratio of the primary winding P1 of the transformer TX1 to the secondary winding S2 of the transformer TX1 is N+The turn ratio of a primary winding P1 of the transformer TX1 to a secondary winding S2 of the transformer TX1 is N-Taking fig. 2 as an example to illustrate the operation principle of the circuit, the operation of the converter mainly includes two major stages:
the first stage is as follows: q1 is turned on, Q2 is turned off, the voltage on the primary side of the transformer is Vin, the transformer works in a forward output state, a diode D1 is turned on, and if the voltage drop of the diode is ignored, the voltage on Co2 is Vin/N+The transformer charges capacitors Co1 and Co2, a secondary side S2 of the transformer TX1, a diode D1 and a capacitor Co1 are connected in series to supply power for output, and the excitation current of the transformer rises at the stage to provide conditions for ZVS (zero voltage switching on) of Q2;
and a second stage: when Q1 is cut off and Q2 is turned on, the transformer works in a flyback output state, Q2 realizes ZVS is turned on, the voltage on the capacitor Co1 is VinD/[ N- (1-D) ], the capacitor Co1 returns energy to the transformer through Q2 at the later stage of the stage, and the ZVS of the next stage Q1 can be realized by utilizing the backward pouring energy. This stage D1 is off, and capacitor Co2 and capacitor Co1 are connected in series to power the output.
As can be seen from the schematic diagram, the output of the converter is the voltage difference between the capacitor Co1 and the capacitor Co2, and the voltage difference Vo is obtained by the following steps:
according to the above formula, the converter can realize low-voltage output with a small turn ratio. Because the turn ratio is small, the winding turns of the transformer are small, and a foundation is provided for realizing a planar transformer.
The operation principle of complementary conduction of the MOS transistors Q1 and Q2 is described above, and the circuit can also operate in a non-complementary conduction mode. When the MOS tube is not complementarily conducted, the four stages are totally included:
the first stage is as follows: q1 is on and Q2 is off. This stage is consistent with the working principle of complementary conduction, and is not described herein again;
and a second stage: q1 is off and Q2 is on. The working principle of this stage and complementary conduction are also consistent, and are not described herein again;
and a third stage: the Q1 body diode is on and Q2 is off. Compared with the first phase, the transformer in the phase does not absorb energy, but releases energy, and the phase is finished when the energy of the transformer is released;
a fourth stage: q1 is off and Q2 is off. At this stage, the excitation inductance resonates with the parasitic capacitance, and D1 on the secondary side is off.
Since the volt-second balance expression of the non-complementary operation mode is different from that of the complementary operation mode, the above expression of the output voltage is not applicable to the non-complementary operation mode.
Second embodiment
Fig. 3 is a schematic diagram of a second embodiment of a switching converter power stage of the present invention.
On the basis of the first embodiment, in order to recover the leakage inductance energy of the transformer TX1, the conventional RCD circuit is replaced by an active clamp circuit, and the connection relationship of the first embodiment is as follows:
the positive end of a voltage source Vin is connected with the negative end of a capacitor Cr and the dotted end of a primary winding P1 of a transformer TX1 respectively, the positive end of the capacitor Cr is connected with the drain electrode of a clamping MOS tube Q3, the source electrode of the clamping MOS tube Q3 is connected with the drain electrode of an MOS tube Q1 and the dotted end of a primary winding P1 of the transformer TX1 respectively, and the source electrode of the MOS tube Q1 is connected with the negative end of the voltage source Vin; the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is connected with the drain electrode of an MOS tube Q2, and the source electrode of the MOS tube Q2 is connected with the dotted terminal of the secondary winding S1 of the transformer TX 1; the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the anode of a diode D1, the cathode of the diode D1 is respectively connected with the positive terminal of a capacitor Co1 and the positive terminal of a capacitor Co2, and the negative terminal of a capacitor Co2 is respectively connected with the dotted terminal of the secondary winding S2 of the transformer TX1, the negative terminal of a capacitor Co3 and the other end of a load resistor R1.
In this embodiment, the driving of the active clamp MOS transistor Q3 is identical to the driving of the MOS transistor Q2.
The working principle of this embodiment is the same as that of the first embodiment, and is not described here again. Similar to the first embodiment, this embodiment can operate in either a complementary mode or a non-complementary mode.
Third embodiment
Fig. 4 is a schematic diagram of a third embodiment of a switching converter power stage of the present invention.
If the idea of the invention is applied to the asymmetric half-bridge flyback circuit, the turn ratio of the transformer can be further reduced, so that the turn number of the transformer is reduced.
The connection relationship of this embodiment is as follows:
the positive end of a voltage source Vin is respectively connected with the drain electrode of a clamping tube Q2 and the dotted terminal of a primary winding P1 of a transformer TX1, the synonym terminal of a primary winding P1 of the transformer TX1 is connected with the positive end of a capacitor Cr, the negative end of the capacitor Cr is respectively connected with the drain electrode of a clamping MOS tube Q1 and the source electrode of an MOS tube Q2, and the source electrode of the MOS tube Q1 is connected with the negative end of the voltage source Vin; the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is respectively connected with the drain of an MOS tube Q3, the drain of an MOS tube Q4 and the positive terminal of a capacitor Co, and the source of the MOS tube Q3 is connected with the different-dotted terminal of the secondary winding S1 of the transformer TX 1; the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the source of the MOS transistor Q4, and the different-dotted terminal of the secondary winding S2 of the transformer TX1 is respectively connected with the negative terminal of the capacitor Co2, the negative terminal of the capacitor Co3 and the other end of the load resistor R1.
The operation of the circuit is similar to that of the first embodiment and is not described in detail here. In the complementary driving mode, if the driving duty ratio of the MOS transistor Q1 is D, the output voltage of the converter is D
Figure BDA0002209173290000061
Similar to the first embodiment, this embodiment can operate in either a complementary mode or a non-complementary mode, similar to the first embodiment. Since the volt-second balance expression of the non-complementary operation mode is different from that of the complementary operation mode, the above expression of the output voltage is not applicable to the non-complementary operation mode.
The above are merely preferred embodiments of the present invention, and those skilled in the art to which the present invention pertains may make variations and modifications of the above-described embodiments. Therefore, the present invention is not limited to the specific control modes disclosed and described above, and modifications and variations of the present invention are also intended to fall within the scope of the claims of the present invention. Furthermore, although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims (11)

1. A switching converter, characterized by:
the positive end of a voltage source Vin is respectively connected with one end of a resistor R2, the negative end of a capacitor Cr and the dotted end of a primary winding P1 of a transformer TX1, the other end of the resistor R2 and the positive end of the capacitor Cr are connected with the cathode of a diode D2, the anode of the diode D2 is respectively connected with the drain of an MOS tube Q1 and the dotted end of the primary winding P1 of the transformer TX1, and the source of the MOS tube Q1 is connected with the negative end of the voltage source Vin;
the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is connected with the drain electrode of an MOS tube Q2, and the source electrode of the MOS tube Q2 is connected with the dotted terminal of the secondary winding S1 of the transformer TX 1;
the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the anode of a diode D1, the cathode of the diode D1 is respectively connected with the positive terminal of a capacitor Co1 and the positive terminal of a capacitor Co2, and the negative terminal of a capacitor Co2 is respectively connected with the dotted terminal of the secondary winding S2 of the transformer TX1, the negative terminal of a capacitor Co3 and the other end of a load resistor R1.
2. A switching converter, characterized by:
the positive end of a voltage source Vin is connected with the negative end of a capacitor Cr and the dotted end of a primary winding P1 of a transformer TX1 respectively, the positive end of the capacitor Cr is connected with the drain electrode of a clamping MOS tube Q3, the source electrode of the clamping MOS tube Q3 is connected with the drain electrode of an MOS tube Q1 and the dotted end of a primary winding P1 of the transformer TX1 respectively, and the source electrode of the MOS tube Q1 is connected with the negative end of the voltage source Vin;
the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is connected with the drain electrode of an MOS tube Q2, and the source electrode of the MOS tube Q2 is connected with the dotted terminal of the secondary winding S1 of the transformer TX 1;
the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the anode of a diode D1, the cathode of the diode D1 is respectively connected with the positive terminal of a capacitor Co1 and the positive terminal of a capacitor Co2, and the negative terminal of a capacitor Co2 is respectively connected with the dotted terminal of the secondary winding S2 of the transformer TX1, the negative terminal of a capacitor Co3 and the other end of a load resistor R1.
3. A switching converter, characterized by:
the positive end of a voltage source Vin is respectively connected with the drain electrode of a clamping tube Q2 and the dotted terminal of a primary winding P1 of a transformer TX1, the synonym terminal of a primary winding P1 of the transformer TX1 is connected with the positive end of a capacitor Cr, the negative end of the capacitor Cr is respectively connected with the drain electrode of a clamping MOS tube Q1 and the source electrode of an MOS tube Q2, and the source electrode of the MOS tube Q1 is connected with the negative end of the voltage source Vin;
the dotted terminal of the secondary winding S1 of the transformer TX1 is respectively connected with the negative terminal of a capacitor Co1, the positive terminal of a capacitor Co3 and one end of a load resistor R1, the positive terminal of a capacitor Co1 is respectively connected with the drain of an MOS tube Q3, the drain of an MOS tube Q4 and the positive terminal of the capacitor Co2, and the source of an MOS tube Q3 is connected with the different-dotted terminal of the secondary winding S1 of the transformer TX 1;
the dotted terminal of the secondary winding S2 of the transformer TX1 is connected with the source of the MOS transistor Q4, and the different-dotted terminal of the secondary winding S2 of the transformer TX1 is respectively connected with the negative terminal of the capacitor Co2, the negative terminal of the capacitor Co3 and the other end of the load resistor R1.
4. A transducer according to any one of claims 1 to 3, wherein: the capacitance Co3 is 0F.
5. A transducer according to any one of claims 1 to 3, wherein: the load resistor R1 is replaced by a circuit formed by electronic components.
6. A transducer according to any one of claims 1 to 3, wherein: the transformer TX1 is a planar transformer.
7. The converter according to claim 1 or 2, characterized in that: the diode D1 is replaced by a synchronous rectification MOS transistor.
8. The converter of claim 2, wherein: the drive of the MOS transistor Q1 and the drive of the MOS transistor Q3 are complementary.
9. The converter of claim 2, wherein: the driving drives of the MOS transistor Q1 and the MOS transistor Q3 are non-complementary.
10. The converter of claim 3, wherein: the drive of the MOS transistor Q1 and the drive of the MOS transistor Q2 are complementary.
11. The converter of claim 3, wherein: the drive of the MOS transistor Q1 and the drive of the MOS transistor Q2 are non-complementary.
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