CN110647436A - 一种ddr2/ddr3存储器的快速检测方法 - Google Patents

一种ddr2/ddr3存储器的快速检测方法 Download PDF

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Publication number
CN110647436A
CN110647436A CN201810671129.3A CN201810671129A CN110647436A CN 110647436 A CN110647436 A CN 110647436A CN 201810671129 A CN201810671129 A CN 201810671129A CN 110647436 A CN110647436 A CN 110647436A
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bits
value
detection
ddr2
written
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杨海涛
黄佳
张伟彬
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Beijing Automation Control Equipment Institute BACEI
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Beijing Automation Control Equipment Institute BACEI
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Priority to CN201810671129.3A priority Critical patent/CN110647436A/zh
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

本发明提供一种DDR2/DDR3存储器的快速检测方法,它包括如下步骤:1、首地址写入0xFFFF0000;2、回读;3、回读值与写入值相同,则继续执行;否则报芯片故障,结束检测;4、地址加1,写入值低16位和地址的低16位相同,写入值高16位为低16位的反码;5、回读;6、回读校验,回读值与写入值相同,则继续执行;否则报芯片故障,结束检测;7、循环执行步骤4‑7,直至整片存储器检测完成。本发明的优点是,根据DDR2/DDR3存储器数据在时钟双沿跳变的特点,能够实现所有数据位在时钟沿同时跳变的检测,提高效率的同时,保证了产品的可靠性。

Description

一种DDR2/DDR3存储器的快速检测方法
技术领域
本发明属于电路检测方法,具体涉及一种DDR2/DDR3存储器的快速检测方法,它能够对DDR2/DDR3存储器和相关电路进行检测,剔除芯片和电路早期故障。
背景技术
DDR2/DDR3存储器是导航计算机常用的存储器,其性能的好坏直接影响相关软件的运行结果,在DDR2/DDR3存储器使用之前,必须对其进行检测。检测方法是通过写入指定值回读校验。传统的检测方法通常写入全0、全1和01交替。这种检测方法耗时较长,效率低,同时不能剔除所有数据位在时钟沿同时跳变的故障。
发明内容
本发明的目的是提供一种DDR2/DDR3存储器的快速检测方法,它节省时间的同时又具有很高的可靠性。
本发明是这样实现的,一种DDR2/DDR3存储器的快速检测方法,它包括如下步骤:
1、首地址写入0xFFFF0000;
2、回读;
3、回读值与写入值相同,则继续执行;否则报芯片故障,结束检测;
4、地址加1,写入值低16位和地址的低16位相同,写入值高16位为低16位的反码;
5、回读;
6、回读校验,回读值与写入值相同,则继续执行;否则报芯片故障,结束检测;
7、循环执行步骤4-7,直至整片存储器检测完成。
本发明的优点是,根据DDR2/DDR3存储器数据在时钟双沿跳变的特点,能够实现所有数据位在时钟沿同时跳变的检测,提高效率的同时,保证了产品的可靠性。本发明使用的所有数据位在时钟沿同时跳变的检测方法,可以有效剔除DDR2/DDR3存储器和相关电路的早期故障;本发明所使用的所有数据位在时钟沿同时跳变的检测方法可以根据需要进行扩展,以适应不同的应用场合。
具体实施方式
下面结合具体实施例对本发明进行详细介绍:
一种DDR2/DDR3存储器的快速检测方法,包括如下步骤:
1、首地址写入0xFFFF0000;
2、回读;
3、回读值与写入值相同,则继续执行;否则报芯片故障,结束检测;
4、地址加1,写入值低16位和地址的低16位相同,写入值高16位为低16位的反码;
5、回读;
6、回读校验,回读值与写入值相同,则继续执行;否则报芯片故障,结束检测;
7、循环执行步骤4-7,直至整片存储器检测完成。

Claims (1)

1.一种DDR2/DDR3存储器的快速检测方法,其特征在于:它包括如下步骤:
1、首地址写入0xFFFF0000;
2、回读;
3、回读值与写入值相同,则继续执行;否则报芯片故障,结束检测;
4、地址加1,写入值低16位和地址的低16位相同,写入值高16位为低16位的反码;
5、回读;
6、回读校验,回读值与写入值相同,则继续执行;否则报芯片故障,结束检测;
7、循环执行步骤4-7,直至整片存储器检测完成。
CN201810671129.3A 2018-06-26 2018-06-26 一种ddr2/ddr3存储器的快速检测方法 Pending CN110647436A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113628670A (zh) * 2021-07-20 2021-11-09 北京自动化控制设备研究所 一种ddr sdram的自检方法

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US5689466A (en) * 1995-04-07 1997-11-18 National Semiconductor Corporation Built in self test (BIST) for multiple RAMs
JP2001216202A (ja) * 2000-01-31 2001-08-10 Fujitsu Kiden Ltd メモリのアドレスライン障害検出装置、その方法、及び記録媒体
CN1479207A (zh) * 2002-08-29 2004-03-03 深圳市中兴通讯股份有限公司 内存检测方法
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CN101692351A (zh) * 2009-11-02 2010-04-07 华为技术有限公司 存储器测试方法及装置
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Publication number Priority date Publication date Assignee Title
US5689466A (en) * 1995-04-07 1997-11-18 National Semiconductor Corporation Built in self test (BIST) for multiple RAMs
JP2001216202A (ja) * 2000-01-31 2001-08-10 Fujitsu Kiden Ltd メモリのアドレスライン障害検出装置、その方法、及び記録媒体
CN1479207A (zh) * 2002-08-29 2004-03-03 深圳市中兴通讯股份有限公司 内存检测方法
CN1725382A (zh) * 2004-07-20 2006-01-25 中兴通讯股份有限公司 一种闪存存储器的检测方法
CN101692351A (zh) * 2009-11-02 2010-04-07 华为技术有限公司 存储器测试方法及装置
CN102893263A (zh) * 2011-05-16 2013-01-23 华为技术有限公司 内存检测方法和内存检测装置

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网络元素: "《DDR内存子系统常见硬件错误及Uboot中检测流程,https://www.jianshu.com/p/8ccbc3ee8fcf》", 10 December 2017 *
邱桥春等: "通讯设备内存总线测试方法研究及验证", 《计算机产品与流通》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113628670A (zh) * 2021-07-20 2021-11-09 北京自动化控制设备研究所 一种ddr sdram的自检方法

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Application publication date: 20200103