CN110635773A - Linear limiter - Google Patents

Linear limiter Download PDF

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Publication number
CN110635773A
CN110635773A CN201911055655.8A CN201911055655A CN110635773A CN 110635773 A CN110635773 A CN 110635773A CN 201911055655 A CN201911055655 A CN 201911055655A CN 110635773 A CN110635773 A CN 110635773A
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China
Prior art keywords
diode
amplitude limiting
module
circuit
amplitude
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Pending
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CN201911055655.8A
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Chinese (zh)
Inventor
邓世雄
陈书宾
孙计永
赵瑞华
宋学峰
王凯
李丰
袁彪
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CETC 13 Research Institute
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CETC 13 Research Institute
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G11/00Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
    • H03G11/02Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general by means of diodes

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  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Abstract

The invention is suitable for the technical field of electronic devices, and provides a linear amplitude limiter, which comprises: the device comprises a first isolation module, a first amplitude limiting module, a second amplitude limiting module and a second isolation module; the first amplitude limiting module comprises a first amplitude limiting circuit and a second amplitude limiting circuit, and the second amplitude limiting module comprises a third amplitude limiting circuit and a fourth amplitude limiting circuit; each clipping circuit comprises at least two diode units. The first end of the first isolation module is an amplitude limiting input end, the second end of the first isolation module is respectively connected with the first end of the first amplitude limiting module, the first end of the second amplitude limiting module and the first end of the second isolation module, and the second end of the second isolation module is an amplitude limiting output end. This application can reduce diode junction electric capacity through parallelly connected a plurality of diode units in first amplitude limiting module and the second amplitude limiting module, increases diode quantity to improve the power-tolerant ability of amplitude limiter, and then improve the reliability of linear amplitude limiter.

Description

Linear limiter
Technical Field
The invention belongs to the technical field of electronic devices, and particularly relates to a linear amplitude limiter.
Background
High Power Microwave (HPM) refers to a source of coherent electromagnetic radiation with an instantaneous peak power of over 100MW, and a radiation wavelength in the centimeter to millimeter range, i.e., a frequency between 0.3GHz and 300 GHz. Under the rapid development of high-power microwave weapons and the gradual maturity of electronic countermeasure technology, the electromagnetic environment faced by present electronic equipment is more complex and threatened more greatly. Due to the characteristics of high power, high frequency and the like, high-power microwaves have great interference and harm to electronic equipment, and the protection requirement for high-power microwave weapons is more and more urgent.
With the development of electronic technology and the progress of semiconductor technology, the linearity of the receiving link becomes higher and higher. The application demand of the high power-tolerant high linear amplitude limiter is huge. The traditional HPM amplitude limiter generally adopts a GaAs (gallium arsenide) amplitude limiter, and the GaAs amplitude limiter has low power resistance and low linearity (P-1 is in the magnitude of 10 dBm), and cannot meet the requirement of high-power high-linearity amplitude limiting.
Disclosure of Invention
In view of this, embodiments of the present invention provide a linear amplitude limiter to solve the problem of low power tolerance of the amplitude limiter in the prior art.
An embodiment of the present invention provides a linear limiter, including:
the device comprises a first isolation module, a first amplitude limiting module, a second amplitude limiting module and a second isolation module;
the first amplitude limiting module comprises a first amplitude limiting circuit and a second amplitude limiting circuit, and the second amplitude limiting module comprises a third amplitude limiting circuit and a fourth amplitude limiting circuit; the first amplitude limiting circuit, the second amplitude limiting circuit, the third amplitude limiting circuit and the fourth amplitude limiting circuit respectively comprise at least two diode units;
the first end of the first isolation module is an amplitude limiting input end, the second end of the first isolation module is respectively connected with the first end of the first amplitude limiting module, the first end of the second amplitude limiting module and the first end of the second isolation module, and the second end of the second isolation module is an amplitude limiting output end;
the anodes of the diode units of the first amplitude limiting circuit and the cathodes of the diode units of the second amplitude limiting circuit are respectively connected with the first end of the first amplitude limiting module, and the anodes of the diode units of the third amplitude limiting circuit and the cathodes of the diode units of the fourth amplitude limiting circuit are respectively connected with the first end of the second amplitude limiting module; the cathode of each diode unit of the first amplitude limiting circuit, the anode of each diode unit of the second amplitude limiting circuit, the cathode of each diode unit of the third amplitude limiting circuit and the anode of each diode unit of the fourth amplitude limiting circuit are respectively grounded.
In one embodiment, the linear limiter further comprises an input matching circuit and an output matching circuit;
the first end of the input matching circuit is connected with the second end of the first isolation module, and the second end of the input matching circuit is connected with the first end of the first amplitude limiting module;
and the first end of the output matching circuit is connected with the first end of the second amplitude limiting module, and the second end of the output matching circuit is connected with the first end of the second isolation module.
In one embodiment, the first diode unit comprises at least two diodes connected in series in opposite directions, the first diode unit being any diode unit of the first clipping circuit;
the second diode unit includes at least two diodes connected in reverse series, and the second diode unit is any one diode unit of the second limiter circuit.
In one embodiment, the first diode unit includes a first diode and a second diode, and the second diode unit includes a third diode and a fourth diode;
the anode of the first diode is the anode of the first diode unit, the cathode of the first diode is connected with the anode of the second diode, and the cathode of the second diode is the cathode of the first diode unit;
the anode of the third diode is the anode of the second diode unit, the cathode of the third diode is connected with the anode of the fourth diode, and the cathode of the fourth diode is the cathode of the second diode unit.
In one embodiment, each diode of the first clipping module is a GaN PIN diode.
In one embodiment, the diode unit of the third clipping circuit and the diode unit of the fourth clipping circuit each comprise one diode.
In one embodiment, each diode of the second clipping module is a GaN PIN diode.
In one embodiment, an electrical length between the first and second clipping modules is greater than a preset electrical length threshold.
In one embodiment, the linear amplitude limiter further includes a third isolation module, a first end of the third isolation module is connected to the first end of the first amplitude limiting module, and a second end of the third isolation module is connected to the first end of the second amplitude limiting module.
In one embodiment, the first isolation module comprises a first capacitance, the second isolation module comprises a second capacitance, and the third isolation module comprises a third capacitance.
The present invention provides a linear limiter comprising: the device comprises a first isolation module, a first amplitude limiting module, a second amplitude limiting module and a second isolation module; the first amplitude limiting module comprises a first amplitude limiting circuit and a second amplitude limiting circuit, and the second amplitude limiting module comprises a third amplitude limiting circuit and a fourth amplitude limiting circuit; the first amplitude limiting circuit, the second amplitude limiting circuit, the third amplitude limiting circuit and the fourth amplitude limiting circuit respectively comprise at least two diode units. In the embodiment, the diode junction capacitance can be reduced and the number of diodes is increased through the parallel connection of the plurality of diode units in the first amplitude limiting module and the second amplitude limiting module, so that the power resistance of the amplitude limiter is improved, and the reliability of the linear amplitude limiter is further improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a linear limiter according to an embodiment of the present invention;
fig. 2 is a circuit diagram of a linear limiter according to an embodiment of the present invention;
fig. 3 is a diagram of a coaxial GaN PIN slicer according to an embodiment of the present invention;
fig. 4 is a diagram of a box-shaped GaN PIN slicer provided in the embodiment of the present invention;
FIG. 5 is a schematic diagram of a surface mount GaN PIN slicer provided in an embodiment of the present invention;
fig. 6 is an S-parameter simulation curve of a linear limiter according to an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
The terms "comprises" and "comprising," and any variations thereof, in the description and claims of this invention and the above-described drawings are intended to cover non-exclusive inclusions. For example, a process, method, or system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," and "third," etc. are used to distinguish between different objects and are not used to describe a particular order.
In order to explain the technical means of the present invention, the following description will be given by way of specific examples.
Example 1:
fig. 1 is a schematic diagram illustrating a circuit structure of a linear limiter according to an embodiment of the present invention, and for convenience of description, only the parts related to the embodiment of the present invention are shown, and the detailed description is as follows:
as shown in fig. 1, an embodiment of the present invention provides a schematic structural diagram of a linear amplitude limiter, which includes:
a first isolation module 10, a first amplitude limiting module 20, a second amplitude limiting module 30 and a second isolation module 40;
the first amplitude limiting module 20 comprises a first amplitude limiting circuit 21 and a second amplitude limiting circuit 22, and the second amplitude limiting module 30 comprises a third amplitude limiting circuit 31 and a fourth amplitude limiting circuit 32; the first limiter circuit 21, the second limiter circuit 22, the third limiter circuit 31 and the fourth limiter circuit 32 respectively include at least two diode units;
the first end of the first isolation module 10 is an amplitude limiting input end, the second end of the first isolation module 10 is respectively connected with the first end of the first amplitude limiting module 20, the first end of the second amplitude limiting module 30 and the first end of the second isolation module 40, and the second end of the second isolation module 40 is an amplitude limiting output end;
the anodes of the diode units of the first amplitude limiting circuit 21 and the cathodes of the diode units of the second amplitude limiting circuit 22 are respectively connected to the first end of the first amplitude limiting module 20, and the anodes of the diode units of the third amplitude limiting circuit 31 and the cathodes of the diode units of the fourth amplitude limiting circuit 32 are respectively connected to the first end of the second amplitude limiting module 30; the cathodes of the diode units of the first limiter circuit 21, the anodes of the diode units of the second limiter circuit 22, the cathodes of the diode units of the third limiter circuit 31, and the anodes of the diode units of the fourth limiter circuit 32 are grounded, respectively.
The embodiment provides a high-power microwave protection amplitude limiter which can withstand the peak power exceeding 1000W and ensure that the turn-on threshold is greater than 20dbm by adopting a diode for a certain receiver.
In the present embodiment, as shown in fig. 1, the first isolation module 10, the first amplitude limiting module 20, the second amplitude limiting module 30 and the second isolation module 40 are included. Wherein the first clipping module 20 comprises a first clipping circuit 21 and a second clipping circuit 22, and each clipping circuit comprises at least two diode units. And at least two diode units of each clipping circuit are connected in parallel. Specifically, the positive electrode of each diode unit of the first amplitude limiting circuit 21 is connected with the positive electrode of the first amplitude limiting module 20, and the negative electrode is grounded; the cathode of each diode unit of the second amplitude limiting circuit 22 is connected to the anode of the first amplitude limiting module 20, and the cathode is grounded.
Therefore, when the forward microwave signal is input to the input terminal of the limiter and the voltage of the microwave signal is greater than the diode turn-on voltage, the first limiter circuit 21 is turned on, the diode of the first limiter circuit 21 is turned on to the ground in the forward direction, and at this time, the first limiter circuit 21 acts as a resistor, thereby reducing the voltage amplitude of the microwave signal. When the forward microwave signal is input to the input end of the amplitude limiter and the voltage of the microwave signal is less than the diode turn-on voltage, the first amplitude limiting circuit 21 does not work, at this time, the first amplitude limiting circuit 21 is equivalent to a capacitor, and the microwave signal normally passes through the amplitude limiter.
When the input end of the amplitude limiter inputs a negative microwave signal, and the absolute value of the voltage of the microwave signal is greater than the diode turn-on voltage, the second amplitude limiting circuit 22 is turned on to work, and at this time, the diode of the second amplitude limiting circuit 22 is equivalent to a resistor, so that the voltage amplitude of the microwave signal is reduced. When the input end of the amplitude limiter inputs a negative microwave signal and the absolute value of the voltage of the microwave signal is smaller than the diode starting voltage, the second amplitude limiting circuit 22 does not work, the second amplitude limiting circuit 22 is equivalent to a capacitor, and the microwave signal normally passes through the amplitude limiter.
The third clipping circuit 31 of the second clipping module 30 has the same operation principle as the first clipping circuit 21, and the fourth clipping circuit 32 of the second clipping module 30 has the same operation principle as the second clipping circuit 22.
Specifically, because the diode unit of each amplitude limiting circuit is all parallel connection, can reduce diode junction electric capacity, increase the quantity of diode to improve the power-tolerant ability of amplitude limiter, simultaneously, through the isolation of first isolation module 10 and second isolation module 40 to microwave signal, can improve the amplitude limiting isolation of whole day, reduce and reveal power.
In one embodiment, the linear limiter further comprises an input matching circuit 50 and an output matching circuit 60;
a first end of the input matching circuit 50 is connected to a second end of the first isolation module 10, and a second end of the input matching circuit 50 is connected to a first end of the first amplitude limiting module 20;
a first terminal of the output matching circuit 60 is connected to a first terminal of the second clipping module 30, and a second terminal of the output matching circuit 60 is connected to a first terminal of the second isolation module 40.
In this embodiment, fig. 2 shows a circuit diagram of another linear limiter, as shown in fig. 2, the linear limiter further includes an input matching circuit 50 and an output matching circuit 60, where the input matching circuit 50 is used to ensure that the standing wave at the input end of the limiter is well matched, and the output matching circuit 60 is used to ensure that the standing wave at the output end of the limiter is well matched, so as to reduce the leakage power.
In one embodiment, the first diode unit 211 includes at least two diodes connected in series in opposite directions, and the first diode unit 211 is any diode unit of the first slice circuit 21;
the second diode unit 221 includes at least two diodes connected in series in an inverted direction, and the second diode unit 221 is any diode unit of the second limiter circuit 22.
In this embodiment, for convenience of explanation, the diode units with the same name are labeled with the same reference numeral, but in practice, different diode units in each slice circuit are different devices. Specifically, the first amplitude limiting circuit 21 includes at least two diode units, each of which includes at least two diodes connected in series in reverse direction, and in each of the diode units, the anode of one diode is connected to the first end of the first amplitude limiting module 20, and after the at least two diodes are connected in series in reverse direction, the cathode of the last diode is grounded.
In this embodiment, the second limiter circuit 22 includes at least two diode units, each of which includes at least two diodes connected in series in reverse direction, and in each of the diode units of the second limiter circuit 22, in contrast to the first limiter circuit 21, the cathode of one diode is connected to the first end of the first limiter module 20, and after the diodes are connected in series in reverse direction, the anode of the last diode is grounded.
In one embodiment, the first clipping circuit 21 comprises at least two first diode units 211,
in one embodiment, the first diode unit 211 includes a first diode and a second diode, and the second diode unit 221 includes a third diode and a fourth diode;
the anode of the first diode is the anode of the first diode unit 211, the cathode of the first diode is connected with the anode of the second diode, and the cathode of the second diode is the cathode of the first diode unit 211;
the anode of the third diode is the anode of the second diode unit 221, the cathode of the third diode is connected to the anode of the fourth diode, and the cathode of the fourth diode is the cathode of the second diode unit 221.
In the present embodiment, as shown in fig. 2, the first limiter circuit 21 includes three diode units each including two diodes connected in series in reverse. The first clipping circuit 21 is rendered conductive forward to ground. The second clipping circuit 22 comprises three diode units, each comprising two diodes connected in series in reverse direction, and the second clipping circuit 22 is negatively conducting.
In one embodiment, each diode of the first clipping module 20 is a GaN PIN diode.
In this embodiment, the diodes in the first and second slice modules 20 and 30 are GaN PIN diodes, and the turn-on voltage is 4V and the clamp voltage is 6V, so as to ensure that the turn-on level of the whole slice circuit is greater than 20dBm and the leakage power is less than 27 dBm.
In one embodiment, the diode unit of the third clipping circuit 31 and the diode unit of the fourth clipping circuit 32 each comprise one diode.
In this embodiment, as shown in fig. 2, the third amplitude limiting circuit 31 includes two third diode units 311, each third diode unit 311 includes a diode, and the diode of each third diode unit 311 has an anode connected to the first end of the second amplitude limiting module 30 and a cathode connected to ground. The fourth amplitude limiting circuit 32 also includes two fourth diode units 321, each of the fourth diode units 321 includes a diode, and the diode of each of the fourth diode units 321 is grounded at its positive electrode, and the negative electrode is connected to the first end of the second amplitude limiting module 30.
In one embodiment, each diode of the second clipping module 30 is a GaN PIN diode.
In one embodiment, the electrical length between the first clipping module 20 and the second clipping module 30 is greater than a preset electrical length threshold.
In one embodiment, the linear amplitude limiter further comprises a third isolation module, a first end of the third isolation module is connected to the first end of the first amplitude limiting module 20, and a second end of the third isolation module is connected to the first end of the second amplitude limiting module 30.
In one embodiment, the first isolation module 10 includes a first capacitor C1, the second isolation module 40 includes a second capacitor C2, and the third isolation module includes a third capacitor C3.
In this embodiment, in order to improve the amplitude limiting isolation of the entire amplitude limiter, a third isolation module may be connected in series between the first amplitude limiting module 20 and the second amplitude limiting module 30, and the third isolation module may be a third capacitor.
In this embodiment, in order to improve the overall clipping isolation of the clipper, the micro-wire between the first clipping module 20 and the second clipping module 30 may be extended, so as to increase the electrical length between the first clipping module 20 and the second clipping module 30.
In an embodiment of the present invention, the linear limiter provided in this embodiment adopts a monolithic integration mode, and all circuits and diodes are integrated on a limiter chip, so as to reduce the size; the method is realized by adopting an aluminum nitride hybrid integrated circuit process, and the GaN amplitude limiter is welded to the aluminum nitride ceramic substrate in a gold-tin eutectic way and finally packaged in high-thermal-conductivity packaging. By utilizing the high thermal conductivity of gold tin and aluminum nitride, the heat generated by the diode due to power dissipation can be rapidly conducted to the whole circuit substrate and further conducted to the package, and the power-resistant capacity of the amplitude limiter is improved.
In an embodiment of the present invention, the GaN PIN limiter may be designed in various forms, for example, fig. 3 shows an entity diagram of a coaxial GaN PIN limiter provided in this embodiment, fig. 4 shows an entity diagram of a box-shaped GaN PIN limiter provided in this embodiment, and fig. 5 shows an entity diagram of a surface-mounted GaN PIN limiter.
As shown in fig. 6, fig. 6 shows an S-parameter simulation curve of the linear limiter provided in the present embodiment, where fig. 6(a) is an insertion loss simulation characteristic curve of the linear limiter, and fig. 6(b) is a Smith chart of the input reflection coefficient of the input matching circuit 50 of the linear limiter; fig. 6(c) is a graph showing simulated characteristics of the input reflection coefficient of the input matching circuit 50 of the linear limiter; fig. 6(d) is a graph showing simulated characteristics of the output reflection coefficient of the output matching circuit 60 of the linear limiter; fig. 6(d) is a Smith chart of the output reflection coefficient of the output matching circuit 60 of the linear limiter.
The GaN PIN limiter provided by the embodiment is simple in form, easy to integrate by a single chip, high in power resistance and linearity and good in reliability, can realize limiters with different starting voltages, leakage power and power resistance by combining with a Si and GaAs diode limiting circuit, and is popularized in products such as miniaturized high-power microwave protection limiters at present.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims (10)

1. A linear limiter, comprising: the device comprises a first isolation module, a first amplitude limiting module, a second amplitude limiting module and a second isolation module;
the first amplitude limiting module comprises a first amplitude limiting circuit and a second amplitude limiting circuit, and the second amplitude limiting module comprises a third amplitude limiting circuit and a fourth amplitude limiting circuit; the first amplitude limiting circuit, the second amplitude limiting circuit, the third amplitude limiting circuit and the fourth amplitude limiting circuit respectively comprise at least two diode units;
the first end of the first isolation module is an amplitude limiting input end, the second end of the first isolation module is respectively connected with the first end of the first amplitude limiting module, the first end of the second amplitude limiting module and the first end of the second isolation module, and the second end of the second isolation module is an amplitude limiting output end;
the anodes of the diode units of the first amplitude limiting circuit and the cathodes of the diode units of the second amplitude limiting circuit are respectively connected with the first end of the first amplitude limiting module, and the anodes of the diode units of the third amplitude limiting circuit and the cathodes of the diode units of the fourth amplitude limiting circuit are respectively connected with the first end of the second amplitude limiting module; the cathode of each diode unit of the first amplitude limiting circuit, the anode of each diode unit of the second amplitude limiting circuit, the cathode of each diode unit of the third amplitude limiting circuit and the anode of each diode unit of the fourth amplitude limiting circuit are respectively grounded.
2. The linear limiter of claim 1, wherein the linear limiter further comprises an input matching circuit and an output matching circuit;
the first end of the input matching circuit is connected with the second end of the first isolation module, and the second end of the input matching circuit is connected with the first end of the first amplitude limiting module;
and the first end of the output matching circuit is connected with the first end of the second amplitude limiting module, and the second end of the output matching circuit is connected with the first end of the second isolation module.
3. The linear limiter according to claim 1, wherein the first diode unit includes at least two diodes connected in reverse series, the first diode unit being any one of the diode units of the first limiting circuit;
the second diode unit includes at least two diodes connected in reverse series, and the second diode unit is any one diode unit of the second limiter circuit.
4. The linear limiter of claim 3, wherein the first diode unit includes a first diode and a second diode, and the second diode unit includes a third diode and a fourth diode;
the anode of the first diode is the anode of the first diode unit, the cathode of the first diode is connected with the anode of the second diode, and the cathode of the second diode is the cathode of the first diode unit;
the anode of the third diode is the anode of the second diode unit, the cathode of the third diode is connected with the anode of the fourth diode, and the cathode of the fourth diode is the cathode of the second diode unit.
5. The linear limiter of claim 3, wherein each diode of the first limiting module is a GaN PIN diode.
6. The linear limiter of claim 1, wherein the diode unit of the third limiting circuit and the diode unit of the fourth limiting circuit each include one diode.
7. The linear limiter of claim 6, wherein each diode of the second limiting module is a GaN PIN diode.
8. The linear limiter of claim 1, wherein an electrical length between the first limiting module and the second limiting module is greater than a preset electrical length threshold.
9. The linear limiter according to any one of claims 1 to 8, further comprising a third isolation block, a first end of the third isolation block being connected to the first end of the first limiting block, and a second end of the third isolation block being connected to the first end of the second limiting block.
10. The linear limiter of claim 9, wherein the first isolation block includes a first capacitor, the second isolation block includes a second capacitor, and the third isolation block includes a third capacitor.
CN201911055655.8A 2019-10-31 2019-10-31 Linear limiter Pending CN110635773A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101938259A (en) * 2010-08-16 2011-01-05 中国电子科技集团公司第五十五研究所 Gallium arsenide (GaAs) PIN tube limiter monolithic circuit with microwave high power and low clipping level
CN202168039U (en) * 2011-07-20 2012-03-14 成都九洲迪飞科技有限责任公司 L wave band receiving and sending front terminal amplitude limiter
US8918068B1 (en) * 2012-01-12 2014-12-23 Lockheed Martin Corporation Wide bandwidth RF power limiter
US20150002238A1 (en) * 2013-06-27 2015-01-01 Electronics And Telecommunications Research Institute Stacked diode limiter
US9270246B1 (en) * 2013-03-13 2016-02-23 Triquint Semiconductor, Inc. Power limiter

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101938259A (en) * 2010-08-16 2011-01-05 中国电子科技集团公司第五十五研究所 Gallium arsenide (GaAs) PIN tube limiter monolithic circuit with microwave high power and low clipping level
CN202168039U (en) * 2011-07-20 2012-03-14 成都九洲迪飞科技有限责任公司 L wave band receiving and sending front terminal amplitude limiter
US8918068B1 (en) * 2012-01-12 2014-12-23 Lockheed Martin Corporation Wide bandwidth RF power limiter
US9270246B1 (en) * 2013-03-13 2016-02-23 Triquint Semiconductor, Inc. Power limiter
US20150002238A1 (en) * 2013-06-27 2015-01-01 Electronics And Telecommunications Research Institute Stacked diode limiter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
VADIM BUDNYAEV等: ""Microwave Limiter Design in 180 nm SiGe BiCMOS Technology"", 《2019 URAL SYMPOSIUM ON BIOMEDICAL ENGINEERING, RADIOELECTRONICS AND INFORMATION TECHNOLOGY (USBEREIT)》 *

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Application publication date: 20191231