CN110600981B - Low-edge-jitter pulse signal generator - Google Patents
Low-edge-jitter pulse signal generator Download PDFInfo
- Publication number
- CN110600981B CN110600981B CN201910837683.9A CN201910837683A CN110600981B CN 110600981 B CN110600981 B CN 110600981B CN 201910837683 A CN201910837683 A CN 201910837683A CN 110600981 B CN110600981 B CN 110600981B
- Authority
- CN
- China
- Prior art keywords
- integrated circuit
- pin
- module
- ground gnd
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000001105 regulatory effect Effects 0.000 claims abstract description 21
- 239000003990 capacitor Substances 0.000 claims description 78
- 101100348691 Hordeum vulgare CW18 gene Proteins 0.000 claims description 3
- 101000864759 Mus musculus Splicing factor 1 Proteins 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims 1
- 239000013307 optical fiber Substances 0.000 abstract description 5
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 230000003287 optical effect Effects 0.000 abstract description 3
- 230000000087 stabilizing effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 5
- 239000000835 fiber Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S3/00—Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
- H01S3/09—Processes or apparatus for excitation, e.g. pumping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S3/00—Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
- H01S3/10—Controlling the intensity, frequency, phase, polarisation or direction of the emitted radiation, e.g. switching, gating, modulating or demodulating
- H01S3/13—Stabilisation of laser output parameters, e.g. frequency or amplitude
- H01S3/131—Stabilisation of laser output parameters, e.g. frequency or amplitude by controlling the active medium, e.g. by controlling the processes or apparatus for excitation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/017—Adjustment of width or dutycycle of pulses
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Optics & Photonics (AREA)
- Logic Circuits (AREA)
Abstract
A low-edge-jitter pulse signal generator. Which includes a low-edge-jitter pulse signal generator including: the device comprises a power supply module, a DDS module, a hysteresis voltage comparator module, a monostable trigger pulse width regulating circuit module and an MCU module; the power supply module is connected with the DDS module, the hysteresis voltage comparator module, the monostable trigger pulse width regulating circuit module and the MCU module, the DDS module is connected with the hysteresis voltage comparator module, the hysteresis voltage comparator module is connected with the monostable trigger pulse width regulating circuit module, and the MCU module is connected with the DDS module. The low-edge-jitter pulse signal generator provided by the invention can be used for more effectively reducing the pulse edge jitter, is beneficial to stabilizing the optical pulse output by the optical fiber pulse laser, and can be well applied to various optical fiber pulse lasers.
Description
Technical Field
The invention belongs to the technical field of fiber lasers, and particularly relates to a pulse signal generator with low edge jitter.
Background
As a new generation of laser which is attracting attention, the fiber pulse laser is widely used in industrial marking and deep engraving due to its excellent performance.
In order to stabilize the laser pulse output from the fiber pulse laser, a low-edge-jitter pulse signal generator is necessary. The method for generating pulse signal by traditional pulse signal generator is to generate a sine wave signal firstly, and then to generate pulse signal after comparing with a fixed reference voltage. The edge of the pulse signal generated by the method is severely dithered due to the noise of the sine wave signal and the reference voltage noise, and the dithering time is more than tens of nanoseconds to hundreds of nanoseconds. Pulse signals with severe edge jitter will cause instability of the laser pulse signal.
Disclosure of Invention
In order to solve the above problems, an object of the present invention is to provide a low-edge-jitter pulse signal generator.
In order to achieve the above object, the present invention provides a low-edge-jitter pulse signal generator comprising: the device comprises a power supply module, a DDS module, a hysteresis voltage comparator module, a monostable trigger pulse width regulating circuit module and an MCU module; wherein: the power supply module is connected with the DDS module, the hysteresis voltage comparator module, the monostable trigger pulse width regulating circuit module and the MCU module, the DDS module is connected with the hysteresis voltage comparator module, the hysteresis voltage comparator module is connected with the monostable trigger pulse width regulating circuit module, and the MCU module is connected with the DDS module.
The power supply module is a DC/DC integrated circuit module and comprises an integrated circuit LM22676, capacitors C21-C26, C30-C33, resistors R8-R10, diodes D3-D5, an inductor L1, a terminal JP1 and an integrated circuit LD1117-3.3V; wherein the 1 pin of the terminal JP1 is connected with an external power supply 24V and with the anode of the diode D3, the 2 pin of the terminal JP1 is connected with the ground GND, the cathode of the diode D3 is connected with the 7 pin of the integrated circuit LM22676, both ends of the capacitor C22 and the capacitor C23 are respectively connected with the cathode of the diode D3 and the ground GND, one end of the capacitor C24 is connected with the 5 pin of the integrated circuit LM22676, the other end is connected with the ground GND, the 7 pin of the integrated circuit LM22676 is connected with the cathode of the diode D3, the 6 pin is connected with the ground GND, one end of the resistor R8 is connected with the 4 pin of the integrated circuit LM22676, the other end is connected with the ground GND, one end of the resistor R9 is connected with the 4 pin of the integrated circuit LM22676, the other end is the power supply VDD5V, both ends of the capacitor C21 are respectively connected with the 1 pin and 8 pin of the integrated circuit LM22676, the cathode of the diode D5 is connected with the 8 pin of the integrated circuit LM22676, the anode is connected with the ground GND, one end of the inductor L1 is connected with 8 pins of the integrated circuit LM22676, the other end is connected with the power supply VDD5V, two ends of the capacitor C25 are respectively connected with the power supply VDD5V and the ground GND, the positive electrode of the capacitor C26 is connected with the power supply VDD5V, the negative electrode is connected with the ground GND, the anode of the diode D4 is connected with the power supply VDD5V, the cathode is connected with the ground GND through a resistor R10, one end of the capacitor C30 is connected with 3 pins of the integrated circuit LD1117-3.3V and is connected with the anode of the diode D4, the other end is connected with the ground GND, the positive electrode of the capacitor C31 is connected with 3 pins of the integrated circuit LD1117-3.3V, the negative electrode is connected with the GND ground GND, the positive electrode of the capacitor C32 is connected with 2 pins of the integrated circuit LD1117-3.3V, the negative electrode is connected with the GND ground GND, the 1 pin of the integrated circuit LD1117-3.3V is connected with the ground GND, one end of the capacitor C33 is connected with 2 pins of the integrated circuit LD1117-3.3V and is connected with the 3V, the other end is connected with the ground GND, and the 4 pin of the integrated circuit LD1117-3.3V is connected with the 2 pin of the integrated circuit LD 1117-3.3V.
The DDS module and the hysteresis voltage comparator module adopt a DDS module with hysteresis voltage comparison inside; the DDS module with hysteresis voltage comparison inside comprises: integrated circuit AD9851, capacitors CW2, CW6, CW8-CW12, resistors RW1, RW3 and RW4; wherein: the capacitor CW2 has its both ends connected to the power supply VDD5V and the ground GND, the integrated circuit AD9851 has its 6 pin and 5 pin connected to the power supply VDD5V and the ground GND, the capacitor CW8 has its positive electrode connected to the power supply VDD5V and its negative electrode connected to the ground GND, the capacitor CW9 has its both ends connected to the power supply VDD5V and the ground, the integrated circuit AD9851 has its 11 pin and 10 pin connected to the power supply VDD5V and the ground GND, the integrated circuit AD9851 has its 23 pin and 24 pin connected to the power supply VDD5V and the ground GND, the integrated circuit AD9851 has its 18 pin and 19 pin connected to the power supply VDD5V and the ground GND, the capacitor CW11 is connected in parallel to the resistor RW3, and has its one end connected to the 20 pin of the integrated circuit AD9851 and its other end connected to the ground GND 4, and has its one end connected to the 21 pin of the integrated circuit AD9851 and the other end connected to the ground GND, the integrated circuit AD9851 has its 23 pin and 24 pin connected to the ground GND of the integrated circuit AD9851 has its 23 pin connected to the power supply VDD5V and its 18 pin and 19 pin connected to the ground GND 3, and its 18 pin connected to the power supply wire 3 is connected to the power supply VDD3, and its 3 is connected to the power supply wire 4.
The monostable triggering pulse width regulating circuit module adopts an SN74LVC1G123 chip and comprises an integrated circuit SN74LVC1G123, capacitors CW13-CW15, resistors RW2 and RW5 and a variable resistor R1; wherein: the 1, 4 pin and the 8 pin of integrated circuit SN74LVC1G123 are connected with ground GND, the 3 pin and the 8 pin are connected with power VDD5V, the 2 pin is the PULSE end and is connected with 14 pin of integrated circuit AD9851, one end of capacitor CW14 is connected with power VDD5V, the other end is connected with ground GND, two ends of capacitor CW15 are respectively connected with 6 pin and 7 pin of integrated circuit SN74LVC1G123, one fixed end of variable resistor R1 is connected with 7 pin of integrated circuit SN74LVC1G123 through resistor RW5, the other fixed end and active end are connected with power VDD5V together, one end of resistor RW2 is connected with 5 pin of integrated circuit SN74LVC1G123, the other end is the PULSE output end, one end of capacitor CW13 is connected with the PULSE output end, and the other end is connected with ground GND.
The MCU module adopts a 51 series singlechip or ARM series microcontroller chip and comprises an integrated circuit C8051F, capacitors CW16-CW18, resistors RW6 and RW7; wherein: the pins 26-19 of the integrated circuit C8051F are sequentially the ends of the data buses D0-D7, respectively connected with the corresponding ends of the data buses D0-D7 of the integrated circuit AD9851, the pins 15 and 16 of the integrated circuit C8051F are respectively the W_CLK end and the FQ_UD end, connected with the corresponding ends of the integrated circuit AD9851, the pin 17 of the integrated circuit C8051F is the RESET end, connected with the corresponding end of the integrated circuit AD9851, the two ends of the capacitor CW16 are respectively connected with the pins 3 and 4 of the integrated circuit C8051F, the pins 3 and 4 of the integrated circuit C8051F are respectively connected with the ground wire GND and the power supply VDD3V, one end of the resistor RW7 is connected with the power supply VDD3V, the other end of the resistor RW6 is connected with the pin 5 of the integrated circuit C8051F through the resistor RW6, one end of the capacitors CW17 and CW18 are connected in parallel, and the other end of the capacitors RW7 are connected with the ground wire GND.
The low-edge jitter pulse signal generator provided by the invention has the following advantages:
the invention utilizes the MCU module to control the DDS module to generate two paths of homologous and opposite sine wave signals, the hysteresis voltage comparator module compares the two paths of sine and opposite signals and then outputs pulse signals, the monostable trigger pulse width regulating circuit module can realize the output of pulse signals with adjustable pulse width, the signal frequency can be arbitrarily regulated within 20 KHz-200 KHz, the output frequency precision can reach 1/10000, the pulse width can be controlled at the level of several microseconds to tens of microseconds, the rising/falling edge of the output pulse is less than 5ns, and the pulse jitter (jitter) is controlled within 5 ns. The low-edge-jitter pulse signal generator provided by the invention can be used for more effectively reducing the pulse edge jitter, is beneficial to stabilizing the optical pulse output by the optical fiber pulse laser, and can be well applied to various optical fiber pulse lasers.
Drawings
Fig. 1 is a block diagram of a low-edge-jitter pulse signal generator according to the present invention.
Fig. 2 is a circuit diagram of a power supply module in the low-edge-jitter pulse signal generator according to the present invention.
Fig. 3 is a circuit diagram of a DDS module with a hysteresis voltage comparing module in the low-edge-jitter pulse signal generator according to the present invention.
Fig. 4 is a circuit diagram of a monostable trigger pulse width modulation circuit module in the low-edge-jitter pulse signal generator according to the present invention.
Fig. 5 is a circuit diagram of an MCU module in the low-edge-jitter pulse signal generator according to the present invention.
Detailed Description
The low edge jitter pulse signal generator provided by the invention is described in detail below with reference to the accompanying drawings and specific embodiments.
As shown in fig. 1, the low-edge-jitter pulse signal generator provided by the present invention includes: the device comprises a power supply module 1, a DDS module 2, a hysteresis voltage comparator module 3, a monostable trigger pulse width regulating circuit module 4 and an MCU module 5; wherein: the power supply module 1 is connected with the DDS module 2, the hysteresis voltage comparator module 3, the monostable trigger pulse width regulating circuit module 4 and the MCU module 5, the DDS module 2 is connected with the hysteresis voltage comparator module 3, the hysteresis voltage comparator module 3 is connected with the monostable trigger pulse width regulating circuit module 4, and the MCU module 5 is connected with the DDS module 2; the power supply module 1 is mainly used for power supply and power management of the DDS module 2, the monostable trigger pulse width regulating circuit module 4 and the MCU module 5; the DDS module 2 is used for generating two paths of sine wave signals with same phase inversion, and the hysteresis voltage comparator module 3 outputs pulse signals after comparing the two paths of sine wave signals with each other; the monostable trigger pulse width regulating circuit module 4 is used for regulating the output pulse width; the MCU module 5 is used for setting parameters of the DDS module 2 to generate two paths of homologous and opposite sine wave signals.
The power supply module 1 is a DC/DC integrated circuit module and mainly has the function of supplying power to the whole device to realize power supply management.
The DDS module 2 adopts an AD9851 chip or other direct digital frequency synthesis chips and is mainly used for generating a homologous opposite-phase two-path sine wave signal.
The hysteresis voltage comparator module 3 adopts an AD9851 chip and is internally provided with a hysteresis voltage comparator, and the hysteresis voltage comparator module is mainly used for comparing two paths of homologous and opposite sine wave signals and then outputting pulse signals.
The monostable triggering pulse width regulating circuit module 4 adopts an SN74LVC1G123 chip and is mainly used for regulating pulse signal widths under different repetition frequencies.
The MCU module 5 adopts 51 series single chip microcomputer or ARM (Advanced RISC Machine) series micro controller chip, and is mainly used for controlling the DDS module 2 to generate a homologous and opposite phase two paths of sine wave signals.
As shown in fig. 2, the power supply module 1 includes: integrated circuit LM22676, capacitors C21-C26, C30-C33, resistors R8-R10, diodes D3-D5, inductor L1, terminal JP1, integrated circuit LD1117-3.3V; wherein the 1 pin of the terminal JP1 is connected with an external power supply 24V and with the anode of the diode D3, the 2 pin of the terminal JP1 is connected with the ground GND, the cathode of the diode D3 is connected with the 7 pin of the integrated circuit LM22676, both ends of the capacitor C22 and the capacitor C23 are respectively connected with the cathode of the diode D3 and the ground GND, one end of the capacitor C24 is connected with the 5 pin of the integrated circuit LM22676, the other end is connected with the ground GND, the 7 pin of the integrated circuit LM22676 is connected with the cathode of the diode D3, the 6 pin is connected with the ground GND, one end of the resistor R8 is connected with the 4 pin of the integrated circuit LM22676, the other end is connected with the ground GND, one end of the resistor R9 is connected with the 4 pin of the integrated circuit LM22676, the other end is the power supply VDD5V, both ends of the capacitor C21 are respectively connected with the 1 pin and 8 pin of the integrated circuit LM22676, the cathode of the diode D5 is connected with the 8 pin of the integrated circuit LM22676, the anode is connected with the ground GND, one end of the inductor L1 is connected with 8 pins of the integrated circuit LM22676, the other end is connected with the power supply VDD5V, two ends of the capacitor C25 are respectively connected with the power supply VDD5V and the ground GND, the positive electrode of the capacitor C26 is connected with the power supply VDD5V, the negative electrode is connected with the ground GND, the anode of the diode D4 is connected with the power supply VDD5V, the cathode is connected with the ground GND through a resistor R10, one end of the capacitor C30 is connected with 3 pins of the integrated circuit LD1117-3.3V and is connected with the anode of the diode D4, the other end is connected with the ground GND, the positive electrode of the capacitor C31 is connected with 3 pins of the integrated circuit LD1117-3.3V, the negative electrode is connected with the GND ground GND, the positive electrode of the capacitor C32 is connected with 2 pins of the integrated circuit LD1117-3.3V, the negative electrode is connected with the GND ground GND, the 1 pin of the integrated circuit LD1117-3.3V is connected with the ground GND, one end of the capacitor C33 is connected with 2 pins of the integrated circuit LD1117-3.3V and is connected with the 3V, the other end is connected with the ground GND, and the 4 pin of the integrated circuit LD1117-3.3V is connected with the 2 pin of the integrated circuit LD 1117-3.3V.
The DDS module 2 and the hysteresis voltage comparator module 3 adopt DDS modules with hysteresis voltage comparison inside; as shown in fig. 3, the DDS module with hysteresis voltage comparison inside includes: integrated circuit AD9851, capacitors CW2, CW6, CW8-CW12, resistors RW1, RW3 and RW4; wherein: the capacitor CW2 has its both ends connected to the power supply VDD5V and the ground GND, the integrated circuit AD9851 has its 6 pin and 5 pin connected to the power supply VDD5V and the ground GND, the capacitor CW8 has its positive electrode connected to the power supply VDD5V and its negative electrode connected to the ground GND, the capacitor CW9 has its both ends connected to the power supply VDD5V and the ground, the integrated circuit AD9851 has its 11 pin and 10 pin connected to the power supply VDD5V and the ground GND, the integrated circuit AD9851 has its 23 pin and 24 pin connected to the power supply VDD5V and the ground GND, the integrated circuit AD9851 has its 18 pin and 19 pin connected to the power supply VDD5V and the ground GND, the capacitor CW11 is connected in parallel to the resistor RW3, and has its one end connected to the 20 pin of the integrated circuit AD9851 and its other end connected to the ground GND 4, and has its one end connected to the 21 pin of the integrated circuit AD9851 and the other end connected to the ground GND, the integrated circuit AD9851 has its 23 pin and 24 pin connected to the ground GND of the integrated circuit AD9851 has its 23 pin connected to the power supply VDD5V and its 18 pin and 19 pin connected to the ground GND 3, and its 18 pin connected to the power supply wire 3 is connected to the power supply VDD3, and its 3 is connected to the power supply wire 4.
As shown in fig. 4, the monostable trigger pulse width modulation circuit module 4 includes: integrated circuit SN74LVC1G123, capacitors CW13-CW15, resistors RW2, RW5, and variable resistor R1; wherein: the 1, 4 pin and the 8 pin of integrated circuit SN74LVC1G123 are connected with ground GND, the 3 pin and the 8 pin are connected with power VDD5V, the 2 pin is the PULSE end and is connected with 14 pin of integrated circuit AD9851, one end of capacitor CW14 is connected with power VDD5V, the other end is connected with ground GND, two ends of capacitor CW15 are respectively connected with 6 pin and 7 pin of integrated circuit SN74LVC1G123, one fixed end of variable resistor R1 is connected with 7 pin of integrated circuit SN74LVC1G123 through resistor RW5, the other fixed end and active end are connected with power VDD5V together, one end of resistor RW2 is connected with 5 pin of integrated circuit SN74LVC1G123, the other end is the PULSE output end, one end of capacitor CW13 is connected with the PULSE output end, and the other end is connected with ground GND.
As shown in fig. 5, the MCU module 5 includes: integrated circuit C8051F, capacitors CW16-CW18, resistors RW6, RW7; wherein: the pins 26-19 of the integrated circuit C8051F are sequentially the ends of the data buses D0-D7, respectively connected with the corresponding ends of the data buses D0-D7 of the integrated circuit AD9851, the pins 15 and 16 of the integrated circuit C8051F are respectively the W_CLK end and the FQ_UD end, connected with the corresponding ends of the integrated circuit AD9851, the pin 17 of the integrated circuit C8051F is the RESET end, connected with the corresponding end of the integrated circuit AD9851, the two ends of the capacitor CW16 are respectively connected with the pins 3 and 4 of the integrated circuit C8051F, the pins 3 and 4 of the integrated circuit C8051F are respectively connected with the ground wire GND and the power supply VDD3V, one end of the resistor RW7 is connected with the power supply VDD3V, the other end of the resistor RW6 is connected with the pin 5 of the integrated circuit C8051F through the resistor RW6, one end of the capacitors CW17 and CW18 are connected in parallel, and the other end of the capacitors RW7 are connected with the ground wire GND.
The low-edge-jitter pulse signal generator provided by the invention can effectively control the pulse edge jitter, thereby being beneficial to enhancing the stability of the optical pulse output by the optical fiber pulse laser.
The foregoing is merely a specific embodiment of the present invention and is not intended to limit the present invention. The scope of the present invention is not limited thereto, and any changes, modifications, additions or substitutions and any application extension made by those skilled in the art based on the device according to the present invention should be construed as falling within the scope of the present invention as defined in the appended claims.
Claims (3)
1. A low edge jitter pulse signal generator characterized by: the low-edge-jitter pulse signal generator includes: the device comprises a power supply module (1), a DDS module (2), a hysteresis voltage comparator module (3), a monostable trigger pulse width regulating circuit module (4) and an MCU module (5); wherein: the power supply module (1) is connected with the DDS module (2), the hysteresis voltage comparator module (3), the monostable trigger pulse width regulating circuit module (4) and the MCU module (5), the DDS module (2) is connected with the hysteresis voltage comparator module (3), the hysteresis voltage comparator module (3) is connected with the monostable trigger pulse width regulating circuit module (4), and the MCU module (5) is connected with the DDS module (2).
The DDS module (2) and the hysteresis voltage comparator module (3) adopt DDS modules with hysteresis voltage comparison inside; the DDS module with hysteresis voltage comparison inside comprises: integrated circuit AD9851, capacitors CW2, CW6, CW8-CW12, resistors RW1, RW3 and RW4; wherein: two ends of a capacitor CW2 are respectively connected with a power supply VDD5V and a ground GND, 6 pins and 5 pins of an integrated circuit AD9851 are respectively connected with the power supply VDD5V and the ground GND, an anode of the capacitor CW8 is connected with the power supply VDD5V, a cathode of the capacitor CW9 is connected with the ground GND, two ends of the capacitor CW9 are respectively connected with the power supply VDD5V and the ground, 11 pins and 10 pins of the integrated circuit AD9851 are respectively connected with the power supply VDD5V and the ground GND, two ends of the capacitor CW6 are respectively connected with the power supply VDD5V and the ground GND, 23 pins and 24 pins of the integrated circuit AD9851 are respectively connected with the power supply VDD5V and the ground GND, two ends of a capacitor CW10 are respectively connected with a power supply VDD5V and a ground GND, 18 pins and 19 pins of an integrated circuit AD9851 are respectively connected with the power supply VDD5V and the ground GND, one end of the capacitor CW11 is connected with 20 pins of the integrated circuit AD9851 after being connected with a resistor RW3 in parallel, the other end of the capacitor CW is connected with the ground GND, one end of the capacitor CW12 is connected with 21 pins of the integrated circuit AD9851 after being connected with a resistor RW4 in parallel, the other end of the capacitor CW is connected with the ground GND, 1-4 pins of the integrated circuit AD9851 are sequentially data buses D3-D0, 25-28 pins are sequentially data buses D7-D4, 7 pins of the integrated circuit AD9851 are a W_CLK end, 8 pins are FQ_UD end, 9 pins are an R_CLK end and are used for being connected with an external crystal oscillator, 14 pins are a PULSE end and 22 pins are RESET end;
the monostable triggering pulse width regulating circuit module (4) adopts an SN74LVC1G123 chip and comprises an integrated circuit SN74LVC1G123, capacitors CW13-CW15, resistors RW2 and RW5 and a variable resistor R1; wherein: the 1, 4 pin and the 8 pin of integrated circuit SN74LVC1G123 are connected with ground GND, the 3 pin and the 8 pin are connected with power VDD5V, the 2 pin is the PULSE end and is connected with 14 pin of integrated circuit AD9851, one end of capacitor CW14 is connected with power VDD5V, the other end is connected with ground GND, two ends of capacitor CW15 are respectively connected with 6 pin and 7 pin of integrated circuit SN74LVC1G123, one fixed end of variable resistor R1 is connected with 7 pin of integrated circuit SN74LVC1G123 through resistor RW5, the other fixed end and active end are connected with power VDD5V together, one end of resistor RW2 is connected with 5 pin of integrated circuit SN74LVC1G123, the other end is the PULSE output end, one end of capacitor CW13 is connected with the PULSE output end, and the other end is connected with ground GND.
2. The low edge-jitter pulse signal generator of claim 1 wherein: the power supply module (1) is a DC/DC integrated circuit module and comprises an integrated circuit LM22676, capacitors C21-C26, C30-C33, resistors R8-R10, diodes D3-D5, an inductor L1, a terminal JP1 and an integrated circuit LD1117-3.3V; wherein the 1 pin of the terminal JP1 is connected with an external power supply 24V and with the anode of the diode D3, the 2 pin of the terminal JP1 is connected with the ground GND, the cathode of the diode D3 is connected with the 7 pin of the integrated circuit LM22676, both ends of the capacitor C22 and the capacitor C23 are respectively connected with the cathode of the diode D3 and the ground GND, one end of the capacitor C24 is connected with the 5 pin of the integrated circuit LM22676, the other end is connected with the ground GND, the 7 pin of the integrated circuit LM22676 is connected with the cathode of the diode D3, the 6 pin is connected with the ground GND, one end of the resistor R8 is connected with the 4 pin of the integrated circuit LM22676, the other end is connected with the ground GND, one end of the resistor R9 is connected with the 4 pin of the integrated circuit LM22676, the other end is the power supply VDD5V, both ends of the capacitor C21 are respectively connected with the 1 pin and 8 pin of the integrated circuit LM22676, the cathode of the diode D5 is connected with the 8 pin of the integrated circuit LM22676, the anode is connected with the ground GND, one end of the inductor L1 is connected with 8 pins of the integrated circuit LM22676, the other end is connected with the power supply VDD5V, two ends of the capacitor C25 are respectively connected with the power supply VDD5V and the ground GND, the positive electrode of the capacitor C26 is connected with the power supply VDD5V, the negative electrode is connected with the ground GND, the anode of the diode D4 is connected with the power supply VDD5V, the cathode is connected with the ground GND through a resistor R10, one end of the capacitor C30 is connected with 3 pins of the integrated circuit LD1117-3.3V and is connected with the anode of the diode D4, the other end is connected with the ground GND, the positive electrode of the capacitor C31 is connected with 3 pins of the integrated circuit LD1117-3.3V, the negative electrode is connected with the GND ground GND, the positive electrode of the capacitor C32 is connected with 2 pins of the integrated circuit LD1117-3.3V, the negative electrode is connected with the GND ground GND, the 1 pin of the integrated circuit LD1117-3.3V is connected with the ground GND, one end of the capacitor C33 is connected with 2 pins of the integrated circuit LD1117-3.3V and is connected with the 3V, the other end is connected with the ground GND, and the 4 pin of the integrated circuit LD1117-3.3V is connected with the 2 pin of the integrated circuit LD 1117-3.3V.
3. The low edge-jitter pulse signal generator of claim 1 wherein: the MCU module (5) adopts a 51 series singlechip or ARM series microcontroller chip and comprises an integrated circuit C8051F, capacitors CW16-CW18, resistors RW6 and RW7; wherein: the pins 26-19 of the integrated circuit C8051F are sequentially the ends of the data buses D0-D7, respectively connected with the corresponding ends of the data buses D0-D7 of the integrated circuit AD9851, the pins 15 and 16 of the integrated circuit C8051F are respectively the W_CLK end and the FQ_UD end, connected with the corresponding ends of the integrated circuit AD9851, the pin 17 of the integrated circuit C8051F is the RESET end, connected with the corresponding end of the integrated circuit AD9851, the two ends of the capacitor CW16 are respectively connected with the pins 3 and 4 of the integrated circuit C8051F, the pins 3 and 4 of the integrated circuit C8051F are respectively connected with the ground wire GND and the power supply VDD3V, one end of the resistor RW7 is connected with the power supply VDD3V, the other end of the resistor RW6 is connected with the pin 5 of the integrated circuit C8051F through the resistor RW6, one end of the capacitors CW17 and CW18 are connected in parallel, and the other end of the capacitors RW7 are connected with the ground wire GND.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910837683.9A CN110600981B (en) | 2019-09-05 | 2019-09-05 | Low-edge-jitter pulse signal generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910837683.9A CN110600981B (en) | 2019-09-05 | 2019-09-05 | Low-edge-jitter pulse signal generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110600981A CN110600981A (en) | 2019-12-20 |
| CN110600981B true CN110600981B (en) | 2024-03-22 |
Family
ID=68857802
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910837683.9A Active CN110600981B (en) | 2019-09-05 | 2019-09-05 | Low-edge-jitter pulse signal generator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110600981B (en) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2496274A1 (en) * | 1980-12-12 | 1982-06-18 | Trt Telecom Radio Electr | FREQUENCY-MODIFIED MAIN-WAVE RADAR DISTANCE DISTANCE MEASURING METHOD, APPARATUS FOR IMPLEMENTING THE METHOD, AND APPLICATION TO THE ACCURATE DETERMINATION OF THE LIQUID LEVEL IN A RESERVOIR |
| CN104836578A (en) * | 2015-05-22 | 2015-08-12 | 成都西蒙电子技术有限公司 | Device and method for improving long-term stability of crystal oscillator |
| CN105467183A (en) * | 2014-08-31 | 2016-04-06 | 由国峰 | Digital multifunctional meter |
| CN105897171A (en) * | 2016-04-05 | 2016-08-24 | 西北工业大学 | Wide-band excitation signal generator |
| CN107706737A (en) * | 2017-09-18 | 2018-02-16 | 华东师范大学 | A kind of accurate adjustable pulse generating circuit of frequency for semiconductor laser |
| CN107834354A (en) * | 2017-10-26 | 2018-03-23 | 山东海富光子科技股份有限公司 | A kind of signal generator applied to high-peak power laser |
| CN108011293A (en) * | 2017-12-16 | 2018-05-08 | 南京理工大学 | A kind of burst pulse infrared semiconductor laser radiating circuit |
| CN208848069U (en) * | 2018-10-24 | 2019-05-10 | 西安华信铁路技术有限公司 | A kind of high-voltage pulse signal generating device control circuit |
| CN210326473U (en) * | 2019-09-05 | 2020-04-14 | 山东海富光子科技股份有限公司 | Low-edge jitter pulse signal generator |
-
2019
- 2019-09-05 CN CN201910837683.9A patent/CN110600981B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2496274A1 (en) * | 1980-12-12 | 1982-06-18 | Trt Telecom Radio Electr | FREQUENCY-MODIFIED MAIN-WAVE RADAR DISTANCE DISTANCE MEASURING METHOD, APPARATUS FOR IMPLEMENTING THE METHOD, AND APPLICATION TO THE ACCURATE DETERMINATION OF THE LIQUID LEVEL IN A RESERVOIR |
| CN105467183A (en) * | 2014-08-31 | 2016-04-06 | 由国峰 | Digital multifunctional meter |
| CN104836578A (en) * | 2015-05-22 | 2015-08-12 | 成都西蒙电子技术有限公司 | Device and method for improving long-term stability of crystal oscillator |
| WO2016188008A1 (en) * | 2015-05-22 | 2016-12-01 | 成都西蒙电子技术有限公司 | Apparatus and method for improving long term stability of crystal oscillator |
| CN105897171A (en) * | 2016-04-05 | 2016-08-24 | 西北工业大学 | Wide-band excitation signal generator |
| CN107706737A (en) * | 2017-09-18 | 2018-02-16 | 华东师范大学 | A kind of accurate adjustable pulse generating circuit of frequency for semiconductor laser |
| CN107834354A (en) * | 2017-10-26 | 2018-03-23 | 山东海富光子科技股份有限公司 | A kind of signal generator applied to high-peak power laser |
| CN108011293A (en) * | 2017-12-16 | 2018-05-08 | 南京理工大学 | A kind of burst pulse infrared semiconductor laser radiating circuit |
| CN208848069U (en) * | 2018-10-24 | 2019-05-10 | 西安华信铁路技术有限公司 | A kind of high-voltage pulse signal generating device control circuit |
| CN210326473U (en) * | 2019-09-05 | 2020-04-14 | 山东海富光子科技股份有限公司 | Low-edge jitter pulse signal generator |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110600981A (en) | 2019-12-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA2113846A1 (en) | Active Energy Control for Diode Pumped Laser Systems Using Pulsewidth Modulation | |
| JP6961583B2 (en) | Control method of pulse laser device, processing device and pulse laser device | |
| CN109378706B (en) | Semiconductor laser high peak power energy supply constant current pulse driving power supply | |
| CN210326473U (en) | Low-edge jitter pulse signal generator | |
| CN110600981B (en) | Low-edge-jitter pulse signal generator | |
| US11294256B2 (en) | Method and system for controlling optical frequency comb | |
| CN107706737B (en) | A kind of accurate adjustable pulse generating circuit of frequency for semiconductor laser | |
| US5065401A (en) | Pulse jitter reduction method for a laser diode or array | |
| CN117374725A (en) | Burst mode laser drive control circuit and method | |
| TWI744619B (en) | Laser processing machine and its power supply device | |
| CN112332637A (en) | Adjustable PWM drive control circuit | |
| WO1997031411A1 (en) | Stabilisation of a pulsed laser | |
| US6633203B1 (en) | Method and apparatus for a gated oscillator in digital circuits | |
| CN211127776U (en) | High-speed pulse output circuit based on ARM | |
| CN113300208B (en) | Laser output device and laser device | |
| CN210377834U (en) | Infrared emission carrier modulation circuit | |
| CN220915169U (en) | Multipath output switching power supply adopting auxiliary circuit linear voltage stabilizing technology | |
| CN111431510B (en) | Pulse signal generating circuit and electronic equipment | |
| CN214256132U (en) | Q-switched fiber laser power supply circuit with low-temperature protection function | |
| CN109309487A (en) | A kind of signal spread spectrum control method and system | |
| CN113014231B (en) | Three-pair parameter-adjustable controllable photoelectric delay positive feedback laser broadband signal double generator | |
| KR100688255B1 (en) | A PWM control circuit having multi-point feedback | |
| CN210807074U (en) | Voltage regulating circuit of photoelectric detector | |
| TWI726460B (en) | Method of controlling resolution of digital pulse width modulation | |
| JP5320616B2 (en) | Laser and method of generating pulsed laser radiation |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |