CN110600609B - A kind of memristive memory and preparation method thereof - Google Patents

Abstract

The invention relates to a memristor memory, which comprises a silicon substrate, an insulating layer, a bottom electrode, a functional layer and a top electrode arranged sequentially in layers, the main material of the functional layer is SnO ₂ or ZnO or TiO ₂ , and the functional layer The material is also doped with Bi. The present invention also provides the preparation method of the above-mentioned memristor memory. The method of magnetron sputtering or atomic deposition is used to sequentially prepare an insulating layer, a bottom electrode, a functional layer and a top electrode on a silicon substrate to obtain the memristor memory of the present invention. blocking memory. The invention has the advantages of non-volatile storage, low operating voltage, fast writing speed, simple structure, high consistency, microwatt (μW) level operating power, and the like.

Description

A kind of memristive memory and preparation method thereof

technical field

The invention relates to the technical field of underwater acoustic engineering, in particular to a memristor memory and a preparation method thereof.

Background technique

With the advent of the era of 5G, big data and artificial intelligence, complex computing tasks and changing application scenarios have put forward higher throughput and lower power consumption requirements for computer performance. Under the traditional Von Neumann computing architecture, the computing and storage units are separated. When dealing with large data transfer tasks, frequent data transmission and handling consume a lot of time and energy, resulting in problems such as strong storage and power consumption of the traditional computing architecture. Therefore, it is necessary to We explore new computing architectures. Storage-computing integrated computing is a new computing architecture based on a new type of non-volatile memristive memory device. It does not require data movement and can directly complete local computing at the location where information is stored. The new logic architecture can solve the bottleneck problem of data transmission blocking through the integrated path of device-level storage and computing, breaking through the limitations of the von Neumann architecture in the existing logic system. Memristor memory is based on the integrated function of storage and calculation of analog resistive devices, which can complete calculations at the same time in the storage position. It is very suitable for efficient and parallel big data calculation and storage, showing huge advantages in energy efficiency ratio and hardware overhead.

The current memristor memory is composed of a lower electrode, a functional layer and a top electrode, which constitute a simple laminated structure. Among the many functional dielectric materials, binary oxides have the most types and relatively better performance. Compared with other materials , Binary oxides also have the advantages of simple structure, easy control of material components, and compatibility of preparation process and semiconductor process. Reduce the erasing voltage, writing voltage, operating current and other performances in the resistance conversion process by replacing the electrode material and functional layer material, preparing a double-layer functional layer, and reducing the current and voltage parameters in the formation process of conductive filaments and the erasing process. indicators to prepare memristive memory devices with lower power consumption. Since doping affects the type, concentration and distribution of carriers in semiconductors, doping with suitable elements can reduce performance indicators such as erasing voltage and operating current during resistance switching, thereby reducing power consumption.

Tin oxide (SnO ₂ ), as a binary oxide semiconductor, has important applications in transparent conductive electrodes and gas sensors, but its application in memristive memory is seldom. The memristive memory with pure tin oxide film as the resistive variable layer usually exhibits problems such as unstable erase and write voltage, high erase and write voltage, and high operating current, etc., and memory performance declines. These problems of tin oxide can be solved by doping with appropriate elements. So far, several doping elements, such as iron, nitrogen, and manganese, have been reported to improve the performance of SnO-based memristive memories. Although the performance has been improved compared with intrinsic tin oxide-based memristors, there are still disadvantages such as poor consistency, high operating current, and high power consumption.

Contents of the invention

Aiming at the technical problems existing in the prior art, the present invention provides a memristor memory and a preparation method thereof, which have the advantages of non-volatile storage, low operating voltage, fast writing speed, simple structure, high consistency, microwatt (μW) Level of operating power and other advantages.

The technical solution of the present invention to solve the above-mentioned technical problems is as follows: a memristive memory, comprising a silicon substrate, an insulating layer, a bottom electrode, a functional layer and a top electrode arranged in layers in sequence, and the main material of the functional layer is _SnO2 or ZnO or TiO ₂ , the material of the functional layer is also doped with Bi.

On the basis of the above technical solutions, the present invention can also be improved as follows.

Further, the doping content of Bi is 2.3-10%.

Preferably, the thickness of the functional layer is 10-50 nm.

Further, the material of the bottom electrode is one of TiN, FTO and ZTO.

Preferably, the bottom electrode is made of TiN with a thickness of 50-300 nm.

Further, the material of the top electrode is one of ITO, FTO, ZTO and TiN.

Preferably, the material of the top electrode is ITO with a thickness of 100-300 nm.

Further, the thickness of the insulating layer is 100-200 nm. The material of the insulating layer is preferably SiO ₂ .

The present invention also provides a technical solution for the preparation method of the above-mentioned memristive memory, comprising the following steps:

1) cleaning the silicon substrate;

2) placing the target material as the insulating layer on the target platform, and preparing the insulating layer on the silicon substrate by magnetron sputtering or atomic layer deposition;

3) placing the target material as the bottom electrode on the target platform, and preparing the bottom electrode on the insulating layer (2) prepared in step 2) by magnetron sputtering or atomic layer deposition;

4) Put the target material as the main material of the functional layer on the target stage, and simultaneously place the doped Bi target material on the target stage, and use magnetron sputtering or atomic layer deposition on the bottom electrode prepared in step 2) The functional layer is prepared by the method, and the Bi target material and the target material of the main material are sputtered or deposited at the same time with different power ratios, and the doping content of Bi is controlled by using different ratios of sputtering or deposition power;

5) Put the target material as the top electrode on the target stage, and prepare the top electrode on the functional layer prepared in step 4) by magnetron sputtering or atomic layer deposition, and obtain the memristive memory after preparation.

On the basis of the above technical solutions, the present invention can also be improved as follows.

Further, in the step 2) to step 5), the method of magnetron sputtering is adopted.

Further, in the steps 2) to 5), the vacuum degree of the magnetron sputtering is less than 5×10-4Pa; in the steps 2) to 5), the working pressure of the magnetron sputtering is 0.1-0.3Pa.

Further, the sputtering power of the step 2) is 30-100W, the sputtering power of the step 3) is 50-100W, and the sputtering power of the step 5) is 40-60W.

Further, in step 4) the doping content of Bi is 2.3-10%, the sputtering power of the target material of the main material is 100W, and the sputtering power of the Bi target material is 5-9W.

The beneficial effects of the present invention are: the present invention provides a memristive memory in which bismuth (Bi) element is doped into tin oxide (SnO ₂ ) or zinc oxide (ZnO) or titanium oxide (TiO ₂ ) as a functional layer and its preparation method (the technical effect of using ZnO and TiO ₂ is basically the same as that of SnO ₂ ), among many oxide memristors, bismuth-doped tin oxide-based memristors not only have non-volatile storage, fast writing speed, and structural Simple, simple preparation method, low cost and other advantages, the present invention also has sufficient storage window, high consistency, lower operating voltage about operating current and lower operating power, so bismuth doped tin oxide is a very Semiconductor materials with development potential and research value.

The operating current of oxide memristive memory devices reported so far is generally high, and the operating power consumption is generally high. With the continuous improvement of chip integration, Joule heat generated by excessive power consumption will cause a significant temperature rise per unit volume of the device. , thus destroying the stability of device performance and affecting its service life. Therefore, reducing device power consumption is still one of the important contents of memristive memory research.

Description of drawings

Accompanying drawing 1 is the structural representation of the embodiment of the present invention;

Accompanying drawing 2 is a scanning electron microscope (SEM) sectional view of the thin film of the present invention;

Accompanying drawing 3 is the characteristic peak of oxygen element, tin element, bismuth element and the atomic ratio figure of each element of thin film of the present invention;

Accompanying drawing 4 is the comparative figure of the memristive device electric current-voltage (I-V) curve of embodiment 1, embodiment 5 and embodiment 3 of the present invention;

Accompanying drawing 5 is the distribution diagram of the high and low resistance states of the memristive device obtained in Embodiments 1 and 3;

In the accompanying drawings, the list of parts represented by each label is as follows:

1. Silicon substrate, 2. Insulating layer, 3. Bottom electrode, 4. Functional layer, 5. Top electrode.

Detailed ways

The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

The present invention designs a low-power memristive memory, which is mainly composed of a silicon substrate 1, an insulating layer 2, a bottom electrode 3, a functional layer 4 and a top electrode 5 arranged sequentially in layers. The main material of the functional layer 4 is a conductive metal compound such as SnO ₂ or ZnO or TiO ₂ , and the material of the functional layer 4 is also doped with Bi. Because the applicant has obtained through tests, the technical effect of using Bi-doped ZnO and _TiO2 as the functional layer 4 is basically the same as that of Bi-doped _SnO2 , so in the specific implementation mode, Bi-doped _SnO2 is used as the functional layer 4 for specific implementation. describe.

In order to further improve the performance of low power consumption, the present invention can be further improved as follows.

Further, the doping content of Bi is 2.3-10%. The applicant has conducted research and experiments on the doping content of Bi, and finally concluded that under the above doping content, the power consumption of the memristive memory can be kept at a low level, and the performance is relatively stable. Concrete test and result see embodiment.

Preferably, the thickness of the functional layer is 10-50 nm.

Further, the material of the bottom electrode is one of TiN, FTO and ZTO.

Preferably, the bottom electrode is made of TiN with a thickness of 50-300 nm.

Further, the material of the top electrode is one of ITO, FTO, ZTO and TiN.

Preferably, the material of the top electrode is ITO with a thickness of 100-300 nm.

Further, the thickness of the insulating layer is 100-200 nm. The material of the insulating layer is preferably SiO ₂ .

Thin film characterization and device testing of the present invention:

The prepared bismuth-doped tin oxide thin film was analyzed by scanning electron microscope (SEM), and the specific results are shown in FIG. 2 . The instrument used is JSM-7100F, and the surface morphology is characterized at a voltage of 15kV.

The prepared bismuth-doped tin oxide thin films were tested for elemental composition by X-ray photoelectron spectroscopy. The specific results are shown in Figure 3.

The memristive memory of the present invention can be prepared by the following method, including the following steps:

1) cleaning the silicon substrate 1;

2) placing the target material as the insulating layer 2 on the target stage, and preparing the insulating layer 2 on the silicon substrate 1 by magnetron sputtering or atomic layer deposition;

3) placing the target material as the bottom electrode 3 on the target stage, and preparing the bottom electrode 3 on the insulating layer 2 prepared in step 2) by magnetron sputtering or atomic layer deposition;

4) Put the target material as the main material of the functional layer 4 on the target stage, and simultaneously place the doped Bi target material on the target stage, and use magnetron sputtering or atomic sputtering on the bottom electrode 3 prepared in step 2). The functional layer 4 is prepared by the method of layer deposition, and the Bi target material and the target material of the main material are sputtered or deposited at the same time with different power ratios, and the doping content of Bi is controlled by using different ratios of sputtering or deposition power;

5) Put the target material as the top electrode 5 on the target platform, and prepare the top electrode 5 on the functional layer 4 prepared in step 4) by magnetron sputtering or atomic layer deposition, and obtain the memristive memory after preparation.

In order to improve the accuracy of control and save costs, the preparation method of the present invention can be improved as follows.

Further, in the step 2) to step 5), the method of magnetron sputtering is adopted.

Further, in the steps 2) to 5), the vacuum degree of the magnetron sputtering is less than 5×10-4Pa; in the steps 2) to 5), the working pressure of the magnetron sputtering is 0.1-0.3Pa.

Further, the sputtering power of the step 2) is 30-100W, the sputtering power of the step 3) is 50-100W, and the sputtering power of the step 5) is 40-60W.

Further, in step 4) the doping content of Bi is 2.3-10%, the sputtering power of the target material of the main material is 100W, and the sputtering power of the Bi target material is 5-9W.

Embodiment one

A low-power memristive device, which is mainly composed of a silicon substrate 1, an insulating layer 2, a bottom electrode 3, a functional layer 4 and a top electrode 5, wherein the material of the insulating layer 2 is silicon oxide (SiO ₂ ), and the bottom electrode The material of the electrode 3 is titanium nitride (TiN), the material of the functional layer 4 is tin oxide (SnO ₂ ), and the material of the top electrode 5 is indium tin oxide (ITO).

Step 1. Clean the silicon substrate 1

Put the silicon wafer into an ultrasonic instrument, and use deionized water, acetone, and absolute ethanol to sonicate for 15 minutes respectively to obtain a cleaned silicon substrate 1;

Step 2. Preparation of insulating layer 2

A layer of silicon oxide insulating layer 2 is prepared on the silicon substrate 1 by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the radio frequency sputtering power is 60W , the flow rate of argon gas was 30 sccm, the time was 35 min, and the thickness was 180 nm.

Step 3. Preparation of Bottom Electrode 3

A layer of titanium nitride bottom electrode 3 is prepared by magnetron sputtering method on _SiO2 substrate, magnetron sputtering vacuum degree is less than 5x10-4Pa, substrate temperature is room temperature, working pressure is 0.3Pa, DC sputtering power is 80W, the flow rate of argon gas is 30sccm, the time is 25min, and the thickness is 160nm.

Step 4. Preparation of functional layer 4

Place the prepared bottom electrode 3 in the magnetron sputtering apparatus, place the tin oxide target as the functional layer 4 on the radio frequency sputtering target table, the magnetron sputtering vacuum degree is less than 5x10-4Pa, and the substrate temperature is room temperature , the working pressure is 0.3Pa, the radio frequency sputtering power is 100W, the flow rate of argon gas is 30sccm, the time is 1.5min, and the thickness is 20nm, and the functional layer 4 is prepared.

Step 5. Preparation of the top electrode 5

Prepare the non-hafnium-doped indium tin oxide top electrode 5 with a magnetron sputtering apparatus. The indium tin oxide target is placed in the radio frequency sputtering target position and sputtered. The vacuum degree of the magnetron sputtering is less than 5x10-4Pa, and the substrate temperature is room temperature. 1. The working pressure is 0.3Pa, the sputtering power of indium tin oxide is 50W, the flow rate of argon gas is 30sccm, the time is 40min, and the thickness is 200nm.

Embodiment two

A low-power memristive device, which is mainly composed of a silicon substrate 1, an insulating layer 2, a bottom electrode 3, a functional layer 4 and a top electrode 5, wherein the material of the insulating layer 2 is silicon oxide (SiO ₂ ), and the bottom electrode The material of electrode 3 is titanium nitride (TiN), the material of functional layer 4 is bismuth-doped tin oxide (Bi:SnO ₂ ) with a thickness of 20nm, and the material of top electrode 5 is indium tin oxide (ITO) with a thickness of 200nm.

Step 1. Clean the silicon substrate 1

The silicon wafer was placed in an ultrasonic instrument, and deionized water, acetone, and absolute ethanol were respectively ultrasonicated for 15 minutes to obtain a cleaned silicon substrate 1 .

Step 2. Preparation of insulating layer 2

A layer of silicon oxide insulating layer 2 is prepared on the silicon substrate 1 by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the radio frequency sputtering power is 60W , the flow rate of argon gas was 30 sccm, the time was 35 min, and the thickness was 180 nm.

Step 3. Preparation of Bottom Electrode 3

On the silicon oxide insulating layer 2, a layer of titanium nitride bottom electrode 3 is prepared by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the DC sputtering power The power is 80W, the flow rate of argon gas is 30sccm, the time is 25min, and the thickness is 160nm.

Step 4. Preparation of functional layer 4

Place the prepared bottom electrode 3 in the magnetron sputtering apparatus, place the bismuth and tin oxide targets in the DC and RF sputtering target positions respectively and sputter simultaneously, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate The bottom temperature is room temperature, the working pressure is 0.3Pa, the sputtering power of bismuth is 5W, the sputtering power of tin oxide is 100W, the flow rate of argon gas is 30sccm, the time is 1.4min, the thickness is 20nm, and the content of bismuth is about 2.3%, the functional layer 4 was prepared.

Step 5. Preparation of the top electrode 5

Prepare the non-hafnium-doped indium tin oxide top electrode 5 with a magnetron sputtering apparatus. The indium tin oxide target is placed in the radio frequency sputtering target position and sputtered. The vacuum degree of the magnetron sputtering is less than 5x10-4Pa, and the substrate temperature is room temperature. 1. The working pressure is 0.3Pa, the sputtering power of indium tin oxide is 50W, the flow rate of argon gas is 30sccm, the time is 40min, and the thickness is 200nm.

Embodiment three

A low-power memristive device, which is mainly composed of a silicon substrate 1, an insulating layer 2, a bottom electrode 3, a functional layer 4 and a top electrode 5, wherein the material of the insulating layer 2 is silicon oxide (SiO ₂ ), and the bottom electrode The material of electrode 3 is titanium nitride (TiN), the material of functional layer 4 is bismuth-doped tin oxide (Bi:SnO ₂ ) with a thickness of 20nm, and the material of top electrode 5 is indium tin oxide (ITO) with a thickness of 200nm.

Step 1. Clean the silicon substrate 1

The silicon wafer was placed in an ultrasonic instrument, and deionized water, acetone, and absolute ethanol were respectively ultrasonicated for 15 minutes to obtain a cleaned silicon substrate 1 .

Step 2. Preparation of insulating layer 2

A layer of silicon oxide insulating layer 2 is prepared on the silicon substrate 1 by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the radio frequency sputtering power is 60W , the flow rate of argon gas was 30 sccm, the time was 35 min, and the thickness was 180 nm.

Step 3. Preparation of Bottom Electrode 3

A layer of titanium nitride bottom electrode 3 is prepared on the insulating layer 2 by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the DC sputtering power is 80W , the flow rate of argon gas was 30 sccm, the time was 25 min, and the thickness was 160 nm.

Step 4. Preparation of functional layer 4

The prepared bottom electrode 3 is placed in a magnetron sputtering apparatus, the bismuth and tin oxide targets are respectively placed in the DC and RF sputtering target positions and sputtered simultaneously, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate The temperature is room temperature, the working pressure is 0.3Pa, the sputtering power of bismuth is 6W, the sputtering power of tin oxide is 100W, the flow rate of argon gas is 30sccm, the time is 1.3min, the thickness is 20nm, and the content of bismuth is about 4.8%, the functional layer 4 was prepared.

Step 5. Preparation of the top electrode 5

Prepare the non-hafnium-doped indium tin oxide top electrode 5 with a magnetron sputtering apparatus. The indium tin oxide target is placed in the radio frequency sputtering target position and sputtered. The vacuum degree of the magnetron sputtering is less than 5x10-4Pa, and the substrate temperature is room temperature. 1. The working pressure is 0.3Pa, the sputtering power of indium tin oxide is 50W, the flow rate of argon gas is 30sccm, the time is 40min, and the thickness is 200nm. The as-prepared bismuth-doped tin oxide films were analyzed by scanning electron microscopy (SEM). The instrument used in the scanning electron microscope (SEM) is JSM-7100F, and the surface morphology is characterized at a voltage of 15kV. Accompanying drawing 2 is a scanning electron microscope (SEM) cross-sectional view of the device of this embodiment. The prepared bismuth-doped tin oxide thin films were tested for elemental composition by X-ray photoelectron spectroscopy. Figure 3 shows the characteristic peaks of Bi, Sn and O elements in this embodiment, and the atomic ratios are 4.8%, 26.6% and 68.6% respectively.

Embodiment Four

A low-power memristive device, which is mainly composed of a silicon substrate 1, an insulating layer 2, a bottom electrode 3, a functional layer 4 and a top electrode 5, wherein the material of the insulating layer 2 is silicon oxide (SiO ₂ ), and the bottom electrode The material of electrode 3 is titanium nitride (TiN), the material of functional layer 4 is bismuth-doped tin oxide (Bi:SnO ₂ ) with a thickness of 20nm, and the material of top electrode 5 is indium tin oxide (ITO) with a thickness of 200nm.

Step 1. Clean the silicon substrate 1

The silicon wafer was placed in an ultrasonic instrument, and deionized water, acetone, and absolute ethanol were respectively ultrasonicated for 15 minutes to obtain a cleaned silicon substrate 1 .

Step 2. Preparation of insulating layer 2

A layer of silicon oxide insulating layer 2 is prepared on the silicon substrate 1 by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the radio frequency sputtering power is 60W , the flow rate of argon gas was 30 sccm, the time was 35 min, and the thickness was 180 nm.

Step 3. Preparation of Bottom Electrode 3

A layer of titanium nitride bottom electrode 3 is prepared on the insulating layer 2 by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the DC sputtering power is 80W , the flow rate of argon gas was 30 sccm, the time was 25 min, and the thickness was 160 nm.

Step 4. Preparation of functional layer 4

The prepared bottom electrode 3 is placed in a magnetron sputtering apparatus, the bismuth and tin oxide targets are respectively placed in the DC and RF sputtering target positions and sputtered simultaneously, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate The temperature is room temperature, the working pressure is 0.3Pa, the sputtering power of bismuth is 8W, the sputtering power of tin oxide is 100W, the flow rate of argon gas is 30sccm, the time is 1.1min, the thickness is 20nm, and the content of bismuth element is about 8.5%, the functional layer 4 was prepared.

Step 5. Preparation of the top electrode 5

Prepare the non-hafnium-doped indium tin oxide top electrode 5 with a magnetron sputtering apparatus. The indium tin oxide target is placed in the radio frequency sputtering target position and sputtered. The vacuum degree of the magnetron sputtering is less than 5x10-4Pa, and the substrate temperature is room temperature. 1. The working pressure is 0.3Pa, the sputtering power of indium tin oxide is 50W, the flow rate of argon gas is 30sccm, the time is 40min, and the thickness is 200nm.

Embodiment five

A low-power memristive device, which is mainly composed of a silicon substrate 1, an insulating layer 2, a bottom electrode 3, a functional layer 4 and a top electrode 5, wherein the material of the insulating layer 2 is silicon oxide (SiO ₂ ), and the bottom electrode The material of electrode 3 is titanium nitride (TiN), the material of functional layer 4 is bismuth-doped tin oxide (Bi:SnO ₂ ) with a thickness of 20nm, and the material of top electrode 5 is indium tin oxide (ITO) with a thickness of 200nm.

Step 1. Clean the silicon substrate 1

The silicon wafer was placed in an ultrasonic instrument, and deionized water, acetone, and absolute ethanol were respectively ultrasonicated for 15 minutes to obtain a cleaned silicon substrate 1 .

Step 2. Preparation of insulating layer 2

A layer of silicon oxide insulating layer 2 is prepared on the silicon substrate 1 by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the radio frequency sputtering power is 60W , the flow rate of argon gas was 30 sccm, the time was 35 min, and the thickness was 180 nm.

Step 3. Preparation of Bottom Electrode 3

A layer of titanium nitride bottom electrode 3 is prepared on the insulating layer 2 by magnetron sputtering method, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate temperature is room temperature, the working pressure is 0.3Pa, and the DC sputtering power is 80W , the flow rate of argon gas was 30 sccm, the time was 25 min, and the thickness was 160 nm.

Step 4. Preparation of functional layer 4

The prepared bottom electrode 3 is placed in a magnetron sputtering apparatus, the bismuth and tin oxide targets are respectively placed in the DC and RF sputtering target positions and sputtered simultaneously, the magnetron sputtering vacuum degree is less than 5x10-4Pa, the substrate The temperature is room temperature, the working pressure is 0.3Pa, the sputtering power of bismuth is 9W, the sputtering power of tin oxide is 100W, the flow rate of argon gas is 30sccm, the time is 1.2min, the thickness is 20nm, and the content of bismuth is about 10%, the functional layer 4 was prepared.

Step 5. Preparation of the top electrode 5

Prepare the non-hafnium-doped indium tin oxide top electrode 5 with a magnetron sputtering apparatus. The indium tin oxide target is placed in the radio frequency sputtering target position and sputtered. The vacuum degree of the magnetron sputtering is less than 5x10-4Pa, and the substrate temperature is room temperature. 1. The working pressure is 0.3Pa, the sputtering power of indium tin oxide is 50W, the flow rate of argon gas is 30sccm, the time is 40min, and the thickness is 200nm.

The electrical characteristics of the memristor obtained in each embodiment were tested, and the testing instrument was an Agilent B1500A semiconductor parameter analyzer. Press the ground probe on the titanium nitride bottom electrode surface and the other probe on the indium tin oxide top electrode surface.

For Example 1, firstly, the filament forming (Forming) process uses the Agilent B1500A test software to set the scanning voltage to 0V ~ 10V, limit the current to 1mA, and the forming voltage is about 2V; then set the scanning voltage to -2.0V ~ 1.5V, Unlimited current, the scan voltage working cycle is divided into four parts, first scan from 0V to -2.0V, then from -2.0V to 0V, then from 0V to +1.5V, and finally from +1.5V to 0V , the writing voltage is 0.7V~1.2V, and the erasing voltage is -1.0V~-1.6V.

For Example 3, firstly, the filament formation (Forming) process uses the Agilent B1500A test software to set the scanning voltage to 0V ~ 10V, limit the current to 1mA, and the Forming voltage is about 1.5V; set the scanning voltage to -1.0V ~ 1.0V, Unlimited current, the scan voltage working cycle is divided into four parts, first scan from 0V to -1.0V, then scan from -1.0V to 0V, then scan from 0V to +1.0V, and finally scan from +1.0V to 0V , the writing voltage is 0.5V～0.7V, and the erasing voltage is -0.5V～-0.6V.

For Example 5, firstly, the filament forming (Forming) process uses the Agilent B1500A test software to set the scanning voltage to 0V ~ 10V, limit the current to 1mA, and the Forming voltage is about 2V; then set the scanning voltage to -2.0V ~ 1.5V, Unlimited current, the scan voltage working cycle is divided into four parts, first scan from 0V to -2.0V, then from -2.0V to 0V, then from 0V to +1.5V, and finally from +1.5V to 0V , the writing voltage is 0.5V~1.0V, and the erasing voltage is -1.2V~-1.7V.

Analysis of test results

The number of curve cycles tested is 1 cycle. The operating power of the device in Example 1 of the present invention is about 7.4mW, the operating power of the device in Example 5 is about 10.2mW, and the operating power of the device in Example 3 is about 10.2mW. About 25μW.

By comparing the 10% Bi-doped SnO ₂ device and the undoped SnO ₂ device, see Figure 4, it can be known that the 10% Bi-doped SnO ₂ device is compared with the undoped SnO ₂ device, and the writing voltage is increased by about 0.6V. As high as about 1.0V, the erasing voltage is reduced from about -1.6V to about -1.25V, the operating current is basically unchanged, and the operating power is slightly increased, so 10% is about the limit value of doping.

By comparing 4.8% Bi-doped _SnO2 devices and undoped _SnO2 devices, see accompanying drawing ₄ , it can be known that Bi-doped _SnO2 devices (Bi content is 4.8%) have lower Operating current and lower operating power, the resistive switching window remains around 10, the write voltage is reduced from about 0.75V to about 0.6V, the erasing voltage is reduced from about -1.3V to about -0.6V, and the high-resistance state current is reduced from about 210A is reduced to 5.6μA, the low-resistance state current is reduced from 1.9mA to 56μA, and the operating power is reduced from 7.4mW to 25μW.

It can be seen that the memristive memory in which bismuth (Bi) element is doped into tin oxide (SnO ₂ ) as a functional layer has sufficient storage window, high uniformity, lower operating voltage, operating current and lower operating power.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within range.

Claims (14)

1. a memristive memory, comprising the silicon substrate (1), insulating layer (2), bottom electrode (3), functional layer (4) and top electrode (5) that layered arrangement is arranged successively, it is characterized in that: all The main material of the functional layer (4) is ZnO or TiO ₂ , and the material of the functional layer (4) is also doped with Bi, and the doping content of Bi is 2.3-10%. 2. A memristive memory according to claim 1, characterized in that: the thickness of the functional layer (4) is 10-50 nm. 3. The memristive memory according to claim 1, characterized in that: the material of the bottom electrode (3) is one of TiN, FTO and ZTO. 4. A memristor memory according to claim 3, characterized in that: the material of the bottom electrode (3) is TiN with a thickness of 50-300 nm. 5. A memristive memory according to claim 1, characterized in that: the material of the top electrode (5) is one of ITO, FTO, ZTO and TiN. 6. The memristor memory according to claim 5, characterized in that: the material of the top electrode (5) is ITO, and the thickness is 100-300 nm. 7. A memristor memory according to claim 1, characterized in that: the thickness of the insulating layer (2) is 100-200 nm. 8. A memristor memory according to claim 1, characterized in that: the material of the insulating layer (2) is SiO ₂ . 9. the preparation method of a kind of memristive memory as claimed in claim 1, is characterized in that comprising the following steps: 1) cleaning the silicon substrate (1); 2) placing the target material used as the insulating layer (2) on a target stage, and preparing the insulating layer (2) on the silicon substrate (1) by magnetron sputtering or atomic layer deposition; 3) placing the target material as the bottom electrode (3) on the target platform, and preparing the bottom electrode (3) on the insulating layer (2) prepared in step 2) by magnetron sputtering or atomic layer deposition; 4) Put the target material as the main material of the functional layer (4) on the target stage, and simultaneously place the doped Bi target material on the target stage, and use the magnetron on the bottom electrode (3) prepared in step 2) to Prepare the functional layer (4) by sputtering or atomic layer deposition, select different power ratios for the Bi target material and the target material of the main material to sputter or deposit simultaneously, and use different ratios of sputtering or deposition power to control Bi doping content; 5) The target material used as the top electrode (5) is placed on the target platform, and the top electrode (5) is prepared on the functional layer (4) prepared in step 4) by magnetron sputtering or atomic layer deposition. After preparation Get memristive memory. 10 . The method for preparing the memristive memory according to claim 9 , characterized in that: in the steps 2) to 5), magnetron sputtering is used. 11 . 11 . The method for manufacturing memristor memory according to claim 10 , characterized in that: in the steps 2) to 5), the degree of vacuum of the magnetron sputtering is less than 5×10 ⁻⁴ Pa. 12. The method for preparing memristor memory according to claim 10, characterized in that: in the steps 2) to 5), the working pressure of the magnetron sputtering is 0.1-0.3Pa. 13. The preparation method of memristor memory according to claim 10, characterized in that: the sputtering power of step 2) is 30-100W, the sputtering power of step 3) is 50-100W, and the sputtering power of step 5) ) sputtering power of 40 ~ 60W. 14. The preparation method of memristor memory according to claim 10, characterized in that: said step 4) the doping content of Bi is 2.3-10%, the sputtering power of the target material of the main material is 100W, the Bi target The sputtering power of the material is 5-9W.

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