CN110588727A - Light rail wireless subsystem control unit - Google Patents
Light rail wireless subsystem control unit Download PDFInfo
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- CN110588727A CN110588727A CN201910923320.7A CN201910923320A CN110588727A CN 110588727 A CN110588727 A CN 110588727A CN 201910923320 A CN201910923320 A CN 201910923320A CN 110588727 A CN110588727 A CN 110588727A
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- 239000011159 matrix material Substances 0.000 claims abstract description 5
- 239000003990 capacitor Substances 0.000 claims description 72
- 239000013078 crystal Substances 0.000 claims description 7
- 238000004891 communication Methods 0.000 abstract description 17
- 230000005540 biological transmission Effects 0.000 abstract description 6
- 238000013461 design Methods 0.000 abstract description 2
- 230000003137 locomotive effect Effects 0.000 description 7
- 230000002457 bidirectional effect Effects 0.000 description 6
- 230000001960 triggered effect Effects 0.000 description 6
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- 238000001514 detection method Methods 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 238000003780 insertion Methods 0.000 description 2
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B61—RAILWAYS
- B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
- B61L27/00—Central railway traffic control systems; Trackside control; Communication systems specially adapted therefor
- B61L27/70—Details of trackside communication
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W4/00—Services specially adapted for wireless communication networks; Facilities therefor
- H04W4/30—Services specially adapted for particular environments, situations or purposes
- H04W4/40—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P]
- H04W4/42—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P] for mass transport vehicles, e.g. buses, trains or aircraft
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- Computer Networks & Wireless Communication (AREA)
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Abstract
The invention discloses a light rail wireless subsystem control unit. The control unit comprises an MCU chip with the model of ATMEGA128, a matrix keyboard respectively connected with the MCU chip, a reset chip with the model of IMP706ESA, an RS232 interface chip with the model of MAX3221, three RS422 interface chips with the model of SN75180 and four shift registers with the model of TBIC6B 595. The wireless subsystem control unit is applied to the dispatching terminal of the rail transit wireless communication equipment through design, so that communication and data transmission in train operation are completed, the requirement of train dispatching is met, and the wireless subsystem control unit meets the requirements of the rail transit light rail and subway communication industry.
Description
Technical Field
The invention relates to wireless communication equipment, in particular to a light rail wireless subsystem control unit which is used for a wireless communication scheduling terminal.
Background
The device is specially designed for the light rail dispatching terminal based on wireless train dispatching products and urban rail transit communication equipment, can complete communication and data transmission in train operation, and meets the requirement of train dispatching. And the wireless subsystem design in the current light rail dispatching terminal generally does not have a product unit with similar functions.
Disclosure of Invention
In view of the current state and the demand of the prior art, the invention aims to develop a light rail wireless subsystem control unit which is applied to a rail transit wireless communication equipment dispatching terminal to complete the communication and data transmission in the running of a train, so as to meet the requirement of train dispatching and meet the requirement of the rail transit light rail and subway communication industry.
The technical scheme adopted by the invention is as follows: a light rail wireless subsystem control unit is characterized by comprising an MCU chip with the model number of ATMEGA128, a matrix keyboard respectively connected with the MCU chip, a reset chip with the model number of IMP706ESA, an RS232 interface chip with the model number of MAX3221, three RS422 interface chips with the model number of SN75180 and four shift registers with the model number of TBIC6B 595.
One end of the resistor R1, the resistor R2, the resistor R3, the resistor R4 and the resistor R5 is connected and then connected with a 5V voltage, and the other end of the resistor R1 is sequentially connected with one end of a key S7, a key S6, a key S5, a key S4, a key S3, a key S2 and a key S1 of the matrix keyboard and then connected to a pin 35 of the MCU chip N1; the other end of the resistor R2 is sequentially connected with one ends of a key S14, a key S13, a key S12, a key S11, a key S10, a key S9 and a key S8, and then is connected to a pin 36 of the MCU chip N1; the other end of the resistor R3 is sequentially connected with one ends of a key S21, a key S20, a key S19, a key S18, a key S17, a key S16 and a key S15, and then is connected to a pin 37 of the MCU chip N1; the other end of the resistor R4 is sequentially connected with one ends of a key S28, a key S27, a key S26, a key S25, a key S24, a key S23 and a key S22, and then is connected to a pin 38 of the MCU chip N1; the other end of the resistor R5 is sequentially connected with one ends of the key S30 and the key S29 and then is connected to a pin 39 of the MCU chip N1; the other ends of the key S1, the key S8, the key S15 and the key S22 are connected to a pin 44 of the MCU chip N1; the other ends of the key S2, the key S9, the key S16, the key S23 and the key S29 are connected to a pin 45 of the MCU chip N1; the other ends of the key S3, the key S10, the key S17 and the key S24 are connected to a pin 46 of the MCU chip N1; the other ends of the key S4, the key S11, the key S18 and the key S25 are connected to the 47 pin of the MCU chip N1; the other ends of the key S5, the key S12, the key S19, the key S26 and the key S30 are connected to a pin 48 of the MCU chip N1; the other ends of the keys S6, S13, S20 and S27 are connected to the pin 49 of the MCU chip N1; the other ends of the keys S7, S14, S21 and S28 are connected to pin 50 of the MCU chip N1.
Pins 33, 40, 41 and 42 of the MCU chip N1 are respectively connected with the cathodes of the light emitting diode VD9, the light emitting diode VD8, the light emitting diode VD10 and the light emitting diode VD11 through a resistor R72, a resistor R71, a resistor R73 and a resistor R74; the anodes of the light-emitting diode VD9, the light-emitting diode VD8 and the light-emitting diode VD10 are connected and then connected with 5V voltage; a pin 34 of the MCU chip N1 is connected with a pin 6 of the reset chip N2, a pin 1 of the reset chip N2 is connected with a pin 5 and a pin 8 of the reset chip N2 through a diode VD6 and a diode VD7 respectively, a pin 2 of the reset chip N2 is connected with a voltage 5V, a pin 3 is grounded, a pin 4 is connected with one ends of a resistor R27 and a resistor R28, the other end of the resistor R27 is connected with a voltage 13.8V, the other end of the resistor R28 is grounded, and a pin 7 of the reset chip N2 is connected with a pin 20 of the MCU chip N1; one end of a pin 21 of the MCU chip N1, which is connected with the capacitor C7 and the capacitor C8, is connected with 5V voltage, and the other ends of the capacitor C7 and the capacitor C8 are respectively grounded; a pin 24 of the MCU chip N1 is connected with one end of a resistor R26, a crystal oscillator G1 and a capacitor C10, and the other end of the capacitor C10 is grounded; the pin 24 of the MCU chip N1 is connected with the other ends of the resistor R26 and the crystal oscillator G1 and one end of the capacitor C9, and the other end of the capacitor C9 is grounded.
The 4 pins of the interface XP1 are connected with one ends of a resistor R6, a resistor R8, a resistor R9, a resistor R10 and a resistor R11 through a resistor R7, are connected with 5V voltage at the same time, and then are connected with the 52 pins of the MCU chip N1; the pin 10 and the pin 2 of the XP1 interface are grounded after being connected, and the pin 6 is connected with the other end of the resistor R6 through the diode VD1 and is also connected with the pin 20 of the MCU chip N1; pins 9, 3, 5 and 1 of the interface XP1 are respectively connected with the other ends of the resistor R8, the resistor R9, the resistor R10 and the resistor R11, and are respectively connected with pins 54, 55, 56 and 57 of the MCU chip N1.
The pin 1B, the pin 2B, the pin 3B and the pin 4B of the interface XP2 are respectively connected to the pin 9, the pin 10, the pin 11 and the pin 12 of the RS422 interface chip N10 through a resistor R19, a resistor R20, a resistor R21 and a resistor R22, the pin 1 of the RS422 interface chip N10 is grounded through a capacitor C4, and the pin 7 is grounded; the pin 5B, the pin 6B, the pin 7B and the pin 8B of the XP2 interface are respectively connected to the pin 9, the pin 10, the pin 11 and the pin 12 of the RS422 interface chip N11 through a resistor R63, a resistor R64, a resistor R65 and a resistor R66, the pin 1 of the RS422 interface chip N11 is grounded through a capacitor C5, and the pin 7 is grounded; the pin 4A, the pin 3A, the pin 2A and the pin 1A of the interface XP2 are respectively connected to the pin 9, the pin 10, the pin 11 and the pin 12 of the RS422 interface chip N12 through a resistor R67, a resistor R68, a resistor R69 and a resistor R70, the pin 1 of the RS422 interface chip N12 is grounded through a capacitor C6, and the pin 7 is grounded; meanwhile, after being connected, the pin 1 of the RS422 interface chip N10, the pin 1 of the RS422 interface chip N11 and the pin 1 of the RS422 interface chip N12 are connected to the pin 1 of the MCU chip N1, meanwhile, the resistor R16 is connected with one end of the resistor R17 and then connected to the pin 62 of the MCU chip N1, and the other end of the resistor R17 is grounded; the 2 pin, the 5 pin, the 3 pin and the 4 pin of the RS422 interface chip N10 are respectively connected to the 2 pin, the 3 pin, the 4 pin and the 5 pin of the MCU chip N1; pins 2 and 5 of the RS422 interface chip N11 are respectively connected to pins 2 and 3 of the MCU chip N1, and pins 3 and 4 of the RS422 interface chip N11 are respectively connected to pins 25 and 26 of the MCU chip N1; pins 2 and 5 of the RS422 interface chip N12 are respectively connected to pins 2 and 3 of the MCU chip N1, and pins 3 and 4 of the RS422 interface chip N12 are respectively connected to pins 61 and 60 of the MCU chip N1.
The pin 1B, the pin 1A, the pin 2B, the pin 2A, the pin 3B, the pin 3A, the pin 4B, the pin 4A, the pin 5B, the pin 5A, the pin 6B, the pin 6A and the pin 7B of the interface XP3 are respectively connected to the pin 6, the pin 7, the pin 8, the pin 9, the pin 10, the pin 11, the pin 12, the pin 13, the pin 14, the pin 15, the pin 29, the pin 17 and the pin 16 of the MCU chip N1, meanwhile, the pin 17 of the MCU chip N1 is connected with one end of a resistor R62 through a resistor R61 and then connected with a voltage of 5V, and the other end of the resistor R62 is connected to the pin 16 of the MCU chip N1; a pin 9B of an interface XP3 is connected with one end of a resistor R23, the other end of a resistor R23 is connected with one ends of a capacitor C17 and a resistor R24, the other end of a capacitor C17 is grounded, the other end of a resistor R24 is connected with one ends of a capacitor C16 and a resistor R25, the other end of a capacitor C16 is grounded, the other end of a resistor R25 is connected with a pin 18 of an MCU chip N1, a pin 9A of the interface XP3 is connected with one end of a resistor R2 through a capacitor C1, and the other end of a resistor R2 is connected with the anode of a diode 63VD 23 and the cathode of a diode VD3 and is also connected with a pin 58; the anode of the diode VD3 is grounded, the cathode of the diode VD2 is connected with the cathodes of the capacitor C2, the resistor R13 and the diode VD4, the other ends of the capacitor C2 and the resistor R13 are connected and then grounded, and the anode of the diode VD4 is grounded; the pin 10A and the pin 10B of the XP3 interface are grounded after being connected; one end of the resistor R14 is connected with the voltage of 13.8V, and the other end of the resistor R14 is connected with the cathode of the diode VD5 and one end of the resistor R15 and is also connected with the 59 pin of the MCU chip N1.
A pin 1 of the interface XP4 is connected with one end of a capacitor C18 and a capacitor C19 and a pin 1 of a three-terminal voltage regulator N4, a pin 2 of the three-terminal voltage regulator N4 is connected with one end of the capacitor C20 and a capacitor C21 and a pin 1 of the three-terminal voltage regulator N5, and a pin 2 of the three-terminal voltage regulator N5 is connected with one end of a capacitor C22 and a capacitor C23 and then connected with 5V voltage; and a pin 2 of the interface XP4 is connected with the other ends of the capacitor C18 and the capacitor C19, a pin 3 of the three-terminal regulator N4, the other ends of the capacitor C20 and the capacitor C21, a pin 3 of the three-terminal regulator N5, and the other ends of the capacitor C22 and the capacitor C23 in sequence and then grounded.
Pins 1, 2 and 3 of the interface XP5 are respectively connected with pins 13, 8 and 1 of an RS232 interface chip N3, and pins 3 and 7 of the RS232 interface chip N3 are simultaneously grounded through a capacitor C13 and a capacitor C14; a12 pin of the RS232 interface chip N3 is connected with one end of a capacitor C15 and then grounded, and the other end of the capacitor C15 is connected with a 15 pin and a 16 pin of the RS232 interface chip N3 and then connected with 5V voltage; pins 2 and 4 of the RS232 interface chip N3 are connected with two ends of the capacitor C11, pins 5 and 6 are connected with two ends of the capacitor C12, pin 11 is connected with pin 28 of the MCU chip N1, and pin 9 is connected with pin 27 of the MCU chip N1.
Pin 1 and pin 2 of the interface XP6 are connected to pin 17 and pin 16 of the shift register N9 through a resistor R60 and a resistor R59, pin 4, pin 5, pin 6, pin 7, pin 14 and pin 15 of the shift register N9 are connected to the negative electrodes of the light-emitting tube VDS23, the light-emitting tube VDS1, the light-emitting tube VDS8, the light-emitting tube VDS15, the light-emitting tube VDS22 and the light-emitting tube VDS29, and the positive electrodes of the light-emitting tube VDS23, the light-emitting tube VDS1, the VDS light-emitting tube 8, the light-emitting tube VDS15, the light-emitting tube VDS22 and the VDS29 are connected to one end of the resistor R53, the resistor R54, the resistor R55, the resistor R56, the resistor.
The 4, 5, 6, 7, 14, 15, 16 and 17 pins of the shift register N8 are respectively connected with the cathodes of the light-emitting tube VDS30, VDS24, VDS17, VDS10, VDS3, VDS2, VDS9 and VDS16, and the anodes of the light-emitting tubes VDS30, VDS24, VDS17, VDS10, VDS3, VDS2, VDS9 and VDS16 are respectively connected with one end of the resistor R45, the resistor R46, the resistor R47, the resistor R48, the resistor R49, the resistor R50, the resistor R51 and the resistor R52.
The 4, 5, 6, 7, 14, 15, 16 and 17 pins of the shift register N7 are respectively connected with the cathodes of the light-emitting tube VDS5, VDS12, VDS19, VDS26, VDS4, VDS11, VDS18 and VDS25, and the anodes of the light-emitting tubes VDS5, VDS12, VDS19, VDS26, VDS4, VDS11, VDS18 and VDS25 are respectively connected with one end of the resistor R37, the resistor R38, the resistor R39, the resistor R40, the resistor R41, the resistor R42, the resistor R43 and the resistor R44.
The 4, 5, 6, 7, 14, 15, 16 and 17 pins of the shift register N6 are respectively connected with the cathodes of a light-emitting tube VDS7, a light-emitting tube VDS14, a light-emitting tube VDS21, a light-emitting tube VDS28, a light-emitting tube VDS6, a light-emitting tube VDS13, a light-emitting tube VDS20 and a light-emitting tube VDS27, and the anodes of the light-emitting tubes VDS7, VDS14, VDS21, VDS28, VDS6, VDS13, VDS20 and VDS27 are respectively connected with one ends of a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R33, a resistor R34, a resistor R35 and a resistor R36; the resistor R29, the resistor R30, the resistor R31, the resistor R32, the resistor R33, the resistor R34, the resistor R35, the resistor R36, the resistor R37, the resistor R38, the resistor R39, the resistor R40, the resistor R41, the resistor R42, the resistor R43, the resistor R44, the resistor R45, the resistor R46, the resistor R47, the resistor R48, the resistor R49, the resistor R50, the resistor R51, the resistor R52, the resistor R53, the resistor R54, the resistor R55, the resistor R56, the resistor R57 and the resistor R58 are connected at the other ends and then connected with 5V voltage.
Pins 9, 11 and 19 of the shift register N6, the shift register N7, the shift register N8 and the shift register N9 are connected and then grounded; pins 9 of the shift register N6, the shift register N7, the shift register N8 and the shift register N9 are respectively grounded; pin 18 of the shift register N6 is connected with pin 3 of the shift register N7, pin 18 of the shift register N7 is connected with pin 3 of the shift register N8, and pin 18 of the shift register N8 is connected with pin 3 of the shift register N9; pins 2 and 8 of the shift register N6, the shift register N7, the shift register N8 and the shift register N9 are connected and then connected with 5V voltage; pins 12 of the shift register N6, the shift register N7, the shift register N8 and the shift register N9 are connected and then connected to pin 30 of the MCU chip N1, and pin 3 of the shift register N6 is connected to pin 32 of the MCU chip N1.
The invention has the beneficial effects that: the control unit is designed for the novel light rail dispatching terminal, and the control unit is applied to the railway traffic wireless communication equipment dispatching terminal, so that the communication and data transmission in the running process of a train can be completed, the requirement of train dispatching is met, and the requirements of the railway traffic light rail and subway communication industry are met.
Drawings
FIG. 1 is a schematic block diagram of the connection of the present invention;
fig. 2 is an electrical schematic of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
Referring to fig. 1, the working principle of the present invention is: the MCU chip N1 is a main control CPU located in the control unit and is the control center of the dispatching desk, and the single chip microcomputer microcontroller adopts an AT90 series embedded single chip microcomputer ATMEGA128 chip of ATMAL company. The AT90 series embedded single-chip microcomputer is an 8-bit microprocessor with an enhanced RISC structure and a built-in Flash, and adopts a large-scale fast access register file and a fast single-cycle instruction. The single chip microcomputer executes an instruction by using one clock cycle. Because the singlechip adopts a Harvard structure, a program memory and a data memory of the singlechip are separated. The single chip microcomputer is manufactured by adopting a low-power non-volatile CMOS process. The Flash memory of the singlechip can be programmed through the SPI and a general programmer. The ATMEGA128 chip has 51 general I/O lines, timer/counter with analog comparator, programmable asynchronous UART serial port, programmable watchdog timer with internal crystal oscillator, and SPI serial port designed for downloading program. The pin functions as follows:
(1) GND (22, 53, 63 pin): and (3) ground.
(2) VCC (21, 52, 64 pin): a voltage.
(3) XTAL1 (24-pin), XTAL2 (23-pin): and (4) externally connecting a crystal. The input end and the output end of an inverting amplifier are formed inside the single chip microcomputer.
(4) RESET (20 pin) RESET: the external reset chip is connected with a reset end (7 pins), and when the control unit is just powered on or the single chip microcomputer is halted, the watchdog gives a reset signal. When the crystal oscillator operates, the low level of one two periods on the pin can reset the device.
(5) The A port (PA 0 ~ PA 7) is an 8-bit bidirectional I/O port with an internal pull-up resistor, a buffer at the output port can absorb 20mA of current, and when the A port is used for input and the internal pull-up is triggered, current is output if the external is pulled low.
(6) The B port (PB 0 ~ PB 7) is an 8-bit bidirectional I/O port with an internal pull-up resistor, a buffer at the output port can absorb 20mA of current, and when the B port is used for input and the internal pull-up is triggered, current is output if the external is pulled low.
(7) The C port (PC 0 ~ PC 7) is an 8-bit bidirectional I/O port with an internal pull-up resistor, a buffer at the output port can absorb 20mA of current, and when the C port is used for input and the internal pull-up is triggered, current is output if the external is pulled low.
(8) The D port (PD 0 ~ PD 7) is an 8-bit bidirectional I/O port with an internal pull-up resistor, a buffer at the output port can absorb 20mA of current, when the D port is used for input and the internal pull-up is triggered, current is output if the external is pulled low, wherein the PD2 and the PD3 can also be used as asynchronous UART serial ports.
(9) The E port (PE 0 ~ PE 7) PE0 ~ PE1 is an asynchronous UART serial port, PE2 ~ PE7 is a 6-bit bidirectional I/O port with internal pull-up resistor the buffer of the output port can absorb 20mA of current, when the E port is used for input and the internal pull-up is triggered, if the external pull-down, current will be output.
(10) The F port (PF 0 ~ PF 7) is an 8-bit bidirectional I/O port with internal pull-up resistor, a buffer at the output port can absorb 20mA current, when the F port is used for input and the internal pull-up is triggered, if the external is pulled low, the current is output, wherein the PF4 ~ PF7 is an SPI serial port for a download program, and meanwhile, the F port can also be used for an A-D conversion port.
In the dispatching desk, the key switch of the operation panel adopts a key board row and column scanning mode, and key information is sent to the MCU chip N1.
The output and input interface of the MCU is specifically used as follows
1. And (3) keyboard input: line input PCs 0-4; the column inputs are PA 0-PA 5.
2. And (4) display and output: PD2 (RXD 27 pin) and PD3(TXD 28 pin) are connected with an RS-232 interface MAX 3221.
3. Base station data: PE0 (RXD 2 pin) and PE1(TXD 3 pin) are connected with the RS422 interface SN 75180.
4. Audio unit relay K1 controls: PB0 port (K1. C).
5. Audio unit relay K4 controls: PB1 port (K2. C).
6. Audio unit relay K3 controls: PB2 port (K3. C).
7. Audio unit phone insertion control: PB3 port (A').
8. Audio unit phone insertion control: PB4 port (B').
9. Switching control: PB5 port (C').
10. PTT input: PB6 port was highly effective.
11. The HOOK input PB7 is valid.
12. Audio unit telephone voice-in control: PE7 port (call.c).
13. Audio unit microphone control: PE4 port (mic.c).
14. Audio unit microphone control: PE5 port (mic2.c).
15. Test tone output: TOSC2 port 18 th pin (TONE).
16. Alarm and prompt tone output: PD4 port 29 (TONE 1).
The IMP706ESA reset chip N2 is a "watchdog" chip with voltage detection function and output reset level low. Two resistors split the voltage into a voltage slightly higher than 1.25V, which is connected into the PFI pin of IMP706ESA chip N2. The RESET pin is connected with the RESET (RESET) end of the MCU. When the voltage is too low, the IMP706ESA chip N2 sends a low level for a certain time at its RESET pin to RESET the CPU and disable the circuit, thereby disabling the system from operating in an unstable state and preventing important data from being lost. When the MCU works normally, the MCU sends a 'feeding dog' pulse to the WDI foot of the IMP706ESA chip N2 at regular time. When the MCU crashes, the RESET foot of the watchdog can be turned over and changed from high level to low level due to no on-time dog feeding, so that the MCU is RESET, and the problem of crashing is effectively solved.
MAX3221 is an RS232 interface chip N3, and is connected to a serial port 2 of the MCU chip N1. The RS232 interface is an interface for short-distance communication, and is widely applied to communication between a computer and external equipment, for example, the serial port 1 and the serial port 2 of the computer are RS232 interfaces. The communication distance of the RS232 interface is generally less than 5 m. It can convert logic data into RS232 level and also can convert 232 level data into logic data. The computer sends the monitoring instruction sent by the monitoring terminal through the network card to the MCU chip N1 through the serial port and the MAX3221 chip N3, the MCU chip N1 sends the detection result and other signals needing to be displayed to the MAX3221 chip N3, the signals are converted into RS232 level through the MAX3221 chip N3 and then are sent to the computer, the computer sends the detection result to the monitoring terminal through the network card, and the content needing to be displayed is sent to the display terminal to be displayed.
The 7809 three-terminal voltage regulators N4 and 7809 three-terminal voltage regulator N5, which together function to convert the 13.8V DC voltage to 5V DC voltage for use by the control unit.
TBIC6B595 is a shift register (N6-N9) with pins 12 as latch terminals, pins 3 as data input terminals, pins 13 as clock terminals, and pins 18 as serial data output terminals. The shift register adopts a serial connection mode, namely the data input of the next shift register is connected with the shift output end of the previous shift register, the clock end and the latch end of each shift register are connected together in parallel, thus, four shift registers can be controlled by three ports of the MCU, the parallel output end of the shift register is connected with the light emitting diode through the current limiting resistor, each shift register lights the light emitting diodes of eight key switches, the MCU chip N1 codes the address of the light emitting diode to be lighted according to the operation of a dispatcher and the information sent by the base station through the RS422 interface chip SN75180 (N10-N12), the data is sent to 3 pins of the shift register to be shifted under the action of clock pulse, and the selected light emitting diode is lighted after the data is completely shifted in.
The emergency channel is mainly used for emergency calling of the locomotive platform and is usually used as a standby channel, when the line modulation channel breaks down, the emergency channel is automatically switched to the emergency channel, and when the emergency channel is used as the standby channel, the frequency of the emergency channel is also switched to the line modulation frequency point. In the system, the serial port 1 of the MCU chip N1 is used for controlling three RS-422 interfaces to complete data transmission between two channels and a vehicle section fixed station.
The SN75180 interface chip is provided with a transmitting-receiving enabling port RE and a transmitting-receiving enabling port DE, and the RO port is in a high impedance state when the RE port is in a high level. Therefore, three RO ports can be simultaneously connected to the serial port 1 of the MCU. The input impedance of the DI port of the SN75180 interface chip is 12K, the parallel connection impedance of the three interface chips is 4K, which is far smaller than the load carrying capacity of the MCU, so that the DI ports of the three SN75180 interface chips can be connected in parallel with the Tx port of the MCU. The CPU also adopts a polling mode for the data exchange of three RS422 users, and the time interval of the MCU polling of each user is 20 ms. The time for polling the computer is 50ms, so the polling period of the MCU is 110ms, and the transmission rate of data is 19.2 KHz.
The MCU determines the working state of the system according to the key information operated by the dispatcher or the received data information sent by the base station: the dispatching calling locomotive platform, the dispatching locomotive platform calling dispatching, the locomotive platform calling platform, the locomotive platform calling locomotive platform, the platform calling dispatching platform, the platform calling locomotive platform, the outside line telephone and the user platform are communicated, and the like, control signals are sent to the control circuit, related voice channels are connected, the required communication function is realized, related information is sent to the display terminal to be displayed, and the control of the system is completed.
Claims (1)
1. A light rail wireless subsystem control unit is characterized in that the control unit comprises an MCU chip with the model of ATMEGA128, a matrix keyboard respectively connected with the MCU chip, a reset chip with the model of IMP706ESA, an RS232 interface chip with the model of MAX3221, three RS422 interface chips with the model of SN75180 and four shift registers with the model of TBIC6B 595;
one end of a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a resistor R5 is connected and then connected with a 5V voltage, and the other end of a resistor R1 is sequentially connected with one end of a key S7, a key S6, a key S5, a key S4, a key S3, a key S2 and a key S1 of the matrix keyboard and then connected to a pin 35 of the MCU chip N1; the other end of the resistor R2 is sequentially connected with one ends of a key S14, a key S13, a key S12, a key S11, a key S10, a key S9 and a key S8, and then is connected to a pin 36 of the MCU chip N1; the other end of the resistor R3 is sequentially connected with one ends of a key S21, a key S20, a key S19, a key S18, a key S17, a key S16 and a key S15, and then is connected to a pin 37 of the MCU chip N1; the other end of the resistor R4 is sequentially connected with one ends of a key S28, a key S27, a key S26, a key S25, a key S24, a key S23 and a key S22, and then is connected to a pin 38 of the MCU chip N1; the other end of the resistor R5 is sequentially connected with one ends of the key S30 and the key S29 and then is connected to a pin 39 of the MCU chip N1; the other ends of the key S1, the key S8, the key S15 and the key S22 are connected to a pin 44 of the MCU chip N1; the other ends of the key S2, the key S9, the key S16, the key S23 and the key S29 are connected to a pin 45 of the MCU chip N1; the other ends of the key S3, the key S10, the key S17 and the key S24 are connected to a pin 46 of the MCU chip N1; the other ends of the key S4, the key S11, the key S18 and the key S25 are connected to the 47 pin of the MCU chip N1; the other ends of the key S5, the key S12, the key S19, the key S26 and the key S30 are connected to a pin 48 of the MCU chip N1; the other ends of the keys S6, S13, S20 and S27 are connected to the pin 49 of the MCU chip N1; the other ends of the keys S7, S14, S21 and S28 are connected to pin 50 of the MCU chip N1;
pins 33, 40, 41 and 42 of the MCU chip N1 are respectively connected with the cathodes of the light emitting diode VD9, the light emitting diode VD8, the light emitting diode VD10 and the light emitting diode VD11 through a resistor R72, a resistor R71, a resistor R73 and a resistor R74; the anodes of the light-emitting diode VD9, the light-emitting diode VD8 and the light-emitting diode VD10 are connected and then connected with 5V voltage; a pin 34 of the MCU chip N1 is connected with a pin 6 of the reset chip N2, a pin 1 of the reset chip N2 is connected with a pin 5 and a pin 8 of the reset chip N2 through a diode VD6 and a diode VD7 respectively, a pin 2 of the reset chip N2 is connected with a voltage 5V, a pin 3 is grounded, a pin 4 is connected with one ends of a resistor R27 and a resistor R28, the other end of the resistor R27 is connected with a voltage 13.8V, the other end of the resistor R28 is grounded, and a pin 7 of the reset chip N2 is connected with a pin 20 of the MCU chip N1; one end of a pin 21 of the MCU chip N1, which is connected with the capacitor C7 and the capacitor C8, is connected with 5V voltage, and the other ends of the capacitor C7 and the capacitor C8 are respectively grounded; a pin 24 of the MCU chip N1 is connected with one end of a resistor R26, a crystal oscillator G1 and a capacitor C10, and the other end of the capacitor C10 is grounded; the pin 24 of the MCU chip N1 is connected with the other ends of the resistor R26 and the crystal oscillator G1 and one end of the capacitor C9, and the other end of the capacitor C9 is grounded;
the 4 pins of the XP1 interface are connected with one ends of a resistor R6, a resistor R8, a resistor R9, a resistor R10 and a resistor R11 through a resistor R7, are connected with 5V voltage at the same time, and then are connected with the 52 pins of an MCU chip N1; the pin 10 and the pin 2 of the XP1 interface are grounded after being connected, and the pin 6 is connected with the other end of the resistor R6 through the diode VD1 and is also connected with the pin 20 of the MCU chip N1; pins 9, 3, 5 and 1 of the XP1 interface are respectively connected with the other ends of the resistor R8, the resistor R9, the resistor R10 and the resistor R11, and are respectively connected with pins 54, 55, 56 and 57 of the MCU chip N1;
pins 1B, 2B, 3B and 4B of the XP2 interface are respectively connected to pins 9, 10, 11 and 12 of the RS422 interface chip N10 through resistors R19, R20, R21 and R22, pins 1 of the RS422 interface chip N10 are grounded through a capacitor C4, and pins 7 are grounded; the pin 5B, the pin 6B, the pin 7B and the pin 8B of the XP2 interface are respectively connected to the pin 9, the pin 10, the pin 11 and the pin 12 of the RS422 interface chip N11 through a resistor R63, a resistor R64, a resistor R65 and a resistor R66, the pin 1 of the RS422 interface chip N11 is grounded through a capacitor C5, and the pin 7 is grounded; the pin 4A, the pin 3A, the pin 2A and the pin 1A of the interface XP2 are respectively connected to the pin 9, the pin 10, the pin 11 and the pin 12 of the RS422 interface chip N12 through a resistor R67, a resistor R68, a resistor R69 and a resistor R70, the pin 1 of the RS422 interface chip N12 is grounded through a capacitor C6, and the pin 7 is grounded; meanwhile, after being connected, the pin 1 of the RS422 interface chip N10, the pin 1 of the RS422 interface chip N11 and the pin 1 of the RS422 interface chip N12 are connected to the pin 1 of the MCU chip N1, meanwhile, the resistor R16 is connected with one end of the resistor R17 and then connected to the pin 62 of the MCU chip N1, and the other end of the resistor R17 is grounded; the 2 pin, the 5 pin, the 3 pin and the 4 pin of the RS422 interface chip N10 are respectively connected to the 2 pin, the 3 pin, the 4 pin and the 5 pin of the MCU chip N1; pins 2 and 5 of the RS422 interface chip N11 are respectively connected to pins 2 and 3 of the MCU chip N1, and pins 3 and 4 of the RS422 interface chip N11 are respectively connected to pins 25 and 26 of the MCU chip N1; pins 2 and 5 of the RS422 interface chip N12 are respectively connected to pins 2 and 3 of the MCU chip N1, and pins 3 and 4 of the RS422 interface chip N12 are respectively connected to pins 61 and 60 of the MCU chip N1;
pins 1B, 1A, 2B, 2A, 3B, 3A, 4B, 4A, 5B, 5A, 6B, 6A and 7B of the interface XP3 are respectively connected to pins 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 29, 17 and 16 of the MCU chip N1, meanwhile, the pin 17 of the MCU chip N1 is connected with one end of a resistor R62 through a resistor R61 and then connected with 5V voltage, and the other end of the resistor R62 is connected with the pin 16 of the MCU chip N1; a pin 9B of an interface XP3 is connected with one end of a resistor R23, the other end of a resistor R23 is connected with one ends of a capacitor C17 and a resistor R24, the other end of a capacitor C17 is grounded, the other end of a resistor R24 is connected with one ends of a capacitor C16 and a resistor R25, the other end of a capacitor C16 is grounded, the other end of a resistor R25 is connected with a pin 18 of an MCU chip N1, a pin 9A of the interface XP3 is connected with one end of a resistor R2 through a capacitor C1, and the other end of a resistor R2 is connected with the anode of a diode 63VD 23 and the cathode of a diode VD3 and is also connected with a pin 58; the anode of the diode VD3 is grounded, the cathode of the diode VD2 is connected with the cathodes of the capacitor C2, the resistor R13 and the diode VD4, the other ends of the capacitor C2 and the resistor R13 are connected and then grounded, and the anode of the diode VD4 is grounded; the pin 10A and the pin 10B of the XP3 interface are grounded after being connected; one end of the resistor R14 is connected with 13.8V voltage, and the other end of the resistor R14 is connected with the cathode of the diode VD5 and one end of the resistor R15 and is also connected with the 59 pin of the MCU chip N1;
a pin 1 of an interface XP4 is connected with one end of a capacitor C18 and a capacitor C19 and a pin 1 of a three-terminal regulator N4, a pin 2 of the three-terminal regulator N4 is connected with one end of a capacitor C20 and a capacitor C21 and a pin 1 of the three-terminal regulator N5, and a pin 2 of the three-terminal regulator N5 is connected with one end of a capacitor C22 and a capacitor C23 and then connected with 5V voltage; a pin 2 of the interface XP4 is connected with the other ends of a capacitor C18 and a capacitor C19, a pin 3 of a three-terminal voltage regulator N4, the other ends of a capacitor C20 and a capacitor C21, a pin 3 of a three-terminal voltage regulator N5, and the other ends of a capacitor C22 and a capacitor C23 in sequence and then grounded;
pins 1, 2 and 3 of the XP5 interface are respectively connected with pins 13, 8 and 1 of the RS232 interface chip N3, and pins 3 and 7 of the RS232 interface chip N3 are simultaneously grounded through a capacitor C13 and a capacitor C14; a12 pin of the RS232 interface chip N3 is connected with one end of a capacitor C15 and then grounded, and the other end of the capacitor C15 is connected with a 15 pin and a 16 pin of the RS232 interface chip N3 and then connected with 5V voltage; pins 2 and 4 of the RS232 interface chip N3 are connected with two ends of a capacitor C11, pins 5 and 6 are connected with two ends of a capacitor C12, pin 11 is connected with pin 28 of the MCU chip N1, and pin 9 is connected with pin 27 of the MCU chip N1;
pins 1 and 2 of an interface XP6 are connected to pins 17 and 16 of a shift register N9 through a resistor R60 and a resistor R59 respectively, pins 4, 5, 6, 7, 14 and 15 of the shift register N9 are connected with the negative electrodes of a light-emitting tube VDS23, a light-emitting tube VDS1, a light-emitting tube VDS8, a light-emitting tube VDS15, a light-emitting tube VDS22 and a light-emitting tube VDS29 respectively, and the positive electrodes of the light-emitting tube VDS23, the light-emitting tube VDS1, the light-emitting tube VDS8, the light-emitting tube VDS15, the light-emitting tube VDS22 and the light-emitting tube VDS29 are connected with one end of a resistor R53, a resistor R54, a resistor R55, a resistor R56;
the 4, 5, 6, 7, 14, 15, 16 and 17 pins of the shift register N8 are respectively connected with the cathodes of the light-emitting tube VDS30, VDS24, VDS17, VDS10, VDS3, VDS2, VDS9 and VDS16, and the anodes of the light-emitting tubes VDS30, VDS24, VDS17, VDS10, VDS3, VDS2, VDS9 and VDS16 are respectively connected with one end of the resistor R45, the resistor R46, the resistor R47, the resistor R48, the resistor R49, the resistor R50, the resistor R51 and the resistor R52;
the 4, 5, 6, 7, 14, 15, 16 and 17 pins of the shift register N7 are respectively connected with the cathodes of the light-emitting tubes VDS5, VDS12, VDS19, VDS26, VDS4, VDS11, VDS18 and VDS25, and the anodes of the light-emitting tubes VDS5, VDS12, VDS19, VDS26, VDS4, VDS11, VDS18 and VDS25 are respectively connected with one end of the resistor R37, the resistor R38, the resistor R39, the resistor R40, the resistor R41, the resistor R42, the resistor R43 and the resistor R44;
the 4, 5, 6, 7, 14, 15, 16 and 17 pins of the shift register N6 are respectively connected with the cathodes of the light-emitting tubes VDS7, VDS14, VDS21, VDS28, VDS6, VDS13, VDS20 and VDS27, and the anodes of the light-emitting tubes VDS7, VDS14, VDS21, VDS28, VDS6, VDS13, VDS20 and VDS27 are respectively connected with one end of the resistor R29, the resistor R30, the resistor R31, the resistor R32, the resistor R33, the resistor R34, the resistor R35 and the resistor R36; the resistor R29, the resistor R30, the resistor R31, the resistor R32, the resistor R33, the resistor R34, the resistor R35, the resistor R36, the resistor R37, the resistor R38, the resistor R39, the resistor R40, the resistor R41, the resistor R42, the resistor R43, the resistor R44, the resistor R45, the resistor R46, the resistor R47, the resistor R48, the resistor R49, the resistor R50, the resistor R51, the resistor R52, the resistor R53, the resistor R54, the resistor R55, the resistor R56, the resistor R57 and the resistor R58 are connected at the other ends and then connected with 5V voltage;
pins 9, 11 and 19 of the shift register N6, the shift register N7, the shift register N8 and the shift register N9 are connected and then grounded; pins 9 of the shift register N6, the shift register N7, the shift register N8 and the shift register N9 are respectively grounded; pin 18 of shift register N6 is connected to pin 3 of shift register N7,
pin 18 of the shift register N7 is connected with pin 3 of the shift register N8, and pin 18 of the shift register N8 is connected with pin 3 of the shift register N9; pins 2 and 8 of the shift register N6, the shift register N7, the shift register N8 and the shift register N9 are connected and then connected with 5V voltage; pins 12 of the shift register N6, the shift register N7, the shift register N8 and the shift register N9 are connected and then connected to pin 30 of the MCU chip N1, and pin 3 of the shift register N6 is connected to pin 32 of the MCU chip N1.
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| CN201910923320.7A CN110588727A (en) | 2019-09-24 | 2019-09-24 | Light rail wireless subsystem control unit |
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| CN201910923320.7A CN110588727A (en) | 2019-09-24 | 2019-09-24 | Light rail wireless subsystem control unit |
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Application publication date: 20191220 |