CN110582955A - Coding device for polarization code - Google Patents

Coding device for polarization code Download PDF

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Publication number
CN110582955A
CN110582955A CN201780090381.9A CN201780090381A CN110582955A CN 110582955 A CN110582955 A CN 110582955A CN 201780090381 A CN201780090381 A CN 201780090381A CN 110582955 A CN110582955 A CN 110582955A
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bits
segment
parity
information
check
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CN110582955B (en
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陈捷
陈宇
杜冬阳
K·S·贾亚思格赫
谭隽
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Nokia Shanghai Bell Co Ltd
Nokia Technologies Oy
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Nokia Shanghai Bell Co Ltd
Nokia Technologies Oy
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

Abstract

there is provided a method comprising: generating a first set of one or more parity bits based on one or more information bits of a first segment of an information block of K information bits; constructing a code block comprising a first set of K information bits and check bits of the information block; performing polar encoding of the code block, wherein a first set of check bits is generated without considering any of the one or more information bits of the second segment of the information block; each of the information bits of the first segment is different from each of the information bits of the second segment; each of the information bits of the first segment is distributed over bit positions for polarization encoding in the code block that are less reliable than each of the information bits of the second segment.

Description

coding device for polarization code
Technical Field
the present invention relates to an apparatus, a method and a computer program product related to encoding, in particular polarization encoding.
Abbreviations
3 GPP: third generation partnership project
5G: fifth generation
BER: error rate
BLER: block error rate
CRC: cyclic redundancy check
DCI: downlink control information
DL: downlink link
eMBB: enhanced mobile broadband
FAR: false alarm rate
LDPC: low density parity check
mMTC: large-scale MTC
MTC: machine type communication
NR: new radio
PC: polarization encoding
QPSK: quadrature phase shift keying
RAN: radio access network
RRC: radio resource control
RX: receive/receive
TBCC: tail biting convolutional code
TX: transmission (transmit)/Transmission (Transmission)
UCI: uplink control information
UL: uplink link
XOR: exclusive OR
background
Polarization codes, which are a promising new channel coding scheme approaching the capacity of communication channels, are linear block codes developed by Erdal Arikan [1 ]. It is the first explicitly constructed channel code to enable the capability of symmetric binary input, discrete, memoryless channel (BI-DMC). With the help of the list decoder [2], polar codes have comparable or sometimes even better performance than the most advanced codes like LDPC and turbo codes, while the decoding complexity of polar codes is as low as o (lnlogn). Here, N is the coding block length and L is the list size. These characteristics make polar codes very attractive for many applications, such as digital communication and storage. In the 3GPP5G channel coding research project, polar codes are under investigation for potential 5G applications [4 ]. A well-established working assumption is that the polarization code will be used for the eMBB control channel.
This section briefly introduces polarization codes. This summary provides a background introduction to discuss the proposed scheme of the polarization code in detail.
Polarization codes are based on the concept of polarization [1 ]. The basic building blocks in the polarization code can be extracted from [1] as shown in fig. 1.
In FIG. 1, uiRepresenting the input bits of the encoder, yiRepresenting the output/coded bits of the encoder. It can be seen that in this configuration, the mutual information I (U)1；Y1，Y2) And pre-polarization pair I (U)1；Y1) Compared with the reduction of I (U)2；Y1，Y2，U1) And I (U)2；Y2) Compared to an increase. In this way, one channel is downgraded while another channel is upgraded.
By systematically copying and stacking these basic blocks, a longer polarization code can be constructed. For example, fig. 2 (taken from [1]) depicts a length-4 polarization code.
As the number of layers increases, the channel continues to degrade and upgrade. In other words, the polarization effect becomes more and more significant. Eventually, some channels will have zero capacity, while others will become error free. The idea of the polar code is to select an error-free channel to transmit the information bits and to force the value of the bits transmitted in the zero capacity channel to be some known value, e.g. 0. These bits are referred to in the literature as frozen bits.
by selecting the K best channels from the total N polarized channels, a rate K/N polarized code can be obtained. In the example shown in fig. 2, K ═ 2 may be selected, where (u) is3，u4) As information bits, and (u)1，u2) As a frozen bit. In effect, a polar code of rate 1/2 is constructed.
In 3GPP, it is agreed to use the polarization code pattern shown in fig. 3, which is equivalent to the classical code pattern of [1] shown in fig. 2. And are therefore shown here for convenience.
In 3GPP NR, the following protocol [3] is agreed for control channels:
protocol:
J CRC bits are provided (which can be used for error detection, also for auxiliary decoding and possibly for early termination)
J may differ in DL and UL
J may depend on the payload size in the UL (not excluding 0)
Furthermore, J' auxiliary bits are provided at reliable positions (which can be used for auxiliary decoding and possibly for early termination)
j + J ≦ the number of bits (n) required to satisfy the FAR targetFAR)+6
-working assumption:
For DL, nFAR16 (at least for DCI related to eMBB)
For UL, nFAR8 or 16 (at least for eMBB related UCI; note that this applies for UL with CRC case)
·J'＞0
working assumptions: providing J "< ═ 2 additional auxiliary bits (which can be used for auxiliary decoding and possibly for early termination) in unreliable positions
if significant benefit is shown from a larger J "value without undue complexity, it can be revisited in RAN1# 89-encouraging the company to evaluate J" additionally 8
J' (and J "(if any)) bits may be CRC and/or PC and/or hash bits (if possible, may be reduced)
After studying the early termination technique, further study J, J' (and J "(if any)) placement of the auxiliary bits
-additional formula
-distributed
Uniformity
Unevenness
as can be seen from this protocol, in addition to the classical (basic) polar codes, the 3GPP NR needs to employ an enhanced polar code design. More importantly, all polar code constructions contain a certain number of CRC bits that can be used for error correction and detection. In addition, distributing CRC bits along the control payload has been identified as a possible solution for providing early termination of polar decoding.
Some variants of classical polarization codes have been proposed:
CRC-assisted Polar code (CA-Polar) [2], which appends several CRC bits to the information block and uses the CRC bits to pick the best path from the decoded list;
Parity (PC) -polarization [5], which inserts parity bits into the information block and uses tree-pruning for list decoding; and
Distributed CRC [6], which distributes the CRC bits into information blocks. It may support both CRC check based and tree-pruned based list decoding.
reference to the literature
[1]E.Arikan,“Channel polarization:A method for constructing capacity achieving codes for symmetric binary-input memoryless channels,”IEEETrans.Inf.Theory,vol.55,no.7,pp.3051-3073,Jul.2009.
[2]I.Tal and A.Vardy,“List decoding of polar codes,”IEEE Trans.Inf.Theory,vol.61,no.5,pp.2213-2226,May 2015.
[3]Meeting Report of 3GPP TSG RAN WG1#88
[4]Meeting Report of 3GPP TSG RAN WG1#87
[5]R1-1608862,“Polar code construction for NR,”Huawei,HiSilicon,Lisbon,Portugal,Oct.2016.
[6]R1-1701033,“Polar codes design for UL control,”Nokia,Alcatel-Lucent Shanghai Bell
[7]F.Schiller and T.Mattes,“Analysis of nested CRC with additional net data by means of stochastic automata for safety-critical communication,”2008IEEE International Workshop on Factory Communication Systems,Dresden,2008,pp.295-304.
disclosure of Invention
the object of the present invention is to improve the prior art.
According to a first aspect of the present invention, there is provided an apparatus comprising: a first generating means configured to generate a first set of one or more check bits based on one or more information bits of a first segment of an information block of K information bits; a constructing means configured to construct a code block comprising a first set of K information bits and check bits of an information block; an encoding section configured to perform polarization encoding of a code block, wherein: the first generating means is configured to generate the first set of check bits without regard to any of the one or more information bits of the second segment of the information block; each of the information bits of the first segment is different from each of the information bits of the second segment; the construction component is configured to: each of the information bits of the first segment in the code block is distributed over less reliable bit positions for polarization coding than each of the information bits of the second segment.
the construction component may be adapted to: at least one of the parity bits in the first set of parity bits is distributed along the information bits of the first segment if the reliability of the bit positions of the code block for encoding monotonically increases from the first bit position to the last bit position of the code block.
The apparatus may further include: a second generating component configured to generate a second set of one or more parity bits based on at least a subset of the information bits of the second segment; wherein: the construction component may be configured to: the code block is constructed such that the code block comprises K information bits, a first set of check bits and a second set of check bits.
The construction component may be configured to: the information bits of the first segment and the first set of check bits are distributed over less reliable bit positions for polarization encoding than the second set of check bits.
The second generating means may be configured to generate the second set of check bits based on at least: a subset of the information bits of the second segment and at least one of the information bits of the first segment.
The second generating means may be configured to generate the second set of check bits based on at least: the subset of information bits of the second segment and at least one parity bit of the parity bits in the first set of parity bits.
the second segment may comprise a plurality of sub-segments; and the second generating means may be configured to: a respective subset of the second set of parity bits is generated based on the information bits of one of the sub-segments, regardless of the information bits of other ones of the sub-segments.
the construction component may be configured to: each of the check bits in the first set in the code block is distributed over less reliable bit positions for polarization coding than each of the information bits of the second segment.
The first generating means may be configured to generate the check bits in the first set by at least one of: cyclic redundancy check, parity check, and hash sequence.
According to a second aspect of the present invention, there is provided an apparatus comprising: a decoding means configured to perform polar decoding of a first segment comprising bits of the received encoded code block, a first calculation means adapted to calculate a first set of one or more parity bits based on a predefined subset of the bits of the first segment, without taking into account any bits of a second segment of the received encoded code block; a first checking component configured to check whether the first set of check bits is equal to one or more bits at respective predefined first check bit positions; a deciding part configured to decide processing of bits of at least a second segment based on a result of the checking, wherein: each of the bits of the second segment is different from each of the bits of the first segment; for polar decoding, the respective positions of all bits of a first segment in a code block are less reliable than the respective positions of all bits of a second segment.
The parity bits in the first set of parity bits may be distributed along bits in a subset of the first segment if the reliability of the bit positions of the code block for polar decoding increases monotonically from the first bit position to the last bit position of the code block.
The apparatus may further include: a second computing component configured to compute a second set of one or more parity bits based on a predefined subset of bits of the second segment; a second checking component configured to check whether the second set of check bits is equal to one or more bits of the second section at respective predefined second check bit positions.
For polar decoding, the respective positions of all bits of the first segment in the code block are less reliable than the predefined second parity bit positions.
The second computing component may be configured to: a second set of parity bits is calculated based on the predefined subset of the second segment and the at least one predefined bit of the first segment.
at least one of the at least one predefined bit of the first segment may be at a respective one of the first parity bit positions.
the second segment may comprise a plurality of sub-segments; the second computing component may be configured to: a respective subset of the second set of parity bits is calculated based on bits of one of the sub-segments, irrespective of bits of other ones of the sub-segments.
The first parity bit positions may be distributed along the bits of the first segment.
The first computing means may be configured to compute the first set of one or more parity bits by at least one of: cyclic redundancy check, parity check, and hash sequence.
The processing of the second segment may comprise at least one of detecting and decoding.
according to a third aspect of the invention, there is provided a method comprising: generating a first set of one or more parity bits based on one or more information bits of a first segment of an information block of K information bits; constructing a code block comprising a first set of K information bits and check bits of the information block; performing polar encoding of the code block, wherein a first set of check bits is generated without considering any of the one or more information bits of the second segment of the information block; each of the information bits of the first segment is different from each of the information bits of the second segment; each of the information bits of the first segment is distributed over bit positions for polarization encoding in the code block that are less reliable than each of the information bits of the second segment.
At least one of the parity bits in the first set of parity bits may be distributed along the information bits of the first segment if the reliability of the bit positions of the code block for encoding monotonically increases from the first bit position to the last bit position of the code block.
the method may further comprise: generating a second set of one or more parity bits based at least on a subset of the information bits of the second segment; wherein: the code block may be constructed such that the code block includes K information bits, a first set of check bits, and a second set of check bits.
The first set of information bits and check bits of the first segment may be distributed over less reliable bit positions for polarization encoding than the second set of check bits.
The second set of parity bits may be generated based on at least a subset of the information bits of the second segment and at least one of the information bits of the first segment.
The second set of parity bits may be generated based at least on the subset of information bits of the second segment and at least one of the parity bits in the first set of parity bits.
the second segment may comprise a plurality of sub-segments; and the respective subset of the second set of parity bits may be generated based on information bits of one of the sub-segments without regard to information bits of other ones of the sub-segments.
each check bit of the first set of check bits may be distributed in the code block over less reliable bit positions for polarization coding than each information bit of the information bits of the second segment.
The check bits in the first set may be generated by at least one of: cyclic redundancy check, parity check, and hash sequence.
according to a fourth aspect of the present invention, there is provided a method comprising: performing polar decoding of a first segment, the first segment comprising bits of the received encoded code block; calculating a first set of one or more parity bits based on a predefined subset of bits of the first segment, without considering any bits of the second segment of the received encoded code block; checking whether the first set of check bits is equal to one or more bits at respective predefined first check bit positions; deciding on the processing of the bits of at least the second segment based on the result of the checking, wherein: each of the bits of the second segment is different from each of the bits of the first segment; for polar decoding, the respective positions of all bits of a first segment in a code block are less reliable than the respective positions of all bits of a second segment.
The parity bits in the first set of parity bits may be distributed along bits in a subset of the first segment if the reliability of the bit positions of the code block for polar decoding increases monotonically from the first bit position to the last bit position of the code block.
The method may further comprise: calculating a second set of one or more parity bits based on a predefined subset of bits of the second segment; checking whether the second set of check bits is equal to one or more bits of the second section at respective predefined second check bit positions.
for polar decoding, the respective positions of all bits of the first segment in the code block are less reliable than the predefined second parity bit positions.
The second set of parity bits may be calculated based on a predefined subset of the second segment and at least one predefined bit of the first segment.
At least one of the at least one predefined bit of the first segment may be at a respective one of the first parity bit positions.
The second segment may comprise a plurality of sub-segments; the respective subset of the second set of parity bits may be calculated based on bits of one of the sub-segments without regard to bits of other ones of the sub-segments.
The first parity bit positions may be distributed along the bits of the first segment.
the first set of one or more parity bits may be calculated by at least one of: cyclic redundancy check, parity check, and hash sequence.
The processing of the second segment may comprise at least one of detecting and decoding.
each of the methods of the third and fourth aspects may be a polarization encoding method.
According to a fifth aspect of the present invention, there is provided a computer program product comprising a set of instructions which, when executed on an apparatus, is configured to cause the apparatus to perform the method according to any one of the third and fourth aspects. The computer program product may be embodied as a computer-readable medium or may be directly loadable into a computer.
According to some embodiments of the invention, at least one of the following advantages may be achieved:
Improve decoding performance and/or the likelihood of early termination;
Taking into account differences in polarization weights in reliable positions of the polarization code;
the implementation structure is simple;
Flexibility in achieving a trade-off between decoding performance and false positive detection performance;
The relationship between the parity bits in the first and second segments can be exploited. For example, a nested CRC polynomial [7] may be considered.
It should be understood that any of the above-described modifications may be applied to the various aspects to which they relate, individually or in combination, unless they are explicitly stated to exclude alternatives.
drawings
Further details, features, objects and advantages will become apparent from the following detailed description of preferred embodiments of the invention, taken in conjunction with the accompanying drawings, in which:
Fig. 1 shows the basic building blocks of a polar code;
FIG. 2 shows a code pattern of a length-4 polarization code;
FIG. 3 shows a code pattern of a length N polarization code;
FIG. 4 illustrates fragmentation of information bits according to some embodiments of the invention;
FIG. 5 illustrates the generation of two sets of check bits according to some embodiments of the invention;
fig. 6 illustrates embedding two sets of check bits into a code block according to some embodiments of the invention;
FIG. 7 shows an apparatus according to an embodiment of the invention;
FIG. 8 illustrates a method according to an embodiment of the invention;
FIG. 9 shows an apparatus according to an embodiment of the invention;
FIG. 10 illustrates a method according to an embodiment of the invention; and
Fig. 11 shows an apparatus according to an embodiment of the invention.
Detailed Description
Hereinafter, certain embodiments of the present invention are described in detail with reference to the accompanying drawings, wherein features of the embodiments can be freely combined with each other unless otherwise specified. It should be clearly understood, however, that the description of certain embodiments is given by way of example only and is not intended to limit the invention to the details disclosed.
Further, it should be understood that the apparatus is configured to perform the corresponding method, although in some cases only the apparatus or only the method is described.
in view of the protocol of 3GPP NR, the inventors have discovered the following problems associated with the conventional CRC distribution method:
when the complete information block is used for CRC generation, the early termination option occurs much later in the continuous de-decoding process. The main reason for this is that the first CRC bits typically depend on 1/3 of the information bits of the (control) payload. Therefore, the decoder must wait a long time to check the first CRC bit, and the benefit of early termination may not be apparent.
Since polar decoding requires a larger list size, it may be desirable to have a larger number of CRC bits with polar codes than with conventional LTE TBCC codes. The most reliable bit positions of the polar code block are occupied by both information bits and CRC bits. For example, the restriction in the above protocol (J + J' < ═ the number of bits (n) required to meet the FAR targetFAR) +6) is mainly to limit this CRC overhead to reliable bit positions of the polar code.
the most reliable bit positions of the polarization code typically do not suffer as much error as reliable positions that are close to unreliable positions. The use of a CRC to protect the most reliable bits may be less critical than providing additional protection for the lower end of the reliable locations. Therefore, an efficient CRC generation method is desired for the polar code.
According to some embodiments of the present invention, a new multi-segment structure is provided for polarization encoding/decoding. The new multi-segment structure is simple to implement and provides a solution to the above-mentioned problems. Moreover, the solution is flexible in achieving a trade-off between decoding performance and false positive detection performance. Enhanced polar code design according to some embodiments of the present invention may include generating parity bits based on single or multiple segments to achieve better polar decoding performance. As an example of a plurality of segments, the present description mainly relates to two segments. Some embodiments of the invention may be considered as enhancements to the distributed CRC scheme of [6 ].
Polarization encoding and decoding according to some embodiments of the present invention rely on information block segmentation to generate a first set of CRC bits. The input bits to the polar encoder are divided into two or more segments. Some parity bits are computed based on the first segment without taking into account the second (and possibly other) segments, and these parity bits may then be embedded in the first segment, or close to the first segment, or anywhere else in the code block. Another set of check bits may then be calculated based on the second segment. The other set of check bits may be calculated based on the entire information block, i.e. the first and second segments and possibly further segments. The check bit calculation of the second set of check bits may even be based on the first set of check bits.
Segmentation of the information block is only suitable for CRC generation and not for polar encoding and decoding. Polar coding/decoding treats a code block as a single block that includes the entire information block (all segments of the information block).
The CRC bits calculated based on the first segment of information may be distributed along the first segment of information. A first information block segment with a first set of parity bits (if the first set of parity bits is distributed along the first information block segment) may be placed at the lower end of the reliable bit positions. The first information block segment may be interleaved to facilitate early termination and tree pruning by placing the associated information bits and associated CRC bits in consecutive bit positions of reliable locations. The second set of CRC bits computed based on at least the second segment (e.g., based on the complete information block) may be distributed in the code block in two ways:
1. along a first segment and a second segment of the information block.
2. Only along the second information block segment.
The term "CRC bits distributed along a segment" includes distributing interleaved CRC bits between information bits of respective segments of an information block, and also distributing CRC bits at positions directly in front of or directly behind respective segments, i.e. there is no further segment of information bits or CRC bits in a set of further CRC bits between the first (last) information bit of the segment and the corresponding CRC bit. The multiple CRC bits in a set may be placed directly in front of or directly behind the information bits of a segment.
In some embodiments, a first set of CRC bits may be generated based on a majority of the information block (═ first segment), where the number of CRC bits of the first set may be (much) larger than the second set of CRCs. The information bits of the first segment and the CRC bits of the first set occupy the lower end of the polarization-coded reliable bit positions. The remaining information bits not used to generate the first set of CRC bits may be placed at the most reliable bit positions of the polar coding. In such an embodiment, the second set of CRC bits having fewer CRC bits than the first set may be sufficient to detect errors of the complete information block.
in a variation of such an embodiment, the CRC bits are generated based only on the first segment of information bits and not on the second (or other) segment of information bits. That is, in such embodiments, it is assumed that the information bits of the second segment are error-free, such that CRC bits are not required to protect the information bits.
In some embodiments, the number of information block segments may be greater than two. A first set of parity bits may be prepended, appended to, or interleaved with the first segment, the first set of parity bits being based on the first segment. A respective set of check bits may be prepended/appended/interleaved to each of the subsequent segments, the respective set of check bits being based on the respective segment. For example, the respective set of check bits may be based only on the respective segment, or it may be based on the information block from the first segment to the respective segment.
If the information block comprises more than two segments, the information block can conceptually be considered as an information block comprising two segments, i.e. the first segment and the second segment are composed of a plurality of sub-segments. In this concept, in previous concepts of information blocks having more than two segments, each of the sub-segments corresponds to a respective one of the segments other than the first segment.
for the two-phase case, the decoding process can be divided into two phases:
1. decoding starts with a first segment that uses only a first set of parity bits to decide which paths should be kept in the list. Early termination may also be triggered when CRC bits for all paths fail.
2. The second segment is then decoded, which may be list decoded using the first and second sets of parity bits.
The decoding method can easily be extended to examples with more than two segments.
in another embodiment, the decoding may not check the CRC bits at an intermediate stage of decoding, but rather treat them as information bits. After decoding the complete information block, a CRC check may be performed on all paths (or a limited number of paths) to pick the correctly decoded path. The deinterleaving step may be performed before checking the CRC bits of the decoded information block.
some differences between some embodiments of the present invention and the prior art are:
CRC generation is done in two steps for the same block of information.
The CRC bits may be distributed separately for different segments within the information block. Some embodiments of the invention may place the CRC bits at earlier positions than if distributed CRC scheme [6] was used. This may improve decoding performance and the likelihood of early termination.
The difference in polarization weights in reliable positions of the polarization code should be taken into account when dividing the CRC overhead between the first and second sections of the information block.
Some embodiments of the invention may have a simple structure for implementation.
some embodiments of the invention provide flexibility in achieving a trade-off between decoding performance and false positive detection performance by adjusting the number of check bits used for decoding and/or detection; and
the relationship between the parity bits in the first and second segments can be exploited. For example, if the parity bits in the second segment are also based on the parity bits in the first segment, a nested CRC polynomial [7] may be considered.
In the following, embodiments of the invention will be explained in more detail, in which the information block is divided into two sections, as shown in fig. 4. Wherein:
·u0，...，uK-1is the information bit to be encoded; and is
K is the total number of information bits.
the first set of parity bits is computed based on only (at least a portion of) the bits in the first segment and the second set of parity bits is computed based on the bits in the entire information block.
Although in the present embodiment the calculation of the second set of check bits is based on the entire information block (also referred to as input block), in other embodiments the second set of check bits may be based on the second segment only. This can be seen as a special case where the computation is based on the whole block, but only the bits in the first segment are ignored. In some embodiments, only a portion of the information bits of the first segment may be used to calculate the second set of check bits.
In some embodiments, the input to the computation of the second set of parity bits may or may not contain the first set of parity bits. In some embodiments, the second set of parity bits may be calculated based on a portion of the first set of parity bits.
the check relationship (i.e., the relationship between the check bits and the information bits on which the check bits are based) is shown in fig. 5. In this example, the second set of parity bits is also calculated based on the first set of parity bits.
After the parity bit calculation is completed, in the present embodiment, the parity bits are embedded in the original information block, as shown in fig. 6.
In principle, the second set of check bits may be anywhere in the resulting code block. One way to place the parity bits is to place them at the end of the corresponding segment as shown in fig. 6. However, this is not mandatory. The location of the parity bits in fig. 6 is for illustration purposes only.
the choice of segment size may depend on the overall decoding performance with embedded check bits. It may also depend on the underlying parity bit calculation method. For example, if distributed CRC method [6] is used, the size of the first segment may not be large, as early placement of CRC bits would otherwise be made difficult.
Thus, in some embodiments of the invention, the division of the information block into segments may be predefined and therefore known to both the sender and the recipient. In some embodiments, the segmentation may depend on, for example, decoding performance. In these cases, the receiver may adjust the number of information bits per segment and/or the number of CRC bits per set of CRC bits and inform the sender of this, e.g., by control signaling. Alternatively, the receiver may inform the sender of the channel quality, and then the sender adjusts the number of information bits per segment and/or the number of CRC bits per CRC bit set, and informs the receiver of the new settings.
one embodiment of the invention may include the steps of:
CRC checks are used on both sets of check bits.
The resulting CRC bits are distributed.
A variety of methods are possible that utilize check bits. Some possibilities are listed here:
O can be decoded using only the parity bits in the first segment and detected using only the parity bits in the second segment; or
Omicron can use the parity bits in both segments for decoding and detection; or
Omicron can be decoded using the parity bits in the first segment and a portion of the parity bits in the second segment, and detected using only the remaining parity bits in the second segment;
Other tradeoffs in the number of bits used for decoding and detection are possible.
The decoding algorithm may be:
Conventional CRC-assisted list decoding; or
Omicron tree-prune based list decoding.
A major advantage of some embodiments of the invention is that since the check bits generated based on the first segment protect only a part of the input information block, they make the distribution of CRC bits easier and therefore the distributed CRC bits can be placed in earlier positions than the method in [6 ]. Theoretically, the bits in the first segment generally suffer from a higher probability of decoding errors than the bits in the second segment, and therefore placing the parity bits at an earlier stage can help to detect these errors early.
In this embodiment, the entire generator matrix of CRC bits may be summarized as
Where I is the diagonal matrix, 0 is the zero matrix, and A, B, C is the resulting CRC syndrome matrix. Based on this observation, the invention can be further improved by carefully deciding on the appropriate CRC polynomial [7] to be used.
In another embodiment, when three segments are used, the entire generator matrix of CRC bits may be summarized as
Fig. 7 shows an apparatus according to an embodiment of the invention. The apparatus may be a coding unit of an eNodeB or a UE or an element thereof. FIG. 8 illustrates a method according to an embodiment of the invention. The apparatus according to fig. 7 may perform the method of fig. 8, but is not limited to this method. The method of fig. 7 may be performed by the apparatus of fig. 8, but is not limited to being performed by the apparatus.
the apparatus comprises a generating means 10, a constructing means 20 and an encoding means 30. Each of the generating component 10, the constructing component 20 and the encoding component 30 may be a generator, a constructor and an encoder, respectively. Each of the generating means 10, the constructing means 20 and the encoding means 30 may be a generating processor, a constructing processor and an encoding processor, respectively.
The generating section 10 generates a set of one or more parity bits based on one or more information bits of a first section of the information block of K information bits (S10). Wherein the generating means 10 generates the first set of check bits irrespective of any information bit of the one or more information bits of the second segment of the information block. The first segment and the second segment are disjoint from each other, i.e., each of the information bits of the first segment is different from each of the information bits of the second segment.
The construction section 20 constructs a code block including all information bits (═ K information bits) and a set of check bits of the information block (S20). Wherein the construction means 20 distribute each information bit of the information bits of the first segment in the code block over less reliable bit positions for polarization coding than each information bit in the information bits of the second segment. The polarization encoding for judging reliability is polarization encoding performed by the encoding device 30. The construction component 20 may distribute the check bits in the set along the information bits of the first segment at less reliable positions than the information bits of the second segment.
The encoding section 30 performs polarization encoding of the code block constructed by the construction section 20 (S30).
Fig. 9 shows an apparatus according to an embodiment of the invention. The apparatus may be a decoding unit of an eNodeB or a UE or an element thereof. FIG. 10 illustrates a method according to an embodiment of the invention. The apparatus according to fig. 9 may perform the method of fig. 10, but is not limited to this method. The method of fig. 9 may be performed by the apparatus of fig. 10, but is not limited to being performed by the apparatus.
The apparatus includes a decoding part 110, a calculating part 120, a verifying part 130, and a deciding part 140. Each of the decoding part 110, the calculating part 120, the verifying part 130 and the deciding part 140 may be a decoder, a calculator, a checker and a decider, respectively. Each of the decoding part 110, the calculating part 120, the checking part 130 and the deciding part 140 may be a decoding processor, a calculating processor, a checking processor and a deciding processor, respectively.
The decoding section 110 polarization-decodes a first section including bits of the received encoded code block (S110).
The calculating means 120 calculates a set of one or more parity bits based on the predefined subset of bits of the first segment (S120). Wherein the calculation means 120 disregards any bits of the second segment of the received encoded code block. The first segment and the second segment are disjoint from each other, i.e., each of the information bits of the first segment is different from each of the information bits of the second segment. The predefined subset does not include parity bits of the first segment received at the predefined parity bit positions. For polar decoding, the respective positions of all bits of a first segment in a code block are less reliable than the respective positions of all bits of a second segment. The reliability is judged for the polarization decoding performed by the decoding section 110.
The checking part 130 checks whether the set of check bits is equal to one or more bits at the respective predefined check bit positions (S130). One or more bits may be distributed along the information bits of the first segment.
Based on the result of the check in S130, the decision section 140 decides processing of at least the bits of the second segment (S140). For example, the processing of the second segment may include at least one of detecting and decoding. This decision may be applied not only to the second segment but also to the first segment.
Fig. 11 shows an apparatus according to an embodiment of the invention. The apparatus comprises at least one processor 410, at least one memory 420 comprising computer program code, and at least one processor 410, wherein the at least one memory 420 and the computer program code are arranged to cause the apparatus at least to perform at least one of the methods according to fig. 8 and 10.
Some embodiments of the invention may be used in 3GPP devices, e.g. in the encoding and/or decoding units thereof. However, embodiments of the present invention are not limited to 3GPP devices. They can be used in any type of device that employs polarization encoding.
some embodiments of the invention are described using CRC bits as check bits. However, some embodiments may use another error detection code in addition to the CRC. For example, any systematic code may be used, such as a checksum, parity check, CRC check, type code, and the like.
A piece of information may be transmitted from one entity to another in one or more messages. Each of these messages may include additional (different) information.
The names of network elements, protocols, and methods are all based on current standards. In other versions or other technologies, the names of these network elements and/or protocols and/or methods may be different as long as they provide the corresponding functionality.
The format of the messages and information elements is not limited to that shown in some of the figures. These formats are merely examples.
Unless stated otherwise or clear from context, two physically different statements mean that they perform different functions. This does not necessarily mean that they are based on different hardware. That is, each of the entities described in this specification may be based on different hardware, or some or all of the entities may be based on the same hardware. This does not necessarily mean that they are based on different software. That is, each of the entities described in this specification may be based on different software, or some or all of the entities may be based on the same software. Each of the entities described in this specification may be implemented in a cloud.
From the above description, it should therefore be apparent that example embodiments of the present invention provide, for example, a base station (e.g., an eNodeB) or a component thereof (such as a TX path or a coding unit or an RX path or a decoding unit thereof) or a terminal (such as a user equipment or an MTC device) or a component thereof (such as a TX path or a coding unit or an RX path or a decoding unit thereof), an apparatus implementing the above, a method for controlling and/or operating the above, and a computer program controlling and/or operating the above, and a medium carrying such a computer program and forming a computer program product.
By way of example only, implementations of any of the above blocks, apparatus, systems, techniques, or methods include implementation as hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.
It is to be understood that what has been described above is what is presently considered to be the preferred embodiments of the invention. It should be noted, however, that the description of the preferred embodiments has been given by way of example only and that various modifications may be made without departing from the scope of the invention as defined by the appended claims.

Claims (40)

1. An apparatus, comprising:
A first generating means configured to generate a first set of one or more check bits based on one or more information bits of a first segment of an information block of K information bits;
A constructing component configured to construct a code block comprising the first set of the K information bits and parity bits of the information block;
An encoding component configured to perform polarization encoding of the code block, wherein:
The first generating means is configured to generate the first set of check bits without regard to any of the one or more information bits of the second segment of the information block;
Each of the information bits of the first segment is different from each of the information bits of the second segment;
the construction component is configured to: distributing each of the information bits of the first segment in the code block over less reliable bit positions for the polarization encoding than each of the information bits of the second segment.
2. The apparatus of claim 1, wherein:
The construction component is adapted to: at least one of the parity bits in the first set of parity bits is distributed along the information bits of the first segment if the reliability of the bit positions of the code block for the encoding monotonically increases from a first bit position to a last bit position of the code block.
3. The apparatus of any of claims 1-2, further comprising:
A second generating component configured to generate a second set of one or more parity bits based on at least a subset of the information bits of the second segment; wherein:
the construction component is configured to: constructing the code block such that the code block includes the K information bits, the first set of parity bits, and the second set of parity bits.
4. The apparatus of claim 3, wherein:
the construction component is configured to: distributing said first set of information bits and check bits of said first segment over less reliable bit positions for said polarization encoding than said second set of check bits.
5. The apparatus of any of claims 3 and 4, wherein:
The second generating means is configured to generate the second set of check bits based on at least: at least one of the subset of the information bits of the second segment and the information bits of the first segment.
6. The apparatus of any of claims 3 to 5, wherein:
The second generating means is configured to generate the second set of check bits based on at least: the subset of the information bits of the second segment and at least one of the parity bits in the first set of parity bits.
7. The apparatus of any of claims 3 to 6, wherein:
The second segment comprises a plurality of subsegments; and
The second generation means is configured to: generating a respective subset of the second set of parity bits based on the information bits of one of the sub-segments without regard to the information bits of other of the sub-segments.
8. the apparatus of any one of claims 1 to 7, wherein:
the construction component is configured to: distributing each of the parity bits in the first set in the code block over less reliable bit positions for the polarization encoding than each of the information bits of the second segment.
9. the apparatus of any one of claims 1 to 8, wherein:
the first generating means is configured to generate the check bits in the first set by at least one of: cyclic redundancy check, parity check, and hash sequence.
10. An apparatus, comprising:
A decoding section configured to perform polar decoding of a first segment, the first segment comprising bits of the received encoded code block;
A first calculation component adapted to calculate a first set of one or more parity bits based on a predefined subset of the bits of the first segment, without considering any bits of a second segment of the received encoded code block;
A first checking component configured to check whether the first set of check bits is equal to one or more bits at respective predefined first check bit positions;
a deciding component configured to decide processing of the bits of at least the second segment based on a result of the checking, wherein:
Each of the bits of the second segment is different from each of the bits of the first segment;
for the polar decoding, respective positions of all the bits of the first segment in the code block are less reliable than respective positions of all the bits of the second segment.
11. the apparatus of claim 10, wherein:
The parity bits in the first set of parity bits are distributed along the bits in the subset of the first segment if the reliability of the bit positions of the code block for the polar decoding increases monotonically from a first bit position to a last bit position of the code block.
12. The apparatus of any of claims 10 to 11, further comprising:
A second computation component configured to compute a second set of one or more parity bits based on a predefined subset of the bits of the second segment;
a second checking component configured to check whether the second set of check bits is equal to one or more bits of the second section at respective predefined second check bit positions.
13. The apparatus of claim 12, wherein:
For the polar decoding, respective positions of all the bits of the first segment in the code block are less reliable than the predefined second parity bit positions.
14. the apparatus of any one of claims 12 and 13, wherein:
The second computing component is configured to: calculating the second set of parity bits based on the predefined subset of the second segment and at least one predefined bit of the first segment.
15. The apparatus of claim 14, wherein:
At least one of the at least one predefined bit of the first segment is at a respective one of the first parity bit positions.
16. the apparatus of any one of claims 12 to 15, wherein:
The second segment comprises a plurality of subsegments;
The second computing component is configured to: calculating a respective subset of said second set of parity bits based on said bits of one of said sub-segments, irrespective of said bits of other of said sub-segments.
17. The apparatus of any one of claims 10 to 16, wherein:
The first parity bit positions are distributed along the bits of the first segment.
18. The apparatus of any one of claims 10 to 17, wherein:
The first computing component is configured to compute the first set of one or more parity bits by at least one of: cyclic redundancy check, parity check, and hash sequence.
19. the apparatus according to any of claims 10 to 18, wherein the processing of the second segment comprises at least one of detecting and decoding.
20. a method, comprising:
generating a first set of one or more parity bits based on one or more information bits of a first segment of an information block of K information bits;
Constructing a code block comprising the first set of the K information bits and check bits of the information block;
Performing polar coding of the code block, wherein:
Generating the first set of parity bits without regard to any of the one or more information bits of the second segment of the information block;
Each of the information bits of the first segment is different from each of the information bits of the second segment;
Each of the information bits of the first segment is distributed in the code block over bit positions for the polarization encoding that are less reliable than each of the information bits of the second segment.
21. the method of claim 20, wherein:
At least one of the parity bits in the first set of parity bits is distributed along the information bits of the first segment if the reliability of the bit positions of the code block for the encoding monotonically increases from a first bit position to a last bit position of the code block.
22. The method of any of claims 20 to 21, further comprising:
Generating a second set of one or more check bits based at least on a subset of the information bits of the second segment; wherein:
The code block is structured such that the code block includes the K information bits, the first set of parity bits, and the second set of parity bits.
23. The method of claim 22, wherein:
Said first set of information bits and check bits of said first segment are distributed over less reliable bit positions for said polarization encoding than said second set of check bits.
24. The method according to any one of claims 22 and 23, wherein:
The second set of parity bits is generated based at least on the subset of the information bits of the second segment and at least one of the information bits of the first segment.
25. the method of any one of claims 22 to 24, wherein:
the second set of parity bits is generated based at least on the subset of the information bits of the second segment and at least one of the parity bits in the first set of parity bits.
26. The method of any one of claims 22 to 25, wherein:
The second segment comprises a plurality of subsegments; and
A respective subset of the second set of parity bits is generated based on the information bits of one of the sub-segments without regard to the information bits of other of the sub-segments.
27. the method of any one of claims 20 to 26, wherein:
Each of the check bits of the first set is distributed in the code block over bit positions for the polarization encoding that are less reliable than each of the information bits of the second segment.
28. the method of any one of claims 20 to 27, wherein:
the check bits in the first set are generated by at least one of: cyclic redundancy check, parity check, and hash sequence.
29. A method, comprising:
performing polar decoding of a first segment, the first segment comprising bits of the received encoded code block;
Calculating a first set of one or more parity bits based on a predefined subset of the bits of the first segment, without considering any bits of a second segment of the received encoded code block;
Checking whether the first set of check bits is equal to one or more bits at respective predefined first check bit positions;
Deciding on the processing of the bits of at least the second segment based on the result of the check, wherein:
each of the bits of the second segment is different from each of the bits of the first segment;
For the polar decoding, respective positions of all the bits of the first segment in the code block are less reliable than respective positions of all the bits of the second segment.
30. the method of claim 29, wherein:
The parity bits in the first set of parity bits are distributed along the bits in the subset of the first segment if the reliability of the bit positions of the code block for the polar decoding increases monotonically from a first bit position to a last bit position of the code block.
31. the method of any of claims 29 to 30, further comprising:
Calculating a second set of one or more parity bits based on a predefined subset of the bits of the second segment;
Checking whether the second set of check bits is equal to one or more bits of the second segment at respective predefined second check bit positions.
32. the method of claim 31, wherein:
for the polar decoding, respective positions of all the bits of the first segment in the code block are less reliable than the predefined second parity bit positions.
33. The method according to any one of claims 31 and 32, wherein:
The second set of parity bits is computed based on the predefined subset of the second segment and at least one predefined bit of the first segment.
34. the method of claim 33, wherein:
At least one of the at least one predefined bit of the first segment is at a respective one of the first parity bit positions.
35. The method of any one of claims 31 to 34, wherein:
the second segment comprises a plurality of subsegments;
A respective subset of the second set of parity bits is calculated based on the bits of one of the sub-segments without regard to the bits of other of the sub-segments.
36. The method of any one of claims 29 to 35, wherein:
The first parity bit positions are distributed along the bits of the first segment.
37. The method of any one of claims 29 to 36, wherein:
the first set of one or more parity bits is computed by at least one of: cyclic redundancy check, parity check, and hash sequence.
38. The method of any of claims 29-37, wherein the processing of the second segment comprises at least one of detecting and decoding.
39. A computer program product comprising a set of instructions which, when executed on an apparatus, is configured to cause the apparatus to perform the method of any of claims 20 to 38.
40. the computer program product according to claim 39, embodied as a computer-readable medium or directly loadable into a computer.
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