CN110545103A - ADC calibration method based on least square method - Google Patents
ADC calibration method based on least square method Download PDFInfo
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- CN110545103A CN110545103A CN201910978043.XA CN201910978043A CN110545103A CN 110545103 A CN110545103 A CN 110545103A CN 201910978043 A CN201910978043 A CN 201910978043A CN 110545103 A CN110545103 A CN 110545103A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1028—Calibration at two points of the transfer characteristic, i.e. by adjusting two reference values, e.g. offset and gain error
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Abstract
the invention discloses an ADC calibration method based on a least square method, which comprises the following steps: 1. calibrating the DAC consistency; 2. starting DAC from 0 and increasing to the maximum voltage as ADC input; 3. ADC selects a CHANNEL port; 4. initializing an ADC; 5. sampling and storing ADC data; 6. taking a voltage and sampling a CODE value; 7. substituting the data into a least square method based on a formula of a linear equation to solve to obtain a value a and a value b; 8. reversely deducing the voltages of other sampling points, and calculating the deviation between other sampling points and the theoretical voltage; 9. writing the A and B values into a specific area of the FLASH; the invention realizes that the DAC is used as output to the ADC to realize the calibration of the ADC, and the invention has simple calculation, convenient operation and low cost; offset error, gain error and nonlinear error of ADC are comprehensively considered, and the consistency and precision of ADC are improved.
Description
Technical Field
the invention relates to the technical field of integrated circuit analog circuits, in particular to an ADC calibration method based on a least square method.
Background
ADC, acronym for Analog-to-Digital Converter, refers to an Analog-to-Digital Converter or Analog-to-Digital Converter. Refers to a device that converts a continuously varying analog signal into a discrete digital signal. Real-world analog signals, such as temperature, pressure, sound or images, need to be converted into digital form that is easier to store, process and transmit.
at present, the requirements for the precision and the consistency of the ADC in the integrated circuit industry are higher and higher, such as the unmanned aerial vehicle industry, but at present, the precision and the consistency of the ADC of chips of many companies may be far from the performance gap of the ADC of the european and american factories. In the prior art, the accuracy of ADC calibration is improved mostly from a hardware level, but few ADC calibration methods for improving the accuracy from a data algorithm are available. Therefore, the technical problems of low ADC consistency, poor precision, low automation degree of the calibration method, human factors in the calibration method, too few sampling points and the like still exist.
in order to solve the above technical problems, those skilled in the art try to provide an ADC calibration method based on the least square method, which can effectively improve the accuracy and consistency of the ADC, and is greatly improved in theory and application, and has the advantages of convenient and simple implementation, simple and understandable external circuit, high automation degree, and effective avoidance of the influence of various human factors.
disclosure of Invention
in view of the above-mentioned drawbacks of the prior art, the technical problems to be solved by the present invention are: if the method is based on the least square method, the calibration of the ADC is improved, and the consistency and the precision of the ADC are improved.
in order to achieve the above object, the present invention provides an ADC calibration method based on a least square method, the method including the steps of:
Step 1, carrying out consistency calibration on 13-bit DAC;
Step 2, increasing the DAC to the maximum voltage from 0 to 5mV in sequence according to the step value by controlling the upper computer in the automatic platform, wherein if a 0-VDD gear is selected, the maximum voltage is VDD voltage; if the gear of 0-2V is selected, the maximum voltage is 2V voltage, and the maximum voltage is sequentially used as the input of the ADC;
Step 3, the ADC selects a CHANNEL port, and the input of the DAC is used as the standard input of the ADC;
Step 4, initializing an ADC (analog to digital converter), wherein the initialization comprises clock configuration and sampling;
Step 5, sampling and storing ADC data through the automation platform;
Step 6, taking an ADC sampling voltage value and a CODE value by taking 50mv as a stepping value;
Step 7, taking the sampling voltage value and the CODE value as a group of data, substituting the group of data into a least square method and solving the data based on a formula of a linear equation to obtain a value a and a value b;
8, reversely deducing the voltages of other sampling points by using the values a and b, and calculating the deviation between the other sampling points and the theoretical voltage;
and 9, writing the values A and B into a specific area of the FLASH by using an upper computer of the automation platform, and enabling a user to directly read the data in the area to be used as the calibrated ADC data.
Further, after the DAC in the step 1 is calibrated, the deviation is not more than 0.05 mV.
further, in step 2, the stepping value can be flexibly configured, and the automatic increase of the stepping value can be realized through the operation of the upper computer, so that the DAC can be increased to the maximum voltage from 0V.
Further, in step 3, the input of the ADC is from 0v to the maximum voltage.
further, in step 4, the ADC initialization specifically includes clock configuration, channel number configuration, GPIO configuration, and sampling rate configuration.
further, in step 5, the sampling specifically includes sampling ADC sampling data at each voltage for 100 times by the automation platform, screening out a maximum value and a minimum value, taking an average value, and storing the data.
Further, in step 6, taking the ADC sample voltage value and the CODE value is performed by the automation platform.
further, in step 7, the least square method is based on a least square equation in which a linear equation is a linear function, and specifically satisfies the following formula:
The system of equations for solving the values of a and b specifically satisfies the following equations:
wherein yi ═ axi + b.
Further, in step 8, the a and b values calculated in step 7 are used for fitting the obtained straight line based on the least square method, and all sampling points are substituted into the equation to reversely deduce the optimized voltage and theoretical deviation.
further, in step 9, the specific zone is a special INFO zone of flash.
Compared with the prior art, the invention at least has the following technical advantages:
1. The ADC consistency and precision can be obviously improved;
2. Accidental errors caused by too few voltage dividing resistors and sampling points are reduced;
3. The whole platform is more automatic, and the influence of human factors is reduced;
4. The method not only reduces the deviation of intercept and slope, but also can effectively reduce the input deviation and other external deviations.
Drawings
FIG. 1 is a schematic flow diagram of one embodiment of the present invention.
Detailed Description
A preferred embodiment of the present invention will be described below with reference to the accompanying drawings for clarity and understanding of the technical contents thereof. The present invention may be embodied in many different forms of embodiments and the scope of the invention is not limited to the embodiments set forth herein.
The embodiment is based on a set of automatic platform, wherein the automatic platform is based on a 16-bit DAC (digital-to-analog converter), the deviation is lower than 0.05mv, the automatic platform is used as the input of the ADC, and a clamp plate is used as a test plate; reserving 6 input ports in ADC design, wherein one input port is ADC CHANNEL ports, and one input port can be selected as an input port of the ADC by configuring GPIO; and the automatic increase of each 5mv stepping value is realized by matching with an upper computer, after test data is obtained through testing, the a and b values of the fitted linear equation are calculated according to a least square method and specific points, and then the a and b values are written into a specific area of the INFO area.
As shown in fig. 1, a least squares based ADC calibration method includes the following steps:
step 1, carrying out consistency calibration on 13-bit DAC; and the plate output of the DAC is accurate through devices such as hardware resistors, capacitors and the like and a software method. After calibration, the DAC output deviation does not exceed 0.05 mV.
Step 2, the DAC is controlled by an upper computer in the automatic platform to be increased to the maximum voltage (VDD voltage at 0-VDD gear and 2V voltage at 0-2V gear) from 0 to 2mV in sequence according to the stepping value, and the DAC is sequentially input to the ADC; the step value can also be flexibly configured, for example, 5mV is used as the step value. The step value can be automatically increased through the operation of an upper computer, so that the DAC can be increased to the maximum voltage from 0V.
Step 3, the ADC selects a CHANNEL port, and the input of the DAC is used as the standard input of the ADC; and to ensure that the input to the ADC can cover from 0v to the maximum voltage; reduce the error of test data contingency.
step 4, initializing ADC configuration clock, sampling and the like; specifically, the method includes clock configuration, channel number configuration, GPIO configuration, sampling rate configuration, and the like.
step 5, sampling data of the ADC through an automatic platform, and storing the data; specifically, sampling ADC sampling data for 100 times at each voltage through the automatic platform, screening out the maximum value and the minimum value, averaging and storing the data.
and STEP 6, reading out a sampling CODE value (such as 0-2v gear: 50mv,100mv,150mv...2000mv) with the STEP of 50mv by adopting an automatic platform, and then solving according to an equation calculated by a least square method based on a linear function.
Step 7, taking the sampling voltage value and the CODE value as a group of data, substituting the group of data into a least square method, and solving the data based on a formula of a linear equation to obtain a value a and a value b;
The least square method formula is as follows:
The least square equation based on the linear equation as a linear function specifically satisfies the following formula:
The above formula is subjected to partial derivation, then different a and b result in different epsilon by using the claime rule, and when epsilon is taken to be the minimum value, an equation set for solving the values of a and b is obtained.
Wherein F (x) is a model function; yi ═ axi + b.
and 8, fitting the obtained straight line based on the least square method by using the values a and b obtained in the step 7, and substituting all sampling points into an equation to reversely deduce the optimized voltage and theoretical deviation.
And 9, writing the values a and b into a special INFO area of the flash by using an upper computer of the automatic platform, and enabling a user to directly read the area data to be used as the calibrated ADC data.
the following is a set of fitting data obtained using the protocol of the present invention.
TABLE 1A, B values obtained by least squares solution
TABLE 2 partial dot data bias comparison
The foregoing detailed description of the preferred embodiments of the invention has been presented. It should be understood that numerous modifications and variations could be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should be within the scope of protection defined by the claims.
Claims (10)
1. An ADC calibration method based on a least square method is characterized by comprising the following steps:
Step 1, carrying out consistency calibration on 13-bit DAC;
Step 2, increasing the DAC to the maximum voltage from 0 to 5mV in sequence according to the step value by controlling the upper computer in the automatic platform, wherein if a 0-VDD gear is selected, the maximum voltage is VDD voltage; if the gear of 0-2V is selected, the maximum voltage is 2V voltage, and the maximum voltage is sequentially used as the input of the ADC;
Step 3, the ADC selects a CHANNEL port, and the input of the DAC is used as the standard input of the ADC;
step 4, initializing an ADC (analog to digital converter), wherein the initialization comprises clock configuration and sampling;
Step 5, sampling and storing ADC data through the automation platform;
Step 6, taking an ADC sampling voltage value and a CODE value by taking 50mv as a stepping value;
step 7, taking the sampling voltage value and the CODE value as a group of data, substituting the group of data into a least square method and solving the data based on a formula of a linear equation to obtain a value a and a value b;
8, reversely deducing the voltages of other sampling points by using the values a and b, and calculating the deviation between the other sampling points and the theoretical voltage;
And 9, writing the values A and B into a specific area of the FLASH by using an upper computer of the automation platform, and enabling a user to directly read the data in the area to be used as the calibrated ADC data.
2. The method for calibrating an ADC according to claim 1, wherein the DAC in step 1 is calibrated to have a deviation of no more than 0.05 mV.
3. The least squares based ADC calibration method of claim 1, wherein in step 2, the step value can be flexibly configured, and automatic increase of the step value can be realized by the operation of the upper computer, so that the DAC can be increased from 0V to the maximum voltage.
4. the method of least squares based calibration of an ADC of claim 1 wherein in step 3, the input to the ADC is from 0v to the maximum voltage.
5. The least squares based ADC calibration method of claim 1, wherein in step 4, the ADC initialization specifically includes clock configuration, channel number configuration, GPIO configuration, and sampling rate configuration.
6. the least squares based ADC calibration method of claim 1, wherein in step 5, the sampling specifically comprises sampling ADC sampling data 100 times per voltage by the automated platform, screening out maximum and minimum values, averaging and storing the data.
7. the method of least squares based calibration of an ADC of claim 1 wherein taking the ADC sample voltage value and the CODE value in step 6 is performed by the automated stage.
8. The least squares based ADC calibration method according to claim 1, wherein in step 7, the least squares method is based on a least squares method equation in which a linear equation is a linear function, and specifically satisfies the following formula:
The system of equations for solving the values of a and b specifically satisfies the following equations:
wherein yi ═ axi + b.
9. The method of calibrating an ADC according to claim 1, wherein in step 8, the a, b values calculated in step 7 are used to fit the resulting line based on the least square method, and all sampling points are substituted into the equation to extrapolate back the optimized voltage and the theoretical deviation.
10. the method for calibrating an ADC according to claim 1, wherein in step 9, the specific field is a special INFO field of flash.
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CN106603075A (en) * | 2016-11-18 | 2017-04-26 | 中国电子科技集团公司第四十研究所 | Multi-ADC high-speed crossing sampling calibration device and method |
CN107181489A (en) * | 2016-03-11 | 2017-09-19 | 北京君正集成电路股份有限公司 | A kind of analog-to-digital conversion calibration method and device |
CN109245767A (en) * | 2018-10-25 | 2019-01-18 | 北京计算机技术及应用研究所 | A kind of software-based ADC automatic calibrating method |
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Patent Citations (4)
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US20160065230A1 (en) * | 2014-08-29 | 2016-03-03 | Broadcom Corporation | Gain calibration of adc residue amplifiers |
CN107181489A (en) * | 2016-03-11 | 2017-09-19 | 北京君正集成电路股份有限公司 | A kind of analog-to-digital conversion calibration method and device |
CN106603075A (en) * | 2016-11-18 | 2017-04-26 | 中国电子科技集团公司第四十研究所 | Multi-ADC high-speed crossing sampling calibration device and method |
CN109245767A (en) * | 2018-10-25 | 2019-01-18 | 北京计算机技术及应用研究所 | A kind of software-based ADC automatic calibrating method |
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