CN110534643B - Phase change memory capable of improving yield and preparation method thereof - Google Patents
Phase change memory capable of improving yield and preparation method thereof Download PDFInfo
- Publication number
- CN110534643B CN110534643B CN201910759489.3A CN201910759489A CN110534643B CN 110534643 B CN110534643 B CN 110534643B CN 201910759489 A CN201910759489 A CN 201910759489A CN 110534643 B CN110534643 B CN 110534643B
- Authority
- CN
- China
- Prior art keywords
- phase change
- material layer
- layer
- electrode
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000008859 change Effects 0.000 title claims abstract description 43
- 230000015654 memory Effects 0.000 title claims abstract description 33
- 238000002360 preparation method Methods 0.000 title claims description 15
- 239000010410 layer Substances 0.000 claims abstract description 167
- 239000012782 phase change material Substances 0.000 claims abstract description 63
- 239000000463 material Substances 0.000 claims abstract description 57
- 238000005530 etching Methods 0.000 claims abstract description 54
- 238000000034 method Methods 0.000 claims abstract description 36
- 239000003989 dielectric material Substances 0.000 claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 239000012790 adhesive layer Substances 0.000 claims abstract description 4
- 238000000151 deposition Methods 0.000 claims description 19
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- 229910052721 tungsten Inorganic materials 0.000 claims description 10
- 239000010937 tungsten Substances 0.000 claims description 10
- 239000010936 titanium Substances 0.000 claims description 9
- 238000000231 atomic layer deposition Methods 0.000 claims description 7
- 238000006243 chemical reaction Methods 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 7
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 7
- 229910052719 titanium Inorganic materials 0.000 claims description 7
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- 238000005566 electron beam evaporation Methods 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 5
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 5
- 229910001080 W alloy Inorganic materials 0.000 claims description 5
- UQZIWOQVLUASCR-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti] UQZIWOQVLUASCR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000000126 substance Substances 0.000 claims description 5
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 5
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 claims description 5
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims description 3
- LNGCCWNRTBPYAG-UHFFFAOYSA-N aluminum tantalum Chemical compound [Al].[Ta] LNGCCWNRTBPYAG-UHFFFAOYSA-N 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000011651 chromium Substances 0.000 claims description 3
- 238000013461 design Methods 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
- -1 tungsten nitride Chemical class 0.000 claims description 3
- 229910052726 zirconium Inorganic materials 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 2
- 230000002035 prolonged effect Effects 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 21
- 230000002159 abnormal effect Effects 0.000 abstract description 5
- 239000010408 film Substances 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000010354 integration Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000004377 microelectronic Methods 0.000 description 3
- 229910000510 noble metal Inorganic materials 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910000618 GeSbTe Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- RVSGESPTHDDNTH-UHFFFAOYSA-N alumane;tantalum Chemical compound [AlH3].[Ta] RVSGESPTHDDNTH-UHFFFAOYSA-N 0.000 description 2
- IVHJCRXBQPGLOV-UHFFFAOYSA-N azanylidynetungsten Chemical compound [W]#N IVHJCRXBQPGLOV-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000000609 electron-beam lithography Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 238000000233 ultraviolet lithography Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000013329 compounding Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- JUWSSMXCCAMYGX-UHFFFAOYSA-N gold platinum Chemical compound [Pt].[Au] JUWSSMXCCAMYGX-UHFFFAOYSA-N 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000004148 unit process Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention discloses a phase change memory capable of improving yield, which comprises the following components in sequence: a layer of substrate material; a first electrode; an adhesive layer; a layer of insulating dielectric material; a phase change material layer; a second electrode; the adhesion layer is added on the bottom electrode, so that the adhesion between the insulating medium material layer and the bottom electrode is enhanced, and the firmness of a film deposited by a subsequent process is ensured; and after the etching of the insulating medium material layer is finished, an over-etching process is adopted in the etching process, and the over-etching adhesion layer forms a contact hole, so that the insulating medium material layer is completely etched, the subsequent deposited phase change material layer is ensured to be well contacted with the bottom electrode, the problem of abnormal short circuit or open circuit is solved, and the performance and the yield of the device are improved.
Description
Technical Field
The invention belongs to the field of microelectronics, and particularly relates to a phase change memory capable of improving yield and a preparation method thereof.
Background
As a novel memory, the phase change memory perfectly fills up the device fault in the existing memory framework due to proper storage density, erasing speed and power consumption. Moreover, since the phase change memory is highly compatible with the existing CMOS, it is one of the best solutions for the next generation memory architecture, and has great commercial potential in high density, high speed, low power consumption, embedded applications and special environment applications.
Most of phase change memories are two-terminal devices, and multiple pattern transfer and thin film growth processes are involved in the device preparation process. Due to the operating principle of the phase change memory, it is necessary to use an interconnection material with high resistivity or a noble metal such as gold platinum. The metal materials suitable for the phase change memory are not good in wettability with materials used as insulating media and structural supports, and the problems of film falling, breakage and the like occur in the technological process of carrying out pattern transfer and film growth for many times, so that the yield of the prepared phase change memory is seriously influenced.
In addition to selecting suitable materials to increase the robustness of the film in subsequent processing, an adhesion layer may also be used. A material having a high wettability for both materials is generally selected as the adhesion layer. However, since the phase-change material needs to use a specific electrode, the presence of the adhesion layer actually changes the contact condition between the phase-change material layer and the electrode and the insulating medium, and is liable to cause abnormal short circuit or open circuit, which affects the device performance and yield. The adhesion layer is usually not present at the interface with the phase change material. This is actually a concern for device structural stability and yield of multilayer film structures.
Therefore, there is a need for improved processes and device structures that address the reliability of multilayer film structures without affecting device performance and principles.
Disclosure of Invention
Aiming at least one of the defects or the improvement requirements in the prior art, particularly how to overcome the defects of low yield and poor reliability of the existing multilayer film structure under the condition of not influencing the performance and the principle of a device, the invention provides the phase change memory for improving the yield, wherein an adhesion layer is added on a bottom electrode, so that the adhesion between an insulating medium material layer and the bottom electrode is enhanced, and the firmness of a film deposited by a subsequent process is ensured; and after the etching of the insulating medium material layer is finished, an over-etching process is adopted in the etching process, and the over-etching adhesion layer forms a contact hole, so that the insulating medium material layer is completely etched, the subsequent deposited phase change material layer is ensured to be well contacted with the bottom electrode, the problem of abnormal short circuit or open circuit is solved, and the performance and the yield of the device are improved.
To achieve the above object, according to an aspect of the present invention, there is provided a phase change memory device capable of improving yield, comprising:
a layer of substrate material;
a first electrode;
an adhesive layer;
a layer of insulating dielectric material;
a phase change material layer;
a second electrode;
and after the etching of the insulating medium material layer is finished, directly over-etching the adhesion layer to form a contact hole, wherein the phase-change material layer is partially positioned in the contact holes of the insulating medium material layer and the adhesion layer and is in contact with the first electrode.
Preferably, the phase change material layer has a basic chemical formula of GexSbyTez, wherein x, y, and z are integers, respectively.
Preferably, the phase change material layer has a basic chemical formula of GaxSbyTez, wherein x, y, and z are integers, respectively.
Preferably, the adhesion layer is selected from any one of metal titanium, nickel, chromium, zirconium, tungsten, copper, aluminum, titanium tungsten alloy, titanium nitride, tantalum nitride, tungsten nitride, aluminum titanium nitride, and aluminum tantalum nitride.
Preferably, a contact area of the phase change material layer with the first electrode is smaller than a contact area of the second electrode with the phase change material layer.
Preferably, the phase change material layer and the second electrode are both of a structure having a groove.
To achieve the above object, according to an aspect of the present invention, there is provided a method for manufacturing a phase change memory device as described above, wherein the method comprises the steps of:
s1: depositing a first electrode on the layer of substrate material;
s2: depositing an adhesion layer on the first electrode;
s3: depositing a layer of insulating dielectric material over the first electrode;
s4: preparing a contact hole;
photoetching and etching are firstly used on the local surface of the insulating medium material layer, and after the etching of the insulating medium material layer is finished, the adhesive layer is directly over-etched to form a contact hole with a preset size;
s5: preparing a phase change material layer;
depositing a phase change material layer in and around the contact hole until the preparation of the phase change material layer is completed;
s6: preparing a second electrode;
after the preparation of the phase change material layer is completed, a second electrode is directly deposited thereon.
Preferably, in step S4, a material having the same etching condition as the insulating dielectric material layer is selected as the adhesion layer, after the etching of the insulating dielectric material layer 104 is completed, the etching time is prolonged, and the adhesion layer material within the range of the contact hole is directly removed by over-etching, so as to ensure the contact between the phase change material layer and the first electrode.
Preferably, in step S4, a material with a different etching condition from the first electrode is selected as the adhesion layer, and after the etching of the insulating dielectric material layer is completed, the photoresist is maintained, and the etching of the adhesion layer is directly performed to ensure the contact between the phase change material layer and the first electrode.
Preferably, in steps S1, S2, S3, S5 and S6, the deposition method adopts any one of magnetron sputtering, electron beam evaporation, atomic layer deposition and chemical reaction deposition.
Preferably, in step S3, the thickness of the insulating medium material layer is adjusted according to the thickness of the phase change material layer, and the thicker the design thickness of the later prepared phase change material layer is, the thicker the thickness of the previously deposited insulating medium material layer is.
Preferably, in step S4, the photolithography method employs ultraviolet lithography or electron beam lithography.
Preferably, in step S4, the etching method uses reactive ion etching or coupled plasma etching.
The above-described preferred features may be combined with each other as long as they do not conflict with each other.
Generally, compared with the prior art, the above technical solution conceived by the present invention has the following beneficial effects:
1. according to the phase change memory and the preparation method thereof, which are disclosed by the invention, the adhesion layer is added on the bottom electrode, so that the adhesion between the insulating medium material layer and the bottom electrode is enhanced, and the firmness of a film deposited by a subsequent process is ensured; and after the etching of the insulating medium material layer is finished, an over-etching process is adopted in the etching process, and the over-etching adhesion layer forms a contact hole, so that the insulating medium material layer is completely etched, the subsequent deposited phase change material layer is ensured to be well contacted with the bottom electrode, the problem of abnormal short circuit or open circuit is solved, and the performance and the yield of the device are improved.
2. The phase change memory capable of improving the yield and the preparation method thereof can effectively improve the yield of the multilayer film structure, do not need excessive process step changes, and can meet the development requirements of devices with miniature sizes.
3. The phase change memory capable of improving the yield and the preparation method thereof are completely suitable for various existing phase change memory structures, including but not limited to T-shaped structures, via-hole structures, filling hole structures and the like, do not change the contact condition between the phase change material and each layer of film, and have no negative influence on the subsequent device integration.
Drawings
FIG. 1 is a schematic cross-sectional view of a phase change memory with improved yield according to an embodiment of the invention;
FIG. 2 is a flowchart illustrating a process for fabricating a phase change memory device with improved yield according to an embodiment of the present invention;
FIG. 3 is a second flowchart illustrating a manufacturing process of a phase change memory device with improved yield according to an embodiment of the invention;
FIG. 4 is a third flowchart illustrating a manufacturing process of a phase change memory device according to an embodiment of the invention;
FIG. 5 is a fourth flowchart illustrating a manufacturing process of a phase change memory device according to an embodiment of the present invention;
FIG. 6 is a fifth flowchart illustrating a manufacturing process of a phase change memory device with improved yield according to an embodiment of the present invention;
fig. 7 is a sixth flowchart of a process for fabricating a phase change memory device with improved yield according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other. The present invention will be described in further detail with reference to specific embodiments.
As shown in fig. 1, the present invention provides a phase change memory capable of improving yield, wherein the phase change memory comprises, in order:
a substrate material layer 100 is formed on the substrate material layer 100, which has silicon or doped silicon as a main body and has an insulating material on the surface.
A first electrode (bottom electrode) 101, the first electrode 101 extending over the entire surface of the substrate material layer 100 and contacting the bottom surface of the phase change material layer 105.
And the adhesion layer 103 is added on the first electrode 101, so that the adhesion between the insulating dielectric material layer 104 and the first electrode 101 is enhanced, and the firm film deposited by the subsequent process is ensured. The adhesion layer 103 is selected from any one of metal titanium, nickel, chromium, zirconium, tungsten, copper, aluminum, titanium tungsten alloy, titanium nitride, tantalum nitride, tungsten nitride, aluminum titanium nitride, and aluminum tantalum nitride.
And the insulating medium material layer 104 is used for forming a limiting structure for the phase change material layer 105, and the contact hole 110 of the first electrode 101 and the phase change material 105 is exposed by an etching method. The insulating dielectric material layer 104 may be silicon dioxide (SiO2), and other dielectric materials may be used, such as silicon nitride (SiN), silicon oxynitride (SiON) or other materials suitable for the inner dielectric structure of the memory device. In the present embodiment, the insulating dielectric material layer 104 has a single-layer structure. In other embodiments, the insulating dielectric material layer 104 may be a multi-layer structure formed by compounding other insulating materials.
A phase change material layer 105; the phase change material substrate may include a germanium antimony tellurium material having a basic chemical formula of GexSbyTez, where x, y, and z may be integers of 2, and 5, or integers other than 2, and 5, respectively. Other non-germanium antimony tellurium based phase change materials may be used, including gallium tellurium (GaSbTe) systems, which may have a basic formula written as GaxSbyTez, where x, y, and z are integers.
A second electrode (top electrode) 102, the second electrode 102 contacting the upper surface of the phase-change material layer 105; the first electrode 101 and the second electrode 102 are both conductive materials and have electrode surfaces of a material that is compatible with the phase change material used. The material of the electrode surface includes, but is not limited to, titanium nitride (TiN), tantalum nitride (TaN), tungsten (W), tungsten nitride (WN), titanium aluminum nitride (TiAlN), or tantalum aluminum nitride (TaAlN).
The key points of the invention are as follows: after the etching of the insulating medium material layer 104 is completed, the adhesion layer 103 is directly over-etched to form a contact hole 110, and the phase change material layer 105 is partially located in the contact holes 110 of the insulating medium material layer 104 and the adhesion layer 103 and is in contact with the first electrode 101.
As shown in fig. 1, the insulating dielectric material layer 104 is formed with a relatively narrow width (which may be a diameter in some embodiments) by etching or the like, and may form an electrode surface area in contact with the phase change material layer 105. The contact area of the phase change material layer 105 and the first electrode 101 is smaller than the contact area of the second electrode 102 and the phase change material layer 105. Therefore, the current is concentrated on a portion of the phase change material layer 105 contacting the first electrode 101.
As shown in fig. 1, the second electrode 102 and the phase change material layer 105 are both of a structure having a groove.
As shown in fig. 2 to 7, the method for manufacturing a phase change memory with improved yield according to the present invention includes the following steps:
s1: a first electrode 101 is deposited on the layer of substrate material 100.
As shown in fig. 2, the first electrode 101 may be deposited by magnetron sputtering, electron beam evaporation, atomic layer deposition, chemical reaction deposition, or the like. The first electrode 101 includes, but is not limited to, an inert noble metal having a large work function, such as Pt, Au, etc., an inert metal having a high heat generation coefficient, such as tungsten (W), titanium tungsten alloy (TiW), etc., a metal or alloy compatible with the current microelectronics technologies, such as metal nitride MN (M ═ Ti, Ta …), copper (Cu), aluminum (Al), etc. The thickness of the first electrode is adjusted according to the subsequent integration process, and in the present embodiment, the thickness of the first electrode is preferably 100 nm.
S2: an adhesion layer 103 is deposited on the first electrode 101.
As shown in fig. 3, the adhesion layer 103 may be deposited by magnetron sputtering, atomic layer deposition, chemical reaction deposition, or the like. The adhesion layer 103 includes, but is not limited to, a material that has good wettability with the interconnect metal and the dielectric material, such as titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), tungsten (W), tungsten nitride (WN), titanium aluminum nitride (TiAlN), or tantalum aluminum nitride (TaAlN). The thickness of the adhesion layer 103 is adjusted according to the unit process requirements, and in the present embodiment, the adhesion layer 103 is preferably metal titanium (Ti) with a thickness of 5 nm.
S3: a layer of insulating dielectric material 104 is deposited over the first electrode 101.
As shown in fig. 4, the insulating dielectric material layer 104 may be deposited by magnetron sputtering, electron beam evaporation, atomic layer deposition, chemical reaction deposition, or the like. The insulating dielectric material layer 104 includes, but is not limited to, materials suitable for the inner dielectric structure of the memory element, such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), silicon carbide (SiC), aluminum oxide (AlO), hafnium oxide (HfO), or other materials suitable for the inner dielectric structure of the memory element. The thickness of the insulating dielectric material layer 104 is adjusted according to the thickness of the phase change material layer 105, and the thicker the design thickness of the phase change material layer 105 prepared later, the thicker the thickness of the insulating dielectric material layer 104 deposited earlier. In the present embodiment, the insulating dielectric material layer 104 is preferably 100nm thick silicon dioxide (SiO 2).
S4: contact holes 110 are prepared.
As shown in fig. 5, a hole pattern with a preferred size is formed on the insulating dielectric material layer 104 by using ultraviolet lithography or electron beam lithography on a local surface of the insulating dielectric material layer 104, and then a contact hole 110 with a predetermined size is formed by directly over-etching the adhesion layer 103 after the etching of the insulating dielectric material layer 104 is completed by using Reactive Ion Etching (RIE) or coupled plasma etching (ICP). In order to ensure that the insulating dielectric material layer is etched cleanly and that the subsequently deposited phase change material layer 105 is in good contact with the first electrode 101, appropriate over-etching is performed in the etching process, in the embodiment, there are two methods:
a. selecting a material with the same etching condition as the insulating medium material layer 104 as the adhesion layer 103, properly prolonging the etching time after the etching of the insulating medium material layer 104 is completed, directly removing the adhesion layer material within the range of the contact hole 110 by over-etching, and ensuring the contact between the phase change material layer 105 and the first electrode 101;
b. and selecting a material with a large difference with the etching condition of the first electrode 101 as the adhesion layer 103, and after the etching of the insulating dielectric material layer 104 is completed, keeping the photoresist and directly etching the adhesion layer 103. Since the etching ratio of the adhesion layer 103 to the first electrode 101 is large, proper over-etching does not affect the use of the first electrode 101.
S5: a phase change material layer 105 is prepared.
As shown in fig. 6, the phase change material layer 105 is deposited in and around the contact hole until the preparation of the phase change material layer 105 is completed; the deposition method adopts any one of magnetron sputtering, electron beam evaporation, atomic layer deposition and chemical reaction deposition.
As shown in fig. 6, the phase change material layer 105 is a structure having a groove.
S6: a second electrode 102 is prepared.
As shown in fig. 7, after the phase change material layer 105 is prepared, the photolithography pattern is remained, and the second electrode 102 is directly deposited on the phase change material layer 105, thereby forming the second electrode having a groove structure. The deposition method adopts any one of magnetron sputtering, electron beam evaporation, atomic layer deposition and chemical reaction deposition. The second electrode 102 includes, but is not limited to, an inert noble metal having a large work function, such as Pt, Au, etc., an inert metal having a high heat generation coefficient, such as tungsten (W), titanium tungsten alloy (TiW), etc., a metal or alloy compatible with the current microelectronics technologies, such as metal nitride MN (M ═ Ti, Ta …), copper (Cu), aluminum (Al), etc. The thickness of the second electrode is adjusted according to the subsequent integration process, and in the present embodiment, the thickness of the second electrode is preferably 100 nm.
In summary, the present invention has the following advantages:
1. according to the phase change memory and the preparation method thereof, which are disclosed by the invention, the adhesion layer is added on the bottom electrode, so that the adhesion between the insulating medium material layer and the bottom electrode is enhanced, and the firmness of a film deposited by a subsequent process is ensured; and after the etching of the insulating medium material layer is finished, an over-etching process is adopted in the etching process, and the over-etching adhesion layer forms a contact hole, so that the insulating medium material layer is completely etched, the subsequent deposited phase change material layer is ensured to be well contacted with the bottom electrode, the problem of abnormal short circuit or open circuit is solved, and the performance and the yield of the device are improved.
2. The phase change memory capable of improving the yield and the preparation method thereof can effectively improve the yield of the multilayer film structure, do not need excessive process step changes, and can meet the development requirements of devices with miniature sizes.
3. The phase change memory capable of improving the yield and the preparation method thereof are completely suitable for various existing phase change memory structures, including but not limited to T-shaped structures, via-hole structures, filling hole structures and the like, do not change the contact condition between the phase change material and each layer of film, and have no negative influence on the subsequent device integration.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. The phase change memory for improving the yield is characterized by comprising the following components in sequence:
a layer of substrate material (100);
a first electrode (101);
an adhesive layer (103);
a layer of insulating dielectric material (104);
a phase change material layer (105);
a second electrode (102);
after the etching of the insulating medium material layer (104) is completed, the adhesion layer (103) is directly over-etched to form a contact hole (110), and the phase change material layer (105) is partially positioned in the contact holes (110) of the insulating medium material layer (104) and the adhesion layer (103) and is in contact with the first electrode (101).
2. The yield-improved phase change memory according to claim 1, wherein:
the chemical formula of the phase change material layer (105) is GexSbyTez, wherein x, y and z are integers respectively.
3. The yield-improved phase change memory according to claim 1, wherein:
the chemical formula of the phase change material layer (105) is GaxSbyTez, wherein x, y and z are integers respectively.
4. The yield-improved phase change memory according to claim 1, wherein:
the adhesion layer (103) is selected from any one of metal titanium, nickel, chromium, zirconium, tungsten, copper, aluminum, titanium-tungsten alloy, titanium nitride, tantalum nitride, tungsten nitride, aluminum titanium nitride and aluminum tantalum nitride.
5. The yield-improved phase change memory according to claim 1, wherein:
the contact area of the phase change material layer (105) and the first electrode (101) is smaller than the contact area of the second electrode (102) and the phase change material layer (105).
6. The method for manufacturing a phase change memory device according to any one of claims 1 to 5, wherein the method comprises the following steps:
s1: depositing a first electrode (101) on a layer of substrate material (100);
s2: depositing an adhesion layer (103) on the first electrode (101);
s3: depositing a layer of insulating dielectric material (104) over the first electrode (101);
s4: preparing a contact hole (110);
photoetching and etching are firstly used on the local surface of the insulating medium material layer (104), and after the etching of the insulating medium material layer (104) is completed, the adhesion layer (103) is directly over-etched to form a contact hole (110) with a preset size;
s5: preparing a phase change material layer (105);
depositing a phase change material layer (105) in and around the contact hole until the preparation of the phase change material layer (105) is completed;
s6: preparing a second electrode (102);
after the preparation of the phase change material layer (105) is completed, the second electrode (102) is directly deposited thereon.
7. The method for manufacturing a phase change memory device with improved yield as claimed in claim 6, wherein:
in step S4, a material having the same etching condition as the insulating dielectric material layer (104) is selected as the adhesion layer (103), after the etching of the insulating dielectric material layer 104 is completed, the etching time is prolonged, and the adhesion layer material within the range of the contact hole (110) is removed by directly using over-etching, so as to ensure the contact between the phase change material layer (105) and the first electrode (101).
8. The method for manufacturing a phase change memory device with improved yield as claimed in claim 6, wherein:
in step S4, a material with a different etching condition from the first electrode (101) is selected as the adhesion layer (103), after the etching of the insulating dielectric material layer (104) is completed, the photoresist is maintained, and the etching of the adhesion layer (103) is directly performed to ensure the contact between the phase change material layer (105) and the first electrode (101).
9. The method for manufacturing a phase change memory device with improved yield as claimed in claim 6, wherein:
in steps S1, S2, S3, S5 and S6, the deposition method employs any one of magnetron sputtering, electron beam evaporation, atomic layer deposition and chemical reaction deposition.
10. The method for manufacturing a phase change memory device with improved yield as claimed in claim 6, wherein:
in step S3, the thickness of the insulating dielectric material layer (104) is adjusted according to the thickness of the phase change material layer (105), and the thicker the design thickness of the phase change material layer (105) prepared later, the thicker the thickness of the insulating dielectric material layer (104) deposited earlier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910759489.3A CN110534643B (en) | 2019-08-16 | 2019-08-16 | Phase change memory capable of improving yield and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910759489.3A CN110534643B (en) | 2019-08-16 | 2019-08-16 | Phase change memory capable of improving yield and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110534643A CN110534643A (en) | 2019-12-03 |
| CN110534643B true CN110534643B (en) | 2021-02-09 |
Family
ID=68663570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910759489.3A Active CN110534643B (en) | 2019-08-16 | 2019-08-16 | Phase change memory capable of improving yield and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110534643B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200737498A (en) * | 2005-12-15 | 2007-10-01 | Elpida Memory Inc | Method of manufacturing non-volatile memory element |
| US7691683B2 (en) * | 2003-12-03 | 2010-04-06 | Micron Technology, Inc. | Electrode structures and method to form electrode structures that minimize electrode work function variation |
| CN105098068A (en) * | 2014-05-22 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, manufacturing method thereof and electronic device |
| CN105449101A (en) * | 2014-09-01 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Method of forming phase change random access memory (PCRAM) cell |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10818544B2 (en) * | 2017-09-27 | 2020-10-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method to enhance electrode adhesion stability |
-
2019
- 2019-08-16 CN CN201910759489.3A patent/CN110534643B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7691683B2 (en) * | 2003-12-03 | 2010-04-06 | Micron Technology, Inc. | Electrode structures and method to form electrode structures that minimize electrode work function variation |
| TW200737498A (en) * | 2005-12-15 | 2007-10-01 | Elpida Memory Inc | Method of manufacturing non-volatile memory element |
| CN105098068A (en) * | 2014-05-22 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, manufacturing method thereof and electronic device |
| CN105449101A (en) * | 2014-09-01 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Method of forming phase change random access memory (PCRAM) cell |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110534643A (en) | 2019-12-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112420767B (en) | Method of forming metal on non-homogeneous surface and structure incorporating metal on non-homogeneous surface | |
| US7655941B2 (en) | Phase change memory device and method for fabricating the same | |
| US8344351B2 (en) | Phase change memory device with plated phase change material | |
| US20110155993A1 (en) | Phase change memory devices and fabrication methods thereof | |
| TWI771622B (en) | Method of forming a memory device | |
| US20110049462A1 (en) | Flat lower bottom electrode for phase change memory cell | |
| TW201947738A (en) | Memory device and a method of manufacturing an integrated circuit applying the same | |
| EP4315443A1 (en) | Phase change memory | |
| US20200373483A1 (en) | Phase change memory and method of fabricating the same | |
| CN110534643B (en) | Phase change memory capable of improving yield and preparation method thereof | |
| US8222628B2 (en) | Phase change memory device having a bottleneck constriction and method of manufacturing the same | |
| JP5334995B2 (en) | Multilayer structure having phase change material layer and method of manufacturing the same | |
| JP5672329B2 (en) | Switching element | |
| US20080251498A1 (en) | Phase change memory device and fabrications thereof | |
| CN110556475B (en) | Low-density variable phase-change material, phase-change memory and preparation method | |
| CN110571329B (en) | High-reliability phase-change material, phase-change memory and preparation method | |
| US11121319B2 (en) | Phase-change memory with no drift | |
| CN112820823A (en) | Multi-value phase change memory cell, phase change memory, electronic equipment and preparation method | |
| US20200328347A1 (en) | Phase change memory | |
| JP5277524B2 (en) | Switching element | |
| WO2023197771A1 (en) | Phase change memory array, manufacturing method, phase change memory and electronic device | |
| US20240147874A1 (en) | Phase-change memory device with conductive cladding | |
| TWI785921B (en) | Resistive random access memory and method for forming the same | |
| US11621225B2 (en) | Electrical fuse matrix | |
| KR101748193B1 (en) | Method of manufacturing resistance ram and the memory |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |