CN110531557A - Array substrate, liquid crystal display panel and display device - Google Patents
Array substrate, liquid crystal display panel and display device Download PDFInfo
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- CN110531557A CN110531557A CN201910820617.0A CN201910820617A CN110531557A CN 110531557 A CN110531557 A CN 110531557A CN 201910820617 A CN201910820617 A CN 201910820617A CN 110531557 A CN110531557 A CN 110531557A
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- 239000000758 substrate Substances 0.000 title claims abstract description 81
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 30
- 238000003491 array Methods 0.000 claims description 2
- 239000013078 crystal Substances 0.000 claims 1
- 239000011159 matrix material Substances 0.000 abstract description 21
- 238000010586 diagram Methods 0.000 description 18
- 102100022769 POC1 centriolar protein homolog B Human genes 0.000 description 10
- 101710125069 POC1 centriolar protein homolog B Proteins 0.000 description 10
- 230000005684 electric field Effects 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000000007 visual effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
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- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optics & Photonics (AREA)
- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention discloses a kind of array substrate, liquid crystal display panel and display devices, each sub-pixel includes the two sub- sub-pixels arranged in a second direction, switching transistor corresponding with each sub-pixel is located between two sub- sub-pixels, and with two sub- sub-pixels and be all connected with；Corresponding two grid lines of each sub-pixel, and two grid lines are respectively positioned between two in sub-pixel sub- sub-pixels, sub-pixel is connected with the wherein grid line in corresponding two grid lines.I.e. every corresponding switching transistor of a line sub-pixel and two grid lines are respectively positioned between two row Asia sub-pixels, for black matrix, black matrix is wide between two row Asia sub-pixels to be arranged to cover the corresponding switching transistor of each sub-pixel and corresponding two grid lines, therefore, on the whole from array substrate, the black matrix extended in a first direction is wide setting, therefore not will cause point sense.
Description
Technical field
The present invention relates to field of display technology, espespecially a kind of array substrate, liquid crystal display panel and display device.
Background technique
Thin film transistor liquid crystal display (Thin Film Transistor-Liquid Crystal Display, TFT-
LCD) panel is widely used in mobile product such as mobile phone, in tablet computer.Currently, to improve display vertical line, using as shown in Figure 1
Dual-gated design, be provided with two grid line Gn ', the transistor of four adjacent subpixels Pix ' between adjacent rows sub-pixel Pix '
01 ' is disposed adjacent, and the black matrix for blocking transistor 01 ' is wider, in display, visually has point sense.Although can pass through
Widen the width of relatively narrow place's black matrix to reduce the width difference of black matrix, but be affected to sub-pixel Pix ' aperture opening ratio, meeting
The aperture opening ratio of 10% or more loss, to reduce the transmitance of display panel.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of array substrate, liquid crystal display panel and display device, to improve
Point problem existing in the prior art.
A kind of array substrate provided in an embodiment of the present invention, including underlay substrate, be located at the underlay substrate on be in matrix
Multiple sub-pixels of arrangement, a plurality of extend in a first direction the switching transistor that connects one to one with each sub-pixel
Grid line and a plurality of data line extended in a second direction, the first direction and the second direction are arranged in a crossed manner；Wherein:
Each sub-pixel includes arrange in a second direction two sub- sub-pixels, switch corresponding with each sub-pixel
Transistor is located between described two sub- sub-pixels, and is all connected with described two sub- sub-pixels；
The side of each column sub-pixel is provided with the data line, and each column sub-pixel pass through respectively it is corresponding
Switching transistor is connect with data line described in the same for being located at one side；
Each corresponding two grid lines of the sub-pixel, and corresponding two grid lines are respectively positioned in the sub-pixel
Described two sub- sub-pixels between, the sub-pixel passes through the corresponding switching transistor and corresponding two grid lines
In the connection of wherein grid line；
With along the first direction, often two adjacent column sub-pixels is a unit groups, with a line in the same unit group
Sub-pixel is separately connected same grid line, and the sub-pixel in two neighboring unit group with a line is separately connected different grid lines.
Optionally, in array substrate provided in an embodiment of the present invention, in the same sub-pixel, described two sub- pictures in Asia
The farmland direction of element is different.
Optionally, in array substrate provided in an embodiment of the present invention, for the same row sub- picture along the second direction
Element, in two sub-pixels of arbitrary neighborhood, one of them described sub-pixel is connect with odd-numbered line grid line, another described sub- picture
Element is connect with even number line grid line.
It optionally, further include a plurality of connection cabling, each connection in array substrate provided in an embodiment of the present invention
Cabling connects two different data lines, and a data line is only connected with a connection cabling；
The polarity of sub-pixel described in same row is identical in same frame picture, and the polarity of the adjacent two column sub-pixel is different,
It is identical as the polarity of two column sub-pixels corresponding to two data lines of the same connection cabling connection, and the grid line connected is not
Together.
Optionally, two numbers in array substrate provided in an embodiment of the present invention, with the same connection cabling connection
It is respectively nth data line and the n-th+2 data line according to line.
Optionally, in array substrate provided in an embodiment of the present invention, the color of the sub-pixel of same row is identical；
It is identical as the color of two column sub-pixels corresponding to two data lines of the same connection cabling connection.
Optionally, in array substrate provided in an embodiment of the present invention, along first direction, the sub-pixel is according to R, G and B
Arrangement regulation repeated arrangement；
The nth data line connect the same connection cabling with the n-th+6 data line.
Optionally, in array substrate provided in an embodiment of the present invention, along first direction, the sub-pixel is according to R, G, B
With the arrangement regulation repeated arrangement of W；
The nth data line connect the same connection cabling with the n-th+8 data line.
Correspondingly, the embodiment of the invention also provides a kind of liquid crystal display panel, including it is provided in an embodiment of the present invention on
State any array substrate.
Correspondingly, the embodiment of the invention also provides a kind of display devices, including above-mentioned liquid provided in an embodiment of the present invention
LCD panel.
The present invention has the beneficial effect that:
A kind of array substrate, liquid crystal display panel and display device provided in an embodiment of the present invention, each sub-pixel include edge
The sub- sub-pixel of two of second direction arrangement, switching transistor corresponding with each sub-pixel are located between two sub- sub-pixels, and
With two sub- sub-pixels and be all connected with；Corresponding two grid lines of each sub-pixel, and two grid lines are respectively positioned on two in sub-pixel
Between sub- sub-pixel, sub-pixel is connected with the wherein grid line in corresponding two grid lines.I.e. every a line sub-pixel is corresponding
Switching transistor and two grid lines are respectively positioned between two row Asia sub-pixels, and for black matrix, black matrix is in the sub- sub- picture of two rows
It is wide between element to be arranged to cover the corresponding switching transistor of each sub-pixel and corresponding two grid lines, therefore, from array base
On the whole, the black matrix extended in a first direction is wide setting to plate, therefore not will cause point sense.Also, with respectively open
It closes between two that the grid line that transistor is correspondingly connected with is located in each sub-pixel sub- sub-pixels, in this way, in a sub-pixel, due to
Capacitor Cpg difference caused by technique contraposition between pixel electrode and grid line can use two sub- sub-pixels and carry out self compensations.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the display panel of existing dual-gated design；
Fig. 2 is the structural schematic diagram for the array substrate that an embodiment of the present invention provides；
Fig. 3 is the structural schematic diagram for the array substrate that another embodiment of the present invention provides；
Fig. 4 is the structural schematic diagram for the array substrate that another embodiment of the invention provides；
Fig. 5 is the structural schematic diagram for the array substrate that another embodiment of the invention provides；
Fig. 6 is the structural schematic diagram for the array substrate that another embodiment of the invention provides；
Fig. 7 is the structural schematic diagram for the array substrate that another embodiment of the invention provides；
Fig. 8 is the structural schematic diagram of the sub-pixel of existing double domain structures；
Fig. 9 is the structural schematic diagram for the array substrate that another embodiment of the invention provides；
Figure 10 is the structural schematic diagram of liquid crystal display panel provided in an embodiment of the present invention；
Figure 11 is the structural schematic diagram of display device provided in an embodiment of the present invention.
Specific embodiment
To make the above purposes, features and advantages of the invention more obvious and understandable, below in conjunction with attached drawing and implementation
The present invention will be further described for example.However, example embodiment can be implemented in a variety of forms, and it is not understood as limited to
Embodiment set forth herein；On the contrary, these embodiments are provided so that the present invention more comprehensively and completely, and by example embodiment party
The design of formula is comprehensively communicated to those skilled in the art.Identical appended drawing reference indicates same or similar knot in figure
Structure, thus repetition thereof will be omitted.The word of expression position and direction described in the present invention, is to be with attached drawing
The explanation that example carries out, but can also make a change as needed, done change is all contained in the scope of the present invention.The present invention
Attached drawing be only used for signal relative positional relationship do not represent actual proportions.
It should be noted that elaborating detail in the following description to fully understand the present invention.But this hair
Bright to be different from other way described herein with a variety of and be implemented, those skilled in the art can be without prejudice in the present invention
Similar popularization is done in the case where culvert.Therefore the present invention is not limited by following public specific embodiment.Specification is subsequent to be retouched
It states to implement the better embodiment of the application, so the description is not being used for the purpose of the rule for illustrating the application
To limit scope of the present application.The protection scope of the application is as defined by the appended claims.
With reference to the accompanying drawing, array substrate provided in an embodiment of the present invention, liquid crystal display panel and display device are carried out
It illustrates.
A kind of array substrate provided in an embodiment of the present invention, as shown in Fig. 2, including underlay substrate, being located on underlay substrate
It is multiple sub-pixel Pix arranged in arrays, the switching transistor 01 to connect one to one with each sub-pixel Pix, a plurality of along first
The data line Dm that the grid line Gn (in Fig. 2 by taking n=1~6 as an example) and a plurality of Y in a second direction that direction X extends extend is (in Fig. 2
By taking m=1~12 as an example), first direction X and second direction Y are arranged in a crossed manner；Wherein:
Each sub-pixel Pix includes two sub- sub-pixel Pix1 of Y arrangement in a second direction, corresponding with each sub-pixel Pix
Switching transistor 01 is located between two sub- sub-pixel Pix1, and is all connected with two Asia sub-pixel Pix1；
The side of each column sub-pixel Pix is provided with a data line Dm, and each column sub-pixel Pix passes through pair respectively
The switching transistor 01 answered is connect with the same data line Dm for being located at one side；
The corresponding two grid line Gn of each sub-pixel, and two corresponding grid line Gn are respectively positioned on two in sub-pixel Pix
Between a Asia sub-pixel Pix1, sub-pixel Pix by corresponding switching transistor 01 in corresponding two grid line Gn wherein
One grid line Gn connection；
With along first direction X, often two adjacent column sub-pixel Pix is a unit groups 100, same a line in same unit group 100
Sub-pixel Pix be separately connected same grid line Gn, the sub-pixel Pix in two neighboring unit group 100 with a line is separately connected not
Same grid line Gn.
Array substrate provided in an embodiment of the present invention, each sub-pixel include the two sub- sub-pixels arranged in a second direction,
Switching transistor corresponding with each sub-pixel is located between two sub- sub-pixels, and with two sub- sub-pixels and be all connected with；It is each
Sub-pixel corresponds to two grid lines, and two grid lines are respectively positioned between two in sub-pixel sub- sub-pixels, sub-pixel with it is corresponding
A wherein grid line connection in two grid lines.I.e. every corresponding switching transistor of a line sub-pixel and two grid lines are respectively positioned on two
Between the sub-pixel of row Asia, for black matrix, black matrix is wide between two row Asia sub-pixels to be arranged to cover every height picture
Plain corresponding switching transistor and corresponding two grid lines, therefore, on the whole from array substrate, what is extended in a first direction is black
Matrix is wide setting, therefore not will cause point sense.Also, the grid line being correspondingly connected with each switching transistor is located at each son
Between two in pixel sub- sub-pixels, in this way, in a sub-pixel, the pixel electrode as caused by technique contraposition and grid line it
Between capacitor Cpg difference can use two sub- sub-pixels and carry out self compensations.
It should be noted that in array substrate provided in an embodiment of the present invention, the switching transistor positioned at same a line is
Refer to and be ideally located at same a line, allows not make herein with the presence of technologic position differences such as contrapositions in practical applications
It limits.
Optionally, in array substrate provided in an embodiment of the present invention, first direction and second direction can be mutually perpendicular to,
It is not limited thereto.
Further, in array substrate provided in an embodiment of the present invention, first direction can be line direction, second direction
For column direction, alternatively, first direction is column direction, second direction is line direction, is not limited thereto.With in attached drawing of the present invention
One direction is line direction, and second direction is to be illustrated for column direction.
Optionally, in array substrate provided in an embodiment of the present invention, as shown in figure 3, Fig. 3 is another embodiment of the present invention
The structural schematic diagram of the array substrate of offer；For the same row sub-pixel Pix of Y in a second direction, two sub- pictures of arbitrary neighborhood
In plain Pix, one of sub-pixel Pix is connect with odd-numbered line grid line Gn, another sub-pixel Pix and even number line grid line Gn connect
It connects.
It is located between each sub-pixel Pix two sub- sub-pixel Pix1 in this way but is not attached to this two Asia sub-pixel Pix1
Another grid line Gn, when technique contraposition misplace when, for same row sub-pixel Pix, due to two neighboring sub-pixel Pix
The grid line of connection is respectively odd-numbered grid line Gn and even-numbered grid line Gn, therefore the pixel of the sub-pixel Pix of odd positions
Capacitor Cpg between capacitor Cpg between electrode and grid line and the pixel electrode and grid line of the sub-pixel Pix of even number position can be with
It mutually compensates.
Optionally, in array substrate provided in an embodiment of the present invention, as shown in Figures 4 to 7, Fig. 4 is that the present invention is another
The structural schematic diagram for the array substrate that kind embodiment provides；Fig. 5 is the knot for the array substrate that another embodiment of the invention provides
Structure schematic diagram；Fig. 6 is the structural schematic diagram for the array substrate that another embodiment of the invention provides；Fig. 7 be the present invention another
The structural schematic diagram for the array substrate that embodiment provides；Further include a plurality of connection cabling Sk (Fig. 4 and Fig. 5 by taking k=1~6 as an example into
Row is schematically illustrate, and Fig. 6 and Fig. 7 are illustrated by taking k=1~8 as an example), each connection cabling Sk two different numbers of connection
According to line Dm, and a data line Dm only connect cabling Sk connection with one；
The polarity of same row sub-pixel Pix is identical in same frame picture, and the polarity of adjacent two column sub-pixel Pix is different, with
The polarity grid line Gn that is identical, and connecting of two column sub-pixel Pix corresponding to two data lines of same connection cabling Sk connection
It is different.In this way, when providing data-signal to the two data line Dm with same connection cabling Sk connection, only when grid line Gn is opened
When corresponding sub-pixel Pix, corresponding sub-pixel Pix can receive data-signal, so that it is guaranteed that with same connection cabling
Signal cross-talk will not occur for two column sub-pixel Pix corresponding to two data line Dm of Sk connection.Also, two different data
Line Dm shares a connection cabling Sk, it is possible to reduce for providing the data-out port of the source driving circuit of data-signal, from
And simplify source electrode drive circuit, reduce production cost.
Optionally, in array substrate provided in an embodiment of the present invention, as shown in Figure 4 and Figure 6, with same connection cabling Sk
Two data line Dm of connection are respectively nth data line Dn and the n-th+2 data line Dn+2.Connect with same connection cabling Sk
It is spaced a data line Dn+1 between two data the line Dn and Dn+2 connect, keeps connection cabling as short as possible, and as far as possible
Reduce the overlapping item number of connection cabling Sk.Because connecting, the overlapping item number of cabling Sk is more, the item of connection cabling arranged side by side
Number is more, and the risk that short circuit occurs for connection cabling Sk is bigger, and will increase the width of array substrate side, that is, is unfavorable for showing
Show the narrow frame design of panel.Therefore, above-mentioned array substrate provided in an embodiment of the present invention makes and same connection cabling Sk connection
The distance between two data line Dm it is close as far as possible, it is possible to reduce the item number of connection cabling Sk arranged side by side, the company of reduction
The risk for connecing cabling Sk generation short circuit is bigger, and reduces the width of array substrate side.
Optionally, in array substrate provided in an embodiment of the present invention, as shown in figure 5 and figure 7, the sub-pixel of same row
The color of Pix is identical；
It is identical as the color of two column sub-pixel Pix corresponding to two data line Dm of same connection cabling Sk connection.This
Sample, when showing pure color picture, on two column sub-pixel Pix corresponding to the two data line Dm with same connection cabling Sk connection
Data-signal it is identical, i.e., in a frame picture, the received data-signal of same connection cabling Sk be always maintained at it is constant, so as to
To save power consumption.
Optionally, in array substrate provided in an embodiment of the present invention, as shown in figure 5, along first direction X, sub-pixel Pix
According to the arrangement regulation repeated arrangement of R, G and B；
Nth data line Dn connect same connection cabling Sk with the n-th+6 data line Dn+6, to realize and same connection
The color of two column sub-pixel Pix corresponding to two data line Dm of cabling Sk connection is identical.
Optionally, in array substrate provided in an embodiment of the present invention, as shown in fig. 7, along first direction X, sub-pixel Pix
According to the arrangement regulation repeated arrangement of R, G, B and W；
Nth data line Dn connect same connection cabling Sk with the n-th+8 data line Dn+8.To realize and same connection
The color of two column sub-pixel Pix corresponding to two data line Dm of cabling Sk connection is identical.
In the specific implementation, in array substrate provided in an embodiment of the present invention, in order to realize narrow frame, two column can be made
Sub-pixel shares a data line, to reduce the quantity of data line in array substrate.
It is well known that liquid crystal display panel, which mainly passes through, utilizes the electric field controls liquid between pixel electrode and public electrode
Brilliant rotation, to control the penetrance of liquid crystal.Liquid crystal display panel according to operating mode mainly include longitudinal electric field mode and
Lateral electric field mode.Wherein lateral electric field mode liquid crystal display panel due to colour cast is small, color rendition degree height, fast response time,
The features such as contrast is high, visual angle is wide, it is more and more extensive in practical applications.Existing lateral electric field mode liquid crystal display panel,
Public electrode is plane-shape electrode, and pixel electrode is oppositely arranged across insulating layer and public electrode, when pixel electrode and public electrode
When applying voltage, the electric field of substantially parallel substrate, driving liquid crystal molecule rotation are generated in the liquid crystal layer.In order to improve angle of visibility
Degree is generallyd use at present such as the bis- domain structures of Fig. 8, i.e. symmetrically arranged extending direction there are two the tools of pixel electrode 11.But double
In domain structure, liquid crystal molecule overturning can be abnormal between two farmlands, it is therefore desirable to which black matrix is blocked, to can lose
The aperture opening ratio of a part.
And in array substrate provided in an embodiment of the present invention, due to having between two sub- sub-pixels of each sub-pixel
Switching transistor and grid line, black matrix are precisely to be arranged in each sub-pixel between two sub- sub-pixels, therefore, in view of
This, can set array substrate provided in an embodiment of the present invention to double domain structures.
Optionally, in array substrate provided in an embodiment of the present invention, as shown in figure 9, Fig. 9 is another implementation of the present invention
The structural schematic diagram for the array substrate that example provides；The farmland of two sub- sub-pixel Pix1 is not identical in each sub-pixel Pix, i.e., and two
The extending direction of the pixel electrode 11 of sub- sub-pixel Pix1 is different, is equivalent to and sets double domain structures for sub-pixel, to utilize
Double domain structures improve the light transmission rate of display panel, also, compare single domain, field-of-view angle can be improved, i.e., in certain visual field model
In enclosing, light transmission rate will not be reduced.Also, since switching transistor and grid line setting in the present invention is in two, adjacent picture sub- sons
It is arranged between pixel, has black matrix between two neighboring sub- sub-pixel, so, black matrix is blocking the same of switching transistor
When can just block and show abnormal region between two sub- sub-pixels, so without the concern for existing for double domain structures due to
Liquid crystal molecule overturning can be abnormal generated display dark space between two farmlands.
Optionally, in array substrate provided in an embodiment of the present invention, as shown in Figure 10, in same sub-pixel Pix, two
Sub- sub-pixel Pix1 is symmetrical arranged.And be located at the farmland direction of sub- sub-pixel Pix1 of a line it is identical, be not limited thereto.
Certainly, in the specific implementation, it can also set identical for the farmland of two in each sub-pixel sub- sub-pixels, herein
It is not construed as limiting.
Based on the same inventive concept, the embodiment of the invention also provides a kind of liquid crystal display panels, as shown in Figure 10, Figure 10
For the structural schematic diagram of liquid crystal display panel provided in an embodiment of the present invention；Including any of the above-described battle array provided in an embodiment of the present invention
Column substrate 10.Since the principle that the liquid crystal display panel solves the problems, such as is similar to a kind of aforementioned array substrate, the liquid crystal
Show that the implementation of panel may refer to the implementation of aforementioned array substrate, overlaps will not be repeated.
In the specific implementation, as shown in Figure 10, it is additionally provided in liquid crystal display panel and is oppositely arranged with array substrate 10
Color membrane substrates 20, and the liquid crystal layer 30 between color membrane substrates 20 and array substrate 10.
In the specific implementation, black matrix and color film layer are typically provided on color membrane substrates, public electrode can be set in coloured silk
It in ilm substrate, also can be set in array substrate, and generally comprise pixel electrode in each sub-pixel of array substrate.Specifically
Ground, the other film layers and structure of liquid crystal display panel can refer to the prior art, and therefore not to repeat here.
Based on the same inventive concept, the embodiment of the invention also provides a kind of display devices, including the embodiment of the present invention to mention
Any of the above-described kind of display device supplied.The display device can be with are as follows: mobile phone as shown in figure 11, tablet computer, television set, display
Any products or components having a display function such as device, laptop, Digital Frame, navigator.The implementation of the display device
It may refer to the embodiment of above-mentioned display panel, overlaps will not be repeated.
Array substrate, liquid crystal display panel and display device provided in an embodiment of the present invention, array substrate, each sub-pixel packet
Include arrange in a second direction two sub- sub-pixels, switching transistor corresponding with each sub-pixel be located at two sub- sub-pixels it
Between, and with two sub- sub-pixels and be all connected with；Corresponding two grid lines of each sub-pixel, and two grid lines are respectively positioned in sub-pixel
Between two sub- sub-pixels, sub-pixel is connected with the wherein grid line in corresponding two grid lines.I.e. every a line sub-pixel pair
The switching transistor answered and two grid lines are respectively positioned between two row Asia sub-pixels, and for black matrix, black matrix is in two rows Asia
It is wide between sub-pixel to be arranged to cover the corresponding switching transistor of each sub-pixel and corresponding two grid lines, therefore, from battle array
On the whole, the black matrix extended in a first direction is wide setting to column substrate, therefore not will cause point sense.Also, with
The grid line that each switching transistor is correspondingly connected with is located between two in each sub-pixel sub- sub-pixels, in this way, in a sub-pixel,
It is self-complementary that capacitor Cpg difference as caused by technique contraposition between pixel electrode and grid line can use two sub- sub-pixels progress
It repays.
Although preferred embodiments of the present invention have been described, it is created once a person skilled in the art knows basic
Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as
It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. a kind of array substrate, which is characterized in that including underlay substrate, arranged in arrays multiple on the underlay substrate
Sub-pixel, the switching transistor to connect one to one with each sub-pixel, a plurality of grid line extended in a first direction, Yi Jiduo
The data line that item extends in a second direction, the first direction and the second direction are arranged in a crossed manner；Wherein:
Each sub-pixel includes arrange in a second direction two sub- sub-pixels, switch crystal corresponding with each sub-pixel
Pipe is located between described two sub- sub-pixels, and is all connected with described two sub- sub-pixels；
The side of each column sub-pixel is provided with the data line, and each column sub-pixel passes through corresponding switch respectively
Transistor is connect with data line described in the same for being located at one side；
Each corresponding two grid lines of the sub-pixel, and corresponding two grid lines are respectively positioned on the institute in the sub-pixel
State between two sub- sub-pixels, the sub-pixel by the corresponding switching transistor in corresponding two grid lines
A wherein grid line connection；
With along the first direction, often two adjacent column sub-pixels is a unit groups, with the sub- picture of a line in the same unit group
Element is separately connected same grid line, and the sub-pixel in two neighboring unit group with a line is separately connected different grid lines.
2. array substrate as described in claim 1, which is characterized in that in the same sub-pixel, described two Asia sub-pixels
Farmland direction it is different.
3. array substrate as claimed in claim 2, which is characterized in that for the same row sub-pixel along the second direction,
In two sub-pixels of arbitrary neighborhood, one of them described sub-pixel is connect with odd-numbered line grid line, another described sub-pixel
It is connect with even number line grid line.
4. array substrate as described in any one of claims 1-3, which is characterized in that further include a plurality of connection cabling, Mei Yisuo
It states connection cabling and connects two different data lines, and a data line is only connected with a connection cabling；
The polarity of sub-pixel described in same row is identical in same frame picture, and the polarity of the adjacent two column sub-pixel is different, and same
The polarity of two column sub-pixels corresponding to two data lines of the one connection cabling connection is identical, and the grid line connected is different.
5. array substrate as claimed in claim 4, which is characterized in that the two data lines with the same connection cabling connection
Respectively nth data line and the n-th+2 data line.
6. array substrate as claimed in claim 4, which is characterized in that the color of the sub-pixel of same row is identical；
It is identical as the color of two column sub-pixels corresponding to two data lines of the same connection cabling connection.
7. array substrate as claimed in claim 6, which is characterized in that along first direction, the sub-pixel is according to R, G and B
Arrangement regulation repeated arrangement；
The nth data line connect the same connection cabling with the n-th+6 data line.
8. array substrate as claimed in claim 6, which is characterized in that along first direction, the sub-pixel is according to R, G, B and W
Arrangement regulation repeated arrangement；
The nth data line connect the same connection cabling with the n-th+8 data line.
9. a kind of liquid crystal display panel, which is characterized in that go the described in any item array substrates of 1-8 including such as right.
10. a kind of display device, which is characterized in that including liquid crystal display panel as claimed in claim 9.
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| CN112908234A (en) * | 2019-12-04 | 2021-06-04 | 友达光电股份有限公司 | Display device |
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| CN110531557B (en) | 2021-12-10 |
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