CN110515822A - Interrupt response time test method, device, equipment and storage medium - Google Patents
Interrupt response time test method, device, equipment and storage medium Download PDFInfo
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- CN110515822A CN110515822A CN201910818726.9A CN201910818726A CN110515822A CN 110515822 A CN110515822 A CN 110515822A CN 201910818726 A CN201910818726 A CN 201910818726A CN 110515822 A CN110515822 A CN 110515822A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
- G06F11/3419—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment by assessing time
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
This application involves a kind of interrupt response time test method, device, equipment and storage mediums.Wherein, interrupt response time test method includes to processor to be measured and accompanying survey device while exporting interruption pumping signal；The local zone time of processor feedback to be measured is received, and accompanies the current time for surveying device feedback, and obtain the read operation duration that processor to be measured reads local zone time；Current time, read operation duration and local zone time are handled, the interrupt response time of this test of processor to be measured is obtained.By while to processor to be measured and survey device output is accompanied to interrupt pumping signal, it interrupt action that processor to be measured is executed and accompanies to survey device and reset or latch the movement at current time and carries out, so as to avoid inconsistent bring error is acted, so that the test of interrupt response time is more accurate.The read operation duration that processor to be measured reads local zone time is got, so that the interrupt response time for obtaining processor to be measured is more accurate.
Description
Technical field
This application involves processor technical fields, more particularly to a kind of interrupt response time test method, device, equipment
And storage medium.
Background technique
With the progress of microelectronic process engineering, IC products using more and more extensive, in national economy and state
It is ubiquitous in anti-safety.The effects of processor is the core of IC products, plays calculation processing, control, scheduling.It interrupts
Function is one of key function of processor, and interrupt response time characterizes the quality of the performance parameter of processor.In shorter
The disconnected response time enables a processor to generate external interrupt response faster, promotes the processing capacity of processor.
During realization, inventor has found that at least there are the following problems: conventional processors interrupt response in traditional technology
The test method of time has that precision is not high.
Summary of the invention
Based on this, it is necessary in view of the above technical problems, provide a kind of interrupt response time measuring accuracy of can be improved
Interrupt response time test method, device, equipment and storage medium.
To achieve the goals above, the embodiment of the invention provides a kind of interrupt response time test methods, comprising steps of
To processor to be measured and accompanies survey device while exporting interruption pumping signal；It interrupts pumping signal and is used to indicate place to be measured
It manages device and executes interrupt action, and read the local zone time accompanied and surveyed in device；Interruption pumping signal, which is used to indicate to accompany, surveys device clearing
Or latch current time；
The local zone time of processor feedback to be measured is received, and accompanies the current time for surveying device feedback, and obtain place to be measured
Manage the read operation duration that device reads local zone time；
Current time, read operation duration and local zone time are handled, when obtaining the interrupt response of processor to be measured this test
Between.
Current time, read operation duration and local zone time are handled in one of the embodiments, obtain processor sheet to be measured
After the step of interrupt response time of secondary test, further comprise the steps of:
Obtain processor to be measured this test interrupt response time when, add up interrupt response time testing time, directly
Testing time to interrupt response time reaches preset value；
When interrupt response time testing time reaches preset value, according to each interrupt response time, it is flat to obtain interrupt response
The equal time.
In one of the embodiments, to processor to be measured and accompany survey device simultaneously export interruption pumping signal the step of it
Before, it further comprises the steps of:
Phase alignment processing is carried out to pumping signal is interrupted.
The step of processor to be measured reads the read operation duration of local zone time is obtained in one of the embodiments, comprising:
Indicate that processor to be measured reads the local moment accompanied and survey device；
Receive the local moment accompanied and survey device feedback；
When receiving the local moment for accompanying survey device, survey of the cumulative read operation duration testing time up to read operation duration
Examination number reaches preset times；
When the testing time of read operation duration reaches preset times, each local moment is handled, read operation duration is obtained.
In the step of handling each local moment in one of the embodiments, obtaining read operation duration, it is based on following public affairs
Formula obtains read operation duration:
Wherein, Δ TmFor the m times test read operation duration；Tm+1The local moment tested for the m+1 times；TmIt is surveyed for the m times
The local moment of examination；TsFor the time interval for interrupting pumping signal；TreadFor read operation duration.
Current time, read operation duration and local zone time are handled in one of the embodiments, obtain processor sheet to be measured
In the step of interrupt response time of secondary test, it is based on following formula, obtains the interrupt response time of processor to be measured:
TIR=TR-Tread-T1；
Wherein, TIRFor interrupt response time；TreadFor read operation duration；TRFor local zone time, T1For current time.
Before exporting the step of interrupting pumping signal to processor to be measured in one of the embodiments, further comprise the steps of:
Using second pulse signal to accompany survey device carry out time error correcting process.
The embodiment of the invention also provides a kind of interrupt response time test devices, comprising:
Signal output module, for processor to be measured and accompanying to survey and device while exporting interruption pumping signal；Interrupt excitation
Signal is used to indicate processor to be measured and executes interrupt action, and reads the local zone time accompanied and surveyed in device；Pumping signal is interrupted to use
It is accompanied in instruction and surveys device execution response action, response action includes resetting or latching current time；
Local zone time obtains module, receives the local zone time of processor feedback to be measured, and accompanies and survey the current of device feedback
Moment；
Read operation duration obtains module, and the read operation duration of local zone time is read for obtaining processor to be measured；
Data processing module, for handling current time, read operation duration and local zone time, obtain processor to be measured this
The interrupt response time of test.
The embodiment of the invention also provides a kind of interrupt response time test equipments, including accompany and survey device, memory and place
Device is managed, memory is stored with computer program, when processor executes computer program the step of realization any of the above-described method.
The real-time example of the present invention additionally provides a kind of computer readable storage medium, is stored thereon with computer program, calculates
The step of machine program realizes any one of above-mentioned method when being executed by processor.
A technical solution in above-mentioned technical proposal is had the following advantages and beneficial effects:
Interrupt response time test method provided by the present application by while to processor to be measured and is accompanied in survey device output
Disconnected pumping signal so that interrupt action that processor to be measured executes and accompanying survey device reset or latch the movement at current time can be with
It carries out, so as to avoid inconsistent bring error is acted, so that the test of interrupt response time is more accurate.Interrupt excitation letter
Number instruction processor to be measured executes interrupt action, and reads the local zone time accompanied and surveyed in device.Therefore the local zone time read
Including interrupt response time, current time and read the local zone time accompanied and surveyed in device.It gets processor to be measured and reads this
The read operation duration of ground time, to obtain the interrupt response time of processor to be measured.Meanwhile interrupt response provided by the present application
It does not need to have the advantages that at low cost, high-efficient and easy to spread using the expensive instrument such as oscillograph in time test method.Together
When, the application has biggish universality suitable for the processors such as CPU, SOC, MCU, DSP and its board and machine system.
The application's accompanies survey device that can carry out concurrent testing, test effect to Multiple Interrupt signal using programmable logic device
Rate is high and time cost is low.
Detailed description of the invention
By being more particularly described for preferred embodiment of the present application shown in the drawings, the above and other mesh of the application
, feature and advantage will become more fully apparent.Identical appended drawing reference indicates identical part in all the attached drawings, and does not carve
Meaning draws attached drawing by actual size equal proportion scaling, it is preferred that emphasis is shows the purport of the application.
Fig. 1 is the first schematic flow schematic diagram of interrupt response time test method in one embodiment；
Fig. 2 is the second schematic flow schematic diagram of interrupt response time test method in one embodiment；
Fig. 3 is the third schematic flow schematic diagram of interrupt response time test method in one embodiment；
Fig. 4 is the 4th schematic flow schematic diagram of interrupt response time test method in one embodiment；
Fig. 5 is the first schematic stream that the read operation duration that processor to be measured reads local zone time is obtained in one embodiment
Journey schematic diagram；
Fig. 6 is the second schematic stream that the read operation duration that processor to be measured reads local zone time is obtained in one embodiment
Journey schematic diagram；
Fig. 7 is the 5th schematic flow schematic diagram of interrupt response time test method in one embodiment；
Fig. 8 is the first schematic block diagram of interrupt response time test device in one embodiment；
Fig. 9 is the second schematic block diagram of interrupt response time test device in one embodiment；
Figure 10 is the third schematic block diagram of interrupt response time test device in one embodiment；
Figure 11 is the internal structure chart of interrupt response time test equipment in one embodiment；
Figure 12 is the result block diagram of interrupt response time tester in one embodiment；
Figure 13 is the flow diagram of the interrupt response time test method of multiple interrupt pumping signal in one embodiment.
Specific embodiment
The application in order to facilitate understanding is described more fully the application below with reference to relevant drawings.In attached drawing
Give the preferred embodiment of the application.But the application can realize in many different forms, however it is not limited to this paper institute
The embodiment of description.On the contrary, purpose of providing these embodiments is make it is more thorough and comprehensive to disclosure of this application.
It should be noted that it can be directly to separately when an element is considered as " connection " another element
One element and it is in combination be integrated, or may be simultaneously present centering elements.Term as used herein " reading " " is held
Row ", " feedback " and similar statement are for illustrative purposes only.
Unless otherwise defined, all technical and scientific terms used herein and the technical field for belonging to the application
The normally understood meaning of technical staff is identical.Term used in the description of the present application is intended merely to describe specific reality
Apply the purpose of example, it is not intended that in limitation the application.Term " and or " used herein includes one or more relevant institutes
Any and all combinations of list of items.
For the test of interrupt response time, general method is triggered to it and response signal is surveyed using oscillograph
Amount, counts the difference between them as interrupt response time.This method has the characteristics that realization is simple, easily operated, needs
Survey product is accompanied dependent on hardware such as oscillographs, during actual use oscillograph tests interrupt response time, is deposited
In following deficiency: oscillograph heaviness is portable, it is expensive, can not multi-channel parallel test and precision it is low.
And interrupt response time test method provided by the present application can effectively solve the above problems.
In one embodiment, as shown in Figure 1, providing a kind of interrupt response time test method, comprising steps of
S110 to processor to be measured and accompanies survey device while exporting interruption pumping signal；Pumping signal is interrupted to be used to indicate
Processor to be measured executes interrupt action, and reads the local zone time accompanied and surveyed in device；Interruption pumping signal, which is used to indicate, accompanies survey device
Part resets current time or latches current time；
Wherein, accompany survey device include this field any one the device of timing module can be provided.Optionally, survey device is accompanied
Including programmable logic device, FPGA (Field-Programmable Gate Array, programmable gate array) can be used,
CPLD (Complex Programmable Logic Device, Complex Programmable Logic Devices) can also be used.FPGA or
The clock frequency that timing module in CPLD can be provided based on local crystal oscillator calculates the time.Specifically, local crystal oscillator can be
The clock frequency source of high stability.In a specific example, clock frequency can be 33.33MHz, or 50MHz, energy
20ms is enough provided to 100ms range clocking internal precision.One kind that pumping signal is pumping signal is interrupted, may include pulse per second (PPS) letter
Number.
It should be noted that using any one method of this field to processor to be measured and survey device can be accompanied while being exported
Interrupt pumping signal.It interrupts pumping signal and is used to indicate processor execution interrupt action to be measured, and read the sheet accompanied and surveyed in device
The ground time.In a specific example, when the interruption pumping signal that processor to be measured receives, processor to be measured enters interrupt processing
Service routine, the interrupt processing service routine are used to indicate the local zone time for reading and accompanying and surveying in device.
Interruption pumping signal is used to indicate to accompany and surveys device clearing or latch current time.Specifically, being that survey device is accompanied in instruction
Part execution clearing current time, which still executes, latches current time, can be by accompanying survey device to determine.In a specific example, when
When interrupting the clear terminal of pumping signal access FPGA, logic unit is based on the interruption pumping signal in FPGA, resets timing module
Current time, when interrupting the latch enable end of pumping signal access FPGA, logic unit is based on interruption excitation in FPGA
The current time of signal latch timing module.
S120, receives the local zone time of processor to be measured feedback, and accompanies the current time for surveying device feedback, and obtain to
Survey the read operation duration that processor reads local zone time；
It should be noted that the local zone time of processor feedback to be measured can be obtained by any one means of this field,
And accompany the current time for surveying device feedback.Such as: processor to be measured can read local zone time, and local zone time is stored
In a storage module, the local zone time of processor feedback to be measured is then read from memory module；It can also directly receive to be measured
The local zone time that processor is read.In a specific example, local zone time can be stored in array by way of pointer.It connects
It receives and accompanies the current time for surveying device feedback in the same way.
The read operation duration that processor to be measured reads local zone time, example can be obtained by any technological means in this field
Such as, reading local zone time instruction can be sent by resetting local zone time, be read out processor to be measured to local zone time, read
Time be read operation duration.For another example, it, by calculating the difference of local zone time, can be obtained by repeatedly reading local zone time
To read operation duration.
S130, processing current time, read operation duration and local zone time obtain the interruption sound of this test of processor to be measured
Between seasonable.
Specifically, the difference of local zone time and current time, is the sum of interrupt response time and read operation duration.To working as
Preceding moment, read operation duration and local zone time are handled, and the terminal response time of this test of processor to be measured can be obtained.
Current time, read operation duration and local zone time are handled in one of the embodiments, obtain processor sheet to be measured
In the step of interrupt response time of secondary test, it is based on following formula, obtains the interrupt response time of processor to be measured:
TIR=TR-Tread-T1；
Wherein, TIRFor interrupt response time；TreadFor read operation duration；TRFor local zone time, T1For current time.
Interrupt response time test method provided in this embodiment by while to processor to be measured and accompanies survey device output
Interrupt pumping signal so that processor to be measured execute interrupt action and accompany survey device reset or latch current time movement can
To carry out, so as to avoid inconsistent bring error is acted, so that the test of interrupt response time is more accurate.Interrupt excitation
Signal designation processor to be measured executes interrupt action, and reads the local zone time accompanied and surveyed in device.When the local therefore read
Between include interrupt response time, current time and read accompany survey device in local zone time.Processor to be measured is got to read
The read operation duration of local zone time, to obtain the interrupt response time of processor to be measured.Meanwhile interruption provided by the present application is rung
It does not need to have the advantages that at low cost, high-efficient and easy to spread using the expensive instrument such as oscillograph in test method between seasonable.
Meanwhile the application has biggish pervasive suitable for the processors such as CPU, SOC, MCU, DSP and its board and machine system
Property.The application's accompanies survey device that can carry out concurrent testing, test to Multiple Interrupt signal using programmable logic device
High-efficient and time cost is low.
In one embodiment, as shown in Fig. 2, providing a kind of interrupt response time test method, comprising steps of
S210 to processor to be measured and accompanies survey device while exporting interruption pumping signal；Pumping signal is interrupted to be used to indicate
Processor to be measured executes interrupt action, and reads the local zone time accompanied and surveyed in device；Interruption pumping signal, which is used to indicate, accompanies survey device
Part resets or latches current time；
S220, receives the local zone time of processor to be measured feedback, and accompanies the current time for surveying device feedback, and obtain to
Survey the read operation duration that processor reads local zone time；
S230, processing current time, read operation duration and local zone time obtain the interruption sound of this test of processor to be measured
Between seasonable.
S240, obtain processor to be measured this test interrupt response time when, add up interrupt response time test time
Number, until the testing time of interrupt response time reaches preset value；
Wherein, preset value can be adjusted, and in actual measurement, preset value is not less than 1000 times.By repeatedly recycling
Multiple test results are obtained, survey timing module unstability bring time error in device to eliminate random error and accompany.
When accompanying survey device is FPGA or CPLD, the unstability bring that local zone time will receive local crystal oscillator influences.
S250, according to each interrupt response time, is obtained to interrupt and be rung when interrupt response time testing time reaches preset value
Answer average time.
Specifically, handling each interrupt response time, interrupt response average time is obtained.It, can in a specific example
To obtain interrupt response average time to each interrupt response time averaging.During the multiple test of progress can be improved
The accuracy of disconnected response time.
In order to which the scheme of the present embodiment is further described, spy is illustrated in conjunction with specific testing process:
Processor interrupt response time testing process is as shown in figure 3, be to interrupt pumping signal with pulse per second (PPS), in processor behaviour
The main process for making to run test program process flow in system is as follows:
S310, opens pulse per second (PPS) and processor interrupts, and setting processor interruption times variable n is 0；
S320, pulse per second (PPS) trigger processor and interrupt,
S330 simultaneously enters processor interrupt service routine；
S340, in the processor in disconnected service routine, processor reads the time below the second in CPLD/FPGA, is denoted as, and lead to
Cross pointer deposit array；
S350, interruption times variable n add 1；
S360 determines whether n is more than preset interruption total degree；
S370 continues waiting for interrupt response if processor interrupt response number is not up to n times；If processor into
N times interrupt response is gone, then the time average that computation processor is read from CPLD/FPGA.
In one of the embodiments, as shown in figure 4, to processor to be measured and accompany survey device while exporting interruption excitation letter
Number the step of before, further comprise the steps of:
S410 carries out phase alignment processing to pumping signal is interrupted.
Wherein, phase alignment is to make processor to be measured and accompany to survey device trigger action simultaneously；Specifically, be directed to
It surveys for processor, interrupting pumping signal is its progress interrupt action of triggering.It is directed to accompany and survey for device, interrupt pumping signal
It is to trigger it to be zeroed out movement or latching action.
S420 to processor to be measured and accompanies survey device while exporting interruption pumping signal；Pumping signal is interrupted to be used to indicate
Processor to be measured executes interrupt action, and reads the local zone time accompanied and surveyed in device；Interruption pumping signal, which is used to indicate, accompanies survey device
Part resets or latches current time；
S430, receives the local zone time of processor to be measured feedback, and accompanies the current time for surveying device feedback, and obtain to
Survey the read operation duration that processor reads local zone time；
S440, processing current time, read operation duration and local zone time obtain the interruption sound of this test of processor to be measured
Between seasonable.
Carry out registration process by multiple interrupt pumping signal, guarantee local zone time that processor to be measured is read and it is current when
The difference at quarter, for the sum of interrupt response time and read operation duration so that the interrupt response time test method that embodiment provides
Obtained interrupt response time is more accurate.
In one embodiment, as shown in figure 5, obtaining the step that processor to be measured reads the read operation duration of local zone time
Suddenly, comprising:
S510 indicates that processor to be measured reads the local moment accompanied and survey device；
Wherein, at the time of the local moment is that processor to be measured is read, it should be noted that local moment and local zone time
Refer to the different time.
Specifically, can control by way of sending instruction processor to be measured, its reading is made to accompany survey device
The local moment.
S520 receives the local moment accompanied and survey device feedback；
Specifically, it can be received by this field any means and accompany the local moment for surveying device feedback.
S530 adds up read operation duration testing time when read operation when receiving the local moment for accompanying survey device
Long testing time reaches preset times；
S540 handles each local moment, when obtaining read operation when the testing time of read operation duration reaches preset times
It is long.
It should be noted that due to being that the local moment surveyed in device, processor adjacent two to be measured are accompanied in continuous reading
The difference at the local moment of secondary reading is the read operation duration that processor is tested at the m times.It further, can also be by acquisition
Read operation duration average, with eliminate random error and accompany survey the unstable bring time error of device.
In the step of handling each local moment in one of the embodiments, obtaining read operation duration, it is based on following public affairs
Formula obtains read operation duration:
Wherein, Δ TmFor the m times test read operation duration；Tm+1The local moment tested for the m+1 times；TmIt is surveyed for the m times
The local moment of examination；TsFor the time interval for interrupting pumping signal；TreadFor read operation duration.
The read operation duration of the acquisition processor to be measured provided through this embodiment, operating process are few.If to survey device is accompanied
Part is zeroed out processing, to obtain read operation duration, there are clearing movements and the movement of read operation duration to carry out simultaneously
The problem of, cumbersome and precision is lower.
Method in order to which the present embodiment read operation duration is further described, as shown in fig. 6, it is special combine specific testing process into
Row explanation.Wherein, interrupting pumping signal is second pulse signal, and accompanying and surveying device is CPLD or FPGA.It is specific as follows:
S610 opens pulse per second (PPS) and interrupts (interruption can be rising edge, failing edge or low and high level triggering), in pulse per second (PPS)
It is disconnected to carry out cleaning operation to the second following timer in CPLD/FPGA.It is 0 that cycle-index variable m is arranged in processor；
S620, processor reads the time second in CPLD/FPGA or less by read command, and is stored in number by pointer mode
Group；
S630, cycle-index variable m add 1；
S640 determines whether m is more than preset circulation total degree；
S650 continues to recycle read operation if processor read operation number is not up to M times；If processor into
M read operation is gone, then the average read operation duration of computation processor.
In one of the embodiments, as shown in fig. 7, before exporting the step of interrupting pumping signal to processor to be measured,
It further comprises the steps of:
S710, using second pulse signal to accompany survey device carry out time error correcting process.
Wherein, pulse per second (PPS) refers to the synchronization signal of the satellite navigation systems such as GPS or Beidou transmission.
It specifically, accompanying the timing module for surveying device by second pulse signal amendment, can achieve its time precision
100ns。
S720 to processor to be measured and accompanies survey device while exporting interruption pumping signal；Pumping signal is interrupted to be used to indicate
Processor to be measured executes interrupt action, and reads the local zone time accompanied and surveyed in device；Interruption pumping signal, which is used to indicate, accompanies survey device
Part resets or latches current time；
S730, receives the local zone time of processor to be measured feedback, and accompanies the current time for surveying device feedback, and obtain to
Survey the read operation duration that processor reads local zone time；
S740, processing current time, read operation duration and local zone time obtain the interruption sound of this test of processor to be measured
Between seasonable.
By using second pulse signal to accompanying the local zone time for surveying device to carry out time complexity curve, meet essence so that accompanying and surveying device
Degree requires, and improves the accuracy of the present embodiment interrupt response time test method.
It should be understood that although each step in the flow chart of Fig. 1-7 is successively shown according to the instruction of arrow,
These steps are not that the inevitable sequence according to arrow instruction successively executes.Unless expressly stating otherwise herein, these steps
Execution there is no stringent sequences to limit, these steps can execute in other order.Moreover, at least one in Fig. 1-7
Part steps may include that perhaps these sub-steps of multiple stages or stage are not necessarily in synchronization to multiple sub-steps
Completion is executed, but can be executed at different times, the execution sequence in these sub-steps or stage is also not necessarily successively
It carries out, but can be at least part of the sub-step or stage of other steps or other steps in turn or alternately
It executes.
In one embodiment, as shown in figure 8, providing a kind of interrupt response time test device, comprising:
Signal output module 810, for processor to be measured and accompanying to survey and device while exporting interruption pumping signal；It interrupts and swashs
It encourages signal and is used to indicate processor execution interrupt action to be measured, and read the local zone time accompanied and surveyed in device；Interrupt pumping signal
It is used to indicate to accompany and surveys device execution response action, response action includes resetting or latching current time；
Local zone time obtains module 820, receives the local zone time of processor feedback to be measured, and accompanies and survey working as device feedback
The preceding moment；
Read operation duration obtains module 830, and the read operation duration of local zone time is read for obtaining processor to be measured；
Data processing module 840 obtains processor to be measured for handling current time, read operation duration and local zone time
The interrupt response time of this test.
In one embodiment, as shown in figure 9, providing a kind of interrupt response time test device, comprising:
Signal output module 910, for processor to be measured and accompanying to survey and device while exporting interruption pumping signal；It interrupts and swashs
It encourages signal and is used to indicate processor execution interrupt action to be measured, and read the local zone time accompanied and surveyed in device；Interrupt pumping signal
It is used to indicate to accompany and surveys device execution response action, response action includes resetting or latching current time；
Local zone time obtains module 920, receives the local zone time of processor feedback to be measured, and accompanies and survey working as device feedback
The preceding moment；
Read operation duration obtains module 930, and the read operation duration of local zone time is read for obtaining processor to be measured；
Data processing module 940 obtains processor to be measured for handling current time, read operation duration and local zone time
The interrupt response time of this test.
Accumulator module 950, for obtain processor to be measured this test interrupt response time when, add up interrupt response
Time test number, until the testing time of interrupt response time reaches preset value；
Mean value computation module 960, for when interrupt response time testing time reaches preset value, according to each interrupt response
Time obtains interrupt response average time.
In one of the embodiments, as shown in Figure 10, a kind of interrupt response time test device is provided, further includes:
Phase alignment module 900, for carrying out phase alignment processing to interruption pumping signal.
Specific restriction about interrupt response time test device may refer to test above for interrupt response time
The restriction of installation method, details are not described herein.Modules in above-mentioned interrupt response time test device can be all or part of
It is realized by software, hardware and combinations thereof.Above-mentioned each module can be embedded in the form of hardware or independently of in computer equipment
Processor in, can also be stored in a software form in the memory in computer equipment, in order to processor call execute
The corresponding operation of above modules.
In one embodiment, a kind of interrupt response time test equipment is provided, which can be terminal,
Its internal structure chart can be as shown in figure 11.The computer equipment includes processor, the memory, net connected by system bus
Network interface accompanies and surveys device, display screen and input unit.Wherein, the processor of the computer equipment is calculated and is controlled for providing
Ability.The memory of the computer equipment includes non-volatile memory medium, built-in storage.Non-volatile memory medium storage
There are operating system and computer program.The built-in storage is operating system and computer program in non-volatile memory medium
Operation provides environment.The network interface of the computer equipment is used to communicate with external terminal by network connection.The computer
To realize a kind of interrupt response time test method when program is executed by processor.The display screen of the computer equipment can be liquid
Crystal display screen or electric ink display screen, the input unit of the computer equipment can be the touch layer covered on display screen,
Be also possible to the key being arranged on computer equipment shell, trace ball or Trackpad, can also be external keyboard, Trackpad or
Mouse etc..
It will be understood by those skilled in the art that structure shown in Figure 11, only part relevant to application scheme
The block diagram of structure, does not constitute the restriction for the computer equipment being applied thereon to application scheme, and specific computer is set
Standby may include perhaps combining certain components or with different component layouts than more or fewer components as shown in the figure.
In one embodiment, a kind of interrupt response time test equipment is provided, including accompanies and surveys device, memory and place
Device is managed, memory is stored with computer program, which performs the steps of when executing computer program
To processor to be measured and accompanies survey device while exporting interruption pumping signal；It interrupts pumping signal and is used to indicate place to be measured
It manages device and executes interrupt action, and read the local zone time accompanied and surveyed in device；Interruption pumping signal, which is used to indicate to accompany, surveys device clearing
Or latch current time；
The local zone time of processor feedback to be measured is received, and accompanies the current time for surveying device feedback, and obtain place to be measured
Manage the read operation duration that device reads local zone time；
Current time, read operation duration and local zone time are handled, when obtaining the interrupt response of processor to be measured this test
Between.
In one embodiment, processor executes computer programs process current time, read operation duration and local zone time,
Obtain processor to be measured this test interrupt response time the step of after, also perform the steps of
Obtain processor to be measured this test interrupt response time when, add up interrupt response time testing time, directly
Testing time to interrupt response time reaches preset value；
When interrupt response time testing time reaches preset value, according to each interrupt response time, it is flat to obtain interrupt response
The equal time.
In one embodiment, processor executes computer program to processor to be measured and accompanies survey device while exporting interruption
Before pumping signal, also perform the steps of
Phase alignment processing is carried out to pumping signal is interrupted.
In one embodiment, processor, which executes, obtains the step of processor to be measured reads the read operation duration of local zone time
Include:
Indicate that processor to be measured reads the local moment accompanied and survey device；
Receive the local moment accompanied and survey device feedback；
When receiving the local moment for accompanying survey device, survey of the cumulative read operation duration testing time up to read operation duration
Examination number reaches preset times；
When the testing time of read operation duration reaches preset times, each local moment is handled, read operation duration is obtained.
In one embodiment, a kind of computer readable storage medium is provided, computer program is stored thereon with, is calculated
Machine program performs the steps of when being executed by processor
To processor to be measured and accompanies survey device while exporting interruption pumping signal；It interrupts pumping signal and is used to indicate place to be measured
It manages device and executes interrupt action, and read the local zone time accompanied and surveyed in device；Interruption pumping signal, which is used to indicate to accompany, surveys device clearing
Or latch current time；
The local zone time of processor feedback to be measured is received, and accompanies the current time for surveying device feedback, and obtain place to be measured
Manage the read operation duration that device reads local zone time；
Current time, read operation duration and local zone time are handled, when obtaining the interrupt response of processor to be measured this test
Between.
In one embodiment, processing current time, read operation duration and local when computer program is executed by processor
Time, obtain processor to be measured this test interrupt response time the step of after, also perform the steps of
Obtain processor to be measured this test interrupt response time when, add up interrupt response time testing time, directly
Testing time to interrupt response time reaches preset value；
When interrupt response time testing time reaches preset value, according to each interrupt response time, it is flat to obtain interrupt response
The equal time.
In one embodiment, processing current time, read operation duration and local when computer program is executed by processor
Time also performs the steps of before obtaining the interrupt response time of this test of processor to be measured
Phase alignment processing is carried out to pumping signal is interrupted.
In one embodiment, the reading that processor to be measured reads local zone time is obtained when computer program is executed by processor
The step of operating duration, comprising:
Indicate that processor to be measured reads the local moment accompanied and survey device；
Receive the local moment accompanied and survey device feedback；
When receiving the local moment for accompanying survey device, survey of the cumulative read operation duration testing time up to read operation duration
Examination number reaches preset times；
When the testing time of read operation duration reaches preset times, each local moment is handled, read operation duration is obtained.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in above-described embodiment method, being can be with
Relevant hardware is instructed to complete by computer program, the computer program can be stored in a non-volatile computer
In read/write memory medium, the computer program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein,
To any reference of memory, storage, database or other media used in each embodiment provided herein,
Including non-volatile and/or volatile memory.Nonvolatile memory may include read-only memory (ROM), programming ROM
(PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM) or flash memory.Volatile memory may include
Random access memory (RAM) or external cache.By way of illustration and not limitation, RAM is available in many forms,
Such as static state RAM (SRAM), dynamic ram (DRAM), synchronous dram (SDRAM), double data rate sdram (DDRSDRAM), enhancing
Type SDRAM (ESDRAM), synchronization link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM
(RDRAM), direct memory bus dynamic ram (DRDRAM) and memory bus dynamic ram (RDRAM) etc..
The interrupt response time test method of the application can also be applied to the test of Multiple Interrupt signal parallel simultaneously, now tie
Specific example is closed to be illustrated, specific as follows shown:
The interrupt response time tester of processor Pulse of Arbitrary is as shown in figure 12, including is tested processor, accompanies survey device
(CPLD or FPGA).In practical applications, interrupt response time test device shown in Figure 12 individually designed can make, can also
It is integrated into machine system using a part as system processing platform.Pulse per second (PPS) is often referred to the satellite navigations such as GPS or Beidou
The synchronization signal that system transmits, for correcting the error of timing module to accompanying survey device to carry out time synchronization.Meanwhile the second
Pulse signal also can be zeroed out operation to the local timing module in CPLD or FPGA, it is made to restart timing, thus
Keep local zone time synchronous with pulse per second (PPS), accompanies and survey the clock frequency that device local timing module can be provided based on local crystal oscillator
The time is calculated, time precision is up to hundred nanoseconds.The main function of CPLD or FPGA is for place to be measured in Figure 12 test board
It manages device and one clock below of local second is provided, timing module is similar to the function of counter, is provided based on local crystal oscillator
Clock frequency calculates the time, and provides the time precision of hundred nanoseconds to processor.Local crystal oscillator can be high stability when
Clock frequency source, such as 33.33MHz, 50MHz, the accuracy of timekeeping being capable of providing in 20ns to 100ns range.
During testing processor Pulse of Arbitrary interrupt response time, already using satellite navigation system
Second pulse signal, main function are synchronous local zone times, guarantee the second class precision of local zone time.IR0 in Figure 12 is second arteries and veins
Signal, IR1, IR2 ... are rushed, IRx indicates the interrupt signal on the shared road x.The IRx interrupt signal being input in CPLD or FPGA
Two movements can be triggered: firstly, IRx interrupt signal can trigger the time latch in CPLD or FPGA, when latching IRx arrival
Current time value into output register, to be read out by the processor to subsequent；Meanwhile IRx interrupt signal can pass through CPLD
Or the transmitting of FPGA is output to the interrupting input end mouth of processor, and triggers processor and generate interruption.
Pumping signal IR1 is interrupted, IR2 ..., IRx are by outside source, outside CPLD/FPGA or test board
CPLD/FPGA device generates.IR0 as second pulse signal and can interrupt pumping signal simultaneously, and IRx is only as interruption pumping signal
It uses.During the test, the x value in IRx is determined according to the available interruption number of processor, generally can be 4 tunnels or 6 tunnels
Deng.The interruption pumping signal according to IRx, the latch time triggered to it and output are needed in CPLD/FPGA on test board
Interrupt signal to processor interruptive port carries out phase alignment processing, guarantees that the time that processor to be measured is read is interrupt response
The sum of time and processor read time.
Processor Pulse of Arbitrary interrupt response time testing process is as shown in figure 13, and main processes are as follows:
It opens pulse per second (PPS) and processor to interrupt, the setting processor interruption times variable nx (x=0, in 1,2 ... expression that is 0
Disconnected number), and processor interrupt priority level is set；
It interrupts pumping signal triggering processor to interrupt, and enters corresponding processor interrupt service routine；
Break in service routine in the processor, processor reads IRx in CPLD/FPGA (x=0,1,2 ...) latch respectively
Second below the time, be denoted as Δ TR, and array is stored in by pointer；
Interruption times variable nx adds 1；
Determine whether nx is more than preset interruption total degree Nx；
If processor interrupt response number is not up to Nx times, interrupt response is continued waiting for；If processor has been carried out
Nx interrupt response, the then time average (T that computation processor is read from CPLD/FPGARx)。
During amounting to Nx interrupt response, the time average (T of processor readingRx) can be carried out by following formula
It calculates, x=0 in formula, 1,2 ... indicates different interruptive ports.
Then, it can be processed the average interrupt of device based on processor interrupt response time test sequence relationship in Fig. 3
Response time (TIRx), shown in following formula:
TIRx=TRx-Tread
In actual measurement, the value of Nx is usually all not less than 1000 times.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The several embodiments of the application above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the concept of this application, various modifications and improvements can be made, these belong to the protection of the application
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of interrupt response time test method, which is characterized in that comprising steps of
To processor to be measured and accompanies survey device while exporting interruption pumping signal；The interruption pumping signal be used to indicate it is described to
It surveys processor and executes interrupt action, and accompany the local zone time surveyed in device described in reading；The interruption pumping signal is used to indicate
Described accompany is surveyed device clearing or is latched current time；
The local zone time and described accompany for receiving the processor feedback to be measured survey the current time that device is fed back,
And obtain the read operation duration that the processor to be measured reads the local zone time；
The current time, the read operation duration and the local zone time are handled, this test of the processor to be measured is obtained
Interrupt response time.
2. interrupt response time test method according to claim 1, which is characterized in that handle the current time, institute
State read operation duration and the local zone time, obtain the processor to be measured this test interrupt response time the step of it
Afterwards, it further comprises the steps of:
Obtain the processor to be measured this test interrupt response time when, add up interrupt response time testing time, directly
Testing time to the interrupt response time reaches preset value；
When the interrupt response time testing time reaches preset value, according to each interrupt response time, obtains to interrupt and ring
Answer average time.
3. interrupt response time test method according to claim 1, which is characterized in that processor to be measured and accompany survey device
Before part exports the step of interrupting pumping signal simultaneously, further comprise the steps of:
Phase alignment processing is carried out to the interruption pumping signal.
4. interrupt response time test method according to claim 1, which is characterized in that obtain the processor to be measured and read
The step of taking the read operation duration of the local zone time, comprising:
Indicate that the processor to be measured accompanies the local moment for surveying device described in reading；
The local moment for surveying device feedback is accompanied described in reception；
When receiving the local moment accompanied and survey device, the read operation duration testing time that adds up is until the read operation
The testing time of duration reaches preset times；
When the testing time of the read operation duration reaches preset times, each local moment is handled, the reading behaviour is obtained
Make duration.
5. interrupt response time test method according to claim 4, which is characterized in that processing each local moment,
In the step of obtaining the read operation duration, it is based on following formula, obtains the read operation duration:
Wherein, Δ TmFor the m times test read operation duration；Tm+1The local moment tested for the m+1 times；TmIt is tested for the m times
The local moment；TsFor the time interval for interrupting pumping signal；TreadFor the read operation duration.
6. interrupt response time test method according to claim 1, which is characterized in that handle the current time, institute
State read operation duration and the local zone time, obtain the processor to be measured this test interrupt response time the step of in,
Based on following formula, the interrupt response time of the processor to be measured is obtained:
TIR=TR-Tread-T1；
Wherein, TIRFor the interrupt response time；TreadFor the read operation duration；TRFor the local zone time, T1Work as to be described
The preceding moment.
7. interrupt response time test method according to claim 1, which is characterized in that export and interrupt to processor to be measured
Before the step of pumping signal, further comprise the steps of:
Device progress time error correcting process is surveyed to described accompany using second pulse signal.
8. a kind of interrupt response time test device characterized by comprising
Signal output module, for processor to be measured and accompanying to survey and device while exporting interruption pumping signal；The interruption excitation
Signal is used to indicate the processor to be measured and executes interrupt action, and the local zone time surveyed in device is accompanied described in reading；In described
Disconnected pumping signal is used to indicate described accompany and surveys device execution response action, and the response action includes when resetting or latching current
It carves；
Local zone time obtains module, receives the local zone time of the processor to be measured feedback and described accompanies that survey device anti-
The current time of feedback；
Read operation duration obtains module, and the read operation duration of the local zone time is read for obtaining the processor to be measured；
Data processing module, for handling the current time, the read operation duration and the local zone time, obtain it is described to
Survey the interrupt response time of this test of processor.
9. a kind of interrupt response time test equipment, including survey device, memory and processor, the memory is accompanied to be stored with meter
Calculation machine program, which is characterized in that the processor realizes any one of claims 1 to 7 institute when executing the computer program
The step of stating method.
10. a kind of computer readable storage medium, is stored thereon with computer program, which is characterized in that the computer program
The step of method described in any item of the claim 1 to 8 is realized when being executed by processor.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111209175A (en) * | 2020-01-06 | 2020-05-29 | 山东超越数控电子股份有限公司 | External interrupt response performance test system and method |
| CN112115047A (en) * | 2020-10-22 | 2020-12-22 | 麒麟软件有限公司 | Delay testing method and system for hard real-time operating system |
| CN112650616A (en) * | 2021-01-05 | 2021-04-13 | 上海擎昆信息科技有限公司 | Interrupt detection method, device and system |
| CN113032305A (en) * | 2021-03-12 | 2021-06-25 | 天津飞腾信息技术有限公司 | Interface interruption measuring method and device |
| CN115309618A (en) * | 2022-06-30 | 2022-11-08 | 广州创龙电子科技有限公司 | Input and output delay detection method and system based on RT-Linux system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05204775A (en) * | 1991-11-28 | 1993-08-13 | Nec Eng Ltd | Local memory diagnostic device |
| CN101887286A (en) * | 2010-07-09 | 2010-11-17 | 中兴通讯股份有限公司 | Method and device for converting time format |
| US20130159577A1 (en) * | 2011-11-02 | 2013-06-20 | Renesas Electronics Corporation | Semiconductor data processing device, time-triggered communication system, and communication system |
| CN103684734A (en) * | 2013-11-11 | 2014-03-26 | 北京控制工程研究所 | Hot backup redundancy computer time synchronization system and method thereof |
-
2019
- 2019-08-30 CN CN201910818726.9A patent/CN110515822B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05204775A (en) * | 1991-11-28 | 1993-08-13 | Nec Eng Ltd | Local memory diagnostic device |
| CN101887286A (en) * | 2010-07-09 | 2010-11-17 | 中兴通讯股份有限公司 | Method and device for converting time format |
| US20130159577A1 (en) * | 2011-11-02 | 2013-06-20 | Renesas Electronics Corporation | Semiconductor data processing device, time-triggered communication system, and communication system |
| CN103684734A (en) * | 2013-11-11 | 2014-03-26 | 北京控制工程研究所 | Hot backup redundancy computer time synchronization system and method thereof |
Non-Patent Citations (2)
| Title |
|---|
| BENJAMIN WELCH等: "Extending STI for demanding hard-real-time systems" * |
| 丁源: "舰艇试验试航的网络可靠性监测方法" * |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111209175A (en) * | 2020-01-06 | 2020-05-29 | 山东超越数控电子股份有限公司 | External interrupt response performance test system and method |
| CN111209175B (en) * | 2020-01-06 | 2023-11-03 | 超越科技股份有限公司 | External interrupt response performance test system and method |
| CN112115047A (en) * | 2020-10-22 | 2020-12-22 | 麒麟软件有限公司 | Delay testing method and system for hard real-time operating system |
| CN112115047B (en) * | 2020-10-22 | 2022-12-09 | 麒麟软件有限公司 | Delay testing method and system for hard real-time operating system |
| CN112650616A (en) * | 2021-01-05 | 2021-04-13 | 上海擎昆信息科技有限公司 | Interrupt detection method, device and system |
| CN113032305A (en) * | 2021-03-12 | 2021-06-25 | 天津飞腾信息技术有限公司 | Interface interruption measuring method and device |
| CN113032305B (en) * | 2021-03-12 | 2023-07-04 | 飞腾信息技术有限公司 | Interface interrupt measurement method and device |
| CN115309618A (en) * | 2022-06-30 | 2022-11-08 | 广州创龙电子科技有限公司 | Input and output delay detection method and system based on RT-Linux system |
| CN115309618B (en) * | 2022-06-30 | 2023-04-11 | 广州创龙电子科技有限公司 | Input and output delay detection method and system based on RT-Linux system |
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