CN110504940B - Low-pass filter circuit and method - Google Patents

Low-pass filter circuit and method Download PDF

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CN110504940B
CN110504940B CN201810482118.0A CN201810482118A CN110504940B CN 110504940 B CN110504940 B CN 110504940B CN 201810482118 A CN201810482118 A CN 201810482118A CN 110504940 B CN110504940 B CN 110504940B
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switch
low
pass filter
adder
filter circuit
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CN110504940A (en
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刘军
吴泉清
盛欢
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CRM ICBG Wuxi Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01—Frequency selective two-port networks
    • H03H7/0153—Electrical filters; Controlling thereof
    • H03H7/0161—Bandpass filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • H03H17/0283—Filters characterised by the filter structure
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics

Abstract

The invention provides a low-pass filter circuit and a method, comprising the following steps: a first switch for sampling an output signal of the low-pass filter circuit; the first input end is connected with the last filtering output value output by the first switch, the second input end receives the current sampling value, and the adder is used for adding the last filtering output value and the current sampling value; a second switch for sampling the output signal of the adder; a first capacitor and a second capacitor for sample and hold; wherein the polarity of the control signal of the first switch is opposite to that of the control signal of the second switch. And feeding back the last filtering output value to the first input end of the adder, inputting the current sampling value to the second input end of the adder, and outputting the current filtering output value after the adder performs addition operation. The invention can realize the low-frequency filtering function without an external capacitor, a digital circuit and a singlechip, is convenient for integration and has low cost.

Description

Low-pass filter circuit and method
Technical Field
The present invention relates to the field of integrated circuit design, and in particular, to a low pass filter circuit and method.
Background
Low-pass filtering (Low-pass filter) is a filtering method that allows signals below the cut-off frequency to pass through, but signals above the cut-off frequency are blocked and attenuated. As shown in fig. 1, a typical low-pass filter may be implemented by a simple RC circuit 1, which includes a resistor R and a capacitor C, wherein one end of the resistor is used as an input terminal Vin of the low-pass filter, the other end of the resistor is used as an output terminal Vout of the low-pass filter, and one end of the capacitor C is connected to the output terminal Vout of the low-pass filter, and the other end of the capacitor C is grounded. When the frequency of filtering is low, a large capacity capacitor C is usually needed, but in the scheme of chip integration, the large capacity capacitor C cannot be integrated into a chip and needs to be externally arranged, so that pins and production cost of the chip are increased.
In order to solve the problem of large capacitance, the low-pass filtering without capacitance can be realized through a digital circuit or a digital algorithm of a singlechip. As shown in fig. 2, a scheme of first-order low-pass digital filtering is shown, where α is a filtering coefficient, X (n) is a current sampling value, Y (n-1) is a last filtering output value, and Y (n) is a current filtering output value; the value obtained by multiplying the current sampling value X (n) by the filter coefficient alpha is added with the value obtained by multiplying the last filter output value Y (n-1) by (1-alpha) to obtain the current filter output value Y (n), namely the following formula is satisfied: y (n) =αx (n) + (1- α) Y (n-1). The first-order low-pass filtering method adopts the sampling value and the up-sampling valueThe secondary filtered output values are weighted to obtain effective filtered values so that the output has feedback effect on the input. The filter cut-off frequency is
Figure BDA0001665778850000011
Where t is the sampling interval time. However, the low-frequency filter realized by the digital circuit or the single chip microcomputer has relatively high cost, and cannot be used in a common analog circuit process.
Therefore, how to avoid using large capacitors in the filter, reduce the cost, and be suitable for the analog circuit process has become one of the problems to be solved by those skilled in the art.
Disclosure of Invention
In view of the above drawbacks of the prior art, the present invention is directed to a low-pass filter circuit and a method thereof, which are used for solving the problems that in the prior art, large capacitors cannot be integrated, and a low-frequency filter realized by a digital circuit or a single chip microcomputer is high in cost and not suitable for an analog circuit.
To achieve the above and other related objects, the present invention provides a low-pass filter circuit, including at least:
the circuit comprises an adder, a first switch, a second switch, a first capacitor and a second capacitor;
the input end of the first switch is connected with the output end of the low-pass filter circuit, and the output end of the first switch is connected with the upper polar plate of the first capacitor and is used for sampling the output signal of the low-pass filter circuit; the lower polar plate of the first capacitor is grounded;
a first input end of the adder is connected with a last filtering output value output by the first switch, and a second input end of the adder receives a current sampling value and is used for carrying out addition operation on the last filtering output value and the current sampling value;
the input end of the second switch is connected with the output end of the adder, and the output end of the second switch is used as the output end of the low-pass filter circuit and used for sampling the output signal of the adder;
the upper polar plate of the second capacitor is connected with the output end of the second switch and the lower polar plate is grounded;
wherein the polarity of the control signal of the first switch is opposite to that of the control signal of the second switch.
Preferably, the adder comprises a first resistor, a second resistor and a first follower; one end of the first resistor is used as a first input end of the adder, the other end of the first resistor is connected with an input end of the first follower, one end of the second resistor is used as a second input end of the adder, the other end of the second resistor is connected with an input end of the first follower, and an output end of the first follower is used as an output end of the adder.
Preferably, the low-pass filter circuit further comprises a switch control signal generation module; the switch control signal generation module comprises a high-frequency sampling unit and an inverter, wherein the high-frequency sampling unit is used for generating square wave signals; the inverter is connected to the output end of the high-frequency sampling unit and is used for generating an inverse signal of the output signal of the high-frequency sampling unit.
Preferably, the low-pass filter circuit further comprises a second follower connected between the output of the first switch and the first input of the adder, a third follower connected between the current sample value and the second input of the adder, and a fourth follower connected between the output of the second switch and the output of the low-pass filter circuit, each follower being for isolating signals.
Preferably, the capacitance value of the first capacitor and the second capacitor is in the pF level.
More preferably, the low-pass filter circuit further comprises a third switch with an output terminal connected to the input terminal of the low-pass filter circuit, and a third capacitor connected to the output terminal of the third switch.
More preferably, the low-pass filter circuit further includes a peak sampling module, and an output end of the peak sampling module is connected to a control end of the third switch, and is used for controlling the third switch to sample.
More preferably, the capacitance value of the third capacitor is in the pF stage.
To achieve the above object and other related objects, the present invention further provides a low-pass filtering method of the above low-pass filtering circuit, where the low-pass filtering method at least includes:
and feeding back the last filtering output value to the first input end of the adder, inputting the current sampling value to the second input end of the adder, and outputting the current filtering output value after the adder performs addition operation.
Preferably, the current filtered output value satisfies the following relation:
V o (n)＝α*V in (n)+(1-α)*V o (n-1)，
wherein V is o (n) is the current filtered output value, α is the filter coefficient, V in (n) is the current sample value, V o (n-1) is the last filtered output value.
More preferably, the filter coefficient is determined by adjusting the resistances of a first resistor connected to the first input terminal of the adder and a second resistor connected to the second input terminal of the adder, satisfying the following relation:
Figure BDA0001665778850000031
wherein, α is a filter coefficient, R1 is a resistance value of the first resistor, and R2 is a resistance value of the second resistor.
Preferably, a peak current of a switching tube in a power factor correction circuit is received, the peak current of the switching tube is sampled based on peak sampling to obtain an envelope waveform of the peak current of the switching tube, and then a direct current feedback loop control signal is obtained through filtering, so that a compensation capacitor in the power factor correction circuit is removed.
As described above, the low-pass filter circuit and method of the present invention have the following advantages:
1. the low-pass filter circuit and the method can realize the low-frequency filter function without an external capacitor, are convenient to integrate and have low cost.
2. The low-pass filter circuit and the method can realize digital filtering without a digital circuit or a singlechip, and greatly reduce the cost.
3. The low-pass filter circuit and the method can obtain the filter value of the peak current envelope waveform of the switching tube by matching with the peak sampling technology, thereby saving the integral compensation capacitor of the power factor correction circuit and the like which need to filter low-frequency ripple waves, further reducing the pin number and the cost.
Drawings
Fig. 1 shows a schematic diagram of an RC circuit in the prior art.
Fig. 2 is a schematic diagram of a first order low pass digital filtering in the prior art.
Fig. 3 is a schematic diagram of a low-pass filter circuit according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of another embodiment of the low-pass filter circuit of the present invention.
Fig. 5 shows a schematic diagram of a low-pass filter circuit according to another embodiment of the invention.
Fig. 6 is a schematic diagram of a power factor correction circuit in the prior art.
Fig. 7 is a schematic diagram of the low-pass filter circuit of the present invention applied to a pfc circuit.
Description of element reference numerals
1 RC circuit
2. Low-pass filter circuit
21. Adder device
22. Switch control signal generating module
221. High-frequency sampling unit
222. Inverter with a high-speed circuit
23. Peak value sampling module
3. Power factor correction circuit
31. Compensation module
32. Comparison module
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
Please refer to fig. 3-7. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
Example 1
As shown in fig. 3, the present embodiment provides a low-pass filter circuit 2, the low-pass filter circuit 2 including:
adder 21, first switch S1, second switch S2, first capacitor C1, second capacitor C2, and switch control signal generation module 22.
As shown in fig. 3, an input end of the first switch S1 is connected to an output end of the low-pass filter circuit 2, and an output end of the first switch S1 is connected to an upper plate of the first capacitor C1, so as to sample an output signal of the low-pass filter circuit.
Specifically, the first switch S1 is used as a sampling switch, and the sampling frequency can be set according to the sampling requirement by the control signal frequency of the first switch S1, which is not set one by one. In this embodiment, the first switch S1 performs high frequency sampling.
As shown in fig. 3, an upper plate of the first capacitor C1 is connected to the output end of the first switch S1, and a lower plate of the first capacitor C1 is grounded. The first capacitor C1 is used as a sample-hold capacitor, and is used for holding the output signal of the low-pass filter circuit 2 after sampling on the first capacitor C1.
Specifically, the capacitance value of the first capacitor C1 is in the pF level, and may be integrated in a chip.
As shown in fig. 3, a first input terminal of the adder 21 is connected to the output terminal of the first switch S1, and a second input terminal of the adder 21 receives a current sampling value V in (n) a last filtered output value V outputted from the first switch S1 o (n-1) and the current sampling value V in (n) performing an addition operation.
Specifically, in the present embodiment, the adder 21 includes a first resistor R1, a second resistor R2, and a first follower OP1. One end of the first resistor R1 is used as a first input end of the adder 21, and the other end of the first resistor R1 is connected with an input end of the first follower OP 1; one end of the second resistor R2 is used as a second input end of the adder 21, and the other end of the second resistor R2 is connected with the input end of the first follower OP 1; the output of the first follower OP1 serves as the output of the adder 21. The first follower OP1 is configured to increase input impedance and decrease output impedance, so as to ensure isolation of an input signal and an output signal of the first follower OP1.
More specifically, the first follower OP1 is implemented with an operational amplifier, and a non-inverting input terminal of the operational amplifier is used as an input terminal of the first follower OP 1; the inverting input end of the operational amplifier is connected with the output end of the operational amplifier and serves as the output end of the first follower OP1.
As shown in fig. 3, an input terminal of the second switch S2 is connected to an output terminal of the adder 21, and an output terminal of the second switch S2 is used as an output terminal of the low-pass filter circuit 2, for sampling an output signal of the adder 21.
Specifically, the second switch S2 is used as a sampling switch, and the sampling frequency can be set according to the sampling requirement by the control signal frequency of the second switch S2, which is not set one by one. In this embodiment, the second switch S2 performs high frequency sampling.
As shown in fig. 3, an upper plate of the second capacitor C2 is connected to the output end of the second switch S2, and a lower plate of the second capacitor C2 is grounded. The second capacitor C2 is used as a sample-and-hold capacitor, and is used to hold the sampled output signal of the adder 21 on the second capacitor C2.
Specifically, the second capacitor C2 has a capacitance of pF, and may be integrated in a chip.
As shown in fig. 3, the switch control signal generating module 22 is connected to the control ends of the first switch S1 and the second switch S2, and is configured to control the on/off of the first switch S1 and the second switch S2, so as to realize sampling.
Specifically, the switch control signal generating module 22 includes a high-frequency sampling unit 221 and an inverter 222, where the high-frequency sampling unit 221 is configured to generate a square wave signal as a switch control signal; the inverter 222 is connected to the output end of the high frequency sampling unit 221, and is configured to generate an inverse signal of the output signal of the high frequency sampling unit 221.
In this embodiment, the output end of the high-frequency sampling unit 221 is connected to the control end of the first switch S1, and the output end of the inverter 222 is connected to the control end of the second switch S2. In practical applications, the connection relationship between the output signal of the switch control signal generating module 22 and the first switch S1 and the second switch S2 may be set as required, and the polarity of the control signal of the first switch S1 and the polarity of the control signal of the second switch S2 may be opposite, which is not limited by the embodiment.
The working principle of the low-pass filter circuit of this embodiment is as follows:
the switch control signal generating module 22 controls the first switch S1 to be turned on and the second switch S2 to be turned off, and at this time, the current filtered output value V o (n) after being sampled, converting the sampled value into a last filtering output value V o (n-1) and is held on said first capacitance C1.
Last filtered output value V o (n-1) entering said first adder 21 through a first input of said adder 21, the current sample value V in (n) entering said first adder 21 through a second input of said adder 21, said last filtered output value V o (n-1) and the current sample value V in (n) adding and outputting。
The switch control signal generating module 22 controls the second switch S2 to be turned on and the first switch S1 to be turned off, and at this time, the last filtered output value V o (n-1) and the current sample value V in (n) the new round of the current filtered output value V obtained after the addition o (n) is sampled and held on the second capacitor C2 and serves as an output signal of the low-pass filter circuit.
The first follower OP1 in the adder 21 is a high impedance operational amplifier, and its total input current is zero, so the following relation exists:
Figure BDA0001665778850000061
converted into a current filtered output value V o The expression of (n) can be obtained:
Figure BDA0001665778850000062
order the
Figure BDA0001665778850000063
Then V o (n)＝α*V in (n)+(1-α)*V o (n-1), that is, the present embodiment satisfies the digital filtering formula, digital filtering can be realized.
Example two
As shown in fig. 4, the present embodiment provides a low-pass filter circuit 2, wherein the low-pass filter circuit 2 is different from the first embodiment in that it further includes a second follower OP2 connected between the output terminal of the first switch S1 and the first input terminal of the adder 21, and connected to the current sampling value V in (n) a third follower OP3 between the second input of the adder 21, and a fourth follower OP4 connected between the output of the second switch S2 and the output of the low-pass filter circuit 2. The second follower OP2, the third follower OP3 and the fourth follower OP4 have isolation function, and the low-pass filtering can be greatly improvedStability of the circuit.
Specifically, the last filtered output value V o (n-1) is transmitted to the first input end of the adder 21 through the second follower OP2, so that the input impedance can be effectively improved, the output impedance can be reduced, and the isolation of the input and output signals at two ends of the second follower OP2 can be ensured.
Specifically, the current sampling value V in (n) the third follower OP3 is transmitted to the second input end of the adder 21, so that the input impedance can be effectively increased, the output impedance can be effectively reduced, and the isolation of the input and output signals at two ends of the third follower OP2 can be ensured.
Specifically, the pre-filter output value V o And (n) the output end of the low-pass filter circuit 2 is transmitted to the fourth follower OP4, so that the input impedance can be effectively improved, the output impedance can be reduced, and the isolation of input and output signals at two ends of the fourth follower OP4 can be ensured.
In this embodiment, the structures of the second follower OP2, the third follower OP3 and the fourth follower OP4 are the same as those of the first follower OP1, and in practical application, any circuit structure capable of realizing voltage follower output and having an isolation effect is suitable for the follower of this embodiment, but not limited to this embodiment.
The working principle of the low-pass filter circuit of the present embodiment is the same as that of the first embodiment, and is not described here in detail.
Example III
As shown in fig. 5, the present embodiment provides a low-pass filter circuit, which is different from the second embodiment in that the low-pass filter circuit further includes a third switch S3 with an output terminal connected to the input terminal of the low-pass filter circuit and a third capacitor C3 connected to the output terminal of the third switch.
Specifically, the input end of the third switch S3 receives a sampling value according to actual needs, and the output end thereof is connected to the input end of the third follower OP3 and is used for sampling the input signal of the third switch S3. The third switch S3 is used as a sampling switch, and the sampling frequency can be set according to the sampling requirement by the control signal frequency of the third switch S3, which is not set one by one.
Specifically, the upper electrode plate of the third capacitor C3 is connected to the output end of the third switch S3, and the lower electrode plate is grounded, so as to be used as a sample-hold capacitor, and used for holding the sampled input signal on the third capacitor C3. The capacitance value of the third capacitor C3 is in the pF level, and may be integrated in a chip.
As shown in fig. 6, taking a Boost structure as an example, in the prior art, the power factor correction circuit 3 includes an LED load or a main circuit, an inductance L, a freewheeling diode D, an output capacitor C, a switching tube M, a sampling resistor Rcs, a compensation module 31, a compensation capacitor Ccomp, and a comparison module 32, where the peak current of the switching tube M needs to be integrated by the compensation capacitor Ccomp to obtain a control value of a feedback loop, so as to control the switching tube M to be turned on or turned off. The compensation capacitor Ccomp is a capacitor with a large capacitance value, and cannot be integrated into a chip, so that the port COMP needs to be externally arranged outside the chip. As shown in fig. 7, in this embodiment, the low-pass filter circuit 2 is applied to the pfc circuit 3, the input end of the low-pass filter circuit 2 is connected to the source end of the switching tube M, and the output end of the low-pass filter circuit 2 is connected to the compensation module 31, so as to obtain a filtered value of a peak current envelope waveform of the switching tube, the low-pass filter circuit 2 outputs a feedback loop control signal cs_pk_avg of the pfc circuit, and the feedback loop control signal cs_pk_avg is a dc value and can be used as a feedback signal that can be directly processed by a chip in which the pfc circuit 3 is located, so that a compensation capacitor Ccomp outside the system can be removed and the number of pins of the chip can be reduced, thereby reducing the cost of the system.
Specifically, the input terminal of the third switch S3 receives the switching tube peak current signal cs_pk, and the control signal of the third switch S3 is generated by the peak sampling module 23.
It should be noted that, the power factor correction circuit 3 may be any circuit capable of implementing power factor correction, and is not limited to this embodiment, which is only an example.
It should be noted that other circuits having integration compensation capacitors for filtering low frequency ripple are also suitable for the present invention, and the present invention is not limited to the power factor correction circuit.
The working principle of the low-pass filter circuit of this embodiment is as follows:
the peak current signal cs_pk of the switching tube is input into the low-pass filter circuit, the peak sampling module 23 outputs a control signal to drive the third switch S3 to sample the peak current signal cs_pk of the switching tube, the peak current signal cs_pk of the switching tube is a plurality of zigzag pulses, and endpoints of each peak value in the peak current signal cs_pk of the switching tube are obtained through sampling, so that an envelope waveform of the peak current of the switching tube is obtained, and the envelope waveform is kept on the third capacitor C3.
Then, the second follower OP2, the third follower OP3, the fourth follower OP4, the adder 21, the first switch S1, the second switch S2, the first capacitor C1, the second capacitor C2 and the switch control signal generating module 22 are used for digital filtering, so as to obtain a feedback loop control signal cs_pk_avg of the power factor correction circuit, where the feedback loop control signal cs_pk_avg is an average value of peak current envelopes of the switching tubes. The method of low-pass filtering is the same as that of the first embodiment, and is not described in detail herein.
The low-pass filter circuit and the method can realize the function of digital filtering in a common analog circuit, and have high universality and low cost.
In summary, the present invention provides a low-pass filter circuit and method, including: the first switch is connected between the output end of the low-pass filter circuit and the upper polar plate of the first capacitor and is used for sampling the output signal of the low-pass filter circuit; the lower polar plate of the first capacitor is grounded; the first input end is connected with the last filtering output value output by the first switch, and the second input end is connected with the adder for receiving the current sampling value and is used for carrying out addition operation on the last filtering output value and the current sampling value; the second switch is connected with the output end of the adder and the output end of the low-pass filter circuit and is used for sampling the output signal of the adder; the upper polar plate of the second capacitor is connected with the output end of the second switch and the lower polar plate is grounded; wherein the polarity of the control signal of the first switch is opposite to that of the control signal of the second switch. And feeding back the last filtering output value to the first input end of the adder, inputting the current sampling value to the second input end of the adder, and outputting the current filtering output value after the adder performs addition operation. The low-pass filter circuit and the method can realize the low-frequency filter function without an external capacitor, a digital circuit and a singlechip, are convenient to integrate and have low cost; the filtering value of the peak current envelope waveform of the switching tube can be obtained by matching with the peak sampling technology, so that the integrating compensation capacitor of a power factor correction circuit and the like which need to filter low-frequency ripples is saved, the pin number is reduced, and the cost is reduced. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (12)

1. A low pass filter circuit, the low pass filter circuit comprising at least:
the circuit comprises an adder, a first switch, a second switch, a first capacitor and a second capacitor;
the input end of the first switch is connected with the output end of the low-pass filter circuit, and the output end of the first switch is connected with the upper polar plate of the first capacitor and is used for sampling the output signal of the low-pass filter circuit; the lower polar plate of the first capacitor is grounded;
a first input end of the adder is connected with a last filtering output value output by the first switch, and a second input end of the adder receives a current sampling value and is used for carrying out addition operation on the last filtering output value and the current sampling value;
the input end of the second switch is connected with the output end of the adder, and the output end of the second switch is used as the output end of the low-pass filter circuit and used for sampling the output signal of the adder;
the upper polar plate of the second capacitor is connected with the output end of the second switch and the lower polar plate is grounded;
wherein the polarity of the control signal of the first switch is opposite to that of the control signal of the second switch.
2. The low pass filter circuit of claim 1, wherein: the adder comprises a first resistor, a second resistor and a first follower; one end of the first resistor is used as a first input end of the adder, the other end of the first resistor is connected with an input end of the first follower, one end of the second resistor is used as a second input end of the adder, the other end of the second resistor is connected with an input end of the first follower, and an output end of the first follower is used as an output end of the adder.
3. The low pass filter circuit of claim 1, wherein: the low-pass filter circuit also comprises a switch control signal generation module; the switch control signal generation module comprises a high-frequency sampling unit and an inverter, wherein the high-frequency sampling unit is used for generating square wave signals; the inverter is connected to the output end of the high-frequency sampling unit and is used for generating an inverse signal of the output signal of the high-frequency sampling unit.
4. The low pass filter circuit of claim 1, wherein: the low-pass filter circuit further comprises a second follower connected between the output end of the first switch and the first input end of the adder, a third follower connected between the current sampling value and the second input end of the adder, and a fourth follower connected between the output end of the second switch and the output end of the low-pass filter circuit, wherein each follower is used for isolating signals.
5. The low pass filter circuit of claim 1, wherein: the capacitance values of the first capacitor and the second capacitor are pF stages.
6. The low-pass filter circuit according to any one of claims 1 to 5, wherein: the low-pass filter circuit further comprises a third switch and a third capacitor; the third switch is connected between the current sampling value and the input end of the low-pass filter circuit; one end of the third capacitor is connected to the output end of the third switch, and the other end of the third capacitor is grounded.
7. The low pass filter circuit of claim 6, wherein: the low-pass filter circuit further comprises a peak value sampling module, wherein the output end of the peak value sampling module is connected with the control end of the third switch and used for controlling the third switch to sample.
8. The low pass filter circuit of claim 6, wherein: the capacitance value of the third capacitor is pF level.
9. A low-pass filtering method of a low-pass filtering circuit according to any one of claims 1 to 8, characterized in that the low-pass filtering method comprises at least:
and feeding back the last filtering output value to the first input end of the adder, inputting the current sampling value to the second input end of the adder, and outputting the current filtering output value after the adder performs addition operation.
10. The low pass filtering method of claim 9, wherein: the current filtered output value satisfies the following relation:
V o (n)＝α*V in (n)+(1-α)*V o (n-1)，
wherein V is o (n) is the current filtered output value, α is the filter coefficient, V in (n) is the current sample value, V o (n-1) is the last filtered output value.
11. The low pass filtering method of claim 10, wherein: the filter coefficient is determined by adjusting the resistance of a first resistor connected to a first input end of the adder and a second resistor connected to a second input end of the adder, and the following relation is satisfied:
Figure FDA0004158877660000021
wherein, α is a filter coefficient, R1 is a resistance value of the first resistor, and R2 is a resistance value of the second resistor.
12. The low pass filtering method of claim 9, wherein: and receiving the peak current of a switching tube in the power factor correction circuit, sampling the peak current of the switching tube based on peak sampling to obtain an envelope waveform of the peak current of the switching tube, and filtering to obtain a direct-current feedback loop control signal so as to remove a compensation capacitor in the power factor correction circuit.
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CN103533721A (en) * 2013-10-31 2014-01-22 矽力杰半导体技术(杭州)有限公司 Pulse type current LED drive circuit

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KR100794310B1 (en) * 2006-11-21 2008-01-11 삼성전자주식회사 Switched capacitor circuit and amplifing method thereof
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