CN110502380B - Self-checking method of Hash algorithm coprocessor - Google Patents
Self-checking method of Hash algorithm coprocessor Download PDFInfo
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- CN110502380B CN110502380B CN201910761889.8A CN201910761889A CN110502380B CN 110502380 B CN110502380 B CN 110502380B CN 201910761889 A CN201910761889 A CN 201910761889A CN 110502380 B CN110502380 B CN 110502380B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/602—Providing cryptographic facilities or services
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
Abstract
The embodiment of the invention relates to a self-checking method of a Hash algorithm coprocessor, which is characterized by comprising the following steps: acquiring small block verification data from a system area to generate first data, acquiring a small block data verification code to generate a first verification code, acquiring large block verification data to generate second data, and acquiring a large block data verification code to generate a second verification code; carrying out first self-checking parameter verification processing on the first data; carrying out second self-checking parameter verification processing on the first verification code; carrying out third self-checking parameter verification processing on the second data; performing fourth self-checking parameter verification processing on the second verification code; performing small block data hash calculation on the first data to generate a first temporary check code, and performing large block data hash calculation on the second data to generate a second temporary check code; performing first function self-checking treatment; performing second function self-checking treatment; and setting the value of a self-checking error counter of the coprocessor in the system area to be 0, and sending the information of successful self-checking to the upper computer.
Description
Technical Field
The invention relates to the technical field of single-chip microcomputers, in particular to a self-checking method of a hash algorithm coprocessor.
Background
The Hash algorithm coprocessor is widely used on a safety calculation singlechip and is mainly used for improving the integrity of big data. If the hash algorithm coprocessor has a function error, the verification data generated by the hash algorithm coprocessor is erroneous, and further the upper-layer application of the single chip microcomputer is erroneous in execution. When a common single chip microcomputer applies the hash algorithm coprocessor, functional problems of the on-chip hash algorithm coprocessor can be found only by comparing the upper application before and after calculation.
Disclosure of Invention
The invention aims to provide a self-checking method of a hash algorithm coprocessor, aiming at the defects of the prior art, which is used for checking small data and large data of the hash coprocessor, checking a code complementing machine inside the hash coprocessor while checking the calculation function of the hash check code, and providing a solution entry for self-checking failure by setting a self-checking error counter of the coprocessor.
The invention provides a self-checking method of a hash algorithm coprocessor, which comprises the following steps:
the single chip microcomputer obtains small block verification data from a system area to generate first data, obtains small block data verification codes to generate first verification codes, obtains large block verification data to generate second data, and obtains large block data verification codes to generate second verification codes;
the single chip microcomputer carries out first self-checking parameter checking processing on the first data;
when the first self-checking parameter is verified successfully, the single chip microcomputer conducts second self-checking parameter verification processing on the first verification code;
after the second self-checking parameter is checked successfully, the single chip microcomputer carries out third self-checking parameter checking processing on the second data;
after the third self-checking parameter is checked successfully, the single chip microcomputer carries out fourth self-checking parameter checking processing on the second verification code;
after the fourth self-checking parameter is checked successfully, the singlechip uses the coprocessor to perform small block data hash calculation on the first data according to the first data and the second data to generate a first temporary check code, and uses the coprocessor to perform large block data hash calculation on the second data to generate a second temporary check code;
the single chip microcomputer carries out first function self-checking processing according to the first temporary checking code and the first checking code;
after the first function self-checking is successful, the single chip microcomputer carries out second function self-checking processing according to the second temporary check code and the second check code;
and after the second function self-checking is successful, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor of the system area to be 0 and sends the information of successful self-checking to the upper computer.
Further, the single chip microcomputer obtains the small block verification data from the system area to generate the first data, and before, the method further includes:
and the single chip microcomputer sets the small block verification data, the small block data verification code, the large block verification data and the large block data verification code in a system area.
Further, the single chip microcomputer performs first self-checking parameter checking processing on the first data, and specifically includes:
the single chip microcomputer carries out all-zero parameter verification processing on the value of the first data, and specifically comprises the following steps: when the value of the first data is full hexadecimal 0, the first self-checking parameter fails to check; when the value of the first data is not 0 in full hexadecimal, the first self-checking parameter is checked successfully.
Further, the single chip microcomputer performs second self-checking parameter checking processing on the first checking code, and specifically includes:
the single chip microcomputer carries out all-zero parameter verification processing on the value of the first verification code, and specifically comprises the following steps: when the value of the first check code is 0 in full hexadecimal, the second self-checking parameter fails to check; and when the value of the first check code is not 0 in the full hexadecimal system, the second self-checking parameter is checked successfully.
Further, the third self-checking parameter verification processing is performed on the second data by the single chip, and the third self-checking parameter verification processing specifically includes:
the single chip microcomputer carries out all-zero parameter verification processing on the value of the second data, and specifically: when the value of the second data is full hexadecimal 0, the third self-checking parameter fails to check; and when the value of the second data is not 0 in full hexadecimal, the third self-checking parameter is checked successfully.
Further, the performing, by the single chip microcomputer, a fourth self-checking parameter checking process on the second check code specifically includes:
the single chip microcomputer carries out all-zero parameter check processing on the value of the second check code, and specifically: when the value of the second check code is full hexadecimal 0, the fourth self-checking parameter fails to check; and when the value of the second check code is not the 0 in the full hexadecimal system, the fourth self-checking parameter is checked successfully.
Further, the single chip microcomputer performs first function self-checking processing according to the first temporary check code and the first check code, and specifically includes:
the single chip microcomputer judges whether the values of the first temporary check code and the first check code are equal, and if the values of the first temporary check code and the first check code are equal, the first function self-check is successful; and if the values of the first temporary check code and the first check code are not equal, the first functional self-checking fails.
Further, the single chip microcomputer performs second function self-checking processing according to the second temporary check code and the second check code, and specifically includes:
the single chip microcomputer judges whether the values of the second temporary check code and the second check code are equal, and if the values of the second temporary check code and the second check code are equal, the second function self-check is successful; and if the values of the second temporary check code and the second check code are not equal, the second functional self-checking fails.
Further, the method further comprises:
when the first self-checking parameter fails to check, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor of the system area to be added by 1, the single chip microcomputer exits the self-checking processing flow of the coprocessor and returns error information: verifying that the parameters are wrong;
when the second self-checking parameter fails to check, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor of the system area to be added by 1, the single chip microcomputer exits the self-checking processing flow of the coprocessor and returns error information: verifying that the parameters are wrong;
when the third self-checking parameter fails to check, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor of the system area to be increased by 1, the single chip microcomputer exits the self-checking processing flow of the coprocessor and returns error information: verifying that the parameters are wrong;
when the first function self-checking check fails, the single chip microcomputer sets the value of a coprocessor self-checking error counter of the system area to be added by 1, the single chip microcomputer exits the coprocessor self-checking processing flow and returns error information: the small data hash function of the coprocessor is wrong;
when the second function self-checking check fails, the single chip microcomputer sets the value of a coprocessor self-checking error counter of the system area to be added by 1, the single chip microcomputer exits the coprocessor self-checking processing flow and returns error information: the coprocessor has a big data hash function error.
Further, the method further comprises:
and when the value of the self-checking error counter of the coprocessor exceeds a limit value, the single chip microcomputer stops the use function of the coprocessor.
The invention provides a self-checking method of a Hash algorithm coprocessor, firstly, a single chip computer presets small verification data, small verification codes, large verification data and large verification codes for checking in a system area; after the single chip microcomputer starts the self-check of the hash coprocessor, the first step is to acquire the four preset information and generate corresponding first data, a first verification code, second data and a second verification code; the singlechip firstly carries out four parameter verification on four parameters for verification stored in a system area so as to prevent the parameters from not meeting the Hash calculation requirement; after the first self-checking parameter, the second self-checking parameter, the third self-checking parameter and the fourth self-checking parameter are successfully checked, the single chip starts first function self-checking on the encryption function of the hash coprocessor; after the first function self-checking is successful, the singlechip starts second function self-checking on the decryption function of the hash coprocessor; after the second functional self-check is successful, the hash coprocessing self-check is successfully completed, and the coprocessor is in a normal state, so that the value of the self-check error counter of the coprocessor is reset to 0 by the singlechip, and information of successful self-check is returned to the upper computer.
Drawings
Fig. 1 is a schematic diagram of a self-checking method of a hash algorithm coprocessor according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a self-checking method of a hash algorithm coprocessor according to a second embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In a first embodiment of the present invention, as shown in fig. 1, a schematic diagram of a method for self-checking by a hash algorithm coprocessor is provided, where the method includes the following steps:
and step 11, the single chip microcomputer obtains small block verification data from the system area to generate first data, obtains small block data verification codes to generate first verification codes, obtains large block verification data to generate second data, and obtains large block data verification codes to generate second verification codes.
And step 12, the single chip microcomputer carries out first self-checking parameter checking processing on the first data, and when the value of the first data is not 0 in a full hexadecimal system, the first self-checking parameter checking is successful.
And step 13, after the first self-checking parameter is successfully checked, the single chip microcomputer carries out second self-checking parameter checking processing on the first verification code, and when the value of the first verification code is not 0 in a full hexadecimal manner, the second self-checking parameter is successfully checked.
And step 14, after the second self-checking parameter is checked successfully, the single chip microcomputer performs third self-checking parameter checking processing on the second data, and when the value of the second data is not 0 in a full hexadecimal system, the third self-checking parameter is checked successfully.
And step 15, after the third self-checking parameter is checked successfully, the singlechip carries out fourth self-checking parameter checking processing on the second verification code, and when the value of the second verification code is not 0 in a full hexadecimal system, the fourth self-checking parameter is checked successfully.
And step 16, after the fourth self-checking parameter is successfully checked, the singlechip performs small data hash calculation on the first data by using the coprocessor to generate a first temporary check code according to the first data, and performs large data hash calculation on the second data to generate a second temporary check code.
And step 17, the single chip microcomputer carries out first function self-checking processing according to the first temporary check code and the first check code, and if the values of the first temporary check code and the first check code are equal, the first function self-checking is successful.
Step 18, after the first function self-checking is successful, the single chip microcomputer performs second function self-checking processing according to the second temporary check code and the second check code: and if the values of the second temporary check code and the second check code are equal, the second function self-checking is successful.
And step 19, when the second function self-checking is successful, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor in the system area to be 0, and sends self-checking success information to the upper computer.
In a second embodiment of the present invention, as shown in fig. 2, a schematic diagram of a method for self-checking of a hash algorithm coprocessor is provided, where the method includes the following steps:
and step 31, the single chip microcomputer obtains small block verification data from the system area to generate first data, obtains small block data verification codes to generate first verification codes, obtains large block verification data to generate second data, and obtains large block data verification codes to generate second verification codes.
Step 32, the single chip microcomputer performs first self-checking parameter checking processing on the first data: when the value of the first data is not the full hexadecimal 0, the first self-checking parameter is successfully checked, and the step 33 is carried out; when the value of the first data is all hexadecimal 0, the first self-checking parameter fails to check, and go to step 410.
Step 34, the single chip microcomputer performs third self-checking parameter checking processing on the second data: when the value of the second data is not the full hexadecimal 0, the third self-checking parameter is successfully checked, and the step 35 is carried out; when the value of the second data is all hexadecimal 0, the third self-checking parameter fails to check, and go to step 410.
And step 36, the single chip microcomputer performs small block data hash calculation on the first data by using the coprocessor to generate a first temporary check code according to the first data, and performs large block data hash calculation on the second data to generate a second temporary check code.
Step 37, the single chip microcomputer performs first function self-checking processing according to the first temporary check code and the first check code, if the values of the first temporary check code and the first check code are equal, the first function self-checking is successful, and the step 38 is carried out; if the first temporary check code is not equal to the first check code, the first functional self-test check fails, and go to step 420.
And step 39, after the second function self-checking is successful, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor in the system area to be 0, and sends self-checking success information to the upper computer.
Step 410, the single chip sets the value of the self-checking error counter of the coprocessor in the system area to add 1, the single chip exits the self-checking processing flow of the coprocessor and returns error information: the verification parameter is incorrect.
Here, the cause of the error is generally the verification parameters pre-stored in the system area for performing the self-check of the hash algorithm coprocessor: problems occur in small block verification data, small block data verification codes, large block experiment data and large block data verification codes.
Step 420, the single chip sets the value of the self-checking error counter of the coprocessor in the system area to add 1, the single chip exits the self-checking processing flow of the coprocessor and returns error information: coprocessor patch data hash function error.
Here, the cause of the error is that the small block data hash function of the hash algorithm coprocessor is not verified at the time of self-test.
Step 430, the single chip sets the value of the coprocessor self-checking error counter in the system area to add 1, the single chip exits the coprocessor self-checking processing flow and returns error information: the coprocessor has a big data hash function error.
Here, the cause of the error is that the hash function of the chunk data of the hash algorithm coprocessor is not verified at the time of self-test.
The invention provides a self-checking method of a Hash algorithm coprocessor, firstly, a single chip computer presets small verification data, small verification codes, large verification data and large verification codes for checking in a system area; when the single chip microcomputer starts the self-check of the hash coprocessor, the first step is to acquire the four preset information and generate corresponding first data, a first verification code, second data and a second verification code; the singlechip firstly carries out four parameter verification on four parameters for verification stored in a system area so as to prevent the parameters from not meeting the Hash calculation requirement; after the first self-checking parameter, the second self-checking parameter, the third self-checking parameter and the fourth self-checking parameter are successfully checked, the single chip starts the first function self-checking on the encryption function of the hash coprocessor; after the first function self-checking is successful, the singlechip starts second function self-checking on the decryption function of the hash coprocessor; after the second function self-check is successful, the Hash co-processing self-check is successfully completed, and the state of the coprocessor is normal, so that the value of the self-check error counter of the coprocessor is reset to 0 by the single chip microcomputer, and information of the success of the self-check is returned to the upper computer. By using the method, the upper computer can randomly select the self-checking time to send the self-checking requirement to the coprocessor; the method of the invention also identifies the self-checking failure by setting the self-checking error counter of the coprocessor, thereby not only ensuring the stable working state of the hash coprocessor, but also providing a timely and convenient early warning processing means for users.
Those of skill would further appreciate that the various illustrative components and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the components and steps of the various examples have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied in hardware, a software module executed by a processor, or a combination of the two. A software module may reside in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. A method for self-checking a hash algorithm coprocessor, the method comprising:
the single chip microcomputer obtains small block verification data from a system area to generate first data, obtains small block data verification codes to generate first check codes, obtains large block verification data to generate second data, and obtains large block data verification codes to generate second check codes;
the single chip microcomputer carries out first self-checking parameter checking processing on the first data;
after the first self-checking parameter is checked successfully, the single chip microcomputer carries out second self-checking parameter checking processing on the first checking code;
when the second self-checking parameter is checked successfully, the single chip microcomputer carries out third self-checking parameter checking processing on the second data;
when the third self-checking parameter is checked successfully, the single chip microcomputer carries out fourth self-checking parameter checking processing on the second checking code;
after the fourth self-checking parameter is checked successfully, the singlechip uses the coprocessor to perform small block data hash calculation on the first data according to the first data and the second data to generate a first temporary check code, and uses the coprocessor to perform large block data hash calculation on the second data to generate a second temporary check code;
the single chip microcomputer carries out first function self-checking processing according to the first temporary checking code and the first checking code;
after the first function self-checking is successful, the single chip microcomputer carries out second function self-checking processing according to the second temporary check code and the second check code;
and after the second function self-checking is successful, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor of the system area to be 0 and sends the information of successful self-checking to the upper computer.
2. The method of claim 1, wherein the single-chip microcomputer obtains the cell verification data from the system area to generate the first data, and before the step, the method further comprises:
and the single chip microcomputer sets the small block verification data, the small block data verification code, the large block verification data and the large block data verification code in a system area.
3. The method according to claim 1, wherein the single chip microcomputer performs first self-checking parameter verification processing on the first data, and specifically includes:
the single chip microcomputer carries out all-zero parameter verification processing on the value of the first data, and specifically: when the value of the first data is a full hexadecimal 0, the first self-checking parameter fails to check; when the value of the first data is not all hexadecimal 0, the first self-checking parameter is checked successfully.
4. The method according to claim 1, wherein the performing, by the single chip microcomputer, the second self-checking parameter checking process on the first check code specifically includes:
the single chip microcomputer carries out all-zero parameter verification processing on the value of the first verification code, and specifically comprises the following steps: when the value of the first check code is full hexadecimal 0, the second self-checking parameter fails to check; and when the value of the first check code is not 0 in the full hexadecimal system, the second self-checking parameter is checked successfully.
5. The method according to claim 1, wherein the third self-test parameter verification processing is performed on the second data by the single chip microcomputer, and specifically includes:
the single chip microcomputer carries out all-zero parameter verification processing on the value of the second data, and specifically comprises the following steps: when the value of the second data is a full hexadecimal 0, the third self-checking parameter fails to check; and when the value of the second data is not 0 in full hexadecimal, the third self-checking parameter is checked successfully.
6. The method according to claim 1, wherein the performing, by the single chip microcomputer, a fourth self-checking parameter checking process on the second check code specifically includes:
the single chip microcomputer carries out all-zero parameter check processing on the value of the second check code, and specifically: when the value of the second check code is full hexadecimal 0, the fourth self-checking parameter fails to check; and when the value of the second check code is not 0 in full hexadecimal, the fourth self-checking parameter is checked successfully.
7. The method according to claim 1, wherein the single chip microcomputer performs a first functional self-test check process according to the first temporary check code and the first check code, and specifically includes:
the single chip microcomputer judges whether the values of the first temporary check code and the first check code are equal, and if the values of the first temporary check code and the first check code are equal, the first function self-check is successful; and if the values of the first temporary check code and the first check code are not equal, the first functional self-checking fails.
8. The method according to claim 1, wherein the performing, by the single chip microcomputer, a second functional self-check processing according to the second temporary check code and the second check code specifically includes:
the single chip microcomputer judges whether the values of the second temporary check code and the second check code are equal, and if the values of the second temporary check code and the second check code are equal, the second function self-check is successful; and if the values of the second temporary check code and the second check code are not equal, the second functional self-check fails.
9. The method of claim 1, further comprising:
when the first self-checking parameter is failed to check, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor in the system area to be added with 1, the single chip microcomputer exits the self-checking processing flow of the coprocessor and returns error information: verifying that the parameters are wrong;
when the second self-checking parameter is failed to check, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor in the system area to be added by 1, the single chip microcomputer exits the self-checking processing flow of the coprocessor, and error information is returned: verifying that the parameter is wrong;
when the third self-checking parameter fails to check, the single chip microcomputer sets the value of a self-checking error counter of the coprocessor of the system area to be increased by 1, the single chip microcomputer exits the self-checking processing flow of the coprocessor and returns error information: verifying that the parameters are wrong;
when the first function self-checking check fails, the single chip microcomputer sets the value of a coprocessor self-checking error counter of the system area to be added by 1, the single chip microcomputer exits the coprocessor self-checking processing flow and returns error information: the small block data hash function of the coprocessor is wrong;
when the second function self-checking check fails, the single chip microcomputer sets the value of a coprocessor self-checking error counter of the system area to be added by 1, the single chip microcomputer exits the coprocessor self-checking processing flow and returns error information: the coprocessor has a big data hash function error.
10. The method of claim 1, further comprising:
and when the value of the self-checking error counter of the coprocessor exceeds a limit value, the single chip microcomputer stops the use function of the coprocessor.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105280240A (en) * | 2015-11-18 | 2016-01-27 | 致象尔微电子科技（上海）有限公司 | Nand Flash parameter reading method |
| CN109981671A (en) * | 2019-04-03 | 2019-07-05 | 北京深思数盾科技股份有限公司 | Data processing method and encryption equipment based on encryption equipment |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100618379B1 (en) * | 2005-02-23 | 2006-08-31 | 삼성전자주식회사 | Apparatus for verifying integrity of device memory remotely and system thereof and method for verifying integrity |
-
2019
- 2019-08-16 CN CN201910761889.8A patent/CN110502380B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105280240A (en) * | 2015-11-18 | 2016-01-27 | 致象尔微电子科技（上海）有限公司 | Nand Flash parameter reading method |
| CN109981671A (en) * | 2019-04-03 | 2019-07-05 | 北京深思数盾科技股份有限公司 | Data processing method and encryption equipment based on encryption equipment |
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