CN110492975B - Coded modulator for spaceflight - Google Patents
Coded modulator for spaceflight Download PDFInfo
- Publication number
- CN110492975B CN110492975B CN201910798769.5A CN201910798769A CN110492975B CN 110492975 B CN110492975 B CN 110492975B CN 201910798769 A CN201910798769 A CN 201910798769A CN 110492975 B CN110492975 B CN 110492975B
- Authority
- CN
- China
- Prior art keywords
- module
- clock
- data
- mode
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
- H04L1/0003—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate by switching between different modulation schemes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0015—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the adaptation strategy
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Quality & Reliability (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
The invention provides a code modulator for spaceflight, which is added with a multi-mode design, and can select different channel coding and mapping modulation modes according to instructions so as to adapt to different working mode requirements; adding a multi-rate design, firstly combining a DDS principle and a frequency division interleaving idea, realizing arbitrary decimal times, integral multiple frequency division and multi-clock output, then realizing arbitrary data rate input and same sampling rate output by matching an interpolation filter and a decimation filter, and ensuring that a channel is externally inhibited and simultaneously uses the same intermediate frequency carrier for output; an anti-interference processing strategy is added, so that high-reliability analysis and matching can be performed on the external instruction; a clock reliability monitoring strategy is added, and the state of an output clock can be detected and self-recovered; and finally, a universal design is added, and the multi-mode channel coding module, the mapping module and the multi-rate forming filtering module can be modified, added and expanded through unified scheduling of working mode instructions, so that the universality is good, and the transportability is good.
Description
Technical Field
The invention relates to a coded modulator for spaceflight.
Background
Due to the particularity of space environment, the maintenance and function change of the aerospace modulator product in flight can not be realized, and the traditional coding modulator brings more inconvenience to the development of aerospace satellite models, more transmission environment constraint conditions, single coding modulation function and fixed speed in the face of the diversity requirements of aerospace satellite models.
The traditional code modulator adopts a fixed coding mode, a fixed modulation mode and a fixed speed mode to perform programming once, cannot be changed, can only meet the data transmission requirement under a specific environment, cannot perform multi-mode transmission and has a single function.
Disclosure of Invention
The invention aims to provide a coded modulator for spaceflight.
To solve the above problems, the present invention provides an aerospace code modulator, comprising:
an instruction receiving and processing module;
the clock monitoring module is communicated with the instruction receiving and processing module;
the clock generation module is communicated with the clock monitoring module and is also communicated with the instruction receiving and processing module;
a data spontaneous module;
the data receiving module is communicated with the data spontaneous module;
a frame header judging module communicated with the data receiving module;
the multi-mode channel coding module is communicated with the frame header judging module and is also communicated with the instruction receiving and processing module;
a multi-mode mapping module in communication with the multi-mode channel coding module, the multi-mode mapping module further in communication with the instruction reception processing module;
a multi-rate shaping filter module in communication with said multi-mode mapping module, said multi-rate shaping filter module further in communication with said instruction receiving processing module;
a digital modulation module in communication with the multi-rate shaping filter module;
a data output module in communication with the digital modulation module;
a digital-to-analog converter in communication with the data output module, the digital-to-analog converter also in communication with the clock generation module.
Furthermore, in the space code modulator, the instruction receiving and processing module is configured to continuously sample the front-end instruction signal in real time to perform instruction truth table analysis by adding an anti-interference processing strategy, so as to generate a working mode instruction signal and a clock monitoring reset signal and control a working state of the code modulator.
Further, in the space-borne code modulator, the clock generation module is configured to perform multi-clock and multi-frequency output, and generate a clock frequency and form an internal clock domain by combining a DDS principle and a frequency division interleaving concept, so as to perform subsequent data operation and output; meanwhile, the internal part of the code modulator is reset for a certain time through a clock reset signal, so that the internal register returns to the original state, and the metastable state of the register is prevented.
Further, in the above space coding modulator, the clock monitoring module counts and monitors the monitoring clock output by the clock generating module by using a local 100M clock, resets the clock generating module for a certain time if the count value runs out of a reasonable deviation of the monitoring clock, and restarts coding and operation after the clock recovers to normal, so as to monitor the reliability of the generating clock.
Further, in the above space-borne code modulator, the multi-mode channel coding module and the multi-mode mapping module respectively select different channel coding and mapping modulation modes according to the working mode instruction, and adaptively modify, combine or add channel coding according to the requirements of different protocols or specifications.
Furthermore, in the above space-borne coded modulator, the multirate filter module implements multirate design by matching an interpolation filter with a decimation filter, and is configured to select filters of different rates and different types according to a working mode instruction to complete the forming filtering of symbol data, thereby improving out-of-band rejection of a channel and implementing the input of any data rate into the same intermediate frequency carrier for output.
Further, in the space-borne code modulator, the data autonomous module has an internal code element autonomous function, so that the space-borne code modulator has general adaptability, and the data autonomous module is used for circularly autonomous pseudo-random code element data in each working mode, completing self-checking and function and performance testing of the space-borne code modulator under the condition that front-end data is not available or abnormal, and no longer depending on a front-end data source.
Furthermore, in the space code modulator, the data receiving module has a function of reliably handing over external data to internal data, and simultaneously has a function of switching between the external data and spontaneous data according to instructions, and the data receiving module realizes correct handing over from the external data to the internal data through a Block RAM, so that a metastable state phenomenon is avoided during data acquisition, and simultaneously, real-time switching between the internal data and the external data is performed according to an external self-checking instruction.
Further, in the space-borne code modulator, the frame header judgment module has an input data format judgment function, detects the frame synchronization and the frame format correctness of input data, increases the reliability of channel coding and output data of the modulator, and enters a subsequent coding module if the received data format is correct, the format error resets a subsequent program, and the output data is 0; the frame head judging module carries out real-time continuous detection on the data, and if the frame format is recovered from errors, the coding modulator also automatically recovers data operation and coding.
Further, in the space-time coded modulator, the digital modulation module is configured to perform I/Q quadrature modulation on the data subjected to the mapping filtering, so as to realize conversion from baseband data to intermediate frequency modulation data.
Further, in the space-borne code modulator, the data output module is configured to implement reliable and multi-path parallel output of data after parallel-to-serial conversion to an external digital-to-analog conversion chip, so as to implement intermediate frequency analog modulation.
Compared with the prior art, the invention consists of modules of instruction receiving processing, clock generation and monitoring, data spontaneous generation and receiving, frame header judgment, multi-mode channel coding and mapping, multi-rate forming filtering, digital modulation, data output and the like. The invention adds a multi-mode design, and can select different channel coding and mapping modulation modes according to instructions so as to adapt to different working mode requirements; adding a multi-rate design, firstly combining a DDS principle and a frequency division interleaving idea, realizing arbitrary decimal times, integral multiple frequency division and multi-clock output, then realizing arbitrary data rate input and same sampling rate output by matching an interpolation filter and a decimation filter, and ensuring that a channel is externally inhibited and simultaneously uses the same intermediate frequency carrier for output; an anti-interference processing strategy is added, so that high-reliability analysis and matching can be performed on the external instruction; a clock reliability monitoring strategy is added, and the state of an output clock can be detected and self-recovered; and finally, a universal design is added, and the multi-mode channel coding module, the mapping module and the multi-rate forming filtering module can be modified, added and expanded through unified scheduling of working mode instructions, so that the universality is good, and the transportability is good.
Drawings
FIG. 1 is a block diagram of a multi-mode, multi-rate, high reliability space generic coded modulator according to an embodiment of the present invention;
FIG. 2 is a block diagram and flowchart of an instruction receiving module of FIG. 1 according to an embodiment of the invention;
FIG. 3 is a block diagram and flow diagram of the clock generation module of FIG. 1 according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of the fractional division process of FIG. 3 according to an embodiment of the present invention;
FIG. 5 is a block diagram and flow diagram of the clock monitoring module of FIG. 1 according to an embodiment of the present invention;
FIG. 6 is a block diagram of the multi-mode channel coding module of FIG. 1 according to an embodiment of the present invention;
FIG. 7 is a block diagram of the multi-modal mapping module of FIG. 1 in accordance with an embodiment of the present invention;
fig. 8 is a block diagram of the multirate shaping filter module of fig. 1 in accordance with an embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
As shown in fig. 1, the present invention provides an aerospace code modulator, including:
an instruction receiving and processing module;
the clock monitoring module is communicated with the instruction receiving and processing module;
the clock generation module is communicated with the clock monitoring module and is also communicated with the instruction receiving and processing module;
a data spontaneous module;
the data receiving module is communicated with the data spontaneous module;
a frame header judging module communicated with the data receiving module;
the multi-mode channel coding module is communicated with the frame header judging module and is also communicated with the instruction receiving and processing module;
a multi-mode mapping module in communication with the multi-mode channel coding module, the multi-mode mapping module further in communication with the instruction reception processing module;
a multi-rate shaping filter module in communication with said multi-mode mapping module, said multi-rate shaping filter module further in communication with said instruction receiving processing module;
a digital modulation module in communication with the multi-rate shaping filter module;
a data output module in communication with the digital modulation module;
a digital-to-analog converter in communication with the data output module, the digital-to-analog converter also in communication with the clock generation module.
In the method, aiming at the characteristics of the current and future space satellite models, the multi-mode multi-rate high-reliability space general coding modulator can effectively meet the diversity transmission requirements of the space satellite models in various data transmission environments and effectively reduce the research and development cost.
The multi-mode multi-rate high-reliability aerospace general coding modulator effectively integrates the existing mainstream coding mode and the modulation mode, effectively supports different rate requirements, effectively inhibits out-of-band inhibition of a transmission channel through a multi-rate forming filter, enhances the reliability of the modulator, can meet the diversity transmission requirements of aerospace satellite models in various data transmission environments, and effectively reduces the research and development cost.
The invention relates to a multi-mode multi-rate high-reliability space general coding modulator which comprises modules of instruction receiving processing, clock generation and monitoring, data spontaneous generation and receiving, frame header judgment, multi-mode channel coding and mapping, multi-rate forming filtering, digital modulation, data output and the like.
The invention adds a multi-mode design, and can select different channel coding and mapping modulation modes according to instructions so as to adapt to different working mode requirements; adding a multi-rate design, firstly combining a DDS principle and a frequency division interleaving idea, realizing arbitrary decimal times, integral multiple frequency division and multi-clock output, then realizing arbitrary data rate input and same sampling rate output by matching an interpolation filter and a decimation filter, and ensuring that a channel is externally inhibited and simultaneously uses the same intermediate frequency carrier for output; an anti-interference processing strategy is added, so that high-reliability analysis and matching can be performed on the external instruction; a clock reliability monitoring strategy is added, and the state of an output clock can be detected and self-recovered; and finally, a universal design is added, and the multi-mode channel coding module, the mapping module and the multi-rate forming filtering module can be modified, added and expanded through unified scheduling of working mode instructions, so that the universality is good, and the transportability is good.
The invention can effectively solve the problems of single working mode, fixed modulation mode and fixed speed of the space modulator, can meet the requirement of diversity transmission of space satellite models in various data transmission environments, and effectively reduces the research and development cost.
In an embodiment of the space code modulator, the instruction receiving and processing module is used for continuously sampling the front-end instruction signal in real time to analyze the instruction truth table by adding an anti-interference processing strategy so as to generate a working mode instruction signal and a clock monitoring reset signal and control the working state of the code modulator, and has the characteristics of high reliability, high robustness and good universality.
The instruction receiving and processing module has the characteristics of high reliability, high robustness and good universality, and performs instruction truth table analysis by continuously and real-timely sampling a front-end instruction signal; adding an anti-interference processing strategy for ensuring the reliability of the aerospace product; the truth table analysis process carries out state machine full coverage, and prevents the code modulator from running away and failing; the operating mode command can be switched, so that the code modulator can meet the requirements of various operating modes.
In an embodiment of the space-borne coded modulator, the clock generation module is configured to perform multi-clock and multi-frequency output, and generate a required clock frequency and form an internal clock domain by combining a DDS principle and a frequency division interleaving idea, so as to perform subsequent data operation and output; meanwhile, the internal part of the code modulator is reset for a certain time through a clock reset signal, so that the internal register returns to the original state, the metastable state of the register is prevented, and the method has the characteristics of multi-rate and generalization.
In an embodiment of the code modulator for aerospace, the clock monitoring module utilizes a local 100M clock to count and monitor the monitoring clock output by the clock generating module, resets the clock generating module for a certain time if the count value runs out of reasonable deviation of the monitoring clock, and restarts coding and operation after the clock recovers to be normal so as to monitor the reliability of the generating clock.
In an embodiment of the space-based coded modulator, the multi-mode channel coding module and the multi-mode mapping module select different channel coding and mapping modulation modes according to working mode instructions, and adaptively modify, combine or add channel coding according to different protocols or standard requirements; the multi-mode channel coding module and the multi-mode mapping module are matched with each other and are suitable for reviewing a plurality of spacecraft modulator transmission environments, so that the code modulator has high robustness and portability, and multi-mode data transmission is realized.
The multi-mode channel coding module and the multi-mode mapping module have the characteristics of multi-mode and generalization, and different channel coding (LDPC/RS/interleaving/difference/convolution and the like) and mapping modulation modes (OQPSK/QPSK/BPSK/8PSK/16QAM and the like) can be selected according to the working mode instruction. Channel coding can be adaptively modified, combined or added according to the requirements of different protocols or specifications; different mapping modulation modes are suitable for different data transmission environments. The multi-mode channel coding module and the multi-mode mapping module can be matched with each other and are suitable for reviewing the transmission environment of a plurality of space modulators, so that the code modulator has higher robustness and portability, and multi-mode data transmission is realized.
In an embodiment of the space code modulator, the multi-rate filter module is used for realizing multi-rate design by matching an interpolation filter with a decimation filter, and is used for selecting filters with different rates and different types according to a working mode instruction to complete the forming and filtering of code element data, so that the out-of-band rejection of a channel is improved, and the input of any data rate into the same intermediate frequency carrier wave is realized.
The multirate filter can select different types of shaping filters according to the working mode instruction to complete shaping filtering of the code element data; the formed filter can realize the input of any data rate into the same intermediate frequency carrier wave and the output thereof while improving the out-of-band rejection of a channel by adjusting parameters such as the interpolation number, the filtering order, the passband bandwidth, the roll-off coefficient and the like of the filter, and can add different filters according to different transmission environments, thereby having strong expansibility.
In an embodiment of the space code modulator, the data spontaneous module has an internal code element spontaneous function, so that the space code modulator has universal adaptability, and is used for circularly and spontaneously generating pseudo-random code element data under each working mode, completing self-checking and function and performance testing of the space code modulator under the condition that front-end data is not available or abnormal, and not depending on a front-end data source.
In an embodiment of the space code modulator, the data receiving module has a function of reliably handing over external data to internal data, and has a function of switching between the external data and spontaneous data according to a command, and the data receiving module realizes correct handing over from the external data to the internal data through a Block RAM, so that a metastable state phenomenon during data acquisition is avoided, and meanwhile, real-time switching between the internal data and the external data can be performed according to an external self-checking command.
In one embodiment of the aerospace code modulator, the frame header judgment module has an input data format judgment function, performs correctness detection on input data frame synchronization and a frame format, increases reliability of channel coding and output data of the modulator, and enters a subsequent coding module if a received data format is correct, a format error resets a subsequent program, and the output data is 0; the frame head judging module carries out real-time continuous detection on the data, and if the frame format is recovered from errors, the coding modulator also automatically recovers data operation and coding.
In an embodiment of the space coding modulator, the digital modulation module is configured to perform I/Q quadrature modulation on the data after the mapping filtering, so as to realize conversion from baseband data to intermediate frequency modulation data.
In an embodiment of the space code modulator, the data output module is used for realizing reliable and multi-path parallel output of data after parallel-serial conversion to an external digital-to-analog conversion chip to realize intermediate frequency analog modulation.
Specifically, the detailed block diagram of the present invention can be shown in fig. 1:
an input interface: external data, an external write clock, a local crystal oscillator clock, a reset instruction, a working mode remote control instruction, a self-checking instruction and a working clock.
An output interface: and outputting modulation data, a sampling clock, working mode telemetering and self-checking mode telemetering.
The block diagram comprises an instruction receiving and processing module, a clock generating module, a clock monitoring module, a data spontaneous module, a data receiving module, a frame header judging module, a multi-mode channel coding module, a multi-mode mapping module, a multi-rate forming and filtering module, a digital modulation module and a data output module.
FIG. 2 is a block diagram and flow diagram of the instruction receiving module of FIG. 1.
The instruction receiving and processing module can comprise two units of instruction acquisition and instruction analysis;
the command acquisition unit carries out an anti-interference processing strategy, in order to prevent misoperation of the coded modulator caused by command glitch, overturn, edge deviation and the like, the N-bit command is counted for 128 clock cycles continuously in real time, the coded modulator receives command information after the same command in 128 cycles, and counting is restarted and the previous state is maintained unchanged if the glitch or the command is suddenly changed instantly in 128 cycles.
The instruction analysis unit compares the received instruction information with the previous state instruction: if the two are consistent, the original state is kept unchanged; if the difference is not consistent, the code modulator is matched with an internal working mode truth table of the code modulator, and the matching process is fully covered by a state machine, so that the instruction analysis is prevented from running away and failing. The output operating mode telemetry corresponds to the actual operating mode within the coded modulator. Assuming that the code modulator has 3 operation modes, and uses a 4-bit operation mode remote control command, the flow chart is shown in fig. 2, and the truth table is shown in the following table.
Table 1 correspondence table of instruction and operation mode
Fig. 3 is a block diagram and a flowchart of the clock generation module of fig. 1.
The clock generation module comprises two units of dynamic clock management and clock selection;
the dynamic clock management unit is designed in a multi-rate mode, has the capacity of multi-clock and multi-frequency output, and the working clock of the code modulator enters the unit to generate required clock frequencies; on the basis of a DDS counting frequency division principle, the frequency division interleaving idea is combined to realize arbitrary fractional-multiple and integral-multiple frequency division output, so that the output frequency precision is higher, and the universality is better.
Now, the working clock of the code modulator is set to 225Mhz, and the clock frequency of 25.6Mhz needs to be produced, and the calculation can be performed by the method, and the specific steps are as follows:
1) 1125/128 for 225MHz/25.6MHz, which means that the 225MHz clock needs to generate 128 clock cycles of 25.6MHz within 1125 clock cycles;
2) 1125/128-8.7890625, which means that 128 25.6MHZ clock cycles are composed of X225 MHZ clock divisions 8 and Y225 MHZ clocks divisions 9, the two-dimensional equation is as follows:
3) the formula can be obtained: x is 27, Y is 101; the 101/27 is 3.740, and the formula (1) is reconstructed to obtain:
4) the formula can be obtained: a is 7, b is 20; 20/7 is equal to 2.857, and the formula (1) is reconstructed to obtain:
5) the formula can be obtained: c is 1, d is 6;
the specific frequency division process and the result are shown in figure 4 in detail, the improved frequency division method enables the 8-frequency division to be evenly distributed in the 9-frequency division, enables the output frequency to be more stable and accurate, is simple and feasible, and is suitable for multi-frequency and multi-frequency output; and for the frequency multiplication of the clock, the frequency multiplication can be realized through a DCM IP core.
225Mhz, 112.5Mhz, 56.25Mhz, 101.25Mhz, 50.625Mhz, 64Khz, 128Khz, 10.23Mhz and 8 clock frequencies are needed to perform code modulation operation on the 3 working modes in the table 1. At the same time, the dynamic clock management unit will generate a fixed monitoring clock signal (225M/23040 — 9.765625Khz) for monitoring the working clock of the code modulator and the working state of the dynamic clock management unit.
The clock selection unit is designed in a universal way, and selects various frequency clocks output by the dynamic clock management unit according to the working mode instruction signal and respectively sends the selected frequency clocks to the related data operation module for subsequent data operation and output. Meanwhile, the internal part of the code modulator is reset before the output clock is not stable through the clock reset signal, so that the internal register returns to the initial state, and the metastable state of the register is prevented.
The clock generation module may extend the output clock according to an increase in the operating mode.
Fig. 5 is a block diagram and a flowchart of the clock monitoring module of fig. 1.
The clock monitoring module comprises a clock counting unit and a clock judging unit;
the clock counting unit counts and monitors the monitoring clock by using a local 100MHz clock, 100M/9.765625K is 10240, the monitoring count value should swing around 10240 (within a reasonable range of +/-10%), and the clock count value is output to the clock judging unit.
The clock judging unit judges the input clock count value under the condition that 128 times of exceeding the reasonable clock deviation continuously occurs, if the condition is satisfied, a clock reset signal of 64 cycles is output to reset the clock generating module, and the coding and operation are restarted after the clock is recovered to be normal.
The data autonomous module shown in fig. 1 has an internal code autonomous function, and the data content and format of the internal code may be modified according to the user requirement or related specifications, such as: the data content may be written using the relevant standards of the CCSDS (international space data system counseling committee), and the pseudo random code may be selected for the data content.
The data receiving module shown in fig. 1 has a function of reliably handing over external data to internal data, and correct handing over external data to internal data is realized by using a Block RAM IP core, the capacity of the Block RAM needs to be larger than that of a data 1 frame, and the input and output of data need to be staggered by a protection distance of a half frame, so that a metastable state phenomenon during data input and data output is avoided; meanwhile, the data input end of the Block RAM can perform real-time switching of internal and external data according to an external self-checking instruction.
The frame header judging module in FIG. 1 has the function of judging the format of input data, and by monitoring the frame header data (such as 1ACFFC 1D), and matching the frame length, if the frame header and the frame length simultaneously meet the condition of continuous 3 frames, the frame header and the frame length enter the subsequent coding module for operation and output; if the 3 frames of errors are judged continuously, resetting the subsequent program, and outputting data of 0; if the frame format recovers from errors, the code modulator will also automatically recover the data operation and encoding.
Fig. 6 is a block diagram of the multi-mode channel coding module of fig. 1.
The multi-mode channel coding module comprises two units of channel coding and output selection;
the channel coding unit is designed in a multi-mode and universal manner, and can perform channel coding selection, addition and modification according to actual requirements, and the realization of two coding systems of LDPC coding and S broadcast distribution is embodied in detail in FIG. 6. The channel coding requirements in the aerospace modulator product are various and complex, the requirements can be continuously supplemented in a channel coding unit, adaptive modification, expansion and continuous use can also be carried out, and the research and development cost is greatly reduced while the user requirements are met.
The output selection unit can select corresponding channel coding output data to output according to the working mode instruction.
FIG. 7 is a block diagram of the multi-modal mapping module of FIG. 1.
The multi-mode mapping module comprises a mapping unit and an output selection unit;
the mapping unit can be designed in a multi-mode and universal manner, and can select and add channel mapping modes according to actual requirements, and the modulation modes of BPSK/QPSK/OQPSK/8PSK/16QAM are listed in FIG. 7. In the requirement of the space modulator, the modulation mode is mainly quadrature modulation, taking QPSK (quadrature phase shift keying) as an example, and the mapping relationship between the carrier phase and the I/Q data is as follows:
TABLE 2I/Q vs. Carrier phase Table
| Double bit code group | Carrier phase phi |
| 00 | 45° |
| 10 | 135° |
| 11 | 225° |
| 01 | 315° |
TABLE 3I/Q mapping relationship Table
| Way I | After mapping | Q way | After mapping |
| 0 | +1 | 0 | +1 |
| 1 | -1 | 1 | -1 |
Different mapping modulation modes have different mapping relations and are used in different aerospace working scenes; the multi-mode channel coding module and the multi-mode mapping module can be matched with each other to meet the use requirements of complex and various space modulators.
The output selection unit can select corresponding mapping output data to output according to the working mode instruction.
Fig. 8 is a block diagram of the multirate shaping filter module of fig. 1.
The multi-rate shaping filter module comprises two units of multi-rate shaping filtering and output selection;
the multi-rate forming filtering unit is designed in a multi-rate mode, and forming filters with different rates and different types can be selected according to working mode instructions to complete forming filtering of code element data, so that out-of-band rejection of a channel is improved. The roll-off coefficient of the shaping filter is generally selected to be a raised cosine filter, the roll-off coefficient of the shaping filter can not be selected to be too small, the tailing oscillation fluctuation of the frequency domain waveform is increased due to the too small roll-off coefficient, a large error is generated at the sampling moment of a receiving end, the intersymbol crosstalk is increased, and the error rate performance is directly influenced, so that the requirements of data transmission performance and occupied bandwidth can be met when the roll-off coefficient is designed to be 0.5 according to calculation. The occupied bandwidth of the channel can be calculated according to the roll-off coefficient of the filter and the symbol rate, for example, the bandwidth of the QPSK channel is as follows:
in the formula WBIs the channel bandwidth, R is the bit rate, and alpha is the roll-off coefficient; the bandwidth of the channel in the 450M operating mode is calculated to be 337.5 Mhz.
The order of the raised cosine filter is determined by the code element rate, the sampling rate and the number of relevant code elements, the more the number of relevant code elements is, the smaller the frequency spectrum leakage is, and the M-order raised cosine filter is adopted by the code modulator. According to the Nyquist theorem, the signal is interpolated before shaping, the sampling rate is N times of the code element rate, therefore, the code element is interpolated by N times before shaping, and the roll-off coefficient is 0.5 in order to meet the requirements of demodulation signal-to-noise ratio. Its N, M dependence on velocity is shown in the following table:
table 4 digital filtering relation graph (N is integer)
As shown in the above table, when sampling 1.8G, the 450M operation mode is integer-multiple interpolation (N-1800/225-8), which will have a certain requirement on the input rate and cannot realize any rate input, so a decimation filter when N is a rational number needs to be added, as shown in the following table.
TABLE 5 digital filtering relation graph (N ═ rational number)
The interpolation number of the 405M working mode is N/S1800/202.5 80/9, and the data shaping filtering is completed by performing 80-time interpolation and then 9-time extraction by using an interpolation filter; the interpolation filter and the decimation filter are matched for use, so that the same intermediate frequency carrier wave output can be realized by inputting any data rate.
The multi-rate forming filtering unit can improve the data volume from the code element rate to the sampling rate, improve the out-of-band rejection of the channel, meet the undistorted transmission condition, add different filters according to different use scenes and have strong expansibility.
The output selection unit can select corresponding filtering data to output according to the working mode instruction.
The digital modulation module shown in fig. 1 is designed in a generalized manner, and can perform I/Q quadrature modulation on the map-filtered data, so as to realize the conversion from baseband-filtered data to intermediate-frequency-modulated data, and the modulation formula is as follows:
f(t)＝I(t)cos(wct)-Q(t)sin(wct) (5)
wherein, I (t), Q (t) are I/Q two-way data, wcFor the carrier frequency, I, Q two-way data modulation can be realized by a multiplier and an adder.
The data output module described in fig. 1 implements data format conversion and then outputs the converted data to an external digital-to-analog conversion chip to implement intermediate frequency analog modulation, and the specific requirements of the format are determined by the external digital-to-analog conversion chip, and reliable conversion of the data output format can be implemented through a Block RAM IP core.
In conclusion, the invention provides a multi-mode multi-rate high-reliability aerospace general coding modulator, which can effectively solve the problems of single working mode, fixed modulation mode and fixed rate of the aerospace modulator, can meet the requirement of various transmission of aerospace satellite models in various data transmission environments, and effectively reduces the research and development cost.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (1)
1. An aerospace coded modulator, comprising:
an instruction receiving and processing module;
the clock monitoring module is communicated with the instruction receiving and processing module;
the clock generation module is communicated with the clock monitoring module and is also communicated with the instruction receiving and processing module;
a data spontaneous module;
the data receiving module is communicated with the data spontaneous module;
a frame header judging module communicated with the data receiving module;
the multi-mode channel coding module is communicated with the frame header judging module and is also communicated with the instruction receiving and processing module;
a multi-mode mapping module in communication with the multi-mode channel coding module, the multi-mode mapping module further in communication with the instruction reception processing module;
a multi-rate shaping filter module in communication with said multi-mode mapping module, said multi-rate shaping filter module further in communication with said instruction receiving processing module;
a digital modulation module in communication with the multi-rate shaping filter module;
a data output module in communication with the digital modulation module;
a digital-to-analog converter in communication with the data output module, the digital-to-analog converter further in communication with the clock generation module;
the instruction receiving and processing module is used for continuously sampling a front-end instruction signal in real time to analyze an instruction truth table by adding an anti-interference processing strategy so as to generate a working mode instruction signal and a clock monitoring reset signal and control the working state of the code modulator;
the clock generation module is used for performing multi-clock and multi-frequency output, generating clock frequency by combining a DDS principle and a frequency division interleaving idea and forming an internal clock domain so as to perform subsequent data operation and output; meanwhile, the interior of the code modulator is reset for a certain time through a clock reset signal, so that the internal register returns to the original state, and the metastable state of the register is prevented;
the clock monitoring module is used for counting and monitoring the monitoring clock output by the clock generating module by using a local 100M clock, resetting the clock generating module for a certain time if the counting value runs out of the reasonable deviation of the monitoring clock, and restarting coding and operation after the clock is recovered to be normal so as to monitor the reliability of the generating clock;
the multi-mode channel coding module and the multi-mode mapping module respectively select different channel coding and mapping modulation modes according to the working mode instruction, and adaptively modify, combine or add the channel coding according to the requirements of different protocols or specifications;
the multi-rate forming filtering module is used for realizing multi-rate design by matching an interpolation filter with a decimation filter, and is used for selecting filters with different rates and different types according to a working mode instruction to complete forming filtering of code element data so as to improve out-of-band rejection of a channel and realize that any data rate is input into the same intermediate frequency carrier wave for output;
the data spontaneous module has an internal code element spontaneous function, so that the code modulator has universal adaptability, and is used for circularly spontaneously generating pseudo-random code element data under each working mode, completing self-checking and function and performance testing of the code modulator under the condition that front-end data is not available or abnormal, and not depending on a front-end data source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910798769.5A CN110492975B (en) | 2019-08-27 | 2019-08-27 | Coded modulator for spaceflight |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910798769.5A CN110492975B (en) | 2019-08-27 | 2019-08-27 | Coded modulator for spaceflight |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110492975A CN110492975A (en) | 2019-11-22 |
| CN110492975B true CN110492975B (en) | 2022-03-18 |
Family
ID=68553629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910798769.5A Active CN110492975B (en) | 2019-08-27 | 2019-08-27 | Coded modulator for spaceflight |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110492975B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114696885B (en) * | 2021-01-21 | 2024-04-30 | 上海航天测控通信研究所 | Satellite-borne data broadcast distribution equipment and method |
| CN112910544B (en) * | 2021-02-05 | 2022-11-25 | 上海航天测控通信研究所 | On-orbit configurable satellite-borne L/S frequency band data broadcast distribution system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1052799A2 (en) * | 1999-05-10 | 2000-11-15 | TRW Inc. | Flexible channeliser |
| CN103166743A (en) * | 2013-01-31 | 2013-06-19 | 中国科学院空间科学与应用研究中心 | Base band digital signal encoding modulation integrated system |
| CN108599781A (en) * | 2018-04-10 | 2018-09-28 | 中国科学院国家空间科学中心 | Detect examination intermediate-frequency receiver to a kind of fpga chip, intermediate frequency demodulation card and satellite data transmission |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7526019B1 (en) * | 2003-03-27 | 2009-04-28 | Broadlogic Network Technologies Inc. | Method and system for providing multi-channel multimode QAM equalization and carrier recovery |
| CN101375575A (en) * | 2005-12-16 | 2009-02-25 | Nxp股份有限公司 | Multi-mode modulation apparatus |
| CN108347278B (en) * | 2017-12-23 | 2021-07-06 | 航天恒星科技有限公司 | High-speed bandwidth modulation method and system adapting to variable rate |
| CN108462524A (en) * | 2018-03-29 | 2018-08-28 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Digital Satellite Signal Source |
| CN109639609B (en) * | 2018-12-18 | 2021-03-09 | 中国电子科技集团公司第五十四研究所 | Multi-rate multi-modulation mode commercial data transmission transmitting device based on CCSDS transmission structure |
-
2019
- 2019-08-27 CN CN201910798769.5A patent/CN110492975B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1052799A2 (en) * | 1999-05-10 | 2000-11-15 | TRW Inc. | Flexible channeliser |
| US6449244B1 (en) * | 1999-05-10 | 2002-09-10 | Trw Inc. | Implementation of orthogonal narrowband channels in a digital demodulator |
| CN103166743A (en) * | 2013-01-31 | 2013-06-19 | 中国科学院空间科学与应用研究中心 | Base band digital signal encoding modulation integrated system |
| CN108599781A (en) * | 2018-04-10 | 2018-09-28 | 中国科学院国家空间科学中心 | Detect examination intermediate-frequency receiver to a kind of fpga chip, intermediate frequency demodulation card and satellite data transmission |
Non-Patent Citations (2)
| Title |
|---|
| "DPSK signal demodulation based on a graded-index multimode fiber mismatch spliced between two single-mode fibers";Xiaoyong Chen等;《2015 International Conference on Photonics,Optics and Laser Technology》;20150315;全文 * |
| "基于多速率滤波器组的扩频系统";刘晓妮等;《西安邮电学院学报》;20060110;全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110492975A (en) | 2019-11-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| AU776183B2 (en) | System for remote data collection | |
| CN110492975B (en) | Coded modulator for spaceflight | |
| US6181258B1 (en) | Receiver capable of parallel demodulation of messages | |
| CA2368836C (en) | System for performing load management | |
| ES2621470T3 (en) | Integrated demodulator, filter and decimator (DFD) for a radio receiver | |
| Cai et al. | Model-based design for software defined radio on an FPGA | |
| US6452986B1 (en) | Detector tolerant of frequency misalignment | |
| CN104201991A (en) | Digital down-converting system for implementing frequency-agility metrewave radar | |
| CN104393911B (en) | A kind of air-ground narrow-band communication system and its method for unmanned plane | |
| WO2000070576A1 (en) | Transmitter tolerant to crystal variations | |
| CN101505184B (en) | Concealed satellite communication terminal | |
| Rodriguez et al. | Model-based software-defined radio (SDR) design using FPGA | |
| EP1693954B1 (en) | Demodulation circuit for use in receiver using IF sampling scheme | |
| CN104333391B (en) | A kind of air-ground narrow band communication method for unmanned plane | |
| Gao et al. | Fault tolerant polyphase filters-based decimators for SRAM-based FPGA implementations | |
| CN102522631A (en) | Double-system antenna tracking system based on spread spectrum and digital guidance | |
| CN112039578B (en) | FPGA-based signal processing module of satellite-borne ADS-B receiver | |
| CN112671418B (en) | Demodulation method and device based on band-pass sampling structure demodulator | |
| York et al. | A direct-sampling digital-downconversion technique for a flexible, low-bias GNSS RF front-end | |
| CN107070832A (en) | A kind of high dynamic UAV TT ＆ C signal carrier tracking method | |
| Xiao et al. | Design of pcm/fm baseband modulation transmitter based on software radio | |
| CN106603218A (en) | Directed-verdict-based carrier phase synchronization FPGA structure and method | |
| CN101841497B (en) | Up/down frequency conversion method in EOC (Ethernet Over Coax) network | |
| CN104394112B (en) | A kind of receiving terminal method for the air-ground narrow-band communication system of unmanned plane | |
| Zhaojin et al. | Design and analysis of FPGA-based high speed DQPSK modulation system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |