CN110491343A - OLED pixel structure and display device - Google Patents
OLED pixel structure and display device Download PDFInfo
- Publication number
- CN110491343A CN110491343A CN201910816737.3A CN201910816737A CN110491343A CN 110491343 A CN110491343 A CN 110491343A CN 201910816737 A CN201910816737 A CN 201910816737A CN 110491343 A CN110491343 A CN 110491343A
- Authority
- CN
- China
- Prior art keywords
- unit
- signal
- transistor
- node
- driving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
Abstract
The present invention provides a kind of OLED pixel structure and display device, the pixel unit including multiple array distributions, and each pixel unit includes: that power supply provides unit, driving signal writing unit, driving unit.Wherein, driving unit connects driving signal writing unit and power supply provides unit, and saves the driving signal of driving signal writing unit write-in, and according to driving signal, the driving current that the power supply signal that unit provides generates matching driving signal is provided using power supply, to drive light emitting diode；Wherein, the semiconductor layer for the first node metal wire connection next stage pixel unit that driving unit is connect with driving signal writing unit, and with the next stage of next stage pixel unit shine enable signal lines matching and form error compensation unit, to eliminate the error of driving signal writing unit write driver signal.Error of compensation during to threshold voltage drift compensation is avoided with this.
Description
Technical field
The present invention relates to field of display technology, more particularly to a kind of OLED pixel structure and display device.
Background technique
Active (active) matrix/organic light emitting diode (AMOLED) (Active-matrix Organic Light Emitting
Diode, AMOLED) circuit manufacturing process in, due to technique, usually can all there is TFT device parameters threshold voltage
Non-uniform problem will lead to AMOLED brightness irregularities during display, display quality decline.
Mode used by solving the above problems at present is the compensation function by interior pixels circuit or external drive chip
Energy.But external drive usually requires to increase additional chip, improves cost, and increases the complexity of electronic system.
The internal compensation of pixel circuit generally only needs to can be achieved with by the pixel circuit with compensation function to thin film transistor (TFT)
The compensation of threshold voltage shift promotes display quality.
AMOLED product on the market generallys use 7T1C pixel circuit, but it is in the mistake to threshold voltage drift compensation
Cheng Zhong can lead to the problem of error of compensation.It is therefore proposed that a kind of 8T2C pixel circuit, but M8 is set, the layout of pixel can be made
Insufficient space.
Summary of the invention
The invention mainly solves the technical problem of providing a kind of OLED pixel structure and display devices, to avoid to threshold
Error of compensation is led to the problem of during threshold voltage drift compensation, and reaches diminution pel spacing, reduces pixel layout difficulty
Purpose.
In order to solve the above technical problems, one technical scheme adopted by the invention is that:
A kind of OLED pixel structure is provided, the pixel unit including multiple array distributions, each pixel unit respectively include:
Power supply provides unit, receives the same level and shines enable signal, and shines enable signal according to the same level and be that pixel unit shines two
Pole pipe provides power supply signal；Driving signal writing unit receives the same level scanning signal, and will under the driving of the same level scanning signal
Driving signal is written to pixel unit；Driving unit, connects driving signal writing unit and power supply provides unit, is saved with being written
Driving signal, and according to driving signal, the driving current of matching driving signal is generated using power supply signal, to utilize driving
Electric current drives light emitting diode；Wherein, driving unit write-in saves the first node metal wire at the first node of driving signal
Be connected to the semiconductor layer of next stage pixel unit, and with the next stage of next stage pixel unit shine enable signal lines matching and
Error compensation unit is formed, generates thermal compensation signal to shine enable signal by next stage, to eliminate driving signal write-in
The error of unit write driver signal.
Wherein, each pixel unit respectively include: substrate；Patterned semiconductor layer, positioned at the side of substrate；Graphical
One metal layer, the side positioned at patterned semiconductor layer far from substrate, wherein graphical the first metal layer includes the enabled letter that shines
Number line and scan line, the enable signal line that shines is for receiving luminous enable signal, and scan line is for receiving scanning signal, and schemes
Shape semiconductor layer includes the first semiconductor pattern for matching luminous enable signal line, and shine enable signal line and the first semiconductor
Pattern is least partially overlapped in the projection of substrate；Graphical second metal layer, positioned at graphical the first metal layer far from substrate
Side；Graphical third metal layer, the side positioned at graphical second metal layer far from substrate, wherein graphical third metal
Layer includes first node metal wire；Graphical 4th metal layer, positioned at graphical side of the third metal layer far from substrate,
In, graphical 4th metal layer includes data line and power supply signal metal wire；Wherein, the next stage in next stage pixel unit
Semiconductor pattern is least partially overlapped in the projection of substrate with the first node metal wire in the same level pixel unit, and next stage
The first semiconductor pattern of next stage in pixel unit connects the first node metal wire in the same level pixel unit, with next stage
Next stage luminous signal lines matching in pixel unit, the error benefit to be formed as the error compensation unit of the same level pixel unit
Repay transistor.
Wherein, each pixel unit further comprises: initialization unit, receives initializing signal, and by reference signal
Metal wire and receive reference signal, wherein initialization unit is connected to first node metal wire and light emitting diode, with according to just
Beginningization signal and first node and light emitting diode are initialized using reference signal.
Wherein, it includes: the first transistor that power supply, which provides unit, comprising control terminal, the first path terminal and alternate path end,
Wherein, the control terminal of the first transistor connects the same level and shines enable signal line to receive the luminous enable signal of the same level, the first access
End is connected to the same level power supply signal metal wire to receive power supply signal, and alternate path end is connected to driving unit, wherein first is brilliant
Tie point between the alternate path end of body pipe and driving unit is defined as second node；Second transistor comprising control terminal,
First path terminal and alternate path end, wherein the control terminal of second transistor connects the same level and shines enable signal line to receive this
The luminous enable signal of grade, the first path terminal is connected to driving unit, and alternate path end is connected to light emitting diode, wherein the
Tie point between the first path terminal and driving unit of two-transistor is defined as third node, the alternate path of second transistor
Tie point between end and light emitting diode is defined as fourth node.
Wherein, driving signal writing unit includes: third transistor comprising control terminal, the first path terminal and second are logical
Terminal, wherein the control terminal of third transistor connects the same level scan signal line to receive the same level scanning signal, and the first path terminal connects
Drive signal line is connected to receive driving signal, alternate path end is connected to third node；4th transistor comprising control
End, the first path terminal and alternate path end, wherein the control terminal of the 4th transistor connects the same level scan signal line to receive the same level
Scanning signal, the first path terminal are connected to second node, and alternate path end is connected to first node.
Wherein, driving unit includes: the 5th transistor comprising control terminal, the first path terminal and alternate path end,
In, the control terminal of the 5th transistor connects first node, and the first path terminal is connected to second node, and alternate path end is connected to the
Three nodes.
Wherein, error compensation unit includes: error compensation transistor comprising control terminal, the first path terminal and second are logical
Terminal, wherein it is luminous enabled to receive next stage that the control terminal connection next stage of error compensation transistor shines enable signal line
Signal wire, the first path terminal are connected to first node.
Wherein, initialization unit includes: the 7th transistor comprising control terminal, the first path terminal and alternate path end,
In, for the control terminal connection initializing signal line of the 7th transistor to receive initializing signal, the first path terminal is connected to first segment
Point, alternate path end are connected to reference signal line to receive reference signal；8th transistor comprising control terminal, the first access
End and alternate path end, wherein for the control terminal connection initializing signal line of the 8th transistor to receive initializing signal, first is logical
Terminal is connected to fourth node, and alternate path end is connected to reference signal line to receive reference signal.
Wherein, the anode of light emitting diode is connected to fourth node, and the cathode connection of light emitting diode is with reference to ground.
In order to solve the above technical problems, another technical solution used in the present invention is:
A kind of display device, including above-mentioned any one OLED pixel structure are provided.
The beneficial effects of the present invention are: being in contrast to the prior art, the present invention provides unit by power supply and receives this
The luminous enable signal of grade provides power supply signal for light emitting diode, then receives the same level scanning signal by driving signal writing unit
By driving signal writing pixel unit, driving unit is made to save driving signal, and is generated according to driving signal using power supply signal
The driving current of driving signal is matched, and then drives light emitting diode using driving current, wherein the driving that driving unit saves
First node metal wire at the first node of signal is connected to the semiconductor layer of next stage pixel unit, and with next stage pixel
The next stage of unit shines enable signal lines matching and forms error compensation unit, to generate by the next stage enable signal that shines
Thermal compensation signal, to eliminate the error of driving signal writing unit write driver signal.It is realized and is avoided to threshold voltage with this
Error of compensation is led to the problem of during drift compensation, and reduces pel spacing, reduces pixel layout difficulty.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the first embodiment of OLED pixel structure of the present invention；
Fig. 2 is the structural schematic diagram of the first embodiment of OLED pixel structure of the present invention；
Fig. 3 is the structural schematic diagram of the 3rd embodiment of OLED pixel structure of the present invention；
Fig. 4 is the timing waveform of OLED pixel structure of the present invention；
Fig. 5 is the structural schematic diagram of the fourth embodiment of OLED pixel structure of the present invention；
Fig. 6 is the structural schematic diagram of the first embodiment of the display device of that present invention.
Specific embodiment
The present invention will be described in detail with reference to the accompanying drawings and examples.
It referring to Figure 1, is the structural schematic diagram of the first embodiment of OLED pixel structure of the present invention.Including multiple arrays point
The pixel unit of cloth, wherein each pixel unit respectively include: power supply provides unit 11, driving signal writing unit 12, driving
Unit 13 and error compensation unit 14.
Wherein, driving unit 13 connects power supply and provides unit 11 and driving signal writing unit 12, and driving unit 13 with
The first node metal wire at first node n1 that driving signal writing unit 12 connects is connected in next stage pixel unit
Power supply provides unit 111 to form error compensation unit 14.
Specifically, power supply, which provides unit 11 and receives the same level, shines enable signal, is to shine enable signal according to the same level
The light emitting diode of pixel unit provides power supply signal.Driving signal writing unit 12 receives the same level scanning signal, in the same level
Driving signal is written to pixel unit under the driving of scanning signal.Driving unit 13 connects driving signal writing unit 12 and electricity
Source provides unit 11, preservation driving signal is written, and generates matching driving signal using power supply signal according to driving signal
Driving current, thus utilize driving current drive light emitting diode.
Wherein, the first node metal wire that the write-in of driving unit 13 saves at the first node n1 of driving signal is connected to down
The semiconductor layer of level-one pixel unit, and with the next stage of next stage pixel unit shine enable signal lines matching and form error
Compensating unit 14.Thermal compensation signal is generated to shine enable signal by next stage, to eliminate driving signal writing unit 12
The error of write driver signal.Wherein, the luminous enable signal line of next stage is located at power supply and provides in unit 11.
Fig. 2 is referred to, is the structural schematic diagram of the second embodiment of OLED pixel structure of the present invention.With first embodiment phase
Than difference is: the present embodiment further include: initialization unit 15, receive initializing signal, and by reference signal metal wire and
Receive reference signal VREF.Wherein, initialization unit 15 is connected to first node metal wire and light emitting diode, according to initial
Change signal and first node n1 and light emitting diode are initialized using reference signal.
Fig. 3 is referred to, is the structural schematic diagram of the 3rd embodiment of OLED pixel structure of the present invention.Specifically, in this reality
It applies in example, it includes: the first transistor M1 and second transistor M2 that power supply, which provides unit 11,.Wherein, the first transistor M1 includes control
End, the first path terminal and alternate path end processed.Wherein, the control terminal of the first transistor M1 connect the same level shine enable signal line with
The same level is received to shine enable signal EM_N, the first path terminal is connected to the same level power supply signal metal wire to receive power supply signal VDD,
Alternate path end is connected to driving unit 13.Wherein, the connection between the alternate path end and driving unit 13 of the first transistor
Point is defined as second node n2.Specifically, the alternate path end of the first transistor M1 is connected to the 5th crystalline substance in driving unit 13
Body pipe M5.Second transistor M2 includes control terminal, the first path terminal and alternate path end.The control terminal of second transistor M2 connects
The same level shines enable signal line to receive the same level and shine enable signal EM_N, and the first path terminal is connected to driving unit 13, and second
Path terminal is connected to light emitting diode.Wherein, the tie point between the first path terminal and driving unit 13 of second transistor M2
It is defined as third node n3.Specifically, the first path terminal of second transistor M2 is connected to the 5th crystal in driving unit 13
Pipe M5.
Driving signal writing unit 12 includes: third transistor M3 and the 4th transistor M4.Wherein, third transistor M3 packet
Include control terminal, the first path terminal and alternate path end.The control terminal of third transistor M3 connects the same level scan signal line to receive
The same level scanning signal S2_N, the first path terminal are connected to drive signal line to receive driving signal VDATA, the connection of alternate path end
To third node n3.4th transistor M4 includes control terminal, the first path terminal and alternate path end.The control of 4th transistor M4
End connection the same level scan signal line is to receive the same level scanning signal S2_N, and the first path terminal is connected to second node n2, and second is logical
Terminal is connected to first node n1.
Driving unit 13 includes the 5th transistor M5.Wherein, the 5th transistor M5 includes control terminal, the first path terminal and
Two path terminals.Wherein, the control terminal of the 5th transistor M5 connects first node n1, and the first path terminal is connected to second node n2,
Alternate path end is connected to third node n3.
Error compensation unit 14 includes error compensation transistor M 6.Wherein, error compensation transistor M6 include control terminal,
First path terminal and alternate path end.Wherein, the luminous enable signal line of control terminal connection next stage of error compensation transistor M6
To receive the luminous enable signal EM_N+1 of next stage, the first path terminal is connected to first node n1, and alternate path end is hanging.
Initialization unit 15 includes: the 7th transistor M7 and the 8th transistor M8.Wherein, the 7th transistor M7 includes control
End, the first path terminal and alternate path end.Wherein, the control terminal connection initializing signal line of the 7th transistor M7 is initial to receive
Change signal S1_N, the first path terminal is connected to first node n1, and alternate path end is connected to reference signal line to receive with reference to letter
Number VREF.8th transistor M8 includes control terminal, the first path terminal and alternate path end.Wherein, the control terminal of the 8th transistor M8
Connection initializing signal line is to receive initializing signal S1_N, and the first path terminal is connected to fourth node n4, and alternate path end connects
Reference signal line is connected to receive reference signal VREF。
In one embodiment, the anode of light emitting diode connects fourth node n4, and cathode connection is with reference to ground.In addition, another
In one embodiment, OLED pixel unit further include: first capacitor C1 and the second capacitor C2.Wherein first capacitor C1 and the second capacitor
C2 includes the first path terminal and alternate path end.Wherein, the first path terminal of first capacitor C1 is connected to the same level power supply signal
For metal wire to receive power supply signal VDD, alternate path end is connected to the alternate path end of the 4th transistor M4；Second capacitor C2's
First path terminal is connected to the control terminal of first node n1 and the 5th transistor M5, and alternate path end is connected to the 8th transistor M8
Alternate path end and the 7th transistor M7 alternate path end.
It referring to figure 4., is the timing waveform of OLED pixel structure of the present invention.
Specifically, in T1 stage, i.e. initial phase, initializing signal S1_N is low level, the 7th transistor M7 and the
Eight transistor M8 conducting；The same level scanning signal S2_N is high level, and third transistor M3 and the 4th transistor M4 are not turned on；The same level
The enable signal EM_N that shines is high level, and the first transistor M1 and second transistor M2 are not turned on.At this point, OLED anode and C1 and
C2 is initialized to reference signal VREF.The voltage V of first node n1n1=VREF。
In T2 stage, i.e. data write phase, initializing signal S1_N is high level, the 7th transistor M7 and the 8th crystal
Pipe M8 is not turned on；The same level scanning signal S2_N is low level, third transistor M3 and the 4th transistor M4 conducting；The same level, which shines, to be made
Energy signal EM_N is high level, and the first transistor M1 and second transistor M2 are not turned on.The voltage V of third node n3 at this timen3=
VDATA, the 5th transistor M5 is connected, and since the 5th transistor M5 is drives transistor, can generate threshold voltage V in conductingth,
The voltage of first node n1 is driving signal V at this timeDATAWith threshold voltage VthThe sum of, i.e. Vn1=VDATA+Vth。
In T3 stage, i.e. light emitting phase, in the process, S2_N jump is high level, and the 4th transistor M4 is closed, the 4th
Transistor M4 channel charge can cause the voltage V of first node n1 by coupling injection first node n1n1Rise and generates error delta
V1, the T3 stage is divided into T3_1 and T3_2 at this time.
Specifically, in the T3_1 stage, initializing signal S1_N is high level, and the 7th transistor M7 and the 8th transistor M8 are not
Conducting；The same level scanning signal S2_N is high level, and third transistor M3 and the 4th transistor M4 are not turned on；The same level, which shines, enables letter
Number EM_N is low level, the first transistor M1 and second transistor M2 conducting.Flow through the electric current of light emitting diode are as follows: I=k*
(Vgs-Vth) ^2=k* [(VDATA+ Vth-VDD)-Vth] ^2=k* [(VDATA-VDD)]^2.Theoretically in data write phase knot
Shu Shi, first node n1 voltage Vn1=VDATA+VthLight emitting phase can be accurately remained to, in fact, S2_N jump is high level,
It can cause the voltage V of first node n1n1Rise and generates error delta V1.Therefore, in the T3_2 stage, next stage shines enable signal
EM_N+1 is low level, can make the voltage V of first node n1n1Decline generates error delta V2.By first segment at the end of the T3_1 stage
The voltage V of point n1n1It is denoted as Vn1', the voltage V of first node n1 at the end of the T3_1 stagen1'=Vn1+ Δ V1+ Δ V2=VDATA+
Vth+ΔV1+ΔV2.Error e rror=Δ V1+ Δ V2 is compensated at this time, and the error delta V1 of rising and the error delta V2 of decline are mutual
It offsets, to solve the problems, such as to generate error of compensation during to threshold voltage drift compensation.
Fig. 5 is referred to, is the structural schematic diagram of the fourth embodiment of OLED pixel structure of the present invention.It include: substrate 41, figure
Shape semiconductor layer 42, graphical the first metal layer 43, graphical second metal layer 44, graphical third metal layer 45 and figure
Change the 4th metal layer 46.
Wherein, there is buffer layer 51, image conversion semiconductor layer 42 and figure between substrate 41 and image conversion semiconductor layer 42
Changing has first medium layer 52, the gate oxide as thin film transistor (TFT) between the first metal layer 43；Graphical first metal
There is second dielectric layer 53 between layer 43 and graphical second metal layer 44, be used as capacitor dielectric layer；Graphical second metal
There is third dielectric layer 54 between layer 44 and graphical third metal layer 45, be used as insulating layer, be used for isolation patternization second
Metal layer 44 and graphical third metal layer 45；Have the between graphical third metal layer 45 and graphical 4th metal layer 46
Four dielectric layers 55 are used as insulating layer, are used for isolation pattern third metal layer 45 and graphical 4th metal layer 46.
Wherein, substrate 41 is insulating materials, can be glass, plastics, quartz or silicon wafer, serves as a contrast in other embodiments
The material at bottom 41 is not limited to this.Patterned semiconductor layer 42 is located at the side of substrate 41.
Graphical the first metal layer 43 is located at side of the patterned semiconductor layer far from substrate 41.Wherein, graphical first
Metal layer 43 includes shine enable signal line 431 and scan line 432, wherein enable signal line 431 and the scan line 432 of shining it
Between kept apart by second dielectric layer 53, the enable signal line 431 that shines is for receiving luminous enable signal EM_N, scan line 432
For receiving scanning signal S2_N, and patterned semiconductor layer 42 includes the first semiconductor for matching the enable signal line 431 that shines
Pattern 421 includes the first semiconductor pattern of multistage 421, two section of first adjacent semiconductor pattern in patterned semiconductor layer 42
421 are kept apart by first medium layer 52, shine enable signal line 431 and the first semiconductor pattern 421 substrate 41 projection
It is least partially overlapped.
Graphical second metal layer 44 is located at graphical side of the first metal layer 43 far from substrate 41.Wherein, graphically
Second metal layer 44 includes reference signal metal wire 441.
Graphical third metal layer 45 is located at graphical side of the second metal layer 44 far from substrate 41.Wherein, graphically
Third metal layer 45 includes first node metal wire 451.
Graphical 4th metal layer 46 is located at graphical side of the third metal layer 45 far from substrate 41.Wherein, graphically
4th metal layer 46 includes data line 462 and power supply signal metal wire 461.In this embodiment, data line 462 is arranged in figure
Change in the 4th metal layer 46, rather than be arranged on graphical third metal layer 45, can reduce the pixel pitch of pixel with this, from
And reduce the layout difficulty of pixel.
Wherein, the first semiconductor pattern of next stage 421 in next stage pixel unit and first in the same level pixel unit
Node metal line 451 is least partially overlapped in the projection of substrate 41, and the first semiconductor of next stage in next stage pixel unit
Pattern 421 connects the first node metal wire 451 in the same level pixel unit, and specifically, the first semiconductor pattern of next stage 421 is logical
Through-hole 47 is crossed to connect with the first node metal wire 451 in the same level pixel unit, with the next stage in next stage pixel unit
The enable signal line 431 that shines matches, to form the error compensation transistor as the error compensation unit 14 of the same level pixel unit
M6。
Wherein, patterned semiconductor layer 42, graphical the first metal layer 43, graphical second metal layer 44, graphical
Three metal layers 45 and graphical 4th metal layer 46 are configured to form power supply and provide unit 11,12 and of driving signal writing unit
Driving unit 13.
Fig. 6 is referred to, is the structural schematic diagram of the display device of that present invention.Display device 401 includes any of the above-described embodiment
In OLED pixel structure 402.The device and function of other devices and function of display device 401 and existing display device 401
Identical, details are not described herein.
Specifically, display device 401 can be in double-side display device, flexible display apparatus, comprehensive screen display device
It is a kind of.Flexible display apparatus can be applied to curved electronic equipment；Double-side display device can be applied to make display device
The personnel of two sides can see the device of display content；Comprehensive screen display device can be applied to comprehensive screen mobile phone or other dresses
It sets, it is not limited here.
The present invention includes that the display device 401 of the OLED pixel structure of above-described embodiment specifically can be applied to mobile phone, put down
Any product having a display function such as plate computer, television set, display, laptop, Digital Frame, navigator or portion
Part.Other essential component parts for display device are it will be apparent to an ordinarily skilled person in the art that having
, this will not be repeated here, also should not be taken as limiting the invention.
In various embodiments of the present invention, OLED pixel structure only describes part dependency structure, other structures and existing skill
The structure of OLED pixel structure in art is identical, and details are not described herein.
The above is only embodiments of the present invention, are not intended to limit the scope of the invention, all to utilize the present invention
Equivalent structure or equivalent flow shift made by specification and accompanying drawing content is applied directly or indirectly in other relevant technologies
Field is included within the scope of the present invention.
Claims (10)
1. a kind of OLED pixel structure, which is characterized in that the pixel unit including multiple array distributions, each pixel unit difference
Include:
Power supply provides unit, receives the luminous enable signal of the same level, and be the pixel according to the luminous enable signal of described the same level
The light emitting diode of unit provides power supply signal；
Driving signal writing unit receives the same level scanning signal, and driving signal is written under the driving of the same level scanning signal
To the pixel unit；
Driving unit, connects the driving signal writing unit and the power supply provides unit, saves the driving letter with write-in
Number, and according to the driving signal, the driving current for matching the driving signal is generated using the power supply signal, thus sharp
The light emitting diode is driven with the driving current；
Wherein, the first node metal wire that the driving unit write-in saves at the first node of the driving signal is connected to down
The semiconductor layer of level-one pixel unit, and with the next stage of the next stage pixel unit shine enable signal lines matching and formed
Error compensation unit generates thermal compensation signal to shine enable signal by next stage, to eliminate the driving signal write-in
The error of the driving signal is written in unit.
2. OLED pixel structure according to claim 1, which is characterized in that each pixel unit respectively include:
Substrate；
Patterned semiconductor layer, positioned at the side of the substrate；
Graphical the first metal layer, positioned at the side of the patterned semiconductor layer far from the substrate, wherein described graphical
The first metal layer includes shine enable signal line and scan line, and the luminous enable signal line is for receiving the enabled letter that shines
Number, and the scan line is used to receive scanning signal, and the patterned semiconductor layer includes matching the luminous enable signal
First semiconductor pattern of line, the luminous enable signal line and first semiconductor pattern the substrate projection at least
It partly overlaps；
Graphical second metal layer, positioned at the side of the graphical the first metal layer far from the substrate；
Graphical third metal layer, positioned at the side of the graphical second metal layer far from the substrate, wherein the figure
Changing third metal layer includes the first node metal wire；
Graphical 4th metal layer, positioned at the graphical side of the third metal layer far from the substrate, wherein the figure
Changing the 4th metal layer includes data line and power supply signal metal wire；
Wherein, the first semiconductor pattern of next stage in next stage pixel unit and the first node in the same level pixel unit
Metal wire is least partially overlapped in the projection of the substrate, and the next stage in the next stage pixel unit the first half is led
Body pattern connects the first node metal wire in the same level pixel unit, with the next stage in the next stage pixel unit
Luminous signal lines matching, to form the error compensation transistor as the error compensation unit of the same level pixel unit.
3. OLED pixel structure according to claim 1, which is characterized in that each pixel unit further comprises:
Initialization unit receives initializing signal, and receives reference signal by reference signal metal wire, wherein described first
Beginningization unit is connected to the first node metal wire and the light emitting diode, to utilize institute according to the initializing signal
Reference signal is stated to initialize the first node and the light emitting diode.
4. described in any item OLED pixel structures according to claim 1~3, which is characterized in that the power supply provides unit packet
It includes:
The first transistor comprising control terminal, the first path terminal and alternate path end, wherein the first transistor it is described
Control terminal connects the same level and shines enable signal line to receive the luminous enable signal of the same level, and first path terminal is connected to the same level electricity
Source signal metal wire is to receive power supply signal, and the alternate path end is connected to the driving unit, wherein the first crystal
Tie point between the alternate path end of pipe and the driving unit is defined as second node；
Second transistor comprising control terminal, the first path terminal and alternate path end, wherein the second transistor it is described
Control terminal connects the same level and shines enable signal line to receive the luminous enable signal of the same level, and first path terminal is connected to the drive
Moving cell, and the alternate path end is connected to the light emitting diode, wherein first access of the second transistor
Tie point between end and the driving unit is defined as third node, the alternate path end of the second transistor and institute
The tie point stated between light emitting diode is defined as fourth node.
5. OLED pixel structure according to claim 4, which is characterized in that the driving signal writing unit includes:
Third transistor comprising control terminal, the first path terminal and alternate path end, wherein the third transistor it is described
Control terminal connects the same level scan signal line to receive the same level scanning signal, and first path terminal is connected to drive signal line to connect
Driving signal is received, the alternate path end is connected to the third node；
4th transistor comprising control terminal, the first path terminal and alternate path end, wherein the 4th transistor it is described
Control terminal connects the same level scan signal line to receive the same level scanning signal, and first path terminal is connected to the second node,
The alternate path end is connected to the first node.
6. OLED pixel structure according to claim 4, which is characterized in that the driving unit includes:
5th transistor comprising control terminal, the first path terminal and alternate path end, wherein the 5th transistor it is described
Control terminal connects the first node, and first path terminal is connected to the second node, and the alternate path end is connected to
The third node.
7. OLED pixel structure according to claim 4, which is characterized in that the error compensation unit includes:
Error compensation transistor comprising control terminal, the first path terminal and alternate path end, wherein the error compensation crystal
The control terminal connection next stage of pipe shines enable signal line to receive the luminous enable signal line of next stage, first access
End is connected to the first node.
8. OLED pixel structure according to claim 4, which is characterized in that the initialization unit includes:
7th transistor comprising control terminal, the first path terminal and alternate path end, wherein the 7th transistor it is described
Control terminal connects initializing signal line to receive initializing signal, and first path terminal is connected to the first node, described
Alternate path end is connected to reference signal line to receive the reference signal；
8th transistor comprising control terminal, the first path terminal and alternate path end, wherein the 8th transistor it is described
Control terminal connects initializing signal line to receive initializing signal, and first path terminal is connected to the fourth node, described
Alternate path end is connected to reference signal line to receive the reference signal.
9. OLED pixel structure according to claim 4, which is characterized in that the anode of the light emitting diode is connected to institute
Fourth node is stated, the cathode connection of the light emitting diode is with reference to ground.
10. a kind of display device, which is characterized in that the OLED pixel including any one as described in the claims 1~9
Structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910816737.3A CN110491343A (en) | 2019-08-30 | 2019-08-30 | OLED pixel structure and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910816737.3A CN110491343A (en) | 2019-08-30 | 2019-08-30 | OLED pixel structure and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110491343A true CN110491343A (en) | 2019-11-22 |
Family
ID=68555676
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910816737.3A Pending CN110491343A (en) | 2019-08-30 | 2019-08-30 | OLED pixel structure and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110491343A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113471220A (en) * | 2021-06-30 | 2021-10-01 | 武汉天马微电子有限公司 | Array substrate, display panel and display device |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060022305A1 (en) * | 2004-07-30 | 2006-02-02 | Atsuhiro Yamashita | Active-matrix-driven display device |
| CN101266770A (en) * | 2007-02-15 | 2008-09-17 | 三星电子株式会社 | Display device and method of driving the same |
| CN101783361A (en) * | 2009-01-16 | 2010-07-21 | 索尼公司 | Display device and electronic apparatus |
| CN103927984A (en) * | 2014-04-01 | 2014-07-16 | 深圳市华星光电技术有限公司 | Pixel drive circuit and pixel drive method of OLED displayer |
| CN104658475A (en) * | 2013-11-21 | 2015-05-27 | 乐金显示有限公司 | Organic light emitting diode display device |
| US20160232840A1 (en) * | 2015-02-05 | 2016-08-11 | Innolux Corporation | Oled display panel with threshold voltage compensation and driving method thereof |
| CN107799532A (en) * | 2016-09-01 | 2018-03-13 | 群创光电股份有限公司 | Display device |
| CN109360529A (en) * | 2018-11-30 | 2019-02-19 | 昆山国显光电有限公司 | Pixel circuit and display device |
| CN109754753A (en) * | 2019-01-25 | 2019-05-14 | 上海天马有机发光显示技术有限公司 | A kind of display panel and display device |
| CN110136650A (en) * | 2019-05-29 | 2019-08-16 | 京东方科技集团股份有限公司 | Pixel circuit, its driving method, array substrate and display device |
-
2019
- 2019-08-30 CN CN201910816737.3A patent/CN110491343A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060022305A1 (en) * | 2004-07-30 | 2006-02-02 | Atsuhiro Yamashita | Active-matrix-driven display device |
| CN101266770A (en) * | 2007-02-15 | 2008-09-17 | 三星电子株式会社 | Display device and method of driving the same |
| CN101783361A (en) * | 2009-01-16 | 2010-07-21 | 索尼公司 | Display device and electronic apparatus |
| CN104658475A (en) * | 2013-11-21 | 2015-05-27 | 乐金显示有限公司 | Organic light emitting diode display device |
| CN103927984A (en) * | 2014-04-01 | 2014-07-16 | 深圳市华星光电技术有限公司 | Pixel drive circuit and pixel drive method of OLED displayer |
| US20160232840A1 (en) * | 2015-02-05 | 2016-08-11 | Innolux Corporation | Oled display panel with threshold voltage compensation and driving method thereof |
| CN107799532A (en) * | 2016-09-01 | 2018-03-13 | 群创光电股份有限公司 | Display device |
| CN109360529A (en) * | 2018-11-30 | 2019-02-19 | 昆山国显光电有限公司 | Pixel circuit and display device |
| CN109754753A (en) * | 2019-01-25 | 2019-05-14 | 上海天马有机发光显示技术有限公司 | A kind of display panel and display device |
| CN110136650A (en) * | 2019-05-29 | 2019-08-16 | 京东方科技集团股份有限公司 | Pixel circuit, its driving method, array substrate and display device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113471220A (en) * | 2021-06-30 | 2021-10-01 | 武汉天马微电子有限公司 | Array substrate, display panel and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109903728B (en) | Pixel and display device including the same | |
| US11263960B2 (en) | Display panel, driving method and display device | |
| US11881148B2 (en) | Display device | |
| US11462167B2 (en) | Display device and method of driving the same | |
| US10867559B2 (en) | Display device and method for driving the same | |
| US11741885B2 (en) | Display device having plurality of initialization power sources | |
| CN113571009A (en) | Light emitting device driving circuit, backlight module and display panel | |
| US11538379B2 (en) | Foldable display panel and driving method thereof, display device and electronic apparatus | |
| CN110100275A (en) | Image element array substrates and its driving method, display panel, display device | |
| US20240013712A1 (en) | Pixel circuit and display apparatus having the same | |
| CN114093320A (en) | Pixel circuit, pixel driving method and display device | |
| CN110534062A (en) | OLED pixel driving circuit, control method and display device | |
| CN110491343A (en) | OLED pixel structure and display device | |
| US20230206847A1 (en) | Display device | |
| US20230027673A1 (en) | Display device | |
| CN109473066A (en) | Display panel | |
| US11341902B2 (en) | Display device and method of driving the same | |
| CN110534059A (en) | OLED pixel structure and display device | |
| CN112309320A (en) | Display panel drive circuit and display device | |
| CN110956930A (en) | OLED pixel circuit and display device | |
| US11893926B2 (en) | Emissive display device | |
| US11574587B2 (en) | Display device | |
| US11869433B2 (en) | Pixel and display apparatus including the same | |
| US11776480B2 (en) | Pixel and display device including the same | |
| US20240127742A1 (en) | Inverter circuit, scan driving circuit and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20191122 |
|
| RJ01 | Rejection of invention patent application after publication |