CN110488547B - Display panel - Google Patents

Display panel Download PDF

Info

Publication number
CN110488547B
CN110488547B CN201910827527.4A CN201910827527A CN110488547B CN 110488547 B CN110488547 B CN 110488547B CN 201910827527 A CN201910827527 A CN 201910827527A CN 110488547 B CN110488547 B CN 110488547B
Authority
CN
China
Prior art keywords
display area
static
display panel
test
static element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910827527.4A
Other languages
Chinese (zh)
Other versions
CN110488547A (en
Inventor
宋聚仁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Interface Optoelectronics Shenzhen Co Ltd
Interface Technology Chengdu Co Ltd
General Interface Solution Ltd
Original Assignee
Interface Optoelectronics Shenzhen Co Ltd
Interface Technology Chengdu Co Ltd
General Interface Solution Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interface Optoelectronics Shenzhen Co Ltd, Interface Technology Chengdu Co Ltd, General Interface Solution Ltd filed Critical Interface Optoelectronics Shenzhen Co Ltd
Priority to CN201910827527.4A priority Critical patent/CN110488547B/en
Publication of CN110488547A publication Critical patent/CN110488547A/en
Application granted granted Critical
Publication of CN110488547B publication Critical patent/CN110488547B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136204Arrangements to prevent high voltage or static electricity failures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60Protection against electrostatic charges or discharges, e.g. Faraday shields
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Liquid Crystal (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The invention relates to a display panel, which comprises a display area, a test circuit and an anti-static element, wherein the display area is provided with a plurality of display areas; the test circuit surrounds the periphery of the display area and is used for transmitting a test signal to the display area so as to test the display area; the first end of the anti-static element is connected with the test circuit, the second end of the anti-static element is connected with the discharge power supply, and the third end of the anti-static element is connected with the control power supply; after the display area is tested, the voltage input to the third end of the anti-static element by the power supply is controlled to enable the first end and the second end of the anti-static element to be conducted, so that static electricity acting on the display panel is conducted to the discharge power supply by the testing circuit, and the display area is prevented from being damaged by the static electricity.

Description

Display panel
Technical Field
The invention relates to the technical field of display, in particular to a display panel.
Background
In the manufacturing process of a Thin-Film Transistor (TFT) driven liquid crystal display panel, a phenomenon of static electricity accumulation often occurs, and due to the requirement of the liquid crystal display panel, a glass substrate with insulating property is selected, so that the static electricity accumulation generated in the manufacturing process cannot be eliminated, thereby easily causing the problem of static electricity discharge, and causing the damage of components and circuits of the display panel.
The conventional method for performing electrostatic protection on the display panel usually controls the process environment of the display panel, but the method still cannot effectively eliminate the static electricity applied to the display panel from the outside in the process conversion or substrate transmission process of the display panel, which is not beneficial to improving the quality of the liquid crystal display panel.
Disclosure of Invention
Therefore, it is necessary to provide a display panel, which can not effectively eliminate the problem of static electricity applied to the display panel from the outside during the process conversion or substrate transmission process of the display panel, in order to solve the conventional electrostatic protection method for the display panel.
A display panel comprises a display area and a test circuit, wherein the test circuit surrounds the periphery of the display area and is used for transmitting a test signal to the display area so as to test the display area; further comprising:
the first end of the anti-static element is connected with the test circuit, the second end of the anti-static element is connected with the discharge power supply, and the third end of the anti-static element is connected with the control power supply;
after the display area is tested, the voltage input to the third end of the anti-static element by the control power supply enables the first end and the second end of the anti-static element to be conducted, so that static electricity acting on the display panel is conducted to the discharge power supply by the test circuit, and the display area is prevented from being damaged by the static electricity.
In one embodiment, when the display area is tested, the voltage input by the control power supply to the third terminal of the anti-static element enables the first terminal and the second terminal of the anti-static element to be cut off, so as to avoid influencing the test on the display area.
In one embodiment, the anti-static element is a thin film transistor, a first end of the anti-static element is a source electrode of the thin film transistor, a second end of the anti-static element is a drain electrode of the thin film transistor, and a third end of the anti-static element is a gate electrode of the thin film transistor.
In one embodiment, the display region includes a thin film transistor, and a thickness of the gate insulating layer of the static electricity prevention element is less than or equal to 5% of a thickness of the gate insulating layer of the thin film transistor of the display region.
In one embodiment, the thickness of the gate insulating layer of the thin film transistor of the display region is 360 ± 5 nm.
In one embodiment, the thickness of the gate insulating layer of the anti-static element is 2.15 ± 0.5 nm.
In one embodiment, the voltage of the discharge power supply is 0V.
In one embodiment, when the display area is tested, the voltage of the first end of the anti-static element is-6V- +6V, and when the test on the display area is completed, the voltage of the first end of the anti-static element is 0V.
In one embodiment, the test circuit further comprises a short-circuit type circuit ring surrounding the periphery of the test circuit.
Foretell display panel, through setting up first end and test line connection, the second end is connected with the power that discharges, the anti-static component that the third end and control power are connected, transmit to the display area through test line when test signal, to the display area test completion back, the control power input makes the first end and the second end of preventing the static component switch on to the voltage of preventing the third end of static component, thereby the test line will act on the static conduction of display panel to the power that discharges, in order to prevent that the display area from receiving electrostatic damage, improve display panel's quality.
Drawings
FIG. 1 is a schematic diagram of a display panel according to an embodiment;
fig. 2 is a schematic structural diagram of a thin film transistor in an embodiment.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully hereinafter with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "inner", "outer", "left", "right" and the like as used herein are for illustrative purposes only and do not represent the only embodiments.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel in an embodiment. The display panel includes a display region 10, a test circuit 20, and an anti-static device 30.
The display area 10 is an area on the display panel where image information is displayed. A plurality of data lines 11 and a plurality of gate lines 12 are disposed in the display region 10. The plurality of data lines 11 extend in a column direction and are arranged in a row direction. The gate lines 12 are also referred to as scanning lines, and a plurality of gate lines 12 extend in rows and are arranged in a column direction. It can be understood that the extending and arranging directions of the gate lines 12 and the data lines 11 are opposite, that is, the extending direction of the data lines 11 is the arranging direction of the gate lines 12, and the arranging direction of the data lines 11 is the extending direction of the gate lines 12. While the row direction and the column direction are perpendicular to each other. The display region 10 is further provided with a plurality of pixel units 13 and a plurality of thin film transistors 14 corresponding to the pixel units 13 one by one. The plurality of pixel units 13 are arranged in an array. The source of each thin film transistor 14 is connected to a corresponding one of the data lines 11, the gate of each thin film transistor 14 is connected to a corresponding one of the gate lines 12, and the drain of each thin film transistor 14 is connected to a corresponding one of the pixel units 13. A scan signal is input to the gate electrode of the thin film transistor 14 through the gate line 12, the thin film transistor 14 is turned on, that is, the thin film transistor 14 is turned on under the control of the scan signal, and a data signal is transmitted to the pixel unit 13 through the data line 11 and the turned-on thin film transistor 14, so that the pixel unit 13 displays an image. Each pixel unit 13 includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel, or includes a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.
The display panel further includes a non-display area 40 at the periphery of the display area 10. The test circuit 20 surrounds the periphery of the display area 10, i.e. the test circuit 20 is disposed on the non-display area 40. The test circuit 20 is used for transmitting a test signal to the display area 10 to test the display area 10. Specifically, the test circuit 20 includes a data test circuit 20 and a scan test circuit 20, the data test circuit 20 is connected to the data line 11, the data test circuit 20 is configured to input a data test signal to the data line 11, the scan test circuit 20 is connected to the gate line 12, the scan test circuit 20 is configured to input a scan test signal to the gate line 12, and the data test signal and the scan test signal are configured to detect whether the pixel unit 13 can normally display.
The anti-static element 30 is disposed on the non-display area 40 and the number of the anti-static elements 30 is plural. The first end of the static electricity preventing element 30 is connected with the test line 20, the second end of the static electricity preventing element 30 is connected with the discharge power supply V1, and the third end of the static electricity preventing element 30 is connected with the control power supply V2.
After the test of the display area 10 is completed, the voltage inputted from the control power source V2 to the third terminal of the anti-static device 30 makes the first terminal and the second terminal of the anti-static device 30 conduct, so that the test circuit 20 conducts the static electricity applied to the display panel to the discharge power source V1 to prevent the display area 10 from being damaged by the static electricity. The static electricity applied to the display panel during the manufacturing process of the display panel is eliminated by conducting to the discharging power source V1. In one embodiment, the voltage of the discharging power supply V1 is 0V, i.e. the discharging power supply V1 may be a ground terminal. Static electricity is conducted to the ground, and is eliminated by the ground, so that the operation is simple and convenient, and the cost is low.
When the display area 10 is tested, the voltage input from the control power source V2 to the third terminal of the anti-static element 30 cuts off the first terminal and the second terminal of the anti-static element 30, so as to avoid affecting the test of the display area 10. In the manufacturing process of the display panel, the test circuit 20 may be used to test the display area 10, after the test of the display area 10 is completed, the test circuit 20 is used to eliminate the static electricity on the display panel, or when the static electricity protection of the display panel is needed, the control power supply V2 inputs the voltage for turning on the first end and the second end of the static electricity preventing element 30, and when the test of the display area 10 is performed, the control power supply V2 inputs the voltage for turning off the first end and the second end of the static electricity preventing element 30.
It can be understood that the voltage input to the third terminal of the anti-static device 30 from the control power supply V2 during the test of the display area 10 is different from the voltage input to the third terminal of the anti-static device 30 after the test of the display area 10 is completed.
In one embodiment, the anti-static device 30 is a thin film transistor, the first end of the anti-static device 30 may be a source or a drain of the thin film transistor, and when the first end of the anti-static device 30 is the source of the thin film transistor, the second end of the anti-static device 30 is the drain of the thin film transistor; when the first end of the anti-static element 30 is the drain, the second end of the anti-static element 30 is the source of the thin film transistor; the third terminal of the anti-static device 30 is the gate of the thin film transistor.
The thin film transistor includes a gate layer 101, a gate insulating layer 102 formed on the gate layer 101, an active layer 103 formed on the gate insulating layer 102, an ohmic contact layer 104 formed on the active layer 103, and a metal layer formed on the ohmic contact layer 104. The gate layer 101 serves as a gate of the thin film transistor 14. The metal layer includes two layers, one is a drain layer 105, the other is a source layer 106, the drain layer 105 serves as a drain of the tft 14, and the source layer 106 serves as a source of the tft 14. It should be noted that the ohmic contact layer 104 does not cover the active layer 103 completely, i.e., the active layer 103 is partially exposed from the ohmic contact layer 104. Further, the thin film transistor is an n + -type doped thin film transistor.
The first terminal and the second terminal of the anti-static device 30 are conducted, i.e. the gate insulating layer 102 of the anti-static device 30 is broken down, so that the source of the anti-static device 30 is electrically conducted with the drain of the anti-static device 30.
The thickness of the gate insulating layer 102 of the static electricity preventing element 30 is less than or equal to 5% of the thickness of the gate insulating layer 102 of the thin film transistor 14 of the display area 10. The gate insulating layer 102 of the anti-static element 30 has a small thickness, and is more easily broken down, so that the electrostatic protection is achieved.
In one embodiment, the thickness of the gate insulating layer 102 of the tft 14 in the display region 10 is 360 ± 5 nm, the thickness of the gate insulating layer 102 of the anti-static device 30 is 2.15 ± 0.5 nm, and the area of the gate insulating layer 102 of the anti-static device 30 is 2.8 × 10-5Square centimeter. The gate insulating layer 102 of such a thickness may make the electrostatic prevention element 30 more easily broken down.
When the display area 10 is tested, the voltage of the first terminal of the anti-static device 30 is-6V- +6V, that is, the voltage on the test line 20 is-6V- +6V at this time. When the test for the display area 10 is completed, the voltage of the first terminal of the anti-static device 30 is 0V, that is, the voltage on the test line 20 is 0V at this time. The control power supply V2 inputs different voltages to the third terminal of the anti-static device 30 according to the voltage difference of the first terminal of the anti-static device 30 after the test of the display area 10 and the test of the display area 10 are completed, so that the anti-static device 30 is turned off when the test of the display area 10 is completed, and is turned on after the test of the display area 10 is completed.
In one embodiment, the display panel further includes a circuit ring 50 surrounding the periphery of the test circuit 20, and the circuit ring 50 is a ring-shaped short-circuit type circuit ring 50 for further eliminating static electricity applied to the display panel. The circuit ring 50 is made of a metal conductive layer.
The display panel may further include a plurality of diodes, each of which is connected to the test line 20. A plurality of diodes are used to eliminate static electricity on the test line 20.
The display panel is connected with the test circuit 20 by arranging the first end, the second end is connected with the discharge power supply V1, the anti-static element 30 is connected with the control power supply V2 at the third end, when a test signal is transmitted to the display area 10 through the test circuit 20, after the test on the display area 10 is completed, the voltage input to the third end of the anti-static element 30 by the control power supply V2 enables the first end and the second end of the anti-static element 30 to be conducted, and therefore the static electricity acting on the display panel is conducted to the discharge power supply V1 by the test circuit 20, so that the display area 10 is prevented from being damaged by the static electricity, and the quality of the display panel is improved.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that various changes and modifications can be made by those skilled in the art without departing from the spirit of the invention, and these changes and modifications are all within the scope of the invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (8)

1. A display panel comprises a display area and a test circuit, wherein the test circuit surrounds the periphery of the display area and is used for transmitting a test signal to the display area so as to test the display area; it is characterized by also comprising:
the first end of the anti-static element is connected with the test circuit, the second end of the anti-static element is connected with the discharge power supply, and the third end of the anti-static element is connected with the control power supply;
after the display area is tested, the voltage input to the third end of the anti-static element by the control power supply enables the first end and the second end of the anti-static element to be conducted, so that static electricity acting on the display panel is conducted to the discharge power supply by the test circuit, and the display area is prevented from being damaged by the static electricity;
the anti-static element is a thin film transistor, the first end of the anti-static element is the source electrode of the thin film transistor, the second end of the anti-static element is the drain electrode of the thin film transistor, and the third end of the anti-static element is the grid electrode of the thin film transistor;
the display area comprises a thin film transistor, and the thickness of the gate insulating layer of the anti-static element is less than or equal to 5% of the thickness of the gate insulating layer of the thin film transistor of the display area.
2. The display panel according to claim 1, wherein when the display area is tested, the voltage input from the control power supply to the third terminal of the anti-static device turns off the first terminal and the second terminal of the anti-static device to avoid affecting the test of the display area.
3. The display panel according to claim 1, wherein a thickness of a gate insulating layer of the thin film transistor of the display region is 360 ± 5 nm.
4. The display panel according to claim 1, wherein a thickness of the gate insulating layer of the anti-static element is 2.15 ± 0.5 nm.
5. The display panel according to claim 1, wherein a voltage of the discharge power supply is 0V.
6. The display panel according to claim 1, wherein a voltage of the first terminal of the anti-static element is-6V to +6V when the display area is tested, and a voltage of the first terminal of the anti-static element is 0V when the test of the display area is completed.
7. The display panel of claim 1, further comprising a short-circuited loop surrounding the periphery of the test line.
8. The display panel according to claim 1, further comprising a plurality of diodes, each of which is connected to the test line for eliminating static electricity on the test line.
CN201910827527.4A 2019-09-03 2019-09-03 Display panel Active CN110488547B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910827527.4A CN110488547B (en) 2019-09-03 2019-09-03 Display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910827527.4A CN110488547B (en) 2019-09-03 2019-09-03 Display panel

Publications (2)

Publication Number Publication Date
CN110488547A CN110488547A (en) 2019-11-22
CN110488547B true CN110488547B (en) 2022-06-21

Family

ID=68556344

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910827527.4A Active CN110488547B (en) 2019-09-03 2019-09-03 Display panel

Country Status (1)

Country Link
CN (1) CN110488547B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111489672B (en) * 2020-06-15 2023-08-15 业成科技(成都)有限公司 Display panel, electronic device, and control method of display panel
CN111897155B (en) * 2020-09-03 2023-04-11 业成科技(成都)有限公司 Array substrate and display panel
CN113570989B (en) * 2021-07-30 2024-04-05 友达光电(昆山)有限公司 Test circuit and display panel
WO2024000292A1 (en) * 2022-06-29 2024-01-04 京东方科技集团股份有限公司 Display substrate and display device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101902038A (en) * 2009-05-25 2010-12-01 上海天马微电子有限公司 Electrostatic protection device, electrostatic protection system and visual inspection test method
CN104021747A (en) * 2014-05-23 2014-09-03 京东方科技集团股份有限公司 Panel function test circuit, display panel, function testing method and electrostatic protection method
CN105185332A (en) * 2015-09-08 2015-12-23 深圳市华星光电技术有限公司 Liquid crystal display panel, driving circuit thereof and manufacturing method thereof
CN105630722A (en) * 2015-12-21 2016-06-01 联想(北京)有限公司 Electronic device and signal processing method
CN109448616A (en) * 2018-12-21 2019-03-08 厦门天马微电子有限公司 Display panel and display device
CN109491154A (en) * 2018-12-29 2019-03-19 厦门天马微电子有限公司 Display panel, display device and its manufacturing method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10147718B2 (en) * 2016-11-04 2018-12-04 Dpix, Llc Electrostatic discharge (ESD) protection for the metal oxide medical device products

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101902038A (en) * 2009-05-25 2010-12-01 上海天马微电子有限公司 Electrostatic protection device, electrostatic protection system and visual inspection test method
CN104021747A (en) * 2014-05-23 2014-09-03 京东方科技集团股份有限公司 Panel function test circuit, display panel, function testing method and electrostatic protection method
CN105185332A (en) * 2015-09-08 2015-12-23 深圳市华星光电技术有限公司 Liquid crystal display panel, driving circuit thereof and manufacturing method thereof
CN105630722A (en) * 2015-12-21 2016-06-01 联想(北京)有限公司 Electronic device and signal processing method
CN109448616A (en) * 2018-12-21 2019-03-08 厦门天马微电子有限公司 Display panel and display device
CN109491154A (en) * 2018-12-29 2019-03-19 厦门天马微电子有限公司 Display panel, display device and its manufacturing method

Also Published As

Publication number Publication date
CN110488547A (en) 2019-11-22

Similar Documents

Publication Publication Date Title
CN110488547B (en) Display panel
US11309309B2 (en) Mother substrate and display panel
US7129923B2 (en) Active matrix display device
US5657139A (en) Array substrate for a flat-display device including surge protection circuits and short circuit line or lines
JP3379896B2 (en) Liquid crystal display device and inspection method thereof
US7675600B2 (en) Liquid crystal display panel and liquid crystal display apparatus having the same
US9470943B2 (en) Array substrate, display panel and display device
US10102783B2 (en) Array substrate and detecting method for an array substrate
CN101000417A (en) Gate driver, and thin film transistor substrate and liquid crystal display having the same
WO2016201824A1 (en) Array substrate and display device
EP3557568A1 (en) Display device, tiling electronic device and method for repairing a display device
US11295694B2 (en) Display device
US11275282B2 (en) Liquid crystal display panel and display device
CN107068696B (en) Array substrate and manufacturing method thereof
JP3111944B2 (en) Active matrix liquid crystal display
CN110390900B (en) Display device and spliced electronic device
US10948749B2 (en) Display panel, display test apparatus and method of testing display panel
KR100506006B1 (en) Pannel-structure for bias aging of PMOS device
JPH07191301A (en) Display device and driving method of display device
EP0482737A2 (en) Active matrix display device
CN108054187B (en) Display panel, bad point processing method thereof and display device
CN107463015B (en) Double-data-line testing method, circuit and manufacturing method, array substrate and display device
EP3719838A1 (en) Tft substrate, esd protection circuit, and method for manufacturing tft substrate
US20190088683A1 (en) Array substrate, display panel and pixel patching method
CN111443541A (en) Discharge protection circuit and display panel

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant