CN110457198A - Debugging message output method, device and storage medium - Google Patents
Debugging message output method, device and storage medium Download PDFInfo
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- CN110457198A CN110457198A CN201810426875.6A CN201810426875A CN110457198A CN 110457198 A CN110457198 A CN 110457198A CN 201810426875 A CN201810426875 A CN 201810426875A CN 110457198 A CN110457198 A CN 110457198A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3648—Software debugging using additional hardware
- G06F11/3656—Software debugging using additional hardware using a specific debug interface
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Abstract
The present invention provides a kind of Debugging message output method, device and storage medium, this method comprises: obtaining the offset address of the base address of the controller of preset serial equipment and the status register of preset serial equipment in operating system initialization；According to base address and offset address access state register, the state of the fifo fifo register of serial equipment is obtained；When fifo register is in no data state, according to the base address of fifo register, Debugging message is written in fifo register, so that fifo register exports Debugging message, the base address of fifo register is determined according to the base address of controller.Method provided by the invention, computer can also export Debugging message by serial equipment in device drives initial phase, so that developer is in device drives initial phase, the development efficiency of operating system can also be improved based on Debugging message to operating system investigation failure, positioning failure etc..
Description
Technical field
The present invention relates to computer technology more particularly to a kind of Debugging message output methods, device and storage medium.
Background technique
It is a kind of embedded real-time operating system that Brunswick, which irrigates (vxWorks) operating system, has good reliability and Zhuo
Real-time more.Therefore, vxWorks operating system is widely used in the high-quality precision and sophisticated technologies such as communication, military affairs, Aeronautics and Astronautics
And in the high field of requirement of real-time, such as satellite communication, military exercises, trajectory guidance, aircraft navigation etc..
Currently, operation vxWorks operating system computer can use serial equipment carry out Debugging message input and
Output, so that developer can debug vxWorks operating system based on Debugging message.In the prior art, it runs
The computer of vxWorks operating system can export Debugging message by serial equipment with calling system function.System function can be with
Include such as Printf function, LogMsg function etc..
However, above system function can only execute output and adjust after vxWorks operating system completes device drives initialization
The operation of information is tried, therefore, the computer of operation vxWorks operating system can not pass through serial ports in device drives initial phase
Equipment exports Debugging message, is unable to satisfy demand in actual use.
Summary of the invention
The present invention provides a kind of Debugging message output method, device and storage medium, runs in the prior art for solving
The computer of vxWorks operating system can not export the technology of Debugging message in device drives initial phase by serial equipment
Problem.
First aspect present invention provides a kind of Debugging message output method, this method comprises:
In operating system initialization, obtain the controller of preset serial equipment base address and the preset serial ports
The offset address of the status register of equipment；
The status register is accessed according to the base address and the offset address, obtains the advanced of the serial equipment
First go out the state of fifo register；
When the fifo register is in no data state, according to the base address of the fifo register, debugging is believed
Breath is written in the fifo register, so that the fifo register exports the Debugging message, the base of the fifo register
Address is determined according to the base address of the controller.
In a kind of possible embodiment, the base address of the controller of preset serial equipment and preset described is obtained
The offset address of the status register of serial equipment, comprising:
Read preset list of devices in the operating system；Wherein, the list of devices, which is stored with, is connected to each string
The identification information of equipment on slogan, the base address of the controller of equipment, equipment status register offset address correspondence
Relationship；
The identification information of the serial port and the serial equipment that are connected according to the serial equipment traverses the equipment column
Table obtains the offset address of the base address of the controller of the serial equipment and the status register of the serial equipment.
In a kind of possible embodiment, the Debugging message is character string；It is described according to the fifo register
Debugging message is written in the fifo register for base address, comprising:
According to the base address of the fifo register, by the character in the character string according to from low level to the suitable of a high position
Sequence is sequentially written in the fifo register.
In a kind of possible embodiment, the Debugging message is number；
It is described that the status register is accessed according to the base address and the offset address, obtain the serial equipment
Before the state of fifo register, the method also includes:
The format of the Debugging message is converted into hexadecimal integer, the Debugging message after being converted；
The base address according to the fifo register, Debugging message is written in the fifo register, comprising:
According to the base address of the fifo register, before the non-zero data of highest order in the Debugging message after the conversion
All data between the lowest order of Debugging message after one to the conversion are successively write according to the sequence from a high position to low level
Enter in the fifo register.
In a kind of possible embodiment, the base address phase of the base address of the fifo register and the controller
Together.
Second aspect of the present invention provides a kind of Debugging message output device, and described device includes:
First obtains module, for obtaining the base of the controller of preset serial equipment in operating system initialization
The offset address of the status register of location and the preset serial equipment；
Second obtains module, for accessing the status register according to the base address and the offset address, obtains
The state of the fifo fifo register of the serial equipment；
Writing module is used for when the fifo register is in no data state, according to the base of the fifo register
Debugging message is written in the fifo register for location, so that the fifo register exports the Debugging message, the FIFO
The base address of register is determined according to the base address of the controller.
In a kind of possible embodiment, described first obtains module, is specifically used for reading pre- in the operating system
If list of devices, and the identification information of the serial port and the serial equipment connected according to the serial equipment traverses institute
List of devices is stated, with obtaining the offset of the base address of the controller of the serial equipment and the status register of the serial equipment
Location；
Wherein, the list of devices is stored with the control of the identification information for the equipment being connected in each serial port, equipment
The base address of device, the offset address of the status register of equipment corresponding relationship.
In a kind of possible embodiment, the Debugging message is character string；The writing module is specifically used for according to institute
The base address for stating fifo register is sequentially written in described by the character in the character string according to from low level to high-order sequence
In fifo register.
In a kind of possible embodiment, the Debugging message is number；
Described device further include:
Processing module accesses the shape according to the base address and the offset address for obtaining module described second
The format of the Debugging message before the state for obtaining the fifo register of the serial equipment, is converted to ten by state register
Senary integer, the Debugging message after being converted；
The writing module, specifically for the base address according to the fifo register, by the Debugging message after the conversion
All data between the lowest order of Debugging message behind the previous position to the conversion of the middle non-zero data of highest order are according to from a high position
To the sequence of low level, it is sequentially written in the fifo register.
In a kind of possible embodiment, the base address phase of the base address of the fifo register and the controller
Together.
Third aspect present invention provides a kind of Debugging message output device, comprising: at least one processor and memory；
The memory stores computer executed instructions；At least one described processor executes the meter of the memory storage
Calculation machine executes instruction, to execute the described in any item methods of first aspect.
Fourth aspect present invention provides a kind of computer readable storage medium, is stored in the computer readable storage medium
Program instruction, described program instruction realize the described in any item methods of first aspect when being executed by processor.
Debugging message output method, device and storage medium provided by the invention, by the controller for presetting serial equipment
Base address and default serial equipment status register offset address mode, in operating system initialization, either
The no initialization (device drives initialize a part for belonging to operating system initialization) for completing device drives, processor is ok
Get the controller of serial equipment base address and status register relative to the controller of serial equipment base address it is inclined
Address is moved, so as to be based on these addresses, the status register of serial equipment is accessed, gets status register record
For exporting the state of the fifo register of Debugging message, and then nothing can be in the state of the fifo register of serial equipment
When data mode, Debugging message is written in the fifo register of serial equipment, with defeated by the fifo register of serial equipment
The Debugging message out.That is, the output of Debugging message is no longer influenced by device drives initialization, that is, computer is being set
Standby driving initial phase can also export Debugging message by serial equipment before device drives initialization, to make
Developer is obtained in device drives initial phase or before device drives initialization, Debugging message can also be based on to behaviour
Make system and carry out malfunction elimination, positioning failure etc., improves the development efficiency of operating system.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of flow diagram of Debugging message output method provided by the invention；
Fig. 2 is the flow diagram of another Debugging message output method provided by the invention；
Fig. 3 is the flow diagram of another Debugging message output method provided by the invention；
Fig. 4 is a kind of structural schematic diagram of Debugging message output device provided by the invention；
Fig. 5 is the structural schematic diagram of another Debugging message output device provided by the invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Currently, operation vxWorks operating system computer can use serial equipment carry out Debugging message input and
Output, so that developer can debug vxWorks operating system based on Debugging message.In the prior art, it runs
The computer of vxWorks operating system can export Debugging message by serial equipment with calling system function.System function can be with
Comprising such as, Printf function, LogMsg function etc..
Printf function is the output function of standard, sends data using system method of calling.That is, operation vxWorks behaviour
The central processing unit (Central Processing Unit, abbreviation CPU) for making the computer of system is calling Printf function defeated
Out when Debugging message, Write function, the input/output (input/output, I/O) of high-level interface subsystem can be successively called
The tyWrite function of the iosWrite function of subsystem, serial terminal (Teletypes, TTY) layer, is written TTY for Debugging message
The buffer area of layer.Then, the transmission function of serial equipment driving is called by TTY layers of tyTx function pointer
Ns16550vxbTxStartup, so that serial equipment can export the Debugging message.Due to need that serial equipment is called to drive
Send function export Debugging message, therefore, can only vxWorks operating system complete serial equipment driving initialization and
After vxWorks operating system succeeds in registration, Printf function is called to export Debugging message by serial equipment.That is, In
During vxWorks operating system carries out device drives initialization, it is not capable of calling Printf function by serial equipment and exports debugging
Information.
The computer for running vxWorks operating system is calling LogMsg function to export Debugging message by serial equipment
When, it needs to export Debugging message by a higher priority task tLogTask.Specifically, vxWorks operating system is run
CPU call LogMsg function, give Debugging message to task tLogTask by message queue messaging.Then, by appointing
Debugging message is parsed and is shown on the screen or other equipment connecting with serial equipment by business tLogTask.It is logical due to needing
Task tLogTask output Debugging message is crossed, therefore, task tLogTask initialization can only be completed in vxWorks operating system
Afterwards, LogMsg function is called to export Debugging message by serial equipment.That is, carrying out equipment in vxWorks operating system
During driving initialization, it is not capable of calling LogMsg function by serial equipment and exports Debugging message.
Based on foregoing description it is found that the computer of operation vxWorks operating system cannot be completed in vxWorks operating system
Before device drives initialization, above system function is called to export Debugging message by serial equipment.
Board suppot package (Board Support Package, abbreviation BSP) is driven in motherboard hardware and operating system
One layer between dynamic layer program, belongs to a part of operating system, mainly realize the support to operating system.It is set using serial ports
It is so that developer can debug vxWorks operating system based on Debugging message for the output for carrying out Debugging message
In the debugging method that research and development BSP stage and maintenance BSP stage are all sought after.However, the output side of existing Debugging message
Formula is not suitable for using before completing device drives initialization, is only suitable for using during operating system, be unable to satisfy
Demand in actual use.
In view of the above problem, the present invention provides a kind of Debugging message output methods, make computer at the beginning of device drives
Stage beginning can also export Debugging message by serial equipment, so that developer is in device drives initial phase, it can also
To check failure, positioning failure etc. to vxWorks operating system based on Debugging message.It will be appreciated by those skilled in the art that
It is Debugging message output method provided by the present invention, including but not limited to runs the computer of vxWorks operating system, also
It can be adapted for the computer for running other operating systems, for example, the computer etc. of operation linux operating system.
As illustrating, this programme can be applied to Reduced Instruction Set Computer (Reduced Instruction Set
Computer, referred to as: RISC).I.e. the processor of RISC realizes corresponding function by operation RISC instruction.
Technical solution of the present invention is described in detail with specifically embodiment below.These specific implementations below
Example can be combined with each other, and the same or similar concept or process may be repeated no more in some embodiments.
Fig. 1 is a kind of flow diagram of Debugging message output method provided by the invention.Debugging provided by the present invention
The executing subject of information output method can be Debugging message output device, can also be to be integrated with Debugging message output device
The processor etc. of computer.Following application documents are to be integrated with the processing of the computer of Debugging message output device with executing subject
For device (referred to as: processor), the present processes are illustrated.As shown in Figure 1, this method comprises:
S101, in operating system initialization, obtain the controller of preset serial equipment base address and preset string
The offset address of the status register of jaws equipment.
S102, according to base address and offset address access state register, obtain the shape of the fifo register of serial equipment
State.
S103, when fifo register is in no data state, according to the base address of fifo register, Debugging message is write
Enter in fifo register, so that fifo register exports Debugging message, the base address of fifo register is according to the base of controller
Location determines.
Specifically, first in first out (First Input First Output, the abbreviation FIFO) register of serial equipment is used
In the output operation for executing serial equipment.Currently, fifo register can export a character or number every time.Therefore, CPU is every
It is secondary a word to be written to the fifo register of serial equipment when the fifo register of serial equipment is in no data state
Symbol or number, to pass through serial equipment for the character or numeral output.
The state recording of above-mentioned fifo register is in the status register of serial equipment.That is, CPU is set by accessing serial ports
Standby status register can know in fifo register whether there is data.The base address of the fifo register of above-mentioned serial equipment
It can be determined according to the base address of serial ports controller.For example, base address and the serial equipment of the fifo register of serial equipment
The base address of controller is identical.Whether the base address of the controller of the base address and serial equipment of the fifo register of serial equipment
It is identical, alternatively, the base address of the fifo register of serial equipment relative to the controller of serial equipment base address offset how much,
It can specifically be determined according to the configuration of the operating system of computer, this is repeated no more.
In the present embodiment, static configuration has the address information of each equipment in computer, that is, is preset with each equipment (example
Address information such as: storage equipment, keyboard equipment, mouse device etc.), the address information include at least base address and offset ground
Location.Therefore, CPU when operating system initialization, can be directly obtained the control of preset serial equipment on computers after electricity
The offset address of the status register of the base address of device and preset serial equipment.The Status register of serial equipment mentioned here
The offset address of device is offset address of the status register relative to the controller of serial equipment.That is, status register
Base address be serial equipment the base address of controller be added obtained address with the offset address of status register, be based on
The accessible status register in the base address of status register.
The present embodiment do not limit above-mentioned CPU obtain preset serial equipment controller base address and preset serial ports set
The mode of the offset address of standby status register.For example, can store the control of serial equipment in the operating system of computer
The corresponding relationship of the base address of the controller of the mark and preset serial equipment of device processed, and, the Status register of serial equipment
The corresponding relationship of the offset address of the status register of the mark and preset serial equipment of device.Therefore, above-mentioned CPU can basis
Mark, the mark of the status register of serial equipment of the controller of serial equipment, and, above-mentioned corresponding relationship obtains default
Serial equipment controller base address and preset serial equipment status register offset address.
In another implementation, above-mentioned CPU can be preset in first read operation system in operating system initialization
List of devices.Wherein, it can store the identification information for the equipment being connected in each serial port in the list of devices, and,
With the corresponding relationship of the base address of the controller of the equipment, the offset address of the status register of the equipment.Optionally, the equipment
List can also be stored with interrupting information, working frequency information, the title of equipment of the equipment being connected in each serial port etc..
Wherein, equipment mentioned here can be for example serial equipment, network equipment etc..By taking serial equipment and the network equipment as an example, string
There is serial ports in jaws equipment side and network equipment side, and the serial port of these serial ports may be identical.
Therefore, above-mentioned CPU searched in list of devices the controller of preset serial equipment base address and preset institute
When stating the offset address of the status register of serial equipment, it can be set according to the serial port and the serial ports that the serial equipment is connected
Standby identification information traverses the list of devices, searches the base address of the controller of the serial equipment and the state of the serial equipment
The offset address of register.
Offset of the above-mentioned CPU in the base address for the controller for obtaining the serial equipment and the status register of the serial equipment
After address, it can be visited according to the offset address of the status register of the base address and serial equipment of the controller of serial equipment
The status register of serial equipment is asked, to get the state of the fifo register of serial equipment.In this way, CPU can be in FIFO
When register is in no data state, according to the base address of fifo register, by each character of Debugging message and/or every number
Word is sequentially written in fifo register, to be exported the Debugging message by fifo register.
By the offset address for presetting the base address of the controller of serial equipment and the status register of default serial equipment
Mode, therefore, in operating system initialization, in spite of complete device drives initialization (device drives initialization belong to
In a part of operating system initialization), processor can get the base address of the controller of serial equipment and state is posted
Serial ports is accessed so as to be based on these addresses in offset address of the storage relative to the base address of the controller of serial equipment
The status register of equipment gets the state of the fifo register for exporting Debugging message of status register record, into
And it can be write in the fifo register of serial equipment when the state of the fifo register of serial equipment is in no data state
Enter Debugging message, which is exported with the fifo register by serial equipment.That is, the output of Debugging message is not
It is influenced again by device drives initialization, that is, computer initializes it in device drives initial phase or in device drives
It is preceding Debugging message to be exported by serial equipment, so that developer is in device drives initial phase or is setting
Before standby driving initialization, malfunction elimination, positioning failure etc. can also be carried out to operating system based on Debugging message, improve behaviour
Make the development efficiency of system.
Below for different application scenarios, to CPU in operating system initialization, the process for exporting Debugging message is carried out
It introduces.
Fig. 2 is the flow diagram of another Debugging message output method provided by the invention.In the present embodiment, it debugs
Information is character string, such as: Debugging message abcd.What is involved is CPU in operating system initialization for the present embodiment, passes through string
The process of jaws equipment output string (i.e. Debugging message).As shown in Fig. 2, this method may include:
S201, obtain preset serial equipment controller base address and preset serial equipment status register
Offset address.
S202, determine whether the base address for successfully getting the controller of preset serial equipment and preset serial equipment
Status register offset address.If so, S203 is executed, if it is not, then terminating process.
Whether S203, i-th of character for determining Debugging message are 0.If so, terminating process, if it is not, then executing S204.
S204, determine whether the fifo register of serial equipment is in no data state.If so, S205 is executed, if it is not,
It then returns and executes S204.
When having data in the fifo register of serial equipment, CPU can also postpone after waiting preset duration, then execute
S204 can specifically be determined according to the configuration of operating system.
S205, the base address according to fifo register, will be in i-th of character write-in fifo register.
S206, i is added 1.
After having executed S206, returns and execute S203.
It should be noted that the initial value of i is 0 when executing above-mentioned process.
By taking Debugging message is character string abcd as an example, when i is equal to 0, CPU can first judge the first character of character string
(i.e. whether the character d) of lowest order is 0.Since number 0 is not present in the character of composition character string, it can be by judging word
Whether symbol is 0, to determine whether that is exported is the significant character of character string.When determining character d not is 0, CPU can be in determination
When the fifo register of serial equipment is in no data state, by the first character of character string, (i.e. the character d) of lowest order is write
Enter in fifo register, to be exported character d by serial equipment.
Then, i can be added 1 by CPU, i.e. when i is equal to 1, judge whether character c is significant character again.When determining character c
When not being 0, CPU can be when the fifo register for determining serial equipment be in no data state, by second word of character string
(i.e. character c) is written in fifo register symbol, to be exported character c by serial equipment.
It is recycled with this, after the output for completing character a, i can be added 1 by CPU, i.e. i is equal to 4.Due to character string abcd
The 5th character is had no, it is 0 that i, which is equal to 4 corresponding characters,.At this point, CPU determines that the character 0 is idle character, explanation by S203
The output of character string (i.e. Debugging message) is completed.Under the scene, the process can be exited, and returns to disappearing for output completion
Breath.So far, CPU completes the output of character string (i.e. Debugging message) by serial equipment in operating system initialization.That is root
FIFO deposit is sequentially written in by the character in character string according to from low level to high-order sequence according to the base address of fifo register
In device, to complete the output of character string (i.e. Debugging message) by serial equipment.
Optionally, in some embodiments, before step S201 can also be performed in CPU, judge whether to have got default
Serial equipment controller base address and preset serial equipment status register offset address.If so, executing
S203, if it is not, then executing S201.In this way, the efficiency of CPU output string (i.e. Debugging message) can be improved.
By the above-mentioned means, making computer in device drives initial phase, serial equipment output word can also be passed through
The Debugging message for according with string format, so that developer can also be based on string format in device drives initial phase
Debugging message to operating system investigation failure, positioning failure etc., extend the use of Debugging message output method of the invention
Scene also improves the development efficiency of operating system.
Fig. 3 is the flow diagram of another Debugging message output method provided by the invention.In the present embodiment, it debugs
Information is number.Since CPU needs to convert hexadecimal integer for number, what is involved is CPU to grasp for the present embodiment
When making system initialization, it converts number to the process exported after hexadecimal integer by serial equipment.As shown in figure 3,
This method may include:
S301, obtain preset serial equipment controller base address and preset serial equipment status register
Offset address.
S302, determine whether the base address for successfully getting the controller of preset serial equipment and preset serial equipment
Status register offset address.If so, S303 is executed, if it is not, then terminating process.
S303, the format of Debugging message is converted into hexadecimal integer, the Debugging message after being converted.
The data of the jth position of Debugging message after S304, determining conversion.
S305, determine whether j is greater than or equal to 0.If so, S306 is executed, if it is not, then terminating process.
S306, determine whether the fifo register of serial equipment is in no data state.If so, S307 is executed, if it is not,
It then returns and executes S306.
When having data in the fifo register of serial equipment, CPU can also postpone after waiting preset duration, then execute
S306 can specifically be determined according to the configuration of operating system.
Jth position data are written in fifo register by S307, the base address according to fifo register.
S308, j is subtracted 1.
After having executed S308, returns and execute S305.
It should be noted that the minimum value of j is 0 when executing above-mentioned process.
By taking Debugging message is number 65 as an example, in the present embodiment, above-mentioned CPU can be with call format transfer function, by this
Number is converted to hexadecimal integer.Wherein, format transfer function mentioned here can for it is any can be in serial equipment
The function that can be run before initialization, such as Sprintf function etc. specifically may refer to existing format transfer function, right
This is repeated no more.In this example, number 65 is converted to hexadecimal integer 0x41.
CPU can determine the non-zero number of highest order in 0x41 after number 65 is converted to hexadecimal integer 0x41
According to for x, that is to say, that CPU is needed the previous position 0 of x to all data between lowest order 1 according to suitable from a high position to low level
Sequence is sequentially written in fifo register.Under the scene, CPU can determine that the initial value of j is 3.J is equal to number corresponding when 3
According to being 0.Then, CPU can first judge whether j is greater than or equal to 0, to determine whether to complete 0x41 (the debugging letter after converting
Breath) output.When determining that j is greater than or equal to 0, CPU can be in no data shape in the fifo register for determining serial equipment
When state, the highest order (i.e. 0) of 0x41 (Debugging message after converting) is written in fifo register, to be incited somebody to action by serial equipment
0 output.
Then, j can be subtracted 1 by CPU, i.e. when j is equal to 2, judge whether j is greater than or equal to 0 again.When determine j be greater than or
When equal to 0, CPU can be when the fifo register for determining serial equipment be in no data state, by the 0x41 (tune after converting
Try information) second (i.e. x) be written fifo register in, x to be exported by serial equipment.
It is recycled with this, after completing the output of the 0th (i.e. 1) of 0x41 (convert after Debugging message), CPU can be with
J is subtracted 1, i.e. j is equal to -1.At this point, CPU determines the output that 0x41 is completed by S305.Under the scene, the stream can be exited
Journey, and return to the message that output is completed.So far, CPU completes Debugging message by serial equipment in operating system initialization
Output.
Continue by taking number 65 as an example, optionally, in some embodiments, above-mentioned CPU can be taken by being divided by with 16 65
Number 65 is converted to hexadecimal from the decimal system by remaining mode.Specifically, CPU can be by being divided by remainder to 65 and 16
Mode determines the 0th value 1 of hexadecimal number.Then, the integer 4 for the quotient that 65 and 16 can be divided by by CPU is as calculating
1st dividend of hexadecimal number.That is, being divided by the mode of remainder to 4 and 16, taking for the 1st of hexadecimal number is determined
Value 4.Then, the integer 0 for the quotient that 4 and 16 can be divided by by CPU is as the 2nd dividend for calculating hexadecimal number.At this point,
Since dividend has been 0, illustrate the 2nd of hexadecimal number until the value of highest order is 0.That is, number 65 16 into
Number processed is 00000000000041.It should be noted that the specific digit of hexadecimal number 00000000000041 can basis
Requirement of the operating system to the digit of number determines.
In this case, CPU can carry out x and subtract the operation that a adds 10, regard the result 33 of the operation as hexadecimal number
The 2nd value, obtain hexadecimal number 000000000003341.Due to the hexadecimal number 000,000,000,003,341
3 are 0 to highest order, illustrate that the 2nd value 33 of hexadecimal number is the hexadecimal non-zero data of highest order, that is,
CPU is needed the previous position (the 3rd) of the 2nd value 33 to the data output data of lowest order.At this point, CPU can determine j
Initial value be 3.Under the scene, CPU can first export j equal to data corresponding to 3.I.e. the 3rd data.In output the
When 3 data, it can first judge whether the 3rd data are greater than or equal to 10, if it is not, then CPU can be set determining serial ports
When standby fifo register is in no data state, the 3rd data (i.e. 0) is written in fifo register, to pass through serial ports
Equipment is exported 0.
Then, j can be subtracted 1 by CPU, i.e. when j is equal to 2, judge whether j is greater than or equal to 0 again.When determine j be greater than or
When equal to 0, CPU can further judge whether the 2nd data are greater than or equal to 10.Since the 2nd data 33 are greater than 10,
Therefore, CPU, can be by the 2nd data (i.e. 33) and a when the fifo register for determining serial equipment is in no data state
Addition subtracts 10 again, and obtained data (x) are written in fifo register, to be exported x by serial equipment.It is recycled with this, directly
To the output for completing 0x41 (Debugging message after converting).It in this way, can also be in CPU in operating system initialization
When, the output of Debugging message is completed by serial equipment.It is of course also possible to use existing others mode, passes through serial ports
Equipment completes the output of Debugging message, will not enumerate to this.
Optionally, in some embodiments, before step S301 can also be performed in CPU, judge whether to have got default
Serial equipment controller base address and preset serial equipment status register offset address.If so, executing
S303, if it is not, then executing S301.In this way, the efficiency that CPU exports digital (i.e. Debugging message) can be improved.
By the above-mentioned means, making computer in device drives initial phase, number can also be exported by serial equipment
The Debugging message of word, so that developer is in device drives initial phase, it can also be based on the Debugging message pair of number
Operating system checks failure, positioning failure etc., extends the usage scenario of Debugging message output method of the invention, also improves
The development efficiency of operating system.
Debugging message output method provided by the invention, by presetting the base address of the controller of serial equipment and presetting string
The mode of the offset address of the status register of jaws equipment, so that the shadow that the output of Debugging message is not initialized by device drives
It rings, that is, computer can export Debugging message in device drives initial phase or by serial equipment, so that opening
Hair personnel can also mention in device drives initial phase based on Debugging message to operating system investigation failure, positioning failure etc.
The high development efficiency of operating system.
In the prior art, the CPU for running the computer of vxWorks operating system is calling Printf function output debugging letter
It when breath, needs for Debugging message to be output to TTY layers, if current TTY layers of buffer area has been expired, the defeated of Debugging message can be blocked
Out.In this case it is necessary to Debugging message could be output to TTY until TTY layers of buffer area is there are when free space
Layer, the case where causing the output of Debugging message to postpone.Therefore, the computer for running vxWorks operating system can not be
Debugging message is exported using Printf function in interruption.
And Debugging message output method provided by the present invention, due to can directly be write to the fifo register of serial equipment
The case where entering Debugging message to be output, postponing there is no the output of Debugging message.Therefore, it can be used in interruption
Debugging message output method provided by the present invention exports Debugging message, so that developer is during interrupt processing,
Malfunction elimination, positioning failure etc. can be carried out to operating system based on Debugging message, improve the development efficiency of operating system.
Correspondingly, the CPU for running the computer of vxWorks operating system is calling LogMsg function to export Debugging message
When, since the priority of the task tLogTask in vxWorks operating system is very high, (such as the priority of task tLogTask is only
Inferior to the priority of interruption), therefore, when priority is far below the task (such as user task usrTask) of task tLogTask
When calling LogMsg function output Debugging message, CPU can preferentially execute task tLogTask.By taking user task usrTask as an example,
When executing task tLogTask, task usrTask can wait in line CPU in the ready task queue of CPU.CPU is being executed
After task tLogTask, it can be executed first task since ready task queue.Due to appointing in ready task queue
Business is ranked up according to priority, if the task in ready task queue there are multiple priority higher than task usrTask,
The low task usrTask of priority needs to wait could for a long time be executed by CPU, and task usrTask is caused to block in a short time.
Therefore, the computer of vxWorks operating system is run when using LogMsg function output Debugging message, and easy choke system is appointed
Business.
And Debugging message output method provided by the present invention, due to can directly be write to the fifo register of serial equipment
The case where entering Debugging message to be output, being not in choke system task ensure that the execution of system task.
In addition, though how the embodiment of the present invention can use computer by taking the scene of device drives initialization as an example
Aforesaid way exports Debugging message by serial equipment, is illustrated and introduces.But it will be appreciated by those skilled in the art that
, the above method is readily applicable to the scene that computer debugs the operating system of operation, and, to being mounted on meter
The scene that application on calculation machine is debugged, no longer repeats this one by one.
Those of ordinary skill in the art will appreciate that: realize that all or part of the steps of above method embodiment can pass through
The relevant hardware of program instruction is completed, and program above-mentioned can be stored in a computer readable storage medium, the program
When being executed, step including the steps of the foregoing method embodiments is executed；And storage medium above-mentioned includes: ROM, RAM, magnetic disk or light
The various media that can store program code such as disk.
Fig. 4 is a kind of structural schematic diagram of Debugging message output device provided by the invention.The Debugging message output device
The some or all of of computer can be implemented in combination with by software, hardware or both.As shown in figure 4, the Debugging message
Output device may include: that the first acquisition module 11, second obtains module 12 and writing module 13.Wherein,
First obtains module 11, for obtaining the base of the controller of preset serial equipment in operating system initialization
The offset address of the status register of address and the preset serial equipment；
Second obtains module 12, for accessing the status register according to the base address and the offset address, obtains
Take the state of the fifo fifo register of the serial equipment；
Writing module 13 is used for when the fifo register is in no data state, according to the base of the fifo register
Debugging message is written in the fifo register for address, so that the fifo register exports the Debugging message, it is described
The base address of fifo register is determined according to the base address of the controller.
Optionally, in some embodiments, first module 11 is obtained, is specifically used for reading preset in the operating system
List of devices, and the identification information of the serial port and the serial equipment connected according to the serial equipment are set described in traversal
Standby list, obtains the offset address of the base address of the controller of the serial equipment and the status register of the serial equipment,
Wherein, the list of devices is stored with the control of the identification information for the equipment being connected in each serial port, equipment
The base address of device, the offset address of the status register of equipment corresponding relationship.
Optionally, in some embodiments, when Debugging message is character string, writing module 13 is specifically used for according to
The base address of fifo register is sequentially written in described by the character in the character string according to from low level to high-order sequence
In fifo register.
Optionally, in some embodiments, when Debugging message is number, above-mentioned apparatus can also include:
Processing module 14 accesses institute according to the base address and the offset address for obtaining module 12 described second
Status register is stated, before the state for obtaining the fifo register of the serial equipment, the format of the Debugging message is converted
Debugging message for hexadecimal integer, after being converted.Then under the scene, writing module 13 is specifically used for according to
The base address of fifo register, behind the previous position to the conversion of the non-zero data of highest order in the Debugging message after the conversion
Debugging message lowest order between all data according to the sequence from a high position to low level, be sequentially written in the fifo register
In.
Debugging message output device provided by the invention, can execute above method embodiment, realization principle and technology
Effect is similar, and details are not described herein.
Fig. 5 is the structural schematic diagram of another Debugging message output device provided by the invention.As shown in figure 5, the debugging
Information output apparatus may include: at least one processor 21 and memory 22.Fig. 5, which is shown, to be taken a processor as an example
Debugging message output device, wherein
Memory 22, for storing program.Specifically, program may include program code, and said program code includes meter
Calculation machine operational order.Memory 22 may include high speed RAM memory, it is also possible to further include nonvolatile memory (non-
Volatile memory), a for example, at least magnetic disk storage.
Processor 21 is used to execute the computer executed instructions that the memory 22 stores, to realize in above-described embodiment
Debugging message output method, it is similar that the realization principle and technical effect are similar, and details are not described herein.
Wherein, processor 21 may be a central processing unit (Central Processing Unit, referred to as CPU),
Either specific integrated circuit (Application Specific Integrated Circuit, referred to as ASIC), either
It is configured to implement one or more integrated circuits of the embodiment of the present invention.
Optionally, in specific implementation, if communication interface, memory 22 and the independent realization of processor 21, communication connect
Mouth, memory 22 and processor 21 can be connected with each other by bus and complete mutual communication.The bus can be work
Industry standard architecture (Industry Standard Architecture, referred to as ISA) bus, external equipment interconnection
(Peripheral Component, referred to as PCI) bus or extended industry-standard architecture (Extended Industry
Standard Architecture, referred to as EISA) bus etc..The bus can be divided into address bus, data/address bus, control
Bus processed etc., it is not intended that an only bus or a type of bus.
Optionally, in specific implementation, if communication interface, memory 22 and processor 21 are integrated real on one chip
It is existing, then communication interface, memory 22 and processor 21 can be completed by internal interface it is identical between communication.
The present invention also provides a kind of computer readable storage medium, which may include: U
Disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access
Memory), the various media that can store program code such as disk or CD.Specifically, the computer readable storage medium
In be stored with program instruction, program instruction is for the method in above-described embodiment.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (12)
1. a kind of Debugging message output method characterized by comprising
In operating system initialization, obtain the controller of preset serial equipment base address and the preset serial equipment
Status register offset address；
The status register is accessed according to the base address and the offset address, obtains the first in first out of the serial equipment
The state of fifo register；
When the fifo register is in no data state, according to the base address of the fifo register, Debugging message is write
Enter in the fifo register, so that the fifo register exports the Debugging message, the base address of the fifo register
It is determined according to the base address of the controller.
2. the method according to claim 1, wherein obtain the controller of preset serial equipment base address and
The offset address of the status register of the preset serial equipment, comprising:
Read preset list of devices in the operating system；Wherein, the list of devices, which is stored with, is connected to each serial port
On the identification information of equipment, the base address of controller of equipment, equipment status register offset address corresponding relationship；
The identification information of the serial port and the serial equipment that are connected according to the serial equipment, traverses the list of devices,
Obtain the offset address of the base address of the controller of the serial equipment and the status register of the serial equipment.
3. method according to claim 1 or 2, which is characterized in that the Debugging message is character string；It is described according to
Debugging message is written in the fifo register for the base address of fifo register, comprising:
According to the base address of the fifo register, by the character in the character string according to from low level to high-order sequence, according to
In the secondary write-in fifo register.
4. method according to claim 1 or 2, which is characterized in that the Debugging message is number；
It is described that the status register is accessed according to the base address and the offset address, obtain the FIFO of the serial equipment
Before the state of register, the method also includes:
The format of the Debugging message is converted into hexadecimal integer, the Debugging message after being converted；
The base address according to the fifo register, Debugging message is written in the fifo register, comprising:
According to the base address of the fifo register, by the previous position of the non-zero data of highest order in the Debugging message after the conversion
All data between the lowest order of Debugging message after to the conversion are sequentially written in institute according to the sequence from a high position to low level
It states in fifo register.
5. method according to claim 1 or 2, which is characterized in that the base address of the fifo register and the control
The base address of device is identical.
6. a kind of Debugging message output device, which is characterized in that described device includes:
First obtains module, in operating system initialization, obtain the controller of preset serial equipment base address and
The offset address of the status register of the preset serial equipment；
Second obtains module, for accessing the status register according to the base address and the offset address, described in acquisition
The state of the fifo fifo register of serial equipment；
Writing module is used for when the fifo register is in no data state, will according to the base address of the fifo register
Debugging message is written in the fifo register, so that the fifo register exports the Debugging message, the FIFO deposit
The base address of device is determined according to the base address of the controller.
7. device according to claim 6, which is characterized in that described first obtains module, is specifically used for reading the behaviour
Make preset list of devices in system, and the mark of the serial port and the serial equipment connected according to the serial equipment is believed
Breath, traverses the list of devices, obtains the base address of the controller of the serial equipment and the Status register of the serial equipment
The offset address of device；
Wherein, the list of devices is stored with the controller of the identification information of the equipment being connected in each serial port, equipment
Base address, equipment status register offset address corresponding relationship.
8. device according to claim 6 or 7, which is characterized in that the Debugging message is character string；The writing module,
Specifically for the base address according to the fifo register, by the character in the character string according to from low level to the suitable of a high position
Sequence is sequentially written in the fifo register.
9. device according to claim 6 or 7, which is characterized in that the Debugging message is number；
Described device further include:
Processing module is posted for accessing the state according to the base address and the offset address in the second acquisition module
Storage, before the state for obtaining the fifo register of the serial equipment, by the format of the Debugging message be converted to 16 into
Integer processed, the Debugging message after being converted；
The writing module, specifically for the base address according to the fifo register, by the Debugging message after the conversion most
All data between the lowest order of Debugging message behind the previous position to the conversion of high-order non-zero data are according to from a high position to low
The sequence of position, is sequentially written in the fifo register.
10. device according to claim 6 or 7, which is characterized in that the base address of the fifo register and the control
The base address of device is identical.
11. a kind of Debugging message output device characterized by comprising at least one processor and memory；
The memory stores computer executed instructions；At least one described processor executes the computer of the memory storage
It executes instruction, to execute method according to any one of claims 1 to 5.
12. a kind of computer readable storage medium, which is characterized in that be stored with program in the computer readable storage medium and refer to
It enables, described program instruction realizes method of any of claims 1-5 when being executed by processor.
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