CN110399324A - It interrupts converter and interrupts conversion method - Google Patents
It interrupts converter and interrupts conversion method Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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Abstract
The embodiment of the present invention, which provides, interrupts converter and interrupts conversion method, to realize the interrupt type conversion of the intermodule of different interrupt types.Above-mentioned interruption converter includes that register module, information comparison module and INT interrupt generation module；INT interrupts the interrupt interface that generation module has the second peripheral apparatus of connection, and interrupt interface corresponds to unique interrupt number.Wherein: register module is used for storage configuration information；Configuration information includes the first corresponding relationship of MSI number and interrupt number, and, the corresponding interrupt mode of interrupt number；Information comparison module is used for: receiving the MSI interrupt of the first peripheral apparatus, the MSI of MSI interrupt is numbered and is matched with the first corresponding relationship；If successful match, notice INT interrupts the target interrupt number and target interrupt mode of generation module successful match；INT interrupts generation module and is used for: INT generated according to target interrupt mode and is interrupted, output to the corresponding interrupt interface of target interrupt number.
Description
Technical field
The present invention relates to field of computer technology, in particular to interruption converter and interruption conversion method.
Background technique
As isomery accelerates increasingly extensive application, based on FPGA, (Field-Programmable Gate Array shows
Field programmable gate array) accelerator card also quickly grow, for example, DMA (Direct Memory Access, direct memory access)
Controller, MAC (MediaAccess Control Address, media access control address) controller can all be added based on FPGA
Speed card is realized.
FPGA accelerator card is connect by PCI-E interface with server host (host), and host will be needed by PCIE interface
Accelerate the data of processing to be sent to FPGA accelerator card, relevant number is returned to by PCI-E interface after the completion of the processing of FPGA accelerator card
According to.
It has a large amount of interrupt in above-mentioned acceleration treatment process to generate, FPGA accelerator card passes through PCI-E interface to host
The interruption of transmission is MSI (Message Signaled Interrupt, message signal interrupt).In addition to MSI interrupt, figure is referred to
1, it is traditional to pass through signal that the external equipment (such as sensor, house dog etc.) that connect with server host, which commonly uses interrupt type,
Line level or interruption (INT interruption) along triggering.
In actual operation, it can be potentially encountered the associated situation of different types of module: for example, a certain sensor conduct
The downstream module of dma controller, the MSI interrupt that dma controller issues will also be triggered in addition to upload to host by PCI-E
The operation of downstream module progress next step.But the interruption that downstream module can identify is that INT is interrupted, interrupt type is different, will
Cause to exchange mutually relatively difficult.
Summary of the invention
It interrupts converter in view of this, the embodiment of the present invention provides and interrupts conversion method, to realize different interrupt types
Intermodule interrupt type conversion.
To achieve the above object, the embodiment of the present invention provides the following technical solutions:
A kind of interruption converter, including register module, information comparison module and INT interrupt generation module；The information
Comparison module is connected with the first peripheral apparatus for generating MSI interrupt, and the INT, which interrupts generation module, has interrupt interface, institute
It states interrupt interface and corresponds to unique interrupt number, the interrupt interface is for connecting the second peripheral apparatus, second peripheral apparatus
Interrupt type be INT；
Wherein:
The register module is used for storage configuration information；The configuration information includes: the MSI of first peripheral apparatus
First corresponding relationship of number and interrupt number, and, the corresponding interrupt mode of interrupt number；The interrupt mode includes level interrupt
Or along interruption；
The information comparison module is used for: receiving the MSI interrupt of the first peripheral apparatus, the MSI of the MSI interrupt is numbered
It is matched with the first corresponding relationship of register module storage；If successful match, the INT is notified to interrupt generation module
The target interrupt number and target interrupt mode of successful match；
The INT interrupts generation module and is used for: INT generated according to the target interrupt mode and is interrupted, output to the mesh
Mark the corresponding interrupt interface of interrupt number.
Optionally, the configuration information further includes mask information, the mask information be used to indicate MSI number be not required into
Row interrupts the second corresponding relationship between the interrupt number of conversion.
Optionally, the information comparison module is also used to: if matching is unsuccessful, or the MSI of the MSI interrupt received is compiled
Number match with the interrupt number in mask information, then terminates work.
Optionally, the interruption converter is realized based on FPGA board.
Optionally, the interruption converter is encapsulated as intellectual property IP packet.
A kind of interrupt method, based on converter is interrupted, the interruption converter includes register module, information comparison module
Generation module is interrupted with INT；The information comparison module is connected with the first peripheral apparatus for generating MSI interrupt, in the INT
Disconnected generation module has interrupt interface, and the interrupt interface corresponds to unique interrupt number, and the interrupt interface is for connecting second
Peripheral apparatus, the interrupt type of second peripheral apparatus are INT；The register module is used for storage configuration information；It is described
Configuration information includes: the first corresponding relationship of the MSI number and interrupt number of first peripheral apparatus, and, interrupt number is corresponding
Interrupt mode；The interrupt mode includes level interrupt or along interruption；
The described method includes:
The information comparison module receives the MSI interrupt of the first peripheral apparatus, by the MSI number of the MSI interrupt and institute
The first corresponding relationship for stating register module storage is matched；If successful match, the INT is notified to interrupt generation module matching
Successful target interrupt number and target interrupt mode；
The INT interrupts generation module and generates INT interruption according to the target interrupt mode, and output to the target is interrupted
Number corresponding interrupt interface.
Optionally, the configuration information further includes mask information, the mask information be used to indicate MSI number be not required into
Row interrupts the second corresponding relationship between the interrupt number of conversion；The method also includes: if matching is unsuccessful, or receive
The MSI number of MSI interrupt matches with the interrupt number in mask information, then terminates work.
Optionally, the interruption converter is realized based on FPGA board.
Optionally, the interruption converter is encapsulated as intellectual property IP packet.
As it can be seen that in embodiments of the present invention, converter is interrupted after the MSI interrupt for receiving the first peripheral apparatus, it can root
MSI interrupt is converted to INT according to configuration information to interrupt, output to corresponding interrupt interface.Interrupt interface with interrupt type is again
The second peripheral apparatus of INT connects, and interrupts the INT that MSI interrupt is converted into the second peripheral apparatus to realize, facilitates not
With the exchange between the module of interrupt type.
Detailed description of the invention
Fig. 1 is the hardware structure schematic diagram provided in an embodiment of the present invention comprising different interrupt type modules；
Fig. 2 is the hardware structure schematic diagram provided in an embodiment of the present invention comprising interrupting converter；
Fig. 3 is the exemplary block diagram provided in an embodiment of the present invention for interrupting converter；
Fig. 4 is interruption conversion method exemplary process diagram provided in an embodiment of the present invention.
Specific embodiment
For the sake of quoting and understanding, hereafter used in technical term, write a Chinese character in simplified form or abridge and be summarized as follows:
BMC:Baseboard Management Controller, baseboard management controller；
FPGA:Field-Programmable Gate Array, field programmable gate array；
PCI:Peripheral Component Interconnect, Peripheral Component Interconnect standard；
PCI-E:PCI Express, a kind of high speed serialization computer expansion bus standard；
DMA:Direct Memory Access, direct memory access；DMA allows the hardware device of friction speed to carry out ditch
It is logical, a large amount of interrupt loads without depending on CPU；
MAC:MediaAccess Control Address, media access control address；
Avalon-MM: by the interface of the memory map type of the intel Avalon bus proposed；
Avalon-ST: by the stream mode interface of the intel Avalon bus proposed；
TLP:Transaction Layer Package, the transaction layer data packet in PCIE agreement；
INT:interrupt, conventional interrupt, by signal level or along triggering；
MSI:Message Signaled Interrupt message signal interrupt, by write the fixing address space of PCIE come
Triggering is interrupted, and is PCIE internal interrupt mechanism, is different from traditional INT and is interrupted.
The embodiment of the present invention, which provides, interrupts converter and interrupts conversion method, to realize the intermodule of different interrupt types
Interrupt type conversion.
Above-mentioned interruption converter is hardware configuration, and Fig. 2 shows the FPGA hardware modular systems comprising interrupting converter
A kind of exemplary structure, the first peripheral apparatus, such as dma controller 1, mac controller 2 pass through PCI-E interface 3 and host
(host) 4 are connected.
And converter 5 is interrupted as the device newly added, it can be realized based on FPGA board (logic).With dma controller 1, MAC
First peripheral apparatus of the producible MSI interrupt such as controller 2 is connected, and passes through interrupt interface and one or more second peripheral hardwares
Equipment is connected.
Each interrupt interface all corresponds to a unique interrupt number.
The interrupt type of second peripheral apparatus is INT, exemplary can include: house dog, sensor, BMC etc..
The configuration information from host side can be received by interrupting converter, then according to configuration information and the first peripheral apparatus
MSI interrupt information, generate the INT interrupt output of corresponding interrupt interface to corresponding second peripheral apparatus.
As it can be seen that in embodiments of the present invention, converter is interrupted after the MSI interrupt for receiving the first peripheral apparatus, it can root
MSI interrupt is converted to INT according to configuration information to interrupt, output to corresponding interrupt interface.Interrupt interface with interrupt type is again
The second peripheral apparatus of INT connects, and interrupts the INT that MSI interrupt is converted into the second peripheral apparatus to realize, facilitates not
With the exchange between the module of interrupt type.
It should be noted that existing processing mode is, additionally it is added and generates in the up-stream module for generating MSI interrupt
The logic that INT is interrupted, in this way, up-stream module while generating MSI interrupt, generates INT interrupt output to downstream module；Or
INT interruption is not exported, directly in inside modules by interrupt processing.
Due to logic that can not be general, so during accelerator card relevant FPGA development and application, if encountered
The associated situation of different type interrupt module, it is necessary to modify the logic of original module, while also to increase the port of module
Signal, to export INT interruption.
And in embodiments of the present invention, interruption converter can be packaged into independent use of intellectual property (IP) packet and (be appreciated that
For general module), so there is no need to modify the internal logic of original module and port signal, portable and reusability is all big
Big enhancing, can call directly in project development, provide convenience for the exploitation of product, shorten the development cycle.
Fig. 3 shows the internal structure for interrupting converter, can include: register module 51,52 and of information comparison module
INT interrupts generation module 53；Wherein, information comparison module 51 is connected with the first peripheral apparatus above-mentioned, and INT is interrupted and generated
Module 53 has interrupt interface, and interrupt interface is connected with the second peripheral apparatus that interrupt type is INT.
Second peripheral apparatus generally will not at will change after connecting with interrupt interface, and therefore, interrupt number is interrupted in addition to representing
Interface, it is also contemplated that representing a certain specific second peripheral apparatus.
Each module effect is as follows:
Register module 51 is used for storage configuration information；
Configuration information can include: the first corresponding relationship of the MSI number and interrupt number of the first peripheral apparatus, and, it interrupts
Number corresponding interrupt mode (level interrupt or along interrupt)；
The module of each producible MSI interrupt can all distribute unique MSI number, and having addressed before the second peripheral apparatus can
It is indicated with interrupt number.Therefore, pass through the first corresponding relationship and the corresponding interrupt mode of interrupt number, it is to be understood that a certain MSI number
The INT interruption that MSI interrupt to be converted is to be exported along interruption or level interrupt by which interrupt interface.
For example, the MSI number of mac controller 2 is corresponding with interrupt number A, and the second peripheral apparatus of interrupt number A connection is
House dog, corresponding interrupt mode are along interruption.The then MSI interrupt that mac controller issues, will eventually be converted into pulse
(corresponding along interruption), is transmitted to house dog.
In one example, MSI number specifically includes the address that can trigger MSI interrupt and data.
Information comparison module 52 is used for: the MSI interrupt of the first peripheral apparatus is received, by the MSI number of MSI interrupt and deposit
The first corresponding relationship that device module 51 stores is matched；
If successful match, notice INT interrupts the target interrupt number and target interrupt mode of 53 successful match of generation module；
Still by taking mac controller 2 as an example, it is assumed that its MSI numbers corresponding interrupt number A, then information comparison module 52 is receiving
After the MSI interrupt of mac controller 2, it can be matched with the first corresponding relationship, obtained target interrupt number is " A ", target
Interrupt mode is " interrupting on edge ".
INT interrupts generation module 53 and is used for: INT generated according to target interrupt mode and is interrupted, output to target interrupt number pair
The interrupt interface answered triggers the relevant operation for the second peripheral apparatus connecting with interrupt interface.
Precedent is continued to use, INT, which interrupts generation module 53, will generate pulse as INT interruption, export the interruption for being A to interrupt number
Interface, namely export to house dog.
The case where being " level interrupt " for interrupt mode, INT, which interrupts generation module 53, can then draw high respective interrupt interface
Output level.
In other embodiments of the present invention, above-mentioned configuration information may also include mask information, and mask information is used to indicate MSI
Number and be not required to the second corresponding relationship between the interrupt number for carrying out interrupting conversion.
Then above- mentioned information comparison module 52 can also be used in:
If matching is unsuccessful, or the MSI number of the MSI interrupt received matches with the interrupt number in mask information,
Work is then terminated, does not send INT interruption.
Fig. 4 shows a kind of exemplary flow of the interruption conversion method as performed by relay, comprising:
S0:host is prepared work；
In one example, the preparation of host can include:
Configuration information related with MSI in PCI-E is obtained by lspci order, above-mentioned configuration information includes MSI number
Then first corresponding relationship of MSI number and interrupt number is written and is interrupted by (such as address and the data that can trigger MSI interrupt)
The register module 51 of converter, while register module 51 is also written into various other interruption masking information.
It should be noted that host may support more than one application, and different applications may correspond to different configurations
Before executing using A register module 51 can be written in the corresponding configuration information of application A by information, for example, host, and
Before executing using B, register module 51 can be written in the corresponding configuration information of application B.
Mask information carries out human configuration according to the actual demand of application.
S1: information comparison module 52 receives the MSI interrupt of the first peripheral apparatus, by the MSI number and register of MSI interrupt
The configuration information matching that module 51 stores；
By taking DAM controller as an example, DAM can generate MSI interrupt after having removed data, and information comparison module 52 receives in the MSI
Disconnected information, the configuration information that can be stored with register module 51 are compared, if the MSI interrupt and peripheral hardware INT interruption all do not have
Have and shielded, then generates the interrupt number of INT interruption.
The introduction of configuration information refers to record described previously herein, and therefore not to repeat here.
S2: if MSI number and the first corresponding relationship successful match, notice INT interrupt the target of generation module successful match
Interrupt number and target interrupt mode.
Citing described previously herein is referred to, therefore not to repeat here.
S3: if matching is unsuccessful, or matches with the interrupt number in mask information, then work is terminated.
Record described previously herein is referred to, therefore not to repeat here.
S4:INT interrupts generation module 53 and generates INT interruption according to target interrupt mode, and output is corresponding to target interrupt number
Interrupt interface.
Professional further appreciates that, unit described in conjunction with the examples disclosed in the embodiments of the present disclosure
And model step, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware and
The interchangeability of software generally describes each exemplary composition and step according to function in the above description.These
Function is implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Profession
Technical staff can use different methods to achieve the described function each specific application, but this realization is not answered
Think beyond the scope of this invention.
The step of method described in conjunction with the examples disclosed in this document or model, can directly be held with hardware, processor
The combination of capable software module or the two is implemented.Software module can be placed in random access memory (RAM), memory, read-only deposit
Reservoir (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, WD-ROM or technology
In any other form of storage medium well known in field.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
Claims (9)
1. a kind of interruption converter, which is characterized in that interrupt generation module including register module, information comparison module and INT；
The information comparison module is connected with the first peripheral apparatus for generating MSI interrupt, and the INT, which interrupts generation module, has interruption
Interface, the interrupt interface correspond to unique interrupt number, and the interrupt interface is for connecting the second peripheral apparatus, outside described second
If the interrupt type of equipment is INT；
Wherein:
The register module is used for storage configuration information；The configuration information includes: the MSI number of first peripheral apparatus
With the first corresponding relationship of interrupt number, and, the corresponding interrupt mode of interrupt number；The interrupt mode includes level interrupt or edge
It interrupts；
The information comparison module is used for: the MSI interrupt of the first peripheral apparatus is received, by the MSI number of the MSI interrupt and institute
The first corresponding relationship for stating register module storage is matched；If successful match, the INT is notified to interrupt generation module matching
Successful target interrupt number and target interrupt mode；
The INT interrupts generation module and is used for: generating INT according to the target interrupt mode and interrupts, exports into the target
Disconnected number corresponding interrupt interface.
2. interrupting converter as described in claim 1, which is characterized in that the configuration information further includes mask information, described
The second corresponding relationship that mask information is used to indicate MSI number and is not required between the interrupt number for carrying out interrupting conversion.
3. interrupting converter as claimed in claim 2, which is characterized in that the information comparison module is also used to:
If matching is unsuccessful, or the MSI number of the MSI interrupt received matches with the interrupt number in mask information, then eventually
Only work.
4. interrupting converter as claimed in claim 3, which is characterized in that the interruption converter is realized based on FPGA board.
5. interruption converter according to any one of claims 1-4, which is characterized in that the interruption converter is encapsulated as knowing
Know property right IP packet.
6. a kind of interrupt method, which is characterized in that based on converter is interrupted, the interruption converter includes register module, letter
It ceases comparison module and INT interrupts generation module；The information comparison module is connected with the first peripheral apparatus for generating MSI interrupt
It connects, the INT, which interrupts generation module, has interrupt interface, and the interrupt interface corresponds to unique interrupt number, the interrupt interface
For connecting the second peripheral apparatus, the interrupt type of second peripheral apparatus is INT；The register module is matched for storing
Confidence breath；The configuration information includes: the first corresponding relationship of the MSI number and interrupt number of first peripheral apparatus, and,
The corresponding interrupt mode of interrupt number；The interrupt mode includes level interrupt or along interruption；
The described method includes:
The information comparison module receives the MSI interrupt of the first peripheral apparatus, and the MSI of the MSI interrupt is numbered and is posted with described
First corresponding relationship of buffer module storage is matched；If successful match, the INT is notified to interrupt generation module successful match
Target interrupt number and target interrupt mode；
The INT interrupts generation module and generates INT interruption, output to the target interrupt number pair according to the target interrupt mode
The interrupt interface answered.
7. method as claimed in claim 6, which is characterized in that the configuration information further includes mask information, the shielding letter
The second corresponding relationship that breath is used to indicate MSI number and is not required between the interrupt number for carrying out interrupting conversion；
The method also includes:
If matching is unsuccessful, or the MSI number of the MSI interrupt received matches with the interrupt number in mask information, then eventually
Only work.
8. the method for claim 7, which is characterized in that the interruption converter is realized based on FPGA board.
9. such as the described in any item methods of claim 6-8, which is characterized in that the interruption converter is encapsulated as intellectual property
IP packet.
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| CN111078597A (en) * | 2019-12-04 | 2020-04-28 | 江苏芯盛智能科技有限公司 | Interrupt message generation device and method and end equipment |
| CN112711559A (en) * | 2021-01-15 | 2021-04-27 | 天津飞腾信息技术有限公司 | Serial interrupt method, device, serial interrupt processing method and processor |
| WO2022227565A1 (en) * | 2021-04-29 | 2022-11-03 | 上海阵量智能科技有限公司 | Interrupt controller, interrupt control method, chip, computer device, and medium |
| CN115292219A (en) * | 2022-10-10 | 2022-11-04 | 三未信安科技股份有限公司 | System and method for realizing PCIe MSI interruption in RISC-V platform |
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| WO2023165518A1 (en) * | 2022-03-02 | 2023-09-07 | 山东云海国创云计算装备产业创新中心有限公司 | Interrupt message processing method and apparatus, electronic device, and readable storage medium |
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