CN110444141A - Grid drive circuit of display panel and display device - Google Patents

Grid drive circuit of display panel and display device Download PDF

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Publication number
CN110444141A
CN110444141A CN201910564583.3A CN201910564583A CN110444141A CN 110444141 A CN110444141 A CN 110444141A CN 201910564583 A CN201910564583 A CN 201910564583A CN 110444141 A CN110444141 A CN 110444141A
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China
Prior art keywords
voltage
buffer
output end
input terminal
comparator
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CN201910564583.3A
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CN110444141B (en
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熊志
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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Priority to CN201910564583.3A priority Critical patent/CN110444141B/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The application discloses a gate driving circuit of a display panel and a display device. The display panel is provided with a plurality of scanning lines, and the grid driving circuit comprises a multi-stage grid driving sub-circuit, a multi-stage buffer and a plurality of protection circuits; the multi-stage grid driving sub-circuits are connected with the scanning lines in a one-to-one correspondence manner; the multi-stage buffers are respectively arranged in one-to-one correspondence with the grid driving sub-circuits; a plurality of protection circuits provided in one-to-one correspondence with the scanning lines; the protection circuit comprises an error amplification unit, a comparison unit and a control module; the error amplification unit detects and amplifies a voltage difference value between the input end and the output end of the buffer to obtain an error amplification difference voltage; the comparison unit outputs a comparison result signal according to the error amplification difference voltage; and the control module outputs a control signal according to the comparison result signal to control the buffer to be opened or disconnected with the scanning line. The protection circuit can prevent the situation that the grid driving circuit is burnt out due to short circuit between the scanning lines.

Description

A kind of gate driving circuit and display device of display panel
Technical field
This application involves field of display technology more particularly to the gate driving circuits and display device of a kind of display panel.
Background technique
As display panel is towards enlargement, high-res, high-resolution development, and display quality requirement is mentioned Height, high PPI (Pixels Per Inch, the pixel number that per inch is possessed) make signal wire is increasingly thinner, line spacing increasingly It is small, so that the probability that short circuit occurs between signal wire greatly improves.
For example, display panel includes gate driving circuit, it is connected respectively to each scan line of display panel, due to grid Driving circuit needs to be connected to scan line to scan line according to sequential export high level signal or low level signal with control Active switch turns on or off, thus, when short circuit occurs between adjacent scanning lines, then high level voltage signal and low level It is connected between voltage signal, the lower gate driving circuit that works long hours, which exists, burns risk.Thus, how to detect the short of scan line Road problem becomes those skilled in the art's technical problem urgently to be resolved
Summary of the invention
The purpose of the application is to provide the gate driving circuit and display device of a kind of display panel, prevent because scan line it Between short circuit cause gate driving circuit to be burned.
This application discloses a kind of gate driving circuit of display panel, the display panel is provided with multi-strip scanning line, The gate driving circuit includes: multistage gate driving sub-circuit, multi-stage buffer and multiple protection circuits;The multistage grid Drive sub-circuits connect one to one with the scan line;The multistage buffer respectively with the gate driving sub-circuit one by one It is correspondingly arranged, one end is connected to the output end of the gate driving sub-circuit, and the other end is connected to the scan line;It is multiple described Circuit is protected, is arranged in a one-to-one correspondence with the scan line;The protection circuit includes: error amplifying unit, comparing unit and control Molding block;The voltage difference of input terminal and output end that the error amplifying unit detects and amplifies the buffer obtains error Amplified differences voltage;The comparing unit input terminal is connected to the output end of the error amplifying circuit, described in output end connection Control module, the comparing unit receive the error amplified differences voltage, and according to the error amplified differences voltage output Comparison result signal;The control module, input terminal are connected to the output end of the comparing unit, and the control module receives institute Comparison result signal is stated, and control signal is exported to control opening or disconnect the buffer according to the comparison result signal With the connection of the scan line.
Optionally, the error amplifying unit includes: first error amplifier and the second error amplifier;Normal phase input end The input terminal of the buffer is connected, inverting input terminal connects the output end of the buffer, calculates and amplifies the buffer Input terminal and output end voltage difference to export first error amplified differences voltage;The positive of second error amplifier Input terminal connects the output end of the buffer, and inverting input terminal connects the input terminal of the buffer, calculates and amplifies described The output end of buffer and the voltage difference of input terminal are to export the second error amplified differences voltage;The comparing unit includes: First comparator and the second comparator;The normal phase input end of the first comparator is connected to the defeated of the first error amplifier Outlet, to receive the first error amplified differences voltage, output end is connected to the control module;Second comparator Normal phase input end is connected to the output end of second error amplifier to receive the second error amplified differences voltage, exports End is connected to the control module;The first comparator and the inverting input terminal of the second comparator are connected to a predeterminated voltage; The first comparator compares knot according to the comparison result of the first error amplified differences voltage and predeterminated voltage output first Fruit signal gives the control module, and second comparator is according to the ratio of the second error amplified differences voltage and predeterminated voltage Relatively result exports the second comparison result signal to the control module;The control module is exported according to the comparison result signal Control signal is to control opening or disconnect the connection of the buffer and the scan line.
Optionally, the predeterminated voltage meets following formula:
VGL < ADJ < VGH;
Wherein, ADJ is predeterminated voltage, and VGH is the high level voltage of gate driving circuit output, and VGL is the grid The low level voltage of pole driving circuit output.
Optionally, the predeterminated voltage meets following formula:
ADJ=(VGH+VGL)/2.
Optionally, the control module includes or gate device and control unit, described or gate device input terminal are separately connected In the output end of the first comparator and the second comparator;The control terminal of described control unit is connected to described or gate device Output end, input terminal are connected to the output end of the buffer, and output end is connected to the scan line, and described control unit is low Level conducting switch;When having one in the first comparison result signal and the second comparison result signal is high level signal, Then described or gate device exports high-level control signal and disconnects the buffer and the scanning to described control unit to control The connection of line;When the first comparison result signal and the second comparison result signal are low level signal, described or door device Part exports low level control signal to described control unit to control the connection for opening the buffer and the scan line.
Optionally, the control module includes first switch, second switch and control unit;The first switch and second Switch is high level conducting switch, and described control unit is low level conducting switch;The grid of the first switch is connected to institute The output end of first comparator is stated, source terminal connects a high level signal, and drain electrode end is connected to described control unit;Described second The grid of switch connects the output end of second comparator, and source terminal is connected to a high level signal, and drain electrode end is connected to institute State control unit.
Optionally, described control unit includes transmission gate.
Optionally, the buffer includes 2n grades of phase inverter, wherein n is the natural number more than or equal to 1.
Disclosed herein as well is a kind of gate driving circuit of display panel, the display panel is provided with multi-strip scanning Line, the gate driving circuit include: multistage gate driving sub-circuit, multi-stage buffer and protection circuit;The multistage grid Drive sub-circuits connect one to one with the scan line;The multistage buffer respectively with the gate driving sub-circuit one by one It is correspondingly arranged, one end is connected to the output end of the gate driving sub-circuit, and the other end is connected to the scan line;It is multiple described Protection circuit is arranged in a one-to-one correspondence with the scan line;The protection circuit includes: first error amplifier, the amplification of the second error Device, first comparator, the second comparator or gate device and transmission gate;The normal phase input end of the first error amplifier connects The input terminal of the buffer, inverting input terminal connect the output end of the buffer, calculate and amplify the defeated of the buffer Enter the voltage difference of end and output end to export first error amplified differences voltage;Second error amplifier, normal phase input end connect The output end of the buffer is connect, inverting input terminal connects the input terminal of the buffer, calculates and amplifies the buffer The voltage difference of output end and input terminal is to export the second error amplified differences voltage;The normal phase input end of the first comparator It is connected to the output end of the first error amplifier, to receive the first error amplified differences voltage, inverting input terminal connects A predeterminated voltage is connect, output end is connected to the control module;The normal phase input end of second comparator is connected to described For the output end of two error amplifiers to receive the second error amplified differences voltage, inverting input terminal connects the default electricity Pressure, output end are connected to the control module;Described or gate device input terminal is connected to the first comparator and The output end of two comparators, and the first comparison result signal and the second comparison result signal output control letter based on the received Number;The transmission gate receives the control signal, and the connection of the buffer and scan line is opened or disconnected in control;When described When the voltage of buffer input is identical as the voltage of the buffer output end, the first error amplified differences voltage and Two error amplified differences voltages are respectively less than the predeterminated voltage, then described the of the first comparator and the output of the second comparator One comparison result signal and the second comparison result signal are low level, the low level control letter of described or gate device output Number, the transmission gate is opened after receiving the low level control signal, and the buffer is connect with the scan line;When When the voltage of the voltage of the buffer input and the buffer output end is not identical, the first error amplified differences electricity Pressure and the second error amplified differences voltage are respectively less than the predeterminated voltage, then the first comparator and the second comparator export The first comparison result signal and the second comparison result signal are low level, and the output of described or gate device is low level described Signal is controlled, the transmission gate is closed after receiving the control signal of the high level, the buffer and the scan line It disconnects.
Disclosed herein as well is a kind of display device, the gate driving circuit including display panel as described above.
When occurring between adjacent scanning lines short-circuit in display panel, will appear in gate driving circuit high level signal and The case where low level signal is shorted, the case where causing gate driving circuit to burn, and itself is please in gate driving circuit Portion is provided with protection circuit, and protection circuit is arranged between buffer and scan line, and whether the signal for controlling buffer is transferred to In scan line, wherein error amplifying unit obtain buffer input terminal and output end voltage, buffer input terminal with And when output end Non voltage output, error amplifying unit still can work and output error amplified differences voltage, by comparing Show that comparison result signal is output to control module after unit, therefore, in the input terminal no-voltage or output end of buffer When Non voltage output, protection circuit protects gate driving circuit, it is ensured that in input terminal no-voltage or output end no-voltage Output, protection circuit still can work, and the high level signal of a line for preventing gate driving circuit to be connected, which is transferred to, not to be turned on A horizontal scanning line, make low level signal high level signal be shorted, guarantee that gate driving circuit is adequately protected.
Detailed description of the invention
Included attached drawing is used to provide that a further understanding of the embodiments of the present application, and which constitute one of specification Point, for illustrating presently filed embodiment, and with verbal description come together to illustrate the principle of the application.Under it should be evident that Attached drawing in the description of face is only some embodiments of the present application, for those of ordinary skill in the art, is not paying wound Under the premise of the property made is laborious, it is also possible to obtain other drawings based on these drawings.In the accompanying drawings:
Fig. 1 is exemplary the scan line distribution schematic diagram in a kind of display panel;
Fig. 2 is exemplary the scan line short circuit schematic diagram in a kind of display panel;
Fig. 3 is exemplary a kind of schematic diagram of gate driving circuit short circuit;
Fig. 4 is exemplary the schematic diagram that gate driving circuit opens corresponding row;
Fig. 5 is exemplary the schematic diagram that gate driving circuit closes corresponding row;
Fig. 6 is exemplary the waveform diagram that gate driving circuit normally exports;
Fig. 7 is exemplary the waveform diagram of gate driving circuit short circuit output;
Fig. 8 is the display device schematic diagram of one embodiment of the application;
Fig. 9 is the schematic diagram of the gate driving circuit of one embodiment of the application;
Figure 10 is the schematic diagram of the protection circuit of one embodiment of the application;
Figure 11 is another protection circuit schematic diagram of one embodiment of the application;
Figure 12 is the protection circuit schematic diagram of another embodiment of the application.
Wherein, 100, gate driving circuit;110, buffer;111, phase inverter;120, circuit is protected;The amplification of 130 errors Unit;140, comparing unit;150, control module;151, control unit;200, display panel;210, scan line;300, it shows Device.
Specific embodiment
It is to be appreciated that term used herein above, disclosed specific structure and function details, it is only for description Specific embodiment is representative, but the application can be implemented by many alternative forms, be not construed as only It is limited to the embodiments set forth herein.
In the description of the present application, term " first ", " second " are used for description purposes only, and it is opposite to should not be understood as instruction Importance, or implicitly indicate the quantity of indicated technical characteristic.As a result, unless otherwise indicated, " first ", " are defined Two " feature can explicitly or implicitly include one or more of the features;The meaning of " plurality " is two or two More than.Term " includes " and its any deformation, mean and non-exclusive include, it is understood that there may be or addition is one or more that other are special Sign, integer, step, operation, unit, component and/or combination thereof.
In addition, "center", " transverse direction ", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", The term of the orientation or positional relationship of the instructions such as "outside" is that orientation or relative positional relationship based on the figure describe, only Be that the application simplifies description for ease of description, rather than indicate signified device or element must have a particular orientation, It is constructed and operated in a specific orientation, therefore should not be understood as the limitation to the application.
Furthermore unless specifically defined or limited otherwise, term " installation ", " connected ", " connection " shall be understood in a broad sense, example Such as it may be fixed connection or may be dismantle connection, or integral connection;It can be mechanical connection, be also possible to be electrically connected It connects;It can be directly connected, it can also indirectly connected through an intermediary or the connection inside two elements.For ability For the those of ordinary skill in domain, the concrete meaning of above-mentioned term in this application can be understood as the case may be.
Fig. 1 is scan line distribution schematic diagram in display panel, and Fig. 2 is scan line short circuit schematic diagram in display panel, and Fig. 3 is Gate driving circuit short circuit schematic diagram, Fig. 4 are the schematic diagrames that gate driving circuit opens corresponding row;Fig. 5 is gate driving circuit Close the schematic diagram of corresponding row;As shown in Figures 1 to 5, display panel is driven using gate driving circuit as panel scan, institute It states gate driving circuit 100 and is connected to scan line 210 in 200 Display panel area of display panel using buffer 110.Gate driving Circuit 100 is connected with scan line 210, when short circuit occurs between adjacent scanning lines 210, i.e., exists between adjacent scanning lines 210 Guiding path.
As shown in Figure 6 and Figure 7, solid line is the waveform of buffer input output in figure, and dotted line is that buffer output end is defeated Waveform out, Fig. 6 are the waveform diagram that gate driving circuit normally exports, the voltage waveform phase of buffer input and output end Together;Fig. 7 is gate driving circuit short circuit output waveform, wherein when Gn row and the short circuit of Gn+1 horizontal scanning line, Gn row and Gn+1 row are slow The input terminal for rushing device is different from the waveform that output end exports, and when Gn row is opened, the waveform at Gn row output end G ' n is pulled low, The position Gn+1 row corresponding G ' n+1 waveform is raised, and the waveform at Gn remains unchanged;When Gn+1 row is opened, the position G ' n+1 Waveform be pulled low, the waveform at G ' n is raised, and the waveform at Gn+1 remains unchanged, due to gate driving circuit 100 export Voltage is high level voltage signal VGH and low level voltage signal VGL, when there are short-circuit conditions, the high level of Gn row output Voltage signal VGH and the low level voltage signal VGL of Gn+1 row output are shorted, and are caused the gate driving circuit to exist and are burned out Risk
Below with reference to the accompanying drawings it elaborates with optional embodiment to the application.
Fig. 8 is the display device schematic diagram of one embodiment of the application, and Fig. 9 is the gate driving circuit of one embodiment of the application Schematic diagram;As shown in Figure 8 and Figure 9, as the embodiment of the application, a kind of display device 100, including display surface are disclosed The gate driving circuit 100 of plate 200 and display panel 200, gate driving circuit 100 include: multistage gate driving sub-circuit, Multi-stage buffer 110 and multiple protection circuits 120;The multistage gate driving sub-circuit and the scan line 210 correspond Connection;The multistage buffer 110 is arranged in a one-to-one correspondence with the gate driving sub-circuit respectively, and one end is connected to the grid The output end of drive sub-circuits, the other end are connected to the scan line 210;Multiple protection circuits 120 and the scan line 210 are arranged in a one-to-one correspondence;The protection circuit 120 includes: error amplifying unit 130, comparing unit 140 and control module 150; The voltage difference of input terminal and output end that the error amplifying unit 130 detects and amplifies the buffer 110 obtains error Amplified differences voltage;140 input terminal of comparing unit is connected to the output end of the error amplifying circuit, and output end connects institute Control module 150 is stated, the comparing unit 140 receives the error amplified differences voltage, and according to the error amplified differences Voltage output comparison result signal;The input terminal of the control module 150 is connected to the output end of the comparing unit 140, institute It states control module 150 and receives the comparison result signal, and control signal CTRL is exported to control according to the comparison result signal The connection of the buffer 110 and the scan line 210 is opened or disconnected to system.
When occurring short-circuit between adjacent scanning lines 210 in display panel 200, it will appear height in gate driving circuit 100 The case where level signal and low level signal are shorted, gate driving circuit 100 are caused to burn, and the application is in gate driving Circuit 100 is internally provided with protection circuit 120, and protection circuit 120 is arranged between buffer 110 and scan line 210, and control is slow Whether the signal for rushing device 110 is transferred in scan line 210, wherein the input terminal of the acquisition buffer 110 of error amplifying unit 130 With the voltage of output end, in the input terminal and output end Non voltage output of buffer 110, error amplifying unit 130 is still Can work and output error amplified differences voltage, by comparing unit 140 relatively after show that comparison result signal is output to control Therefore molding block 150 in the input terminal no-voltage or output end Non voltage output of buffer 110, protects circuit 120 to grid Pole driving circuit 100 is protected, it is ensured that in input terminal no-voltage or output end Non voltage output, circuit 120 is protected still may be used With work, the high level signal of a line for preventing gate driving circuit 100 to be connected is transferred to a horizontal scanning line 210 of disconnection, makes Low level signal high level signal is shorted, and guarantees that gate driving circuit 100 is adequately protected.Particularly, relative to only setting When setting comparator, and being possible to appear in the input terminal of buffer 110 and output end Non voltage output, comparator is without output Scheme, the scope of application is wider, and accuracy rate is higher.
Figure 10 is the schematic diagram of one embodiment of the application protection circuit 120, as shown in Figure 10, the error amplifying unit 130 include: first error amplifier EA1 and the second error amplifier EA2;The normal phase input end of first error amplifier EA1 connects The input terminal of the buffer 110 is connect, inverting input terminal connects the output end of the buffer 110, calculates and amplifies described slow The input terminal of device 110 and the voltage difference of output end are rushed to export first error amplified differences voltage;The second error amplification The normal phase input end of device EA2 connects the output end of the buffer 110, and inverting input terminal connects the input of the buffer 110 End calculates and amplifies the output end of the buffer 110 and the voltage difference of input terminal to export the second error amplified differences electricity Pressure;
The comparing unit 140 includes: first comparator COMP1 and the second comparator COMP2;The first comparator The normal phase input end of COMP1 is connected to the output end of the first error amplifier EA1, poor to receive the first error amplification Threshold voltage, output end are connected to the control module 150;The normal phase input end of the second comparator COMP2 is connected to described For the output end of second error amplifier EA2 to receive the second error amplified differences voltage, output end is connected to the control Module 150;The inverting input terminal of the first comparator COMP1 and the second comparator COMP2 are connected to a predeterminated voltage ADJ; The first comparator COMP1 is according to the comparison result of the first error amplified differences voltage and predeterminated voltage ADJ output the One comparison result signal gives the control module 150, and the second comparator COMP2 is according to the second error amplified differences electricity The comparison result of pressure and predeterminated voltage ADJ export the second comparison result signal to the control module 150;The control module 150 control signal CTRL exported according to the comparison result signal with control opening or disconnect the buffer 110 with it is described The connection of scan line 210.
The opposite position of the detection buffer 110 of first error amplifier EA1 and the second error amplifier EA2;Work as buffering When the voltage of the input end position of device 110 is higher than output end position voltage, the calculated voltage of first error amplifier EA1 is positive Property difference voltage, the second calculated voltage of error amplifier EA2 be negativity difference voltage, two difference voltages are output to Comparing unit 140 is compared with predeterminated voltage ADJ, no matter the input terminal voltage of buffer 110 be higher than output end voltage or Output end is higher than input terminal, can have an error amplifier to export a positivity difference voltage.Certainly, the application can be with Using only an error amplifier, error amplifier next stage is provided with absolute value circuit, absolute value circuit receives positivity Normal through will electrically switch to positive polarity when receiving negative voltage, voltage value is constant, then is output to comparing unit when voltage 140。
There are two the settings of comparing unit 140, and the normal phase input end of first comparator COMP1 receives first error amplified differences Voltage is compared with predeterminated voltage ADJ, and the normal phase input end of the second comparator COMP2 receives the second error amplified differences electricity Pressure is compared with predeterminated voltage ADJ, the voltage value phase of first error amplified differences voltage and the second error amplified differences voltage Same but polarity is on the contrary, so at least one difference voltage is less than predeterminated voltage ADJ, therefore first comparator COMP1 and second An output high level comparison result signal in comparator COMP2, another output low level comparison result signal, or export Low level comparison result signal guarantees that any end voltage in 110 both ends of buffer is lower than other end voltage, two comparators In must there is one can export high level comparison result signal, when 110 both end voltage of buffer is equal, two comparators are all defeated Low level comparison result signal out.
Wherein, predeterminated voltage meets following formula:
VGL < ADJ < VGH;
ADJ is predeterminated voltage, and VGH is the high level voltage of the gate driving circuit 100 output, and VGL is the grid The low level voltage that driving circuit 100 exports.Following formula also can be set in certain predeterminated voltage:
ADJ=(VGH+VGL)/2.
Since the voltage that error amplifier obtains is the output end of buffer 110 and the voltage of input terminal, the voltage of output Amplify voltage for the difference of input terminal and output end, so the value of error amplified differences voltage can be defeated in gate driving circuit 100 Between high level voltage and low level voltage out, naturally it is also possible to take median, guarantee that comparator can accurately compare buffering The output end of device 110 and the difference voltage of input terminal, it is ensured that the comparison result signal exported more afterwards is correct.
Control module 150 includes or gate device OR and control unit 151, described or gate device OR input terminal are connected to The output end of the first comparator COMP1 and the second comparator COMP2;The control terminal of described control unit 151 is connected to institute It states or the output end of gate device OR, input terminal is connected to the output end of the buffer 110, output end is connected to the scan line 210, described control unit 151 is low level conducting switch;When the first comparison result signal and the second comparison result signal In have one for high level signal when, then described or gate device OR export high level signal to described control unit 151 with control Disconnect the connection of the buffer 110 and the scan line 210;When the first comparison result signal and the second comparison result are believed When number being low level signal, described or gate device OR export low level to described control unit 151 with control open it is described slow Rush the connection of device 110 Yu the scan line 210.
Be arranged in control module 150 or gate device OR receives the first comparison result signal and the second comparison result signal, As long as or gate device OR receives high-level control signal CTRL will export high-level control signal CTRL accordingly, is only connecing Low level control signal CTRL is exported when the signal of receipts is all low level signal;I.e. in 110 both end voltage difference of buffer, the There must be one accordingly to export in one comparison result signal and the second comparison result signal for high level comparison signal or gate device OR The control signal CTRL of high level then controls signal CTRL and is transferred to the control buffer 110 of control unit 151 and scan line 210 Connect or disconnect.
Figure 11 is another 120 schematic diagram of protection circuit of one embodiment of the application;As shown in figure 11, the control mould of the application Block 150 may be arranged as first switch M1, second switch M2 and control unit 151;The first switch M1 and second switch M2 is high level conducting switch, and described control unit 151 is low level conducting switch;The grid of the first switch M1 is connected to The output end of the first comparator COMP1, source terminal connect a high level signal, and drain electrode end is connected to described control unit 151;The grid of the second switch M2 connects the output end of the second comparator COMP2, and source terminal is connected to a high level Signal, drain electrode end are connected to described control unit 151.The first switch M1 and second switch M2 of the application is N-type switch, i.e., First switch M1 and second switch M2 receives high level signal and opens, and receives low level signal and closes, first switch M1 and second The source terminal of switch M2 all connects a high level, and drain electrode end is all connected to control unit 151, when first switch M1 and second switch When M2 is opened, first switch M1 and second switch M2 exports high level signal and/or the effect of gate device OR is identical.Certainly originally Application other circuits can also be set, with or gate device OR effect it is identical.
Control module 150 further includes having first resistor R1, one end ground connection of first resistor R1, another to terminate at first switch Between the drain electrode end and control unit 151 of M1 and second switch M2, first resistor R1 first switch M1 and second switch M2 all When closing, control unit 151 can be made to receive low level signal, the transmission of high level signal will not be influenced when opening simultaneously To control unit 151.
Unlike a upper embodiment, an error amplifier is used only in the present embodiment, in error amplifier next stage It is provided with absolute value circuit, normal through when receiving negative voltage by electrical property turn when absolute value circuit receives positivity voltage For positive polarity, voltage value is constant, then is output to comparator, and comparator receives positivity difference voltage and predeterminated voltage ADJ is carried out Compare, when positivity difference voltage is greater than predeterminated voltage ADJ, comparator exports high-level control signal CTRL, when positivity difference When voltage is less than predeterminated voltage ADJ, comparator exports low level comparison result signal, and comparison result signal is directly output to control Unit 151 controls connecting or disconnecting for buffer 110 and scan line 210 by control unit 151, and such setting can subtract A few error amplifier, comparator and/or gate device OR, increase an absolute value circuit newly, so that it may realize to buffer 110 The detection of both end voltage.Certain the application is not limited in both embodiments, other modes can also be used to scan line 210 short circuits are protected.
The control unit 151 of the application includes transmitter, and transmission gate TG controls buffer 110 after receiving control signal CTRL With the connection of scan line 210, the connection of buffer 110 and scan line 210 is connected when receiving low level signal, receives high level The connection of buffer 110 and scan line 210 is closed when signal.Third switch can also be arranged in the application, substitute transmission gate TG, Third switch is p-type MOS etc., receives low level signal and opens, and receives high level signal and closes, certainly, the application can also make It is substituted with similar switch, can guarantee that control module 150 is not simultaneously closed off in 110 both end voltage of buffer.
Wherein, buffer 110 includes 2n grades of phase inverters 111, and n is the natural number more than or equal to 1.The application is taken with n Example uses two phase inverters 111, it is ensured that the input terminal of buffer 110 is identical as the voltage that output end exports, and certain n can also To take greater value, it is applicable in.
Figure 12 is 120 schematic diagram of protection circuit of another embodiment of the application;As shown in figure 12, as the another of the application Embodiment, discloses a kind of gate driving circuit 100 of display panel 200, and the display panel 200 is provided with multi-strip scanning line 210, the gate driving circuit 100 includes: multistage gate driving sub-circuit, multi-stage buffer 110 and protection circuit 120;It is more The grade gate driving sub-circuit connects one to one with the scan line 210;The multistage buffer 110 respectively with the grid Pole drive sub-circuits are arranged in a one-to-one correspondence, and one end is connected to the output end of the gate driving sub-circuit, and the other end is connected to institute State scan line 210;Multiple protection circuits 120 are arranged in a one-to-one correspondence with the scan line 210;The protection circuit 120 wraps It includes: first error amplifier EA1, the second error amplifier EA2, first comparator COMP1, the second comparator COMP2 or door device Part OR and transmission gate TG;The normal phase input end of the first error amplifier EA1 connects the input terminal of the buffer 110, instead Phase input terminal connects the output end of the buffer 110, calculates and amplifies the input terminal of the buffer 110 and the electricity of output end Pressure difference is to export first error amplified differences voltage;Second error amplifier EA2, normal phase input end connect the buffer 110 output end, inverting input terminal connect the input terminal of the buffer 110, calculate and amplify the output of the buffer 110 The voltage difference of end and input terminal is to export the second error amplified differences voltage;The positive of the first comparator COMP1 inputs End is connected to the output end of the first error amplifier EA1, to receive the first error amplified differences voltage, anti-phase input One predeterminated voltage ADJ of end connection, output end are connected to the control module 150;The positive of the second comparator COMP2 inputs End is connected to the output end of the second error amplifier EA2 to receive the second error amplified differences voltage, anti-phase input End connects the predeterminated voltage ADJ, and output end is connected to the control module 150;Described or gate device OR input terminal difference It is connected to the output end of the first comparator COMP1 and the second comparator COMP2, is received and according to first comparison result Signal and the second comparison result signal output control signal CTRL;The transmission gate TG receives the control signal CTRL, control Open or disconnect the connection of the buffer 110 and scan line 210;When 110 input terminal of buffer voltage with it is described When the voltage of 110 output end of buffer is identical, the first error amplified differences voltage and the second error amplified differences voltage are equal Less than the predeterminated voltage ADJ, then described the first of the first comparator COMP1 and the second comparator COMP2 output is compared Consequential signal and the second comparison result signal are low level, and described or gate device OR exports the low level control signal CTRL, the transmission gate TG are opened after receiving the low level control signal CTRL, and the buffer 110 is swept with described Retouch the connection of line 210;When the voltage of the voltage of 110 input terminal of buffer and 110 output end of buffer is not identical, institute It states first error amplified differences voltage and the second error amplified differences voltage is respectively less than the predeterminated voltage ADJ, then described first Comparator COMP1 and the second comparator COMP2 output the first comparison result signal and the second comparison result signal be Low level, described or gate device OR export the low level control signal CTRL, and the transmission gate TG receives the high level The control signal CTRL after close, the buffer 110 is disconnected with the scan line 210.
When short circuit occurs between adjacent scanning lines 210 for the application, current scan line 210 is opened, and buffer 110 exports height Level, after short circuit, next horizontal scanning line 210 has high level signal, and next line buffer 110 exports low level signal, therefore The input terminal for next line buffer 110 occur is different with the voltage of output end, and is shorted high level signal and low level signal, There is the case where gate driving circuit 100 is burnt out.
And the normal phase input end of first error amplifier EA1 connects the output end of the buffer 110, inverting input terminal connects Connect the output end of the buffer 110;The normal phase input end of second error amplifier EA2 connects the output of the buffer 110 End, the inverting input terminal of the second error amplifier EA2 connect the input terminal of the buffer 110, first error amplifier EA1 and the second error amplifier EA2 guarantees that two errors are put in the voltage difference of the output end and input terminal of buffer 110 An output cathode difference is always had in big device;It is poor that the normal phase input end of first comparator COMP1 receives first error amplification Threshold voltage, inverting input terminal connect a predeterminated voltage ADJ;The normal phase input end of second comparator COMP2 receives the second error and puts Big difference voltage, inverting input terminal connect the predeterminated voltage ADJ, buffer 110 output end and input terminal voltage not Meanwhile there must be one to be higher than predeterminated voltage ADJ's in first error amplified differences voltage and the second error amplified differences voltage Difference voltage makes corresponding comparator export a high level signal, in process or gate device OR, as long as there is a signal to occur High level, then or gate device OR will export high level signal, after out gate receives high level signal, disconnect buffer 110 With the connection of scan line 210, the low level signal of the high level signal for preventing current line from exporting and next line output is shorted, and is prevented The case where gate driving circuit 100 is burnt.When the output end of buffer 110 is identical with the voltage of input terminal, two mistakes Poor amplifier exports low level signal, correspondingly, two comparators also export low level control signal CTRL or door device Part OR exports low level control signal CTRL, and buffer 110 is connected after receiving low level control signal CTRL in transmission gate TG With scan line 210, export buffer 110 normally, when next line scan line 210 is opened, and current horizontal scanning line 210 is closed, The protection circuit 120 of current line repeats the above steps, and protects gate driving circuit 100.
The technical solution of the application can be widely applied to various display panels, as TN (Twisted Nematic, distort to Column type) display panel, IPS (In-Plane Switching, plane conversion type) display panel, VA (Vertical Alignment, vertical orientation type) display panel, (Multi-Domain Vertical Alignment, more quadrants are vertical by MVA Alignment-type) display panel, it is of course also possible to be other kinds of display panel, such as OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) display panel, applicable above scheme.
The above content is combine specific optional embodiment to made by the application further description, and it cannot be said that The specific implementation of the application is only limited to these instructions.For those of ordinary skill in the art to which this application belongs, In Under the premise of not departing from the application design, a number of simple deductions or replacements can also be made, all shall be regarded as belonging to the application's Protection scope.

Claims (10)

1. a kind of gate driving circuit of display panel, the display panel are provided with multi-strip scanning line, which is characterized in that described Gate driving circuit includes:
Multistage gate driving sub-circuit, connects one to one with the scan line;
Multi-stage buffer is arranged in a one-to-one correspondence with the gate driving sub-circuit respectively, and one end is connected to gate driving The output end of circuit, the other end are connected to the scan line;And
Multiple protection circuits, are arranged in a one-to-one correspondence with the scan line;
The protection circuit includes:
Error amplifying unit, detect and the voltage difference of the input terminal and output end that amplify the buffer to obtain error amplification poor Threshold voltage simultaneously exports;
Comparing unit, input terminal are connected to the output end of the error amplifying circuit, and the comparing unit receives the error and puts Big difference voltage, and according to the error amplified differences voltage output comparison result signal;And
Control module, input terminal are connected to the output end of the comparing unit, and the control module receives the comparison result letter Number, and the connection for opening or disconnecting the buffer Yu the scan line is controlled according to the comparison result signal.
2. the gate driving circuit of display panel as described in claim 1, which is characterized in that the error amplifying unit packet It includes:
First error amplifier, normal phase input end connect the input terminal of the buffer, and inverting input terminal connects the buffer Output end, calculate and the voltage difference of the input terminal and output end that amplify the buffer obtain first error amplified differences electricity It presses and exports;And
Second error amplifier, normal phase input end connect the output end of the buffer, and inverting input terminal connects the buffer Input terminal, calculate and the voltage difference of the output end and input terminal that amplify the buffer obtain the second error amplified differences electricity It presses and exports;
The comparing unit includes:
First comparator, normal phase input end are connected to the output end of the first error amplifier, to receive the first error Amplified differences voltage, output end are connected to the control module;
Second comparator, normal phase input end are connected to the output end of second error amplifier and are put with receiving second error Big difference voltage, output end are connected to the control module;
The first comparator and the inverting input terminal of the second comparator are connected to the predeterminated voltage;The first comparator root The first comparison result signal is exported to the control according to the comparison result of the first error amplified differences voltage and predeterminated voltage Module, second comparator is according to the second ratio of the comparison result of the second error amplified differences voltage and predeterminated voltage output The control module is given compared with consequential signal;The control module exports control signal according to the comparison result signal and is beaten with controlling Open or disconnect the connection of the buffer and the scan line.
3. the gate driving circuit of display panel as claimed in claim 2, which is characterized in that the predeterminated voltage meets as follows Formula:
VGL < ADJ < VGH;
Wherein, ADJ is predeterminated voltage, and VGH is the high level voltage of gate driving circuit output, and VGL is grid drive The low level voltage of dynamic circuit output.
4. the gate driving circuit of display panel as claimed in claim 3, which is characterized in that the predeterminated voltage meets as follows Formula:
ADJ=(VGH+VGL)/2.
5. the gate driving circuit of display panel as claimed in claim 2, which is characterized in that the control module includes:
Or gate device, input terminal are connected to the output end of the first comparator and the second comparator;
Control unit, control terminal are connected to described or gate device output end, and input terminal is connected to the output end of the buffer, Output end is connected to the scan line, and described control unit is low level conducting switch;
When have in the first comparison result signal and the second comparison result signal one for high level signal when, then described or door Device exports high-level control signal to described control unit to control the connection for disconnecting the buffer and the scan line;When When the first comparison result signal and the second comparison result signal are low level signal, described or gate device exports low level Control signal controls the connection for opening the buffer and the scan line to described control unit.
6. the gate driving circuit of display panel as claimed in claim 2, which is characterized in that the control module includes first Switch, second switch and control unit, the first switch and the second switch are high level conducting switch, and described control unit is Low level conducting switch;
The grid of the first switch is connected to the output end of the first comparator, and source terminal connects a high level signal, leakage Extremely it is connected to described control unit;
The grid of the second switch connects the output end of second comparator, and source terminal is connected to a high level signal, leakage Extremely it is connected to described control unit.
7. such as the gate driving circuit of display panel described in claim 5 or 6, which is characterized in that described control unit includes Transmission gate.
8. the gate driving circuit of display panel as described in claim 1, which is characterized in that the buffer includes 2n grades Phase inverter, wherein n is the natural number more than or equal to 1.
9. a kind of gate driving circuit of display panel, the display panel are provided with multi-strip scanning line, which is characterized in that described Gate driving circuit includes:
Multistage gate driving sub-circuit, connects one to one with the scan line;
Multi-stage buffer is arranged in a one-to-one correspondence with the gate driving sub-circuit respectively, and one end is connected to gate driving The output end of circuit, the other end are connected to the scan line;And
Multiple protection circuits, are arranged in a one-to-one correspondence with the scan line;
The protection circuit includes:
First error amplifier, normal phase input end connect the input terminal of the buffer, and inverting input terminal connects the buffer Output end, calculate and amplify the input terminal of the buffer and the voltage difference of output end to export first error amplified differences Voltage;
Second error amplifier, normal phase input end connect the output end of the buffer, and inverting input terminal connects the buffer Input terminal, calculate and amplify the output end of the buffer and the voltage difference of input terminal to export the second error amplified differences Voltage;
First comparator, normal phase input end are connected to the output end of the first error amplifier, to receive the first error Amplified differences voltage, inverting input terminal connect a predeterminated voltage, and output end is connected to the control module;
Second comparator, normal phase input end are connected to the output end of second error amplifier and are put with receiving second error Big difference voltage, inverting input terminal connect the predeterminated voltage, and output end is connected to the control module;
Or gate device, input terminal are connected to the output end of the first comparator and the second comparator, and based on the received The first comparison result signal and the second comparison result signal output control signal;And
Transmission gate, receives the control signal, and the connection of the buffer and scan line is opened or disconnected in control;
When the voltage of the buffer input is identical as the voltage of the buffer output end, the first error amplification is poor Threshold voltage and the second error amplified differences voltage are respectively less than the predeterminated voltage, then the first comparator and the second comparator are defeated The first comparison result signal and the second comparison result signal out is low level, and the output of described or gate device is low level The control signal, the transmission gate are opened after receiving the low level control signal, and the buffer is swept with described Retouch line connection;
When the voltage of the voltage of the buffer input and the buffer output end is not identical, the first error amplification Difference voltage and the second error amplified differences voltage are respectively less than the predeterminated voltage, then the first comparator and the second comparator The the first comparison result signal and the second comparison result signal of output are low level, and described or gate device exports low level The control signal, the transmission gate closes after receiving the control signal of the high level, the buffer with it is described Scan line disconnects.
10. a kind of display device, which is characterized in that the grid including display panel as claimed in any one of claims 1 to 9 Driving circuit and display panel.
CN201910564583.3A 2019-06-27 2019-06-27 Grid drive circuit of display panel and display device Active CN110444141B (en)

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