CN110429807A - Voltage dip suppressing method, device and terminal device - Google Patents
Voltage dip suppressing method, device and terminal device Download PDFInfo
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- CN110429807A CN110429807A CN201910740070.3A CN201910740070A CN110429807A CN 110429807 A CN110429807 A CN 110429807A CN 201910740070 A CN201910740070 A CN 201910740070A CN 110429807 A CN110429807 A CN 110429807A
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- neural network
- sample data
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- power switch
- high power
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Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0016—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0016—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters
- H02M1/0019—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters the disturbance parameters being load current fluctuations
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The present invention provides a kind of voltage dip suppressing method, device and terminal device, this method is applied to DC-DC high power switch converter, which comprises obtains the parameters of electric power of DC-DC high power switch converter；The parameters of electric power is input to default neural network model, obtains compensation control parameter；Obtain the initial control parameter of DC-DC high power switch converter；The pressure drop of DC-DC high power switch converter is inhibited based on the initial control parameter and the compensation control parameter.Voltage dip suppressing method, device and terminal device provided by the invention can the pressure drop quickly to DC-DC high power switch converter inhibit.
Description
Technical field
The invention belongs to voltage dip technical fields, are to be related to a kind of voltage dip suppressing method, device more specifically
And terminal device.
Background technique
As DC-DC high power switch converter (referred to as subsequent " switch converters ") is in the extensive use of industry,
The quality of output voltage is also receive more and more attention.In the sensitive industrial applications of the mutation of certain pairs of voltages, open
The quality for closing converter output voltage is even more important.For example, after automobile enters electrophoresis tank, switch becomes in automobile electrophoretic coating
Parallel operation output end is become the state that band carries from zero load, and the uprushing of load makes the generation of switch converters output voltage, and significantly voltage is temporary
Drop causes vehicle body spray painting uneven.
The method for inhibiting switch converters output voltage temporarily to drop has been provided in the prior art, i.e., increases a PI in circuit
Controller realizes the adjusting to switch converters output voltage using PI controller, but when the output voltage of switch converters is temporary
When range of decrease degree is larger, since the adjustment speed of PI controller is slower, still can to the quality of switch converters output voltage generate compared with
It is big to influence.Therefore, how the output voltage of switch converters quickly to be inhibited temporarily to drop, improves the quality of switch converters output voltage
As urgent problem to be solved.
Summary of the invention
It is big to improve DC-DC the purpose of the present invention is to provide a kind of voltage dip suppressing method, device and terminal device
The quality of power switch converter output voltage.
The embodiment of the present invention in a first aspect, provide a kind of voltage dip suppressing method, it is big that this method is applied to DC-DC
Power switch converter, comprising:
Obtain the parameters of electric power of DC-DC high power switch converter；
The parameters of electric power is input to default neural network model, obtains compensation control parameter；
Obtain the initial control parameter of DC-DC high power switch converter；
Based on the initial control parameter and the compensation control parameter to the pressure drop of DC-DC high power switch converter into
Row inhibits.
The second aspect of the embodiment of the present invention provides a kind of voltage dip inhibition device, comprising:
First obtains module, for obtaining the parameters of electric power of DC-DC high power switch converter；
Model computation module obtains compensation control ginseng for the parameters of electric power to be input to default neural network model
Number；
Second obtains module, for obtaining the initial control parameter of DC-DC high power switch converter；
Pressure drop suppression module, for high-power to DC-DC based on the initial control parameter and the compensation control parameter
The pressure drop of switch converters is inhibited.
The third aspect of the embodiment of the present invention, provides a kind of terminal device, including memory, processor and is stored in
In the memory and the computer program that can run on the processor, when the processor executes the computer program
The step of realizing above-mentioned voltage dip suppressing method.
The fourth aspect of the embodiment of the present invention, provides a kind of computer readable storage medium, described computer-readable to deposit
Storage media is stored with computer program, and the computer program realizes above-mentioned voltage dip suppressing method when being executed by processor
The step of.
The beneficial effect of voltage dip suppressing method provided in an embodiment of the present invention, device and terminal device is: with it is existing
There is technology to compare, the embodiment of the invention provides default neural network model, which can pass through DC-DC
The parameters of electric power of high power switch converter directly gives the compensation control parameter of DC-DC high power switch converter, the compensation
Control parameter can directly act on DC-DC high power switch converter, and auxiliary is to DC-DC on the basis of original PI controller
The output voltage of high power switch converter is controlled, and then is completed DC-DC high power switch converter output voltage and temporarily dropped
Quick inhibition, improve the quality of DC-DC high power switch converter output voltage.
Detailed description of the invention
It to describe the technical solutions in the embodiments of the present invention more clearly, below will be to embodiment or description of the prior art
Needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only of the invention some
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is the flow diagram for the voltage dip suppressing method that one embodiment of the invention provides；
Fig. 2 be another embodiment of the present invention provides voltage dip suppressing method flow diagram；
Fig. 3 is the flow diagram for the voltage dip suppressing method that yet another embodiment of the invention provides；
Fig. 4 is the flow diagram for the voltage dip suppressing method that further embodiment of this invention provides；
Fig. 5 is the structural block diagram that the voltage dip that one embodiment of the invention provides inhibits device；
Fig. 6 is the schematic block diagram for the terminal device that one embodiment of the invention provides；
Fig. 7 is the application scenarios schematic diagram for the voltage dip suppressing method that one embodiment of the invention provides.
Specific embodiment
In order to which technical problems, technical solutions and advantages to be solved are more clearly understood, tie below
Accompanying drawings and embodiments are closed, the present invention will be described in further detail.It should be appreciated that specific embodiment described herein is only
To explain the present invention, it is not intended to limit the present invention.
Referring to FIG. 7, Fig. 7 is the application scenarios schematic diagram for the voltage dip suppressing method that one embodiment of the invention provides.
Before being illustrated to voltage dip suppressing method provided by the invention, first to voltage dip provided in an embodiment of the present invention
The application scenarios of suppressing method are illustrated:
Voltage dip suppressing method provided by the invention is applied to DC-DC high power switch converter, and is applied particularly to
Direct current system where DC-DC high power switch converter.The three-phase alternating-current supply of the direct current system is not controlled by three-phase bridge
Rectification, via DC/DC high power switch converter and filter, is supplied after LC filter filtering, pressure stabilizing for right end load
Electricity.Wherein, it can directly be replaced with DC voltage source via the voltage that L1, C1 are exported, the input electricity as DC/DC switch converters
Pressure.
Under normal conditions, DC/DC high power switch converter is controlled using basic constant voltage, and in view of switch converters
Nonlinear dissipation, single PI adjusts control and has been unable to satisfy demand of the practical application to control performances such as adjustment speeds
(because the output voltage that will cause DC/DC high power switch converter substantially temporarily drops).Therefore, the present invention provides default nerves
Network model, the default neural network model can directly give DC- by the parameters of electric power of DC-DC high power switch converter
The compensation control parameter of DC high power switch converter, the compensation control parameter can directly act on DC-DC high power switch
Converter assists controlling the output voltage of DC-DC high power switch converter on the basis of original PI controller, into
And the quick inhibition that DC-DC high power switch converter output voltage temporarily drops is completed, improve DC-DC high power switch converter
The quality of output voltage.
Voltage dip suppressing method provided by the invention is illustrated below:
Referring to FIG. 1, Fig. 1 is the flow diagram for the voltage dip suppressing method that one embodiment of the invention provides, the party
Method includes:
S101: the parameters of electric power of DC-DC high power switch converter is obtained.
In the present embodiment, parameters of electric power includes but is not limited to the output voltage stable state of DC-DC high power switch converter
Departure and load current value etc..
S102: being input to default neural network model for parameters of electric power, obtains compensation control parameter.
In the present embodiment, neural network model is preset for receiving parameters of electric power and exporting replenishment control parameter.Wherein,
Radial basis function neural network model can be used in default neural network model, and radial basis function neural network model can be not
Arbitrary nonlinear mapping is approached by learning under physical relationship between solution input, output variable.The model can be from training number
According to the mapping principle between the middle parameters of electric power and parameters of electric power change rate for summarizing DC-DC high power switch converter, have simultaneously
The standby generalization ability to non-linear challenge, therefore compensation control can be effectively improved using radial basis function neural network model
The accuracy in computation of parameter.
S103: the initial control parameter of DC-DC high power switch converter is obtained.
In the present embodiment, initial control parameter, that is, PI controller control parameter of DC-DC high power switch converter.
S104: the pressure drop of DC-DC high power switch converter is carried out based on initial control parameter and compensation control parameter
Inhibit.
In the present embodiment, initial control parameter, that is, PI controller control parameter, compensation control parameter pass through default
The parameter (can be done directly on DC-DC high power switch converter) that neural network model is calculated, passes through the common of the two
Adjustment effect can accelerate the adjustment speed of DC voltage, reduce voltage dip amplitude, final to realize that DC-DC high power switch becomes
The stabilization of parallel operation output voltage.
Wherein, if presetting the input parameter of neural network model for voltage steady-state deviation amount and load current value, in advance
If the output parameter of neural network model is the duty ratio compensation rate of DC-DC high power switch converter, namely compensation control ginseng
Number is the duty ratio compensation rate of DC-DC high power switch converter.
Please also refer to Fig. 1 and Fig. 2, Fig. 2 is the process for the voltage dip suppressing method that another embodiment of the application provides
Schematic diagram.On the basis of the above embodiments, this method further include:
S201: it obtains sample data and sample data is pre-processed.
In the present embodiment, pretreatment includes the removal of abnormal data and the normalized of data.Wherein, it can be used
Sample data is normalized in following methods:
Wherein,For the normalized value of sample data, x is the sampled data values before normalization, xmaxMost for sample data
Big value, xminFor the minimum value of sample data.
S202: based on pretreated sample data training neural network, default neural network model is obtained.
In the present embodiment, the nerve of training completion can be obtained based on pretreated sample data training neural network
The structural coefficient of network establishes default neural network model based on the structural coefficient.
Wherein, sample data should be chosen according to the attribute for the neural network trained.Such as with radial ba-sis function network
The training that neural network is carried out based on network model, since radial basis function neural network model is to the interpolation sample in sample set
This generalization ability is preferable, and poor to extension sample point generalization ability, therefore should choose typical and representative sample
Data, and sample data covers the full scope of the sample data in practical applications substantially.
Please also refer to Fig. 2 and Fig. 3, Fig. 3 is the process for the voltage dip suppressing method that the application another embodiment provides
Schematic diagram.On the basis of the above embodiments, above-mentioned steps S202 can be described in detail are as follows:
S301: based on pretreated sample data training neural network, the structural coefficient of neural network is obtained.
S302: default neural network model is determined according to the structural coefficient of neural network.
In the present embodiment, after determining default neural network model according to the structural coefficient of neural network, big to DC-DC
When the output voltage of power switch converter is adjusted, compensation control ginseng directly can be obtained according to default neural network model
Number carries out the adjusting of DC-DC high power switch converter output voltage using compensation control parameter auxiliary PI controller, to subtract
The number that few PI controller is adjusted repeatedly, shortens the recovery time of DC-DC high power switch converter output voltage.
A specific embodiment party please also refer to Fig. 3 and Fig. 4, as voltage dip suppressing method provided by the invention
Formula, on the basis of the above embodiments, step S301 can be described in detail are as follows:
S401: based on training sample data training neural network.
S402: being input to the neural network by the training of training sample data for test samples data, if by training sample
The output valve of the neural network of notebook data training is within a preset range, it is determined that neural metwork training is completed, and is stored and trained
At neural network structural coefficient.
In the present embodiment, sample data can be divided into training sample data and test samples data.Number of training
According to for being trained to neural network, test samples data are used to carry out the neural network by the training of training sample data
It examines, when passing through the output valve of neural network of training sample data training within a preset range, shows neural metwork training
The structural coefficient completed, and store the neural network of training completion is used for the foundation of subsequent default neural network model.
Optionally, a kind of specific embodiment as voltage dip suppressing method provided in an embodiment of the present invention is preset
Neural network model includes input layer, hidden layer and output layer.The mapping relations of hidden layer and input layer are as follows:
fi=exp (- | | X-Ci||2÷2σi 2)
Wherein, fiFor i-th of basic function of hidden layer, X is the input value of input layer, CiFor the center of i-th of basic function,
σiFor the width of i-th of basic function.
In the present embodiment, for inputting parameter and be voltage steady-state deviation amount and load current value:
Input layer includes 2 neurons, and the input value X of input layer can be expressed as X=[x1,x2].Wherein, x1For voltage
Steady-state deviation amount or load current value, x2For load current value or voltage steady-state deviation amount.
The radial base vector of hidden layer can be expressed as F=[f1,f2,...,fi,...fm]T, wherein fiFor hidden layer
The neuron number (i.e. the value of m) of i-th of basic function, hidden layer can be determined according to test of many times.
Optionally, a kind of specific embodiment as voltage dip suppressing method provided in an embodiment of the present invention, output
The mapping relations of layer and hidden layer are as follows:
Wherein, y is the output valve of output layer, fiFor i-th of basic function of hidden layer,For i-th of neuron of hidden layer
With the connection weight between output y, m is the number of neuron in hidden layer.
On the basis of the above embodiments, the structural coefficient packet in voltage dip suppressing method provided in an embodiment of the present invention
It includes:
Central value C=[the c of each basic function1,c2,...,ci,...cm],
The width cs of each basic function=[σ1,σ2,...,σi,...,σm],
And the connection weight between hidden layer and output layer
In the present embodiment, if input parameter is voltage steady-state deviation amount and load current value, output parameter y is DC-
The duty ratio compensation rate of DC high power switch converter.Then based on initial control parameter and compensation control parameter to the big function of DC-DC
The pressure drop of rate switch converters is inhibited, and may include:
Updated control parameter is determined based on initial control parameter and compensation control parameter, is joined using updated control
Number is directly controlled based on initial control parameter and compensation control parameter, and during which the PI controller in control loop continues to play and adjust
Effect, until DC-DC high power switch converter output voltage and voltage reference value difference be less than preset threshold, show
Inhibition temporarily drops in the output voltage of DC-DC high power switch converter to be completed.
Corresponding to the voltage dip suppressing method of foregoing embodiments, Fig. 5 is the voltage dip that one embodiment of the invention provides
Inhibit the structural block diagram of device.For ease of description, only parts related to embodiments of the present invention are shown.With reference to Fig. 5, the dress
Setting includes: the first acquisition module 100, model computation module 200, and second obtains module 300, pressure drop suppression module 400.
Wherein, first module 100 is obtained, for obtaining the parameters of electric power of DC-DC high power switch converter.
Model computation module 200 obtains compensation control ginseng for parameters of electric power to be input to default neural network model
Number.
Second obtains module 300, for obtaining the initial control parameter of DC-DC high power switch converter.
Pressure drop suppression module 400, for being become based on initial control parameter and compensation control parameter to DC-DC high power switch
The pressure drop of parallel operation is inhibited.
With reference to Fig. 5, in another embodiment of the present invention, voltage dip inhibits device further include:
Model creation module 500 for obtaining sample data and pre-processing to sample data, and is based on after pre-processing
Sample data training neural network, obtain default neural network model.
With reference to Fig. 5, in yet another embodiment of the present invention, model creation module 500 may include:
Model training unit 510, for obtaining neural network based on pretreated sample data training neural network
Structural coefficient.
Model creating unit 520, for determining default neural network model according to the structural coefficient of neural network.
With reference to Fig. 5, in yet another embodiment of the present invention, model training unit 510 may include:
Training device 511, for based on training sample data training neural network.
Device 512 is verified, for test samples data to be input to the neural network by the training of training sample data, if
The output valve of neural network by the training of training sample data is within a preset range, it is determined that and neural metwork training is completed, and
The structural coefficient for the neural network that storage training is completed.
Optionally, inhibit a kind of specific embodiment of device as voltage dip provided in an embodiment of the present invention, preset
Neural network model includes input layer, hidden layer and output layer.The mapping relations of hidden layer and input layer are as follows:
fi=exp (- | | X-Ci||2÷2σi 2)
Wherein, fiFor i-th of basic function of hidden layer, X is the input value of input layer, CiFor the center of i-th of basic function,
σiFor the width of i-th of basic function.
Optionally, inhibit a kind of specific embodiment of device, output as voltage dip provided in an embodiment of the present invention
The mapping relations of layer and hidden layer are as follows:
Wherein, y is the output valve of output layer, fiFor i-th of basic function of hidden layer,For i-th of neuron of hidden layer
With the connection weight between output y, m is the number of neuron in hidden layer.
Referring to Fig. 6, Fig. 6 is the schematic block diagram for the terminal device that one embodiment of the invention provides.As shown in FIG. 6 implementation
Terminal 600 in example may include: one or more processors 601, one or more input equipment 602, one or more defeated
Equipment 603 and one or more memories 604 out.Above-mentioned processor 601, input equipment 602, then output equipment 603 and storage
Device 604 completes mutual communication by communication bus 605.Memory 604 is for storing computer program, computer program packet
Include program instruction.Processor 601 is used to execute the program instruction of the storage of memory 604.Wherein, processor 601 is configured for
The function of each module/unit in above-mentioned each Installation practice, such as module shown in Fig. 5 are operated below caller instruction execution
100 to 500 function.
It should be appreciated that in embodiments of the present invention, alleged processor 601 can be central processing unit (Central
Processing Unit, CPU), which can also be other general processors, digital signal processor (Digital
Signal Processor, DSP), specific integrated circuit (Application Specific Integrated Circuit,
ASIC), ready-made programmable gate array (Field-Programmable Gate Array, FPGA) or other programmable logic
Device, discrete gate or transistor logic, discrete hardware components etc..General processor can be microprocessor or this at
Reason device is also possible to any conventional processor etc..
Input equipment 602 may include that Trackpad, fingerprint adopt sensor (for acquiring the finger print information and fingerprint of user
Directional information), microphone etc., output equipment 603 may include display (LCD etc.), loudspeaker etc..
The memory 604 may include read-only memory and random access memory, and to processor 601 provide instruction and
Data.The a part of of memory 604 can also include nonvolatile RAM.For example, memory 604 can also be deposited
Store up the information of device type.
In the specific implementation, processor 601 described in the embodiment of the present invention, input equipment 602, output equipment 603 can
Execute realization described in the first embodiment and second embodiment of voltage dip suppressing method provided in an embodiment of the present invention
The implementation of terminal described in the embodiment of the present invention also can be performed in mode, and details are not described herein.
A kind of computer readable storage medium is provided in another embodiment of the invention, and computer readable storage medium is deposited
Computer program is contained, computer program includes program instruction, and above-described embodiment side is realized when program instruction is executed by processor
All or part of the process in method can also instruct relevant hardware to complete by computer program, and computer program can
It is stored in a computer readable storage medium, the computer program is when being executed by processor, it can be achieved that above-mentioned each method
The step of embodiment.Wherein, computer program includes computer program code, and computer program code can be source code shape
Formula, object identification code form, executable file or certain intermediate forms etc..Computer-readable medium may include: that can carry meter
Any entity or device of calculation machine program code, recording medium, USB flash disk, mobile hard disk, magnetic disk, CD, computer storage, only
Read memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electricity load
Wave signal, telecommunication signal and software distribution medium etc..It should be noted that the content that computer-readable medium includes can root
Increase and decrease appropriate is carried out according to the requirement made laws in jurisdiction with patent practice, such as in certain jurisdictions, according to vertical
Method and patent practice, computer-readable medium do not include be electric carrier signal and telecommunication signal.
Computer readable storage medium can be the internal storage unit of the terminal of aforementioned any embodiment, such as terminal
Hard disk or memory.Computer readable storage medium is also possible to the External memory equipment of terminal, such as the grafting being equipped in terminal
Formula hard disk, intelligent memory card (Smart Media Card, SMC), secure digital (Secure Digital, SD) card, flash card
(Flash Card) etc..Further, computer readable storage medium can also both include the internal storage unit of terminal or wrap
Include External memory equipment.Computer readable storage medium is for storing other program sum numbers needed for computer program and terminal
According to.Computer readable storage medium can be also used for temporarily storing the data that has exported or will export.
Those of ordinary skill in the art may be aware that list described in conjunction with the examples disclosed in the embodiments of the present disclosure
Member and algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware
With the interchangeability of software, each exemplary composition and step are generally described according to function in the above description.This
A little functions are implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Specially
Industry technical staff can use different methods to achieve the described function each specific application, but this realization is not
It is considered as beyond the scope of this invention.
It is apparent to those skilled in the art that for convenience of description and succinctly, the end of foregoing description
The specific work process at end and unit, can refer to corresponding processes in the foregoing method embodiment, details are not described herein.
In several embodiments provided herein, it should be understood that disclosed terminal and method can pass through it
Its mode is realized.For example, the apparatus embodiments described above are merely exemplary, for example, the division of unit, only
A kind of logical function partition, there may be another division manner in actual implementation, for example, multiple units or components can combine or
Person is desirably integrated into another system, or some features can be ignored or not executed.In addition, it is shown or discussed it is mutual it
Between coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING or communication link of device or unit
It connects, is also possible to electricity, mechanical or other form connections.
Unit may or may not be physically separated as illustrated by the separation member, shown as a unit
Component may or may not be physical unit, it can and it is in one place, or may be distributed over multiple networks
On unit.It can select some or all of unit therein according to the actual needs to realize the mesh of the embodiment of the present invention
's.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, is also possible to two or more units and is integrated in one unit.It is above-mentioned integrated
Unit both can take the form of hardware realization, can also realize in the form of software functional units.
More than, only a specific embodiment of the invention, but scope of protection of the present invention is not limited thereto, and it is any to be familiar with
Those skilled in the art in the technical scope disclosed by the present invention, can readily occur in various equivalent modifications or substitutions,
These modifications or substitutions should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be wanted with right
Subject to the protection scope asked.
Claims (10)
1. a kind of voltage dip suppressing method, which is characterized in that the method is applied to DC-DC high power switch converter, packet
It includes:
Obtain the parameters of electric power of DC-DC high power switch converter；
The parameters of electric power is input to default neural network model, obtains compensation control parameter；
Obtain the initial control parameter of DC-DC high power switch converter；
The pressure drop of DC-DC high power switch converter is pressed down based on the initial control parameter and the compensation control parameter
System.
2. voltage dip suppressing method as described in claim 1, which is characterized in that the creation of the default neural network model
Process includes:
It obtains sample data and the sample data is pre-processed；
Based on pretreated sample data training neural network, default neural network model is obtained.
3. voltage dip suppressing method as claimed in claim 2, which is characterized in that described to be based on pretreated sample data
Training neural network obtains default neural network model, comprising:
Based on pretreated sample data training neural network, the structural coefficient of neural network is obtained；
Default neural network model is determined according to the structural coefficient of neural network.
4. voltage dip suppressing method as claimed in claim 3, which is characterized in that the pretreated sample data includes
Training sample data and test samples data, it is described based on pretreated sample data training neural network, obtain nerve net
The structural coefficient of network, comprising:
Based on training sample data training neural network；
Test samples data are input to the neural network by the training of training sample data, if by the training of training sample data
Neural network output valve within a preset range, it is determined that neural metwork training complete, and store training completion nerve net
The structural coefficient of network.
5. such as the described in any item voltage dip suppressing methods of Claims 1-4, which is characterized in that the default neural network
Model includes input layer, hidden layer and output layer；The mapping relations of the hidden layer and input layer are as follows:
fi=exp (- | | X-Ci||2÷2σi 2)
Wherein, fiFor i-th of basic function of hidden layer, X is the input value of input layer, CiFor the center of i-th of basic function, σiFor
The width of i-th of basic function.
6. voltage dip suppressing method as claimed in claim 5, which is characterized in that the mapping of the output layer and hidden layer is closed
System are as follows:
Wherein, y is the output valve of output layer, fiFor i-th of basic function of hidden layer,For i-th of neuron of hidden layer with it is defeated
Connection weight between y out, m are the number of neuron in hidden layer.
7. a kind of voltage dip inhibits device characterized by comprising
First obtains module, for obtaining the parameters of electric power of DC-DC high power switch converter；
Model computation module obtains compensation control parameter for the parameters of electric power to be input to default neural network model；
Second obtains module, for obtaining the initial control parameter of DC-DC high power switch converter；
Pressure drop suppression module, for being based on the initial control parameter and the compensation control parameter to DC-DC high power switch
The pressure drop of converter is inhibited.
8. voltage dip as claimed in claim 7 inhibits device, which is characterized in that further include:
Model creation module, for obtaining sample data and being pre-processed to the sample data, and based on pretreated
Sample data trains neural network, obtains default neural network model.
9. a kind of terminal device, including memory, processor and storage are in the memory and can be on the processor
The computer program of operation, which is characterized in that the processor realizes such as claim 1 to 6 when executing the computer program
The step of any one the method.
10. a kind of computer readable storage medium, the computer-readable recording medium storage has computer program, and feature exists
In when the computer program is executed by processor the step of any one of such as claim 1 to 6 of realization the method.
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