CN110416344A - A kind of silicon substrate antimony trisulfide heterojunction solar battery and preparation method thereof - Google Patents

A kind of silicon substrate antimony trisulfide heterojunction solar battery and preparation method thereof Download PDF

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CN110416344A
CN110416344A CN201910622847.6A CN201910622847A CN110416344A CN 110416344 A CN110416344 A CN 110416344A CN 201910622847 A CN201910622847 A CN 201910622847A CN 110416344 A CN110416344 A CN 110416344A
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silicon substrate
antimony trisulfide
layer
heterojunction solar
solar battery
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梁宗存
孟蓝翔
沈辉
姚志荣
张林坤
蔡伦
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Sun Yat Sen University
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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Abstract

The invention discloses a kind of silicon substrate antimony trisulfide heterojunction solar batteries, from top to bottom successively include preceding electrode, anti-reflection layer, electron transfer layer, silicon substrate, hole transmission layer and back electrode;The material of the electron transfer layer includes antimony trisulfide, and the silicon substrate is p-type monocrystalline silicon.Heterojunction solar battery of the present invention is using antimony trisulfide as electron transfer layer, and antimony trisulfide can be matched preferably with p-type silicon band structure, be conducive to the transmission of electronics, and the minority diffusion length of antimony trisulfide is big, can obtain biggish short circuit current.The invention also discloses a kind of preparation methods of silicon substrate antimony trisulfide heterojunction solar battery, this method simple process, low temperature, safe and environment-friendly, Yi Shixian, and cost advantage is significant, omits hazardous gas used in High temperature diffusion p-n junction technique and the preparation of HIT battery etc..

Description

A kind of silicon substrate antimony trisulfide heterojunction solar battery and preparation method thereof
Technical field
The present invention relates to a kind of heterojunction solar batteries and preparation method thereof, and in particular to a kind of silicon substrate antimony trisulfide hetero-junctions Solar cell and preparation method thereof.
Background technique
Solar energy has cleaning, advantage that is safe, resourceful and not influenced by objective geographic factor, it is considered to be 21 century most important renewable energy and green novel energy source.Solar cell is as a kind of important electrooptical device, to solution Certainly energy shortage and its cause environmental pollution, climatic deterioration the problems such as be of great significance.
Photovoltaic industry has obtained high speed development in recent years, and crystal silicon solar energy battery has manufacture craft maturation, property at present The advantages such as energy stabilization, transfer efficiency height, occupy leading position, traditional Al-BSF battery, PERC in solar battery in the market The homogeneities junction battery such as battery needs high temperature thermal diffusion to form p-n junction, there is certain thermal damage to silicon wafer;It is highly doped simultaneously to lead to height Auger recombination, limit the promotion that battery opens pressure.HIT battery uses a variety of inflammable, explosive, hypertoxic gases, and electrode low temperature The problems such as silver paste is expensive, at high cost there are battery.Exempt from adulterate antisymmetry heterojunction battery concept in 2015 for the first time It is suggested, it is advantageous that the emitter of battery and back surface field do not have doping process, DASH battery is a current research hotspot, Carrier selective exposure has carried out a large amount of research in silicon/crystalline silicon heterojunction battery.It is selectively transmitted based on carrier novel The material of silicon based hetero-junction used in battery is more diversified, and preparation process can also accomplish more to simplify and energy conservation, and green Environmental protection, while being also able to achieve higher transformation efficiency.
Antimony trisulfide is a kind of V-VI race direct band-gap semicondictor material that property is stable, rich content, safe nothing in the earth's crust Poison.Band gap width is moderate, is easy to regulate and control, and covers most of visible light, therefore the material is considered as very potential answers Used in one of solar cell material, solution is generally configured to using chemical bath deposition legal system with the compound of sulfur-bearing and antimony at present Standby vulcanization Sb film, is mainly used in hull cell.The preparation method for vulcanizing Sb film is still deficienter, and chemical deposition Method preparation vulcanization Sb film is mostly amorphous state, and film thickness cannot be controlled accurately;Vulcanization Sb film is mainly used in hull cell, Organic hole transport material layer is used mostly, so that stability test is poor, and is passed with the inorganic hole of antimony trisulfide film matches Defeated layer only has the p-type semiconductor of only a few, limits antimony trisulfide in the application of inorganic thin film battery.Sb film is not vulcanized almost also not In the silicon substrate heterojunction solar cell applied.
Summary of the invention
A kind of silicon substrate antimony trisulfide hetero-junctions is provided it is an object of the invention to overcome the shortcomings of the prior art place Solar cell and preparation method thereof.
To achieve the above object, the technical scheme adopted by the invention is as follows: a kind of silicon substrate antimony trisulfide heterojunction solar battery, from It successively include preceding electrode, anti-reflection layer, electron transfer layer, silicon substrate, hole transmission layer and back electrode under;The electron-transport The material of layer includes antimony trisulfide, and the silicon substrate is p-type monocrystalline silicon.
The electron transfer layer of silicon substrate antimony trisulfide heterojunction solar battery of the present invention uses antimony trisulfide, inventor's discovery Antimony trisulfide can be matched preferably with p-type silicon band structure, be conducive to the transmission of electronics, and the minority diffusion length of antimony trisulfide is big, can To obtain biggish short circuit current.The silicon substrate is the p-type monocrystalline silicon of<100>crystal orientation.Preferably, the electron transfer layer With a thickness of 1~100nm.Film thickness influences whether the efficiency of battery, and with the increase of thickness, dropping after increasing first occurs in battery efficiency Low phenomenon.
Preferably, the electron transfer layer with a thickness of 4~15nm.It is highly preferred that the electron transfer layer with a thickness of 4.5~6.5nm.Most preferably, the electron transfer layer with a thickness of 5.5nm.
Preferably, the electron transfer layer is vulcanization Sb film, and the vulcanization Sb film is prepared using thermal evaporation; The technological parameter of the thermal evaporation are as follows: the temperature of silicon substrate is 20~400 DEG C, and vacuum degree is 1 × e-2~1 × e-5Pa, evaporation rate ForPreferably, the evaporation rate isIt is highly preferred that the evaporation rate is
In the thickness control and purity of vulcanization Sb film advantageously, and vacuum environment advantageously reduces silicon to this method The pollution on piece surface;Material used in the novel silicon base hetero-junction solar cell selectively transmitted based on carrier is more diversified, solution The certainly limited disadvantage of inorganic transport layers in hull cell, application range of the developing antimony trisulfide material in field of batteries.
Preferably, the material of the preceding electrode is at least one of Ag, Au and Pd.
Preferably, the anti-reflection layer is transparent conductive metal oxide tco layer, and the TCO is made of ITO, AZO or FTO. Anti-reflection layer primarily serves the effect for collecting transverse current, and itself and silver and Sb2S3Contact resistance it is smaller, can get lower Series resistance.
Preferably, the hole transmission layer is high work function transition metal oxide composition;The high work function transition gold Category oxide is MoOx、V2Ox、WOxOr NiOx.High work function transition metal oxide and silicon base layers form Ohmic contact.
Preferably, the material of the back electrode is at least one of Ag, Au and Pd.
Preferably, the preceding electrode with a thickness of 10nm~2 μm;The anti-reflection layer with a thickness of 10nm~2 μm;The sky Cave transport layer with a thickness of 2~500nm;The back electrode with a thickness of 10nm~2 μm.
Another object of the present invention is to provide a kind of preparation method of silicon substrate antimony trisulfide heterojunction solar battery, packets Include following steps:
(1), in the surface of silicon substrate vapor deposition vulcanization Sb film, N-shaped antimony trisulfide electron transfer layer is formed;
(2), anti-reflection layer is prepared in antimony trisulfide film surface magnetron sputtering method;
(3), electrode is prepared by silk-screen printing or thermal evaporation in anti-reflection layer surface, as preceding electrode;
(4), transition metal oxide is deposited at the silicon substrate back side, ohmic contact layer is formed, as hole transmission layer;
(5), continue silk-screen printing on the hole transport layer or thermal evaporation prepares metal layer, as back electrode.
Preferably, in step (2), the technological parameter of the magnetron sputtering method are as follows: the temperature of silicon substrate is 20~400 DEG C, Background vacuum is 1 × e-2~1 × e-5Pa, sputtering power are 10~200W, and argon flow is 10~30sccm, with a thickness of 10nm~2um;
Preferably, in step (3), (4) and (5), the technological parameter of the vapor deposition are as follows: the temperature of silicon substrate is 20~400 DEG C, vacuum degree is 1 × e-2~1 × e-5Pa, evaporation rate are
Preferably, step (2) further include to vulcanization Sb film and anti-reflection layer make annealing treatment, annealing temperature be 200~ 400 DEG C, the time is 10~60min.The temperature of annealing has large effect to final battery performance obtained, inventors have found that When annealing temperature is excessively high and too low, battery efficiency can be all reduced, when annealing temperature is 200-400 DEG C, battery efficiency is higher, Especially when annealing temperature is 300 DEG C, battery efficiency highest.
The entire preparation process of the present invention avoids high-temperature process, and raw material rich reserves in preparation process, without toxic material The use of material, the discharge of pollution-free substance, to environmental protection with it is energy saving highly beneficial, preparation process simply easily realizes.
The beneficial effects of the present invention are: it is described different the present invention provides a kind of silicon substrate antimony trisulfide heterojunction solar battery Using antimony trisulfide as electron transfer layer, antimony trisulfide can be matched preferably with p-type silicon band structure, is conducive to matter connection solar cell The minority diffusion length of the transmission of electronics, antimony trisulfide is big, can obtain biggish short circuit current.The present invention also provides a kind of silicon The preparation method of base antimony trisulfide heterojunction solar battery, this method simple process, low temperature, safe and environment-friendly, Yi Shixian, and cost Advantage is significant, omits hazardous gas used in High temperature diffusion p-n junction technique and the preparation of HIT battery etc..
Detailed description of the invention
Fig. 1 is the structural schematic diagram that Fig. 1 is solar cell described in Examples 1 to 6;Wherein, 1 is silicon substrate, and 2 pass for electronics Defeated layer, 3 be anti-reflection layer, and 4 be hole transmission layer, and 5 be back electrode, and 6 be preceding electrode.
Fig. 2 is JV curve (AM 1.5,25 DEG C) of the solar cell under standard test condition in embodiment 2.
Fig. 3 is JV curve (AM 1.5,25 DEG C) of the solar cell under standard test condition in embodiment 3.
Fig. 4 is JV curve (AM 1.5,25 DEG C) of the solar cell under standard test condition in embodiment 4.
Specific embodiment
To better illustrate the object, technical solutions and advantages of the present invention, below in conjunction with specific embodiment to the present invention It is described further.
Embodiment 1
A kind of embodiment of silicon substrate antimony trisulfide heterojunction solar battery of the present invention, silicon substrate antimony trisulfide described in the present embodiment The structural schematic diagram of heterojunction solar battery as shown in Figure 1, successively include from top to bottom preceding electrode, anti-reflection layer, electron transfer layer, Silicon substrate, hole transmission layer and back electrode;
The electron transfer layer is antimony trisulfide film layer, with a thickness of 5.5nm;The silicon substrate is p-type monocrystalline silicon;
The material of the preceding electrode and back electrode is silver, and thickness is 500nm;
The anti-reflection layer is ITO nesa coating, and the material of the hole transmission layer is MoOx, with a thickness of 10nm.
The preparation method of silicon substrate antimony trisulfide heterojunction solar battery described in the present embodiment the following steps are included:
(1) it substrate pretreatment: using p-type monocrystalline silicon as substrate, using aqueous slkali one texture-etching side, then carries out conventional clear It washes, and is dried silicon wafer;
(2) preparation of electron transfer layer: being evaporation with antimony trisulfide with thermal evaporation in silicon substrate making herbs into wool wheat flour for antimony trisulfide layer Source, underlayer temperature are room temperature, and vacuum degree is 8 × 10-4Pa evaporation rate is5.5nm is deposited.
(3) ITO nesa coating, silicon wafer the preparation of anti-reflection layer: are prepared in antimony trisulfide film surface using magnetron sputtering method Substrate temperature is room temperature, and vacuum degree is 8 × 10-4Pa, sputtering power 100W, argon flow 10sccm;
(4) it anneals in nitrogen to antimony trisulfide layer and ITO layer, annealing temperature is 300 DEG C, annealing time 30min;
(5) preparation of electrode before: placing electrode mask plate on the transparent conductive layer surface of above-mentioned (3) preparation, utilizes Thermal evaporation vapor deposition silver, electrode before preparation is silver-colored, the underlayer temperature of silicon wafer are room temperature, and vacuum degree is 2 × 10-3Pa, evaporation rate are500nm is deposited.
(6) transition metal oxide MoO the preparation of hole transmission layer: is deposited using thermal evaporation in the silicon wafer other sidex, with MoO3As evaporation source, the underlayer temperature of silicon wafer is room temperature, and vacuum degree is 8 × 10-4Pa, evaporation rate areIt is formed The MoO of 10nmxLayer, obtains good ohmic contact layer,
(7) preparation of back electrode: transition metal oxide MoOxThe other side is using thermal evaporation evaporation metal silver, with metallic silver Underlayer temperature for evaporation source, silicon wafer is room temperature, and evaporation rate isForm the Ag layer of 500nm.
Embodiment 2
In order to probe into influence of the antimony trisulfide film thickness to battery efficiency, using condition same as Example 1, change step Suddenly the annealing temperature of (4) tests the battery performance of different-thickness (4nm, 4.5nm, 5.5nm, 6.5nm, 15nm), sees Fig. 2.
Fig. 2 is JV curve (AM 1.5,25 of the solar cell of this difference antimony trisulfide film thickness under standard test condition DEG C), figure it is seen that Film Thickness has arrived the open-circuit voltage (V of batteryoc), short circuit current (Jsc), with a thickness of When 4.5~6.5nm, battery efficiency is preferable, and in the thickness of 5.5nm, battery efficiency is optimal.
Embodiment 3
In order to probe into influence of the annealing temperature to battery efficiency, using the identical condition of the present embodiment, (4) are changed the step Annealing temperature tests the cell performance of different annealing temperature (200 DEG C, 300 DEG C, 400 DEG C, unannealed processing (As-deposited)) Can, see Fig. 3.
Fig. 3 is JV curve (AM 1.5,25 DEG C) of the solar cell under standard test condition under different annealing temperature, from figure 3 can be seen that annealing temperature to the open-circuit voltage (V of batteryoc), short circuit current (Jsc) and fill factor (FF) have an impact, especially It is at 300 DEG C, battery efficiency is optimal.
Embodiment 4
In order to probe into influence of the evaporation rate to battery performance, using the identical condition of the present embodiment, (2) are changed the step Evaporation rate is tested under different evaporation ratesBattery performance, test result is shown in Fig. 4.
Fig. 4 be under the conditions of different evaporation rates solar cell obtained under standard test condition JV curve (AM 1.5, 25 DEG C) and dark-state under the conditions of JV curve, from fig. 4, it can be seen that open-circuit voltage (V of the deposition rate to batteryoc), short circuit current (Jsc) and fill factor (FF) have an impact, InWhen, battery efficiency is optimal.
Embodiment 5
A kind of embodiment of silicon substrate antimony trisulfide heterojunction solar battery of the present invention, silicon substrate antimony trisulfide described in the present embodiment The structural schematic diagram of heterojunction solar battery as shown in Figure 1, successively include from top to bottom preceding electrode, anti-reflection layer, electron transfer layer, Silicon substrate, hole transmission layer and back electrode;
The electron transfer layer is antimony trisulfide film layer, with a thickness of 1nm;The silicon substrate is p-type monocrystalline silicon;
The material of the preceding electrode and back electrode is silver, and thickness is 10nm;
The anti-reflection layer is ITO nesa coating, and the material of the hole transmission layer is MoOx, with a thickness of 100nm.
The preparation method of silicon substrate antimony trisulfide heterojunction solar battery described in the present embodiment the following steps are included:
(1) it substrate pretreatment: using p-type monocrystalline silicon as substrate, using aqueous slkali one texture-etching side, then carries out conventional clear It washes, and is dried silicon wafer;
(2) preparation of electron transfer layer: being evaporation with antimony trisulfide with thermal evaporation in silicon substrate making herbs into wool wheat flour for antimony trisulfide layer Source, underlayer temperature are room temperature, and vacuum degree is 1 × 10-5Pa evaporation rate is1nm is deposited;
(3) ITO nesa coating, silicon wafer the preparation of anti-reflection layer: are prepared in antimony trisulfide film surface using magnetron sputtering method Substrate temperature is room temperature, and vacuum degree is 1 × 10-5Pa, sputtering power 10W, argon flow 30sccm;
(4) it anneals in nitrogen to antimony trisulfide layer and ITO layer, annealing temperature is 300 DEG C, annealing time 10min;
(5) preparation of electrode before: placing electrode mask plate on the transparent conductive layer surface of above-mentioned (3) preparation, utilizes Thermal evaporation vapor deposition silver, electrode before preparation is silver-colored, the underlayer temperature of silicon wafer are room temperature, and vacuum degree is 1 × 10-5Pa, evaporation rate are10nm is deposited.
(6) transition metal oxide MoO the preparation of hole transmission layer: is deposited using thermal evaporation in the silicon wafer other sidex, with MoO3As evaporation source, the underlayer temperature of silicon wafer is room temperature, and vacuum degree is 1 × 10-5Pa, evaporation rate areIt is formed The MoO of 100nmxLayer, obtains good ohmic contact layer,
(7) preparation of back electrode: transition metal oxide MoOxThe other side is using thermal evaporation evaporation metal silver, with metallic silver Underlayer temperature for evaporation source, silicon wafer is room temperature, and evaporation rate isForm the Ag layer of 10nm.
Embodiment 6
A kind of embodiment of silicon substrate antimony trisulfide heterojunction solar battery of the present invention, silicon substrate antimony trisulfide described in the present embodiment The structural schematic diagram of heterojunction solar battery as shown in Figure 1, successively include from top to bottom preceding electrode, anti-reflection layer, electron transfer layer, Silicon substrate, hole transmission layer and back electrode;
The electron transfer layer is antimony trisulfide film layer, with a thickness of 100nm;The silicon substrate is p-type monocrystalline silicon;
The material of the preceding electrode and back electrode is silver, and thickness is 2 μm;
The anti-reflection layer is ITO nesa coating, and the material of the hole transmission layer is MoOx, with a thickness of 2 μm.
The preparation method of silicon substrate antimony trisulfide heterojunction solar battery described in the present embodiment the following steps are included:
(1) it substrate pretreatment: using p-type monocrystalline silicon as substrate, using aqueous slkali one texture-etching side, then carries out conventional clear It washes, and is dried silicon wafer;
(2) preparation of electron transfer layer: being evaporation with antimony trisulfide with thermal evaporation in silicon substrate making herbs into wool wheat flour for antimony trisulfide layer Source, underlayer temperature are room temperature, and vacuum degree is 1 × 10-2Pa, evaporation rate are100nm is deposited;
(3) ITO nesa coating, silicon wafer the preparation of anti-reflection layer: are prepared in antimony trisulfide film surface using magnetron sputtering method Substrate temperature is room temperature, and vacuum degree is 1 × 10-2Pa, sputtering power 200W, argon flow 10sccm;
(4) it anneals in nitrogen to antimony trisulfide layer and ITO layer, annealing temperature is 300 DEG C, annealing time 60min;
(5) preparation of electrode before: placing electrode mask plate on the transparent conductive layer surface of above-mentioned (3) preparation, utilizes Thermal evaporation vapor deposition silver, electrode before preparation is silver-colored, the underlayer temperature of silicon wafer are room temperature, and vacuum degree is 1 × 10-2Pa, evaporation rate are2 μm of vapor deposition.
(6) transition metal oxide MoO the preparation of hole transmission layer: is deposited using thermal evaporation in the silicon wafer other sidex, with MoO3As evaporation source, the underlayer temperature of silicon wafer is room temperature, and vacuum degree is 1 × 10-2Pa, evaporation rate areForm 2 μ The MoO of mxLayer, obtains good ohmic contact layer,
(7) preparation of back electrode: transition metal oxide MoOxThe other side is using thermal evaporation evaporation metal silver, with metallic silver Underlayer temperature for evaporation source, silicon wafer is room temperature, and evaporation rate isForm 2 μm of Ag layer.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention rather than protects to the present invention The limitation of range is protected, although the invention is described in detail with reference to the preferred embodiments, those skilled in the art should Understand, it can be with modification or equivalent replacement of the technical solution of the present invention are made, without departing from the essence of technical solution of the present invention And range.

Claims (10)

1. a kind of silicon substrate antimony trisulfide heterojunction solar battery, which is characterized in that from top to bottom successively include preceding electrode, anti-reflection layer, Electron transfer layer, silicon substrate, hole transmission layer and back electrode;The material of the electron transfer layer includes antimony trisulfide, the silicon substrate Body is p-type monocrystalline silicon.
2. silicon substrate antimony trisulfide heterojunction solar battery as described in claim 1, which is characterized in that the thickness of the electron transfer layer For 1~100nm;Preferably, the electron transfer layer with a thickness of 4~15nm;It is highly preferred that the thickness of the electron transfer layer For 4.5~6.5nm.
3. silicon substrate antimony trisulfide heterojunction solar battery as described in claim 1, which is characterized in that the electron transfer layer is vulcanization Sb film, the vulcanization Sb film are prepared using thermal evaporation;The technological parameter of the thermal evaporation are as follows: the temperature of silicon substrate Degree is 20~400 DEG C, and vacuum degree is 1 × e-2~1 × e-5Pa, evaporation rate are
4. silicon substrate antimony trisulfide heterojunction solar battery as described in claim 1, which is characterized in that the material of the preceding electrode is At least one of Ag, Au and Pd.
5. silicon substrate antimony trisulfide heterojunction solar battery as described in claim 1, which is characterized in that the anti-reflection layer is electrically conducting transparent Metal oxide tco layer, the TCO are made of ITO, AZO or FTO.
6. silicon substrate antimony trisulfide heterojunction solar battery as described in claim 1, which is characterized in that the hole transmission layer is Gao Gong Function transition metal oxide is constituted;The high work function transition metal oxide is MoOx、V2Ox、WOxOr NiOx
7. silicon substrate antimony trisulfide heterojunction solar battery as described in claim 1, which is characterized in that the material of the back electrode is At least one of Ag, Au and Pd.
8. silicon substrate antimony trisulfide heterojunction solar battery as described in claim 1, which is characterized in that the preceding electrode with a thickness of 10nm~2 μm;The anti-reflection layer with a thickness of 10nm~2 μm;The hole transmission layer with a thickness of 2~500nm;The back electricity Pole with a thickness of 10nm~2 μm.
9. a kind of preparation method of the silicon substrate antimony trisulfide heterojunction solar battery as described in any one of claim 1~8, feature It is, comprising the following steps:
(1), in the surface of silicon substrate vapor deposition vulcanization Sb film, N-shaped antimony trisulfide electron transfer layer is formed;
(2), anti-reflection layer is prepared in antimony trisulfide film surface magnetron sputtering method;
(3), electrode is prepared by silk-screen printing or thermal evaporation in anti-reflection layer surface, as preceding electrode;
(4), transition metal oxide is deposited at the silicon substrate back side, ohmic contact layer is formed, as hole transmission layer;
(5), continue silk-screen printing on the hole transport layer or thermal evaporation prepares metal layer, as back electrode.
10. the preparation method of silicon substrate antimony trisulfide heterojunction solar battery as claimed in claim 9, which is characterized in that following (a)~ Any one of (c):
(a) in step (2), the technological parameter of the magnetron sputtering method are as follows: the temperature of silicon substrate is 20~400 DEG C, base vacuum Degree is 1 × e-2~1 × e-5Pa, sputtering power are 10~200W, and argon flow is 10~30sccm, with a thickness of 10nm~2um;
(b) in step (3), (4) and (5), the technological parameter of the vapor deposition are as follows: the temperature of silicon substrate is 20~400 DEG C, vacuum degree For 1 × e-2~1 × e-5Pa, evaporation rate are
(c) step (2) further includes the steps that making annealing treatment vulcanization Sb film and anti-reflection layer, and the annealing temperature is 200 ~400 DEG C, the time is 10~60min.
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