CN110415661B - Liquid crystal display device and driving method thereof - Google Patents
Liquid crystal display device and driving method thereof Download PDFInfo
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- CN110415661B CN110415661B CN201910591548.0A CN201910591548A CN110415661B CN 110415661 B CN110415661 B CN 110415661B CN 201910591548 A CN201910591548 A CN 201910591548A CN 110415661 B CN110415661 B CN 110415661B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Abstract
The invention provides a liquid crystal display device and a driving method. The device includes: the liquid crystal display panel comprises a first display area and a second display area which are arranged adjacently, wherein the partial area of one side of the second display area close to the first display area is a first boundary area, and the partial area of one side of the first display area close to the second display area is a second boundary area; when the double-chip driving liquid crystal display device is driven, the first time sequence controller receives and processes the display data of the first display area and the first boundary area, the second time sequence controller receives and processes the display data of the second display area and the second boundary area to obtain the corrected display data of the first display area and the second display area, and the corrected display data drives the first display area and the second display area to display pictures, so that the display effect of the boundary area of the double-chip driving liquid crystal display device can be improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a liquid crystal display device and a driving method thereof.
Background
With the development of Display technology, flat panel Display devices such as Liquid Crystal Displays (LCDs) have advantages of high image quality, power saving, thin body, and wide application range, and thus are widely used in various consumer electronics products such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, and desktop computers, and become the mainstream of Display devices.
Generally, a Liquid Crystal display panel is composed of a Color Filter substrate (CF), a Thin Film Transistor substrate (TFT), a Liquid Crystal (LC) sandwiched between the Color Filter substrate and the Thin Film Transistor substrate, and a Sealant (Sealant), and a forming process of the Liquid Crystal display panel generally includes: front Array (Array) process (thin film, yellow light, etching and stripping), middle Cell (TFT substrate and CF substrate) process and back module assembly process (driver IC and printed circuit board lamination). Wherein, the front-stage Array process mainly forms a TFT substrate to control the movement of liquid crystal molecules; the middle Cell process is mainly to add liquid crystal between the TFT substrate and the CF substrate; the back module assembly process mainly drives the integration of IC pressing and printed circuit board, and further drives the liquid crystal molecules to rotate and display images.
When the liquid crystal display panel works, the liquid crystal display panel needs to be driven by an external driving circuit, and the external driving circuit generally comprises: the LCD panel driving Circuit comprises a time sequence control chip (TCON), a Power management chip (Power management IC), a programmable gamma correction chip (P-gamma IC) and the like which are arranged on a Printed Circuit Board (PCB), wherein the time sequence control chip is mainly used for converting Low-Voltage Differential Signaling (LVDS) signals into Mini-LVDS signals with high Low amplitude transmission frequency and generating time sequence signals for driving the LCD panel, the Power management chip is mainly used for generating various voltages for driving the LCD panel, and the programmable gamma correction chip is mainly used for generating gamma voltages.
With the increase of the size and resolution of the lcd, the requirements for the timing controller of the lcd are higher and higher, and for the lcd with ultra high definition 120Hz or 8K 120Hz, a single timing controller is difficult to meet the production requirements, for this reason, a technical scheme including a dual Chip drive (2Chip) is proposed, i.e. 2 timing controllers are set in the lcd to work simultaneously, each timing controller controls a corresponding sub-region correspondingly, i.e. each timing controller can only obtain and process the data (such as video data) in the sub-region corresponding to the timing controller, the 2 sub-regions jointly form the display region of the whole lcd, but in the multi-Chip driven lcd, the image processing algorithms (such as color shift compensation algorithm, visual compensation algorithm, etc.) in the 2 sub-regions cannot keep the same at the boundary position of the 2 sub-regions, crosstalk easily occurs, and the display effect of the liquid crystal display panel cannot meet the viewing requirement.
Disclosure of Invention
The invention aims to provide a liquid crystal display device, which can improve the display effect of a boundary area of a liquid crystal display device driven by a double chip.
The present invention also provides a driving method of a liquid crystal display device, which can improve the display effect of the boundary region of the liquid crystal display device driven by the dual chip.
To achieve the above object, the present invention provides a liquid crystal display device comprising: the liquid crystal display panel comprises a first display area and a second display area which are arranged adjacently, wherein the partial area of one side of the second display area close to the first display area is a first boundary area, and the partial area of one side of the first display area close to the second display area is a second boundary area;
the first time schedule controller is used for receiving and processing the display data of the first display area and the first boundary area according to a preset image processing algorithm to obtain the modified display data of the first display area, and driving the first display area to display the picture by utilizing the modified display data of the first display area;
the second time schedule controller is used for receiving and processing the display data of the second display area and the second boundary area according to a preset image processing algorithm to obtain the modified display data of the second display area, and the modified display data of the second display area is used for driving the second display area to display the picture.
The first time schedule controller comprises a first data receiving unit, a first processing unit connected with the first data receiving unit, a first buffer connected with the first processing unit and a second buffer connected with the first buffer;
the second time schedule controller comprises a second data receiving unit, a second processing unit connected with the second data receiving unit and the first processing unit, a third buffer connected with the second processing unit and a fourth buffer connected with the third buffer;
setting N as a positive integer, within one frame time,
the first data receiving unit is used for receiving the display data of the (N + 2) th line of the first display area and the first boundary area;
the second data receiving unit is used for receiving the display data of the (N + 2) th line of the second display area and the second boundary area when the first data receiving unit receives the display data of the (N + 2) th line of the first display area and the first boundary area;
the first buffer is used for buffering the display data of the (N + 1) th line of the first display area and the first boundary area when the first data receiving unit receives the display data of the (N + 2) th line of the first display area and the first boundary area;
the second buffer is used for buffering the Nth line of display data of the first display area and the first boundary area when the first data receiving unit receives the (N + 2) th line of display data of the first display area and the first boundary area;
the third buffer is used for buffering the display data of the (N + 1) th line of the second display area and the second boundary area when the first data receiving unit receives the display data of the (N + 2) th line of the first display area and the first boundary area;
the fourth buffer is used for buffering the Nth line of display data of the second display area and the second boundary area when the first data receiving unit receives the (N + 2) th line of display data of the first display area and the first boundary area;
the first processing unit is used for performing algorithm processing on the (N + 2) th line display data and the (N + 1) th line display data of the first display area and the first boundary area to generate first transition data, receiving second transition data transmitted by the second processing unit, and correcting the (N + 2) th line display data of the first display area according to the second transition data;
the second processing unit is used for carrying out algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line of the second display area and the second boundary area to generate second transition data, receiving the first transition data transmitted by the first processing unit and correcting the display data of the (N + 2) th line of the second display area according to the first transition data.
The first processing unit generates first transition data before the first data receiving unit receives the display data of the (N + 3) th row of the first display area and the first boundary area;
the second processing unit generates second transition data before the second data receiving unit receives the display data of the (N + 3) th row of the second display area and the second boundary area;
the first processing unit finishes the correction of the display data of the (N + 2) th line of the first display area before the first data receiving unit receives the display data of the (N + 4) th line of the first display area and the first boundary area;
the second processing unit completes the correction of the display data of the (N + 2) th line of the second display area before the second data receiving unit receives the display data of the (N + 4) th line of the second display area and the second boundary area.
The first time schedule controller is used for receiving the Mth frame of display data of the first display area and the first boundary area, performing algorithm processing on the Mth frame of display data of the first display area and the first boundary area to obtain first intermediate data, receiving second intermediate data transmitted from the second time schedule controller, and correcting the M +1 th frame of display data of the first display area according to the second intermediate data, wherein M is a positive integer;
the second time schedule controller is used for receiving the M & ltth & gt frame display data of the second display area and the second boundary area, performing algorithm processing on the M & ltth & gt frame display data of the second display area and the second boundary area to obtain second intermediate data, receiving the first intermediate data transmitted from the first time schedule controller, and correcting the M & lt +1 & gt frame display data of the second display area according to the first intermediate data.
The first and second timing controllers correct display data of the (M + 1) th frame of the first and second display regions by adjusting a polarity of a driving voltage of the liquid crystal display device or a gamma curve of the liquid crystal display device.
The invention also provides a driving method of the liquid crystal display device, which comprises the following steps:
step S1, providing a liquid crystal display device, where the liquid crystal display device includes a liquid crystal display panel, and a first timing controller and a second timing controller electrically connected to the liquid crystal display panel, and the liquid crystal display panel includes a first display area and a second display area that are driven by the first timing controller and the second timing controller respectively and are adjacently disposed;
step S2, setting a partial area of the second display area on a side close to the first display area as a first boundary area, and setting a partial area of the first display area on a side close to the second display area as a second boundary area;
step S3, the first timing controller receives and processes the display data of the first display area and the first boundary area according to a preset image processing algorithm to obtain modified display data of the first display area, and drives the first display area to display an image by using the modified display data of the first display area, and the second timing controller receives and processes the display data of the second display area and the second boundary area according to a preset image processing algorithm to obtain modified display data of the second display area, and drives the second display area to display an image by using the modified display data of the second display area.
The step S3 specifically includes:
setting N as a positive integer, within one frame time,
step S31, the first timing controller receives the N +2 th line of display data of the first display area and the first boundary area, and buffers the N +1 th line of display data and the nth line of display data of the first display area and the first boundary area; the second time schedule controller receives the (N + 2) th line of display data of the second display area and the second boundary area and caches the (N + 1) th line of display data and the (N) th line of display data of the second display area and the second boundary area;
step S32, the first timing controller performs algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line of the first display area and the first boundary area to generate first transition data; the second time schedule controller carries out algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line of the second display area and the second boundary area to generate second transition data;
step S33, the first timing controller receives the second transition data, and corrects the display data of the (N + 2) th line of the first display area according to the second transition data; and the second time schedule controller receives the first transition data and corrects the (N + 2) th row display data of the second display area according to the first transition data.
Generating first transition data before the first timing controller receives display data of the (N + 3) th row of the first display area and the first boundary area;
generating second transition data before the second timing controller receives the display data of the (N + 3) th row of the second display area and the second boundary area;
completing the correction of the display data of the (N + 2) th line of the first display area before the first timing controller receives the display data of the (N + 4) th line of the first display area and the first boundary area;
and completing the correction of the display data of the (N + 2) th line of the second display area before the second timing controller receives the display data of the (N + 4) th line of the second display area and the second boundary area.
The step S3 specifically includes:
step S31', the first timing controller receives the mth frame display data of the first display area and the first boundary area, and performs algorithm processing on the mth frame display data of the first display area and the first boundary area to obtain first intermediate data; the second time schedule controller receives the Mth frame display data of the second display area and the second boundary area, and performs algorithm processing on the Mth frame display data of the second display area and the second boundary area to obtain second intermediate data, wherein M is a positive integer;
step S32', the first timing controller receiving the second intermediate data and correcting the display data of the M +1 th frame of the first display region according to the second intermediate data; the second time schedule controller receives the first intermediate data and corrects the display data of the (M + 1) th frame of the second display area according to the first intermediate data.
The first and second timing controllers correct display data of the (M + 1) th frame of the first and second display regions by adjusting a polarity of a driving voltage of the liquid crystal display device or a gamma curve of the liquid crystal display device.
The invention has the beneficial effects that: the invention provides a liquid crystal display device, comprising: the liquid crystal display panel comprises a first display area and a second display area which are arranged adjacently, wherein the partial area of one side of the second display area close to the first display area is a first boundary area, and the partial area of one side of the first display area close to the second display area is a second boundary area; when the double-chip driving liquid crystal display device is driven, the first time sequence controller receives and processes the display data of the first display area and the first boundary area according to a preset image processing algorithm, the second time sequence controller receives and processes the display data of the second display area and the second boundary area according to the preset image processing algorithm to obtain the corrected display data of the first display area and the second display area, and the first display area and the second display area are driven to display pictures according to the corrected display data, so that the display effect of the boundary area of the double-chip driving liquid crystal display device can be improved. The invention also provides a driving method of the liquid crystal display device, which can improve the display effect of the boundary area of the liquid crystal display device driven by the double chips.
Drawings
For a better understanding of the nature and technical aspects of the present invention, reference should be made to the following detailed description of the invention, taken in conjunction with the accompanying drawings, which are provided for purposes of illustration and description and are not intended to limit the invention.
In the drawings, there is shown in the drawings,
FIG. 1 is a schematic view of a liquid crystal display device according to the present invention;
FIG. 2 is a flow chart of a driving method of a liquid crystal display device according to the present invention;
FIG. 3 is a timing diagram of a liquid crystal display device according to a first embodiment of the present invention;
FIG. 4 is a timing diagram of a liquid crystal display device according to a second embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention, the following detailed description is given with reference to the preferred embodiments of the present invention and the accompanying drawings.
Referring to fig. 1, the present invention provides a liquid crystal display device, including: the liquid crystal display device comprises a liquid crystal display panel 10, and a first timing controller 11 and a second timing controller 12 which are electrically connected with the liquid crystal display panel 10, wherein the liquid crystal display panel 10 comprises a first display area 101 and a second display area 102 which are adjacently arranged, the partial area of one side of the second display area 102 close to the first display area 101 is a first boundary area 103, and the partial area of one side of the first display area 101 close to the second display area 102 is a second boundary area 104;
the first timing controller 11 is configured to receive and process the display data of the first display area 101 and the first boundary area 103 according to a preset image processing algorithm to obtain modified display data of the first display area 101, and drive the first display area 101 to display an image by using the modified display data of the first display area 101;
the second timing controller 12 is configured to receive and process the display data of the second display area 102 and the second boundary area 104 according to a preset image processing algorithm to obtain modified display data of the second display area 102, and drive the second display area 102 to display an image by using the modified display data of the second display area 102.
Specifically, as shown in fig. 1 and fig. 3, in the first embodiment of the present invention, the first timing controller 11 includes a first data receiving unit 31, a first processing unit 32 connected to the first data receiving unit 31, a first buffer 33 connected to the first processing unit 32, and a second buffer 34 connected to the first buffer 33;
the second timing controller 12 includes a second data receiving unit 41, a second processing unit 42 connected to the second data receiving unit 41 and the first processing unit 32, a third buffer 43 connected to the second processing unit 42, and a fourth buffer 44 connected to the third buffer 43;
setting N as a positive integer, within one frame time,
the first data receiving unit 31 is configured to receive display data of the (N + 2) th row in the first display area 101 and the first boundary area 103;
the second data receiving unit 41 is configured to receive the display data of the N +2 th row in the second display area 102 and the second boundary area 104 when the first data receiving unit 31 receives the display data of the N +2 th row in the first display area 101 and the first boundary area 103;
the first buffer 33 is used for buffering the display data of the (N + 1) th line of the first display area 101 and the first boundary area 103 when the first data receiving unit 31 receives the display data of the (N + 2) th line of the first display area 101 and the first boundary area 103;
the second buffer 34 is used for buffering the nth line of display data of the first display area 101 and the first boundary area 103 when the first data receiving unit 31 receives the (N + 2) th line of display data of the first display area 101 and the first boundary area 103;
the third buffer 43 is used for buffering the display data of the (N + 1) th line of the second display area 102 and the second boundary area 104 when the first data receiving unit 31 receives the display data of the (N + 2) th line of the first display area 101 and the first boundary area 103;
the fourth buffer 44 is used for buffering the nth line of display data of the second display area 102 and the second boundary area 104 when the first data receiving unit 31 receives the (N + 2) th line of display data of the first display area 101 and the first boundary area 103;
the first processing unit 32 is configured to perform algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line in the first display area 101 and the first boundary area 103 to generate first transition data, receive second transition data sent by the second processing unit 42, and correct the display data of the (N + 2) th line in the first display area 101 according to the second transition data;
the second processing unit 42 is configured to perform algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line in the second display area 102 and the second boundary area 104 to generate second transition data, receive the first transition data sent from the first processing unit 32, and modify the display data of the (N + 2) th line in the second display area 102 according to the first transition data.
Further, as shown in fig. 3, the first processing unit 32 generates first transition data before the first data receiving unit 31 receives the display data of the (N + 3) th row of the first display area 101 and the first boundary area 103; the second processing unit 42 generates second transition data before the second data receiving unit 41 receives the display data of the (N + 3) th row of the second display area 102 and the second boundary area 104; the first processing unit 32 completes the modification of the (N + 2) th row of display data of the first display area 101 before the first data receiving unit 31 receives the (N + 4) th row of display data of the first display area 101 and the first boundary area 103; the second processing unit 42 completes the modification of the display data of the (N + 2) th line of the second display region 102 before the second data receiving unit 41 receives the display data of the (N + 4) th line of the second display region 102 and the second boundary region 104, that is, the first transition data and the second transition data are generated before the time T1 in fig. 3, and the reception of the first transition data and the second transition data is completed before the time T2 in fig. 3.
Specifically, the time of the second transition data reception completion differs by at least 20 system clocks (Sys _ CLk) from the time of the second buffer 34 buffering the display data of the N +1 th line of the first display area 101 and the first border area 103; the time of the completion of receiving the first transition data and the time of the fourth buffer 44 buffering the display data of the (N + 1) th line of the second display area 102 and the fourth border area 104 differ by at least 20 system clocks.
Specifically, in the first embodiment of the present invention, the generation and transmission of the first transition data and the second transition data and the modification of the display data of the N +2 th line are all completed during line blanking (HS-Blank).
For example, in the first embodiment of the present invention, taking fig. 3 as an example, first, the first data receiving unit 31 receives the 3 rd line display data L3 of the first display area 101 and the first boundary area 103, the first buffer 33 buffers the 2 nd line display data L2 of the first display area 101 and the first boundary area 103, the second buffer 34 buffers the 1 st line display data L1 of the first display area 101 and the first boundary area 103, the second data receiving unit 41 receives the 3 rd line display data L3 ' of the second display area 102 and the second boundary area 104, the fourth buffer 43 buffers the 2 nd line display data L2 ' of the second display area 102 and the second boundary area 104, and the fourth buffer 44 buffers the 1 st line display data L1 ' of the second display area 102 and the second boundary area 104; then, after the line 2 display data L2/L2 ' is buffered by the first buffer 33/the third buffer 43 and before the time T1, the first processing unit 31 performs an algorithm process on the line 3 display data L3 and the line 2 display data L2 of the first display area 101 and the first boundary area 103 to generate first transition data, and sends the first transition data to the second processing unit 41, the second processing unit 41 performs an algorithm process on the line 3 display data L3 ' and the line 2 display data L2 ' of the second display area 102 and the second boundary area 104 to generate second transition data, and sends the second transition data to the first processing unit 31; then, between the time T1 and the time T2, the first transition data and the second transition data are completely received by the second processing unit 41 and the first processing unit 31, then, after the time T2 until the 3 rd line display data L3 of the first display area 101 and the 3 rd line display data L3 ' of the second display area 102 are buffered by the second buffer 34 and the fourth buffer 44, the first processing unit 31 corrects the 3 rd line display data L3 of the first display area 101 according to the second transition data, the second processing unit 41 corrects the 3 rd line display data L3 ' of the second display area 102 according to the first transition data, and finally, the corrected 3 rd line display data L3 of the first display area 101 and the 3 rd line display data L3 ' of the second display area 102 are respectively applied to the second buffer 34 and the fourth buffer 44, and the first liquid crystal display panel 10 performs correction according to the picture data passing through the second buffer 34 and the fourth buffer 44 The display effect of the liquid crystal display device, especially the display effect of the boundary area, can be improved, and the crosstalk phenomenon is eliminated.
Specifically, as shown in fig. 1 and 4, the first timing controller 11 is configured to receive the mth frame display data of the first display area 101 and the first boundary area 103, perform algorithm processing on the mth frame display data of the first display area 101 and the first boundary area 103 to obtain first intermediate data, transmit the first intermediate data to the second timing controller 12, receive the second intermediate data transmitted from the second timing controller 12, and correct the M +1 th frame display data of the first display area 101 according to the second intermediate data, where M is a positive integer;
the second timing controller 12 is configured to receive the mth frame display data of the second display area 102 and the second boundary area 104, perform algorithm processing on the mth frame display data of the second display area 102 and the second boundary area 104 to obtain second intermediate data, transmit the second intermediate data to the first timing controller 11, receive the first intermediate data transmitted from the first timing controller 11, and correct the M +1 th frame display data of the second display area 102 according to the first intermediate data.
Specifically, in the second embodiment of the present invention, the first and second timing controllers 11 and 12 correct the display data of the M +1 th frame of the first and second display regions 101 and 102 by adjusting the polarity of the driving voltage of the liquid crystal display device or the gamma curve of the liquid crystal display device.
Further, in the second embodiment of the present invention, the generation and transmission of the first intermediate data and the second intermediate data and the modification of the display data of the M +1 th frame are both completed during the frame blanking (VS-Blank), and further, as shown in fig. 4, the first intermediate data and the second intermediate data are generated after a plurality of system clocks after the reception of the display data of the mth frame is completed, i.e., T3 time in fig. 4, the reception of the plurality of system clocks of the first and second intermediate data by the first and second timing controllers 11 and 12 before the display data of the M +1 th frame is generated is completed, that is, time T4 in fig. 4, time T3 from the completion of the reception of the display data of the mth frame is the operation time for performing the arithmetic processing on the display data of the mth frame, and time T4 from the generation of the display data of the M +1 th frame is the time for correcting the display data of the M +1 th frame.
Preferably, the refresh frequency of the liquid crystal display device is 120Hz, and the resolution is 4K or 8K.
Therefore, the display data of the boundary area are mutually transmitted by the first time sequence driver 11 and the second time sequence driver 12, and the image processing is carried out on the basis of the display data of the corresponding display area and the display data of the boundary area of the adjacent display area, so that the display effect of the liquid crystal display device driven by the double chips, particularly the display effect of the boundary area, can be improved, and the crosstalk phenomenon can be eliminated.
Referring to fig. 2, based on the above-mentioned liquid crystal display device, the present invention further provides a driving method of the liquid crystal display device, including the following steps:
step S1, providing a liquid crystal display device, where the liquid crystal display device includes a liquid crystal display panel 10, and a first timing controller 11 and a second timing controller 12 electrically connected to the liquid crystal display panel 10, and the liquid crystal display panel 10 includes a first display area 101 and a second display area 102, which are driven by the first timing controller 11 and the second timing controller 12 respectively and are adjacently disposed;
step S2, setting a partial area of the second display area 102 on a side close to the first display area 101 as a first boundary area 103, and setting a partial area of the first display area 101 on a side close to the second display area 102 as a second boundary area 104;
in step S3, the first timing controller 11 receives and processes the display data of the first display area 101 and the first boundary area 103 according to a preset image processing algorithm to obtain modified display data of the first display area 101, and drives the first display area 101 to display an image by using the modified display data of the first display area 101, and the second timing controller 12 receives and processes the display data of the second display area 102 and the second boundary area 104 according to a preset image processing algorithm to obtain modified display data of the second display area 102, and drives the second display area 102 to display an image by using the modified display data of the second display area 102.
Specifically, as shown in fig. 3, in the first embodiment of the present invention, the step S3 specifically includes:
setting N as a positive integer, within one frame time,
step S31, the first timing controller 11 receives the display data of the (N + 2) th line in the first display area 101 and the first boundary area 103, and buffers the display data of the (N + 1) th line and the display data of the nth line in the first display area 101 and the first boundary area 103; the second timing controller 12 receives the (N + 2) th line of display data of the second display area 102 and the second boundary area 104, and buffers the (N + 1) th line of display data and the (N) th line of display data of the second display area 102 and the second boundary area 104;
step S32, the first timing controller 11 performs algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line of the first display area 101 and the first boundary area 103 to generate first transition data; the second timing controller 12 performs algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line in the second display area 102 and the second boundary area 104 to generate second transition data;
step S33, the first timing controller 11 receives the second transition data, and corrects the display data of the (N + 2) th line of the first display area 101 according to the second transition data; the second timing controller 12 receives the first transition data, and corrects the display data of the (N + 2) th row of the second display region 102 according to the first transition data.
Further, in the first embodiment of the present invention, the first transition data is generated before the first timing controller 11 receives the display data of the (N + 3) th rows of the first display area 101 and the first border area 103; generating second transition data before the second timing controller 12 receives the display data of the (N + 3) th rows of the second display region 102 and the second border area 104; completing the correction of the display data of the (N + 2) th row of the first display area 101 before the first timing controller 11 receives the display data of the (N + 4) th row of the first display area 101 and the first border area 103; the correction of the display data of the (N + 2) th line of the second display region 102 is completed before the second timing controller 12 receives the display data of the (N + 4) th line of the second display region 102 and the second border area 104, that is, the first transition data and the second transition data are generated before the time T1 in fig. 3, and the reception of the first transition data and the second transition data is completed before the time T2 in fig. 3.
Specifically, the time when the second transition data is received is different from the time when the first timing controller 11 receives the first display region 101 and the (N + 2) th row display data of the first border region 103 by at least 20 system clocks (Sys _ CLk); the time when the first transition data is received is different from the time when the second timing controller 12 receives the display data of the (N + 2) th row of the second display region 102 and the fourth border region 104 by at least 20 system clocks.
Specifically, in the first embodiment of the present invention, the generation and transmission of the first transition data and the second transition data and the modification of the display data of the N +2 th line are all completed during line blanking (HS-Blank).
For example, in the first embodiment of the present invention, taking fig. 3 as an example, first, the first timing controller 11 receives the 3 rd line display data L3 of the first display region 101 and the first boundary region 103, while the first timing controller 11 first buffers the 2 nd line display data L2 of the first display region 101 and the first boundary region 103 and second buffers the 1 st line display data L1 of the first display region 101 and the first boundary region 103, the second timing controller 12 receives the second display region 102 and the second boundary region 104 the 3 rd line display data L3 ', the second timing controller 12 first buffers the second display region 102 and the second boundary region 104 the 2 nd line display data L2 ', and the second timing controller 12 second buffers the second display region 102 and the second boundary region 104 the 1 st line display data L1 '; next, after the 2 nd row display data L2/L2 ' is buffered at one stage by the first timing controller 11/the second timing controller 12 until T1, the first timing controller 11 performs an arithmetic process on the 3 rd row display data L3 and the 2 nd row display data L2 of the first display area 101 and the first boundary area 103 to generate first transition data and transmits the first transition data to the second timing controller 12, and the second timing controller 12 performs an arithmetic process on the 3 rd row display data L3 ' and the 2 nd row display data L2 ' of the second display area 102 and the second boundary area 104 to generate second transition data and transmits the second transition data to the first timing controller 11; then, between the time T1 and the time T2, the reception of the first transition data and the second transition data by the first timing controller 11 and the second timing controller 12 is completed, then, after the time T2 until the 3 rd line display data L3 of the first display region 101 and the 3 rd line display data L3 'of the second display region 102 are secondarily buffered by the first timing controller 11 and the second timing controller 12, the first timing controller 11 corrects the 3 rd line display data L3 of the first display region 101 according to the second transition data, the second timing controller 12 corrects the 3 rd line display data L3' of the second display region 102 according to the first transition data, and finally, the first timing controller 11 and the second timing controller 12 secondarily buffer the corrected 3 rd line display data L3 of the first display region 101 and the 3 rd line display data L3 ',3625' of the second display region 102, respectively, the first lcd panel 10 displays images according to the corrected display data cached in the second levels of the first and second timing controllers 11 and 12, so as to improve the display effect of the lcd device, especially the display effect of the boundary region, and eliminate the crosstalk.
Specifically, with reference to fig. 4, in the second embodiment of the present invention, the step S3 specifically includes:
step S31', the first timing controller 11 receives the mth frame display data of the first display area 101 and the first boundary area 103, and performs algorithm processing on the mth frame display data of the first display area 101 and the first boundary area 103 to obtain first intermediate data; the second timing controller 12 receives the mth frame display data of the second display area 102 and the second boundary area 104, and performs algorithm processing on the mth frame display data of the second display area 102 and the second boundary area 104 to obtain second intermediate data, where M is a positive integer;
step S32', the first timing controller 11 receives the second intermediate data and corrects the display data of the M +1 th frame of the first display region 101 according to the second intermediate data; the second timing controller 12 receives the first intermediate data and corrects the display data of the (M + 1) th frame of the second display region 102 according to the first intermediate data.
Further, the first and second timing controllers 11 and 12 correct the display data of the M +1 th frame of the first and second display regions 101 and 102 by adjusting the polarity of the driving voltage of the liquid crystal display device or the gamma curve of the liquid crystal display device.
Further, in the second embodiment of the present invention, the generation and transmission of the first intermediate data and the second intermediate data and the modification of the display data of the M +1 th frame are both completed during the frame blanking (VS-Blank), and further, as shown in fig. 4, the first intermediate data and the second intermediate data are generated after a plurality of system clocks after the reception of the display data of the mth frame is completed, i.e., T3 time in fig. 4, the reception of the plurality of system clocks of the first and second intermediate data by the first and second timing controllers 11 and 12 before the display data of the M +1 th frame is generated is completed, that is, time T4 in fig. 4, time T3 from the completion of the reception of the display data of the mth frame is the operation time for performing the arithmetic processing on the display data of the mth frame, and time T4 from the generation of the display data of the M +1 th frame is the time for correcting the display data of the M +1 th frame.
Preferably, the refresh frequency of the liquid crystal display device is 120Hz, and the resolution is 4K or 8K.
Therefore, the display data of the boundary area are mutually transmitted by the first time sequence driver 11 and the second time sequence driver 12, and the image processing is carried out on the basis of the display data of the corresponding display area and the display data of the boundary area of the adjacent display area, so that the display effect of the liquid crystal display device driven by the double chips, particularly the display effect of the boundary area, can be improved, and the crosstalk phenomenon can be eliminated.
In summary, the present invention provides a liquid crystal display device, including: the liquid crystal display panel comprises a first display area and a second display area which are arranged adjacently, wherein the partial area of one side of the second display area close to the first display area is a first boundary area, and the partial area of one side of the first display area close to the second display area is a second boundary area; when the double-chip driving liquid crystal display device is driven, the first time sequence controller receives and processes the display data of the first display area and the first boundary area according to a preset image processing algorithm, the second time sequence controller receives and processes the display data of the second display area and the second boundary area according to the preset image processing algorithm to obtain the corrected display data of the first display area and the second display area, and the first display area and the second display area are driven to display pictures according to the corrected display data, so that the display effect of the boundary area of the double-chip driving liquid crystal display device can be improved. The invention also provides a driving method of the liquid crystal display device, which can improve the display effect of the boundary area of the liquid crystal display device driven by the double chips.
As described above, it will be apparent to those skilled in the art that other various changes and modifications may be made based on the technical solution and concept of the present invention, and all such changes and modifications are intended to fall within the scope of the appended claims.
Claims (7)
1. A liquid crystal display device, comprising: the liquid crystal display panel comprises a liquid crystal display panel (10), and a first timing controller (11) and a second timing controller (12) which are electrically connected with the liquid crystal display panel (10), wherein the liquid crystal display panel (10) comprises a first display area (101) and a second display area (102) which are adjacently arranged, a partial area of one side, close to the first display area (101), of the second display area (102) is a first boundary area (103), and a partial area of one side, close to the second display area (102), of the first display area (101) is a second boundary area (104);
the first timing controller (11) is used for receiving and processing the display data of the first display area (101) and the first boundary area (103) according to a preset image processing algorithm to obtain the modified display data of the first display area (101), and driving the first display area (101) to display a picture by utilizing the modified display data of the first display area (101);
the second timing controller (12) is used for receiving and processing the display data of the second display area (102) and the second boundary area (104) according to a preset image processing algorithm to obtain the modified display data of the second display area (102), and driving the second display area (102) to display the picture by utilizing the modified display data of the second display area (102);
the first time schedule controller (11) comprises a first data receiving unit (31), a first processing unit (32) connected with the first data receiving unit (31), a first buffer (33) connected with the first processing unit (32) and a second buffer (34) connected with the first buffer (33);
the second timing controller (12) comprises a second data receiving unit (41), a second processing unit (42) connected with the second data receiving unit (41) and the first processing unit (32), a third buffer (43) connected with the second processing unit (42) and a fourth buffer (44) connected with the third buffer (43);
setting N as a positive integer, within one frame time,
the first data receiving unit (31) is used for receiving the display data of the (N + 2) th line of the first display area (101) and the first boundary area (103);
the second data receiving unit (41) is used for receiving the display data of the (N + 2) th line of the second display area (102) and the second boundary area (104) when the first data receiving unit (31) receives the display data of the (N + 2) th line of the first display area (101) and the first boundary area (103);
the first buffer (33) is used for buffering the display data of the (N + 1) th line of the first display area (101) and the first boundary area (103) when the first data receiving unit (31) receives the display data of the (N + 2) th line of the first display area (101) and the first boundary area (103);
the second buffer (34) is used for buffering the display data of the Nth line of the first display area (101) and the first boundary area (103) when the first data receiving unit (31) receives the display data of the (N + 2) th line of the first display area (101) and the first boundary area (103);
the third buffer (43) is used for buffering the display data of the (N + 1) th line of the second display area (102) and the second boundary area (104) when the first data receiving unit (31) receives the display data of the (N + 2) th line of the first display area (101) and the first boundary area (103);
the fourth buffer (44) is used for buffering the display data of the Nth line of the second display area (102) and the second boundary area (104) when the first data receiving unit (31) receives the display data of the (N + 2) th line of the first display area (101) and the first boundary area (103);
the first processing unit (32) is used for performing algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line of the first display area (101) and the first boundary area (103) to generate first transition data, receiving second transition data transmitted by the second processing unit (42), and correcting the display data of the (N + 2) th line of the first display area (101) according to the second transition data;
the second processing unit (42) is used for performing algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line of the second display area (102) and the second boundary area (104) to generate second transition data, receiving the first transition data transmitted by the first processing unit (32), and correcting the display data of the (N + 2) th line of the second display area (102) according to the first transition data.
2. The lcd apparatus of claim 1, wherein the first processing unit (32) generates first transition data before the first data receiving unit (31) receives display data of the N +3 th line of the first display region (101) and the first border area (103);
the second processing unit (42) generates second transition data before the second data receiving unit (41) receives the display data of the (N + 3) th row of the second display area (102) and the second boundary area (104);
the first processing unit (32) completes the correction of the display data of the (N + 2) th line of the first display area (101) before the first data receiving unit (31) receives the display data of the (N + 4) th line of the first display area (101) and the first boundary area (103);
the second processing unit (42) completes the correction of the display data of the (N + 2) th line of the second display area (102) before the second data receiving unit (41) receives the display data of the (N + 4) th line of the second display area (102) and the second boundary area (104).
3. A liquid crystal display device, comprising: the liquid crystal display panel comprises a liquid crystal display panel (10), and a first timing controller (11) and a second timing controller (12) which are electrically connected with the liquid crystal display panel (10), wherein the liquid crystal display panel (10) comprises a first display area (101) and a second display area (102) which are adjacently arranged, a partial area of one side, close to the first display area (101), of the second display area (102) is a first boundary area (103), and a partial area of one side, close to the second display area (102), of the first display area (101) is a second boundary area (104);
the first timing controller (11) is used for receiving and processing the display data of the first display area (101) and the first boundary area (103) according to a preset image processing algorithm to obtain the modified display data of the first display area (101), and driving the first display area (101) to display a picture by utilizing the modified display data of the first display area (101);
the second timing controller (12) is used for receiving and processing the display data of the second display area (102) and the second boundary area (104) according to a preset image processing algorithm to obtain the modified display data of the second display area (102), and driving the second display area (102) to display the picture by utilizing the modified display data of the second display area (102);
the first time schedule controller (11) is used for receiving the Mth frame display data of the first display area (101) and the first boundary area (103), performing algorithm processing on the Mth frame display data of the first display area (101) and the first boundary area (103) to obtain first intermediate data, transmitting the first intermediate data to the second time schedule controller (12), receiving second intermediate data transmitted from the second time schedule controller (12), and correcting the M +1 th frame display data of the first display area (101) according to the second intermediate data, wherein M is a positive integer;
the second timing controller (12) is configured to receive the mth frame display data of the second display area (102) and the second boundary area (104), perform algorithm processing on the mth frame display data of the second display area (102) and the second boundary area (104), obtain second intermediate data, transmit the second intermediate data to the first timing controller (11), receive the first intermediate data transmitted from the first timing controller (11), and correct the M +1 frame display data of the second display area (102) according to the first intermediate data.
4. The liquid crystal display device according to claim 3, wherein the first and second timing controllers (11, 12) correct the display data of the (M + 1) th frame of the first and second display regions (101, 102) by adjusting a polarity of a driving voltage of the liquid crystal display device or a gamma curve of the liquid crystal display device.
5. A method for driving a liquid crystal display device, comprising the steps of:
step S1, providing a liquid crystal display device, wherein the liquid crystal display device comprises a liquid crystal display panel (10), and a first timing controller (11) and a second timing controller (12) which are electrically connected with the liquid crystal display panel (10), and the liquid crystal display panel (10) comprises a first display area (101) and a second display area (102) which are adjacently arranged and are driven by the first timing controller (11) and the second timing controller (12) respectively;
step S2, setting a partial area of one side of the second display area (102) close to the first display area (101) as a first boundary area (103), and setting a partial area of one side of the first display area (101) close to the second display area (102) as a second boundary area (104);
step S3, the first timing controller (11) receives and processes the display data of the first display area (101) and the first boundary area (103) according to a preset image processing algorithm to obtain modified display data of the first display area (101), and drives the first display area (101) to display the image by using the modified display data of the first display area (101), and the second timing controller (12) receives and processes the display data of the second display area (102) and the second boundary area (104) according to a preset image processing algorithm to obtain modified display data of the second display area (102), and drives the second display area (102) to display the image by using the modified display data of the second display area (102);
the step S3 specifically includes:
setting N as a positive integer, within one frame time,
step S31, the first timing controller (11) receives the display data of the (N + 2) th line of the first display area (101) and the first boundary area (103), and buffers the display data of the (N + 1) th line and the display data of the nth line of the first display area (101) and the first boundary area (103); the second timing controller (12) receives the (N + 2) th line of display data of the second display area (102) and the second boundary area (104), and caches the (N + 1) th line of display data and the (N) th line of display data of the second display area (102) and the second boundary area (104);
step S32, the first timing controller (11) carries out algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line of the first display area (101) and the first boundary area (103) to generate first transition data; the second time schedule controller (12) carries out algorithm processing on the display data of the (N + 2) th line and the display data of the (N + 1) th line of the second display area (102) and the second boundary area (104) to generate second transition data;
step S33, the first time schedule controller (11) receives the second transition data, and corrects the display data of the (N + 2) th line of the first display area (101) according to the second transition data; the second time schedule controller (12) receives the first transition data and corrects the (N + 2) th line display data of the second display area (102) according to the first transition data;
generating first transition data before the first timing controller (11) receives display data of the (N + 3) th row of the first display area (101) and the first border area (103);
generating second transition data before the second timing controller (12) receives display data of the (N + 3) th rows of the second display region (102) and the second border region (104);
completing the correction of the display data of the (N + 2) th line of the first display area (101) before the first timing controller (11) receives the display data of the (N + 4) th line of the first display area (101) and the first boundary area (103);
the correction of the display data of the (N + 2) th line of the second display area (102) is completed before the second timing controller (12) receives the display data of the (N + 4) th line of the second display area (102) and the second boundary area (104).
6. A method for driving a liquid crystal display device, comprising the steps of:
step S1, providing a liquid crystal display device, wherein the liquid crystal display device comprises a liquid crystal display panel (10), and a first timing controller (11) and a second timing controller (12) which are electrically connected with the liquid crystal display panel (10), and the liquid crystal display panel (10) comprises a first display area (101) and a second display area (102) which are adjacently arranged and are driven by the first timing controller (11) and the second timing controller (12) respectively;
step S2, setting a partial area of one side of the second display area (102) close to the first display area (101) as a first boundary area (103), and setting a partial area of one side of the first display area (101) close to the second display area (102) as a second boundary area (104);
step S3, the first timing controller (11) receives and processes the display data of the first display area (101) and the first boundary area (103) according to a preset image processing algorithm to obtain modified display data of the first display area (101), and drives the first display area (101) to display the image by using the modified display data of the first display area (101), and the second timing controller (12) receives and processes the display data of the second display area (102) and the second boundary area (104) according to a preset image processing algorithm to obtain modified display data of the second display area (102), and drives the second display area (102) to display the image by using the modified display data of the second display area (102);
the step S3 specifically includes:
step S31', the first timing controller (11) receives the mth frame display data of the first display area (101) and the first boundary area (103), and performs an algorithm process on the mth frame display data of the first display area (101) and the first boundary area (103) to obtain first intermediate data; the second time schedule controller (12) receives the Mth frame display data of the second display area (102) and the second boundary area (104), and performs algorithm processing on the Mth frame display data of the second display area (102) and the second boundary area (104) to obtain second intermediate data, wherein M is a positive integer;
step S32', the first timing controller (11) receiving the second intermediate data and correcting the display data of the M +1 th frame of the first display region (101) according to the second intermediate data; the second timing controller (12) receives the first intermediate data and corrects the display data of the (M + 1) th frame of the second display region (102) according to the first intermediate data.
7. The method of claim 6, wherein the first and second timing controllers (11, 12) correct display data of the (M + 1) th frame of the first and second display regions (101, 102) by adjusting a polarity of a driving voltage of the liquid crystal display device or a gamma curve of the liquid crystal display device.
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| CN109064987A (en) * | 2018-08-31 | 2018-12-21 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and liquid crystal display device with the liquid crystal display panel |
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| TWI407421B (en) * | 2009-02-17 | 2013-09-01 | Au Optronics Corp | Driving apparatus for driving a liquid crystal display panel |
| KR102248841B1 (en) * | 2014-05-21 | 2021-05-06 | 삼성전자주식회사 | Display apparatus, electronic device comprising thereof and operating method of thereof |
| KR102257202B1 (en) * | 2014-12-26 | 2021-05-28 | 엘지디스플레이 주식회사 | Multi timming controlls and display device using the same |
| CN107731148B (en) * | 2017-10-31 | 2021-05-07 | 武汉天马微电子有限公司 | Display screen voltage configuration method and device and display equipment |
| CN107945727B (en) * | 2017-11-23 | 2020-06-05 | 深圳市华星光电半导体显示技术有限公司 | Mura phenomenon compensation method and device |
| JP2019113672A (en) * | 2017-12-22 | 2019-07-11 | シャープ株式会社 | Display controller, display device, and method for control |
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| CN105867867A (en) * | 2016-04-19 | 2016-08-17 | 京东方科技集团股份有限公司 | Display control method, device and system |
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