CN110413036B - Voltage adjusting device and electronic equipment - Google Patents
Voltage adjusting device and electronic equipment Download PDFInfo
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- CN110413036B CN110413036B CN201810393135.7A CN201810393135A CN110413036B CN 110413036 B CN110413036 B CN 110413036B CN 201810393135 A CN201810393135 A CN 201810393135A CN 110413036 B CN110413036 B CN 110413036B
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- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/625—Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is ac or dc
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Abstract
The embodiment of the invention relates to the technical field of power management, and discloses a voltage adjusting device and electronic equipment, wherein the device comprises: the chip comprises a power supply module, a first chip and a second chip; the power supply module comprises a signal feedback end and a voltage output end, the first chip comprises a first voltage input end and a first signal output end, and the second chip comprises a second voltage input end, a first signal input end and a second signal output end; the voltage output end is connected with the first voltage input end and the second voltage input end; the first signal output end is connected with the first signal input end; the second signal output end is connected with the signal feedback end; the second chip receives a first indication signal which is sent by the first chip and indicates a first voltage; calculating a weighted sum of the first voltage and the second voltage to obtain a third voltage, and outputting a second indicating signal indicating the third voltage to the signal feedback; the power supply module adjusts the output voltage according to the third voltage; the power consumption of the chip can be reduced on the premise of reducing the cost overhead.
Description
Technical Field
The present invention relates to the field of power management technologies, and in particular, to a voltage regulator and an electronic device.
Background
Adaptive Voltage Scaling (AVS) is an effective power management technique. The AVS adjusts the frequency according to a certain strategy through monitoring hardware, and adaptively adjusts the voltage based on the working condition of the load, so that the power consumption of the load can be further reduced by 30-70%. One of the great features of the AVS technique is that it can reduce the system power consumption without affecting the system functions and various indexes.
Currently, the AVS functionality used on a chip basically takes the form of a digital interface, i.e. the voltage of the power supply is dynamically adjusted via the digital interface. At present, the AVS function is mainly used on a high-power chip, and each chip is provided with an AVS power supply. In practical use, when one device has a plurality of small power chips to use the AVS function, a plurality of AVS power supplies need to be configured, that is, one AVS power supply is configured for each small power chip. This requires an increase in the area of a Printed Circuit Board (PCB) to facilitate the placement of these AVS power supplies, and increases the cost of the device.
The technical solution has the disadvantage of high cost. Therefore, there is a need to develop a low-cost solution for reducing chip power consumption.
Disclosure of Invention
The application provides a device and electronic equipment for adjusting voltage, which can reduce the power consumption of a chip on the premise of reducing cost.
In a first aspect, the present application provides an apparatus for regulating voltage, comprising:
a power module and a plurality of chips;
the plurality of chips include a first chip and a second chip;
the power supply module comprises a signal feedback end and a voltage output end, the first chip comprises a first voltage input end and a first signal output end, and the second chip comprises a second voltage input end, a first signal input end and a second signal output end;
the voltage output end is connected with the first voltage input end and the second voltage input end; the first signal output end is connected with the first signal input end; the second signal output end is connected with the signal feedback end;
the second chip is used for receiving a first indication signal from the first chip from the first signal input end, and the first indication signal indicates a first voltage; calculating a weighted sum of the first voltage and the second voltage to obtain a third voltage, and outputting a second indication signal from the second signal output end to the signal feedback end, wherein the second indication signal indicates the third voltage;
and the power supply module is used for receiving the second indication signal from the signal feedback end and adjusting the voltage output from the voltage output end according to the third voltage.
The power supply module can adjust the voltage output by the voltage output end according to the indication signal from the second chip. The first chip and the second chip can both acquire information related to system load and calculate the current system load according to the information; and then, determining the required voltage or the voltage required to be adjusted according to the calculated system load, and generating a corresponding signal to be sent to the power supply module or a next-stage chip connected with the power supply module. That is to say, the first chip and the second chip may instruct the power module to adjust the voltage output by the voltage output terminal of the power module according to their own voltage requirements. The AVS function refers to an adaptive voltage regulation function, i.e., adaptively adjusting the output voltage of the power supply module. The power module provides the same voltage for the first chip and the second chip, that is, the voltage output by the voltage output end to the first voltage input end is the same as the voltage output by the voltage output end to the second voltage input end. The power supply module can adjust the output voltage of the power supply module by integrating the voltage requirements of the first chip and the second chip, so that the voltage requirements of the two chips are met. It can be understood that the voltage adjusting device includes at least two chips, the first chip is a previous chip of the second chip, and the first chip and the second chip are connected in a cascade manner. The power module may be an independent power supply, that is, only supplies power to the plurality of cascaded chips, and does not supply power to other components in the voltage regulating device.
In the application, a plurality of chips share one power supply module, the voltage required by the chips is fed back in a cascading mode, and the power supply module synthesizes the voltage requirements of the chips to adjust the output voltage to realize the AVS function; the number of power modules can be reduced and the cost of the device can be reduced.
In an optional implementation, the plurality of chips further includes:
a third chip;
the third chip comprises a third voltage input end and a third signal output end, and the first chip further comprises a second signal input end;
the voltage output end is connected with the third voltage input end, and the third signal output end is connected with the second signal input end;
the third chip is configured to output a third indication signal from the third signal output terminal to the first chip, where the third indication signal indicates a fourth voltage; the first chip calculates a weighted sum of the fourth voltage and the fifth voltage to obtain the first voltage, and outputs the first indication signal from the first signal output terminal to the first signal input terminal.
The means for adjusting voltage may include three chips, i.e., the first chip, the second chip, and the third chip; the first chip is a previous-level chip of the second chip, and the third chip is a previous-level chip of the first chip. It is understood that the voltage adjusting apparatus may include three or more chips, the third chip is a first chip, the second chip is a last chip, and the first chip is a chip located between the third chip and the second chip. At least one chip may be included between the third chip and the second chip. In the present application, the number of chips included in the voltage adjusting device is not limited. The fourth voltage is a voltage value required by the third chip or a voltage value required to be adjusted; the fifth voltage is a voltage value required by the first chip or a voltage value required to be adjusted. It is understood that any chip in the first chip stage and the last chip stage can calculate the weighted sum of the voltage value indicated by the chip in the previous chip stage and the voltage value required by the chip or the voltage value required to be adjusted, and send the weighted sum to the chip in the next chip stage through an indication signal.
In an optional implementation, the third voltage is a voltage value required by the plurality of chips;
the power supply module is specifically configured to adjust the voltage output by the voltage output terminal to the third voltage.
In the implementation mode, a power supply module supplies power to a plurality of chips, and the output voltage of the power supply module is adjusted according to the voltage values required by the chips; the realization is simple.
In an alternative implementation, the first chip includes a first feedback module, and the second chip includes a second feedback module; the output end of the first feedback module is connected with the first signal output end; the first signal input end is connected with the first input end of the second feedback module, and the output end of the second feedback module is connected with the second signal output end;
the first feedback module is used for determining the first voltage according to the performance requirement and the environmental parameter of the first chip; generating the first indication signal and outputting the first indication signal to the second chip from the output end of the first feedback module;
the second feedback module is used for determining the second voltage according to the performance requirement and the environmental parameter of the second chip; receiving the first indication signal through the first signal input; calculating a weighted sum of the first voltage and the second voltage to obtain the third voltage; and generating the second indication signal, and outputting the second indication signal to a signal feedback end of the power supply module from an output end of the second feedback module.
The performance requirement may be a system load, i.e. a load of the first chip or the second chip; or the performance of the chip required in the next time period, which is predicted by the chip according to the current system load, that is, the performance of the first chip or the second chip required in the next time period. The environmental parameters may include the temperature of the chip, the clock frequency inside the chip, etc.
In the implementation manner, the first chip and the second chip can determine the required voltages according to the performance requirements and the environmental parameters of the first chip and the second chip, and perform feedback so as to meet the voltage requirements of the first chip and the second chip; the AVS function of a plurality of chips can be realized by using one power supply, and the realization is simple.
In an optional implementation, the apparatus further comprises: a first hardware performance monitor and a second hardware performance monitor; the output end of the first hardware performance monitor is connected with the input end of the first feedback module; the output end of the second hardware performance monitor is connected with the second input end of the second feedback module;
the first hardware performance monitor is used for monitoring the performance requirement and the environmental parameter of the first chip and outputting the performance requirement and the environmental parameter to the input end of the first feedback module;
and the second hardware performance monitor is used for monitoring the performance requirement and the environmental parameter of the second chip and outputting the performance requirement and the environmental parameter to a second input end of the second feedback module.
The first hardware performance monitor is integrated with the first chip and the second hardware performance monitor is integrated with the second chip. Alternatively, the first hardware performance monitor is integrated with the first feedback module and the second hardware performance monitor is integrated with the second feedback module. Alternatively, the first hardware performance monitor is integrated with the first chip and the second hardware performance monitor is integrated with the second feedback module. The hardware performance monitor may be a hardware performance monitoring circuit. The hardware performance monitor is used for AVS closed-loop voltage control. The first feedback module may determine an optimal supply voltage according to the performance information of the first chip provided by the first hardware performance monitor, so as to achieve a performance level required by the first chip; the second feedback module may determine an optimal supply voltage according to the performance information of the second chip provided by the second hardware performance monitor, so as to achieve a performance level required by the second chip.
In the implementation mode, the performance requirement and the environmental parameter of the chip are monitored by the hardware performance monitor, so that the feedback module determines the voltage required by the chip, and the performance requirement and the environmental parameter of the chip can be detected quickly and accurately.
In an optional implementation manner, the third voltage is a voltage value required to be adjusted by the plurality of chips;
the power supply module is specifically configured to increase or decrease the voltage output by the voltage output terminal according to the third voltage.
In the implementation mode, a power supply module supplies power to a plurality of chips, and the output voltage of the chips is adjusted according to the voltage values required to be adjusted by the chips; the realization is simple.
In an alternative implementation, the first chip includes a third feedback module, and the second chip includes a fourth feedback module; the output end of the third feedback module is connected with the first signal output end; the first signal input end is connected with the first input end of the fourth feedback module, and the output end of the fourth feedback module is connected with the second signal output end;
the third feedback module is used for calculating a difference value between the output voltage of the power supply module and a first preset voltage to obtain the first voltage; generating the first indication signal and outputting the first indication signal to the second chip through the first signal output end; the first preset voltage is a working voltage preset by the first chip;
the fourth feedback module is used for calculating a difference value between the output voltage of the power supply module and a second preset voltage to obtain the second voltage; receiving the first indication signal through the first input terminal; calculating a weighted sum of the first voltage and the second voltage to obtain the third voltage; generating the second indication signal and outputting the second indication signal to the power supply module through the second signal output end; the second preset voltage is a preset working voltage of the second chip.
In the implementation mode, the first chip and the second chip both feed back the voltages which need to be regulated respectively, so that the voltage provided by the power supply meets the preset working voltage of each chip, and the implementation is simple.
In an optional implementation manner, an input end of the third feedback module is connected to the first voltage input end; a second input end of the fourth feedback module is connected with the second voltage input end;
the third feedback module is further used for detecting the output voltage of the power supply module;
the fourth feedback module is further configured to detect an output voltage of the power module.
The third feedback module and the fourth feedback module both comprise voltage detection units, and the voltage detection units can detect the output voltage of the power supply. Specifically, the third feedback module and the fourth feedback module respectively include a voltage detection unit or a voltage detection circuit for detecting the output voltage of the power supply.
In this implementation manner, the third feedback module and the fourth feedback module can both detect the output voltage of the voltage, and then feed back the voltage to be adjusted.
In an optional implementation manner, the first voltage is a voltage value required by the first chip; the second voltage is a voltage value required by the second chip;
the power supply module is specifically configured to adjust the voltage output by the voltage output terminal to the third voltage.
Optionally, the voltage value required by the first chip is a minimum operating voltage required by the first chip; the voltage value required by the second chip is the lowest working voltage required by the second chip.
In this implementation, the first chip and the second chip both determine the minimum required operating voltage, which may reduce power consumption.
In an optional implementation manner, the first voltage is a voltage value required to be adjusted by the first chip; the second voltage is a voltage value required to be adjusted by the second chip;
the power module is specifically configured to increase or decrease the voltage output by the voltage output terminal by the third voltage.
In this implementation manner, the first chip and the second chip both determine voltages that need to be adjusted, and can quickly adjust the voltage output by the power module.
In an optional implementation manner, the first indication signal and the second indication signal are both analog signals; the amplitude of the first indication signal is positively correlated with the first voltage; the amplitude of the second indication signal is positively correlated with the third voltage;
or, the first indication signal and the second indication signal are both digital signals, the first indication signal includes the first voltage, and the second indication signal includes the third voltage. .
Optionally, the first signal output end is connected to the first signal input end through a system bus; the first chip sends the first indication signal to the second chip through a system bus.
In the implementation mode, the feedback is carried out through the analog signal, and the magnitude of the required voltage is indicated by the height of the analog signal, so that the implementation is simple; the voltage output by the power supply module can be more accurately adjusted by feeding back the digital signal, and the precision is high.
In a second aspect, the present application provides an electronic device, which includes the apparatus in the first aspect or any implementation manner of the first aspect.
In the application, the electronic equipment supplies power for the plurality of chips through one power supply to realize the AVS function, so that the number of the power supplies can be reduced, and the equipment cost is reduced.
In a third aspect, the present application provides a computer-readable storage medium storing a computer program comprising program instructions which, when executed by a second chip, the second chip performs the operation of calculating a weighted sum of a first voltage and a second voltage of the first aspect described above.
Drawings
In order to more clearly explain the technical solution in the present application, the drawings used in the present application or background will be described below.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;
fig. 2-6 are schematic diagrams of an apparatus for adjusting voltage according to an embodiment of the present disclosure.
Detailed Description
In the existing technical solution, if one chip needs to implement the AVS function, the chip needs to have an independent power module to supply power. That is, if a plurality of chips need to use the AVS function, each chip needs an independent power module for supplying power. This approach requires a greater number of power modules and is more costly. In addition, the larger number of power supplies increases the area of the PCB board. Therefore, there is a need to develop a low-cost solution for reducing chip power consumption.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present invention. As shown in fig. 1, the electronic device 100 includes: a chipset 131 and a power module 132 for supplying power to the chipset 131. The chipset 131 includes a plurality of chips connected in a cascade. In fig. 1, the chipset 131 includes four chips 131-1, 131-2, 131-3 and 131-4; chips 131-1, 131-2, 131-3 and 131-4 are cascaded in sequence as an example. In a specific implementation, the chipset 131 may include only two chips, or may include three or more chips. The power module 132 supplies power to a plurality of chips included in the chipset 131. The plurality of cascaded chips comprised by chipset 131 may be mutually independent chips, i.e. not functionally related; or may be chips that are related to each other, i.e., a plurality of chips cooperate to perform some functions. The power module 132 and the chipset 131 may be disposed on a PCB board of the electronic device 100.
The power module 132 may adjust the voltage output to the chipset 132 accordingly according to the overall voltage requirements of the plurality of chips included in the chipset 132.
The electronic device 100 may also include a processor, memory, a communication interface, peripheral systems, and the like. Wherein the power module 132 and the chipset 131 may form a voltage adjusting device, that is, the electronic device in fig. 1 includes the voltage adjusting device in fig. 2.
It should be understood that electronic device 100 is only one example provided by embodiments of the present invention and that electronic device 100 may have more or fewer components, may combine two or more components, or may have a different configuration implementation of components.
Fig. 2 shows a schematic diagram of an apparatus for adjusting voltage according to an embodiment of the present application. As shown in fig. 2, the apparatus for adjusting voltage described in this embodiment includes: a power supply module 10 and a plurality of chips 200; the power module 10 includes an adaptive voltage regulation AVS function;
the plurality of chips 200 includes a first chip 20 and a second chip 30;
the power module 10 includes a signal feedback terminal 101 and a voltage output terminal 102, the first chip 20 includes a first voltage input terminal 201 and a first signal output terminal 202, and the second chip 30 includes a second voltage input terminal 301, a first signal input terminal 302 and a second signal output terminal 303;
the voltage output terminal 102 is connected to the first voltage input terminal 201 and the second voltage input terminal 301; the first signal output terminal 202 is connected to the first signal input terminal 302; the second signal output terminal 303 is connected to the signal feedback terminal 101. The power module 10 can adjust the voltage output by the voltage output terminal 102 according to the signal fed back by the signal feedback terminal 101. The first signal output terminal 202 and the first signal input terminal 302 are connected by respective pins or by a bus. The first indication signal may be a module signal or a digital signal.
As shown in fig. 2, the voltage regulating apparatus of the present application can perform the following voltage regulating operation:
2001. a second chip 30 for receiving a first indication signal from the first chip 20 from the first signal output terminal 202, wherein the first indication signal indicates a first voltage.
The first voltage is a voltage required for the first chip 20.
2002. The second chip 30 calculates a weighted sum of the first voltage and the second voltage to obtain a third voltage, and outputs a second indication signal from the second signal output terminal 303 to the signal feedback terminal 101, where the second indication signal indicates the third voltage.
The second voltage is a voltage required by the second chip 30.
2003. The power module 10 receives the second indication signal from the signal feedback terminal 101, and adjusts the voltage output from the voltage output terminal 102 according to the third voltage.
Optionally, the first indication signal and the second indication signal are both analog signals. The first chip 20 and the second chip 30 are connected through corresponding pins, that is, the pin of the first signal output terminal 202 is connected to the pin of the first signal input terminal 302, and the first chip 20 transmits the first indication signal to the second chip 30 through the first signal output terminal 202. The second chip 20 and the power module 10 are connected through corresponding pins, that is, the pin of the second signal output terminal 303 is connected with the pin of the signal feedback terminal 101, and the second chip 30 feeds back the second indication signal to the power module 10 through the second signal output terminal 303.
Optionally, the first indication signal and the second indication signal are both digital signals. The first signal output end 202 of the first chip 20, the second signal output end 303 of the second chip 30 and the signal feedback end 101 of the power module 10 are all connected to a bus; the first chip 20 transmits the first indication signal to the second chip 30 through the bus, that is, the first chip 20 transmits the first indication signal from the first signal output terminal 202 to the bus, and the second chip 30 obtains the first indication signal from the bus through the first signal input terminal 302; the second chip 30 transmits the second indication signal to the power module 10 through the bus, that is, the second chip 30 transmits the second indication signal to the bus through the second signal output terminal 303, and the power module 10 obtains the second indication signal from the bus through the signal feedback terminal 101.
The weighting coefficients corresponding to the first voltage and the second voltage may be different.
The second chip 30 may be preset with weighting coefficients corresponding to the first voltage and the second voltage, that is, a weighting coefficient corresponding to the voltage required by the first chip 20 and a weighting coefficient corresponding to the voltage required by the second chip 30. The weighting coefficients preset by the second chip 30 and corresponding to the voltages required by the first chip 20 and the second chip 30 may be fixed values, or may be adjusted according to actual requirements. For example, if the weighting factor corresponding to the voltage required by the first chip 20 is a, the weighting factor corresponding to the voltage required by the second chip 30 is B, the first voltage required by the first chip 20 is a, and the second voltage required by the second chip 30 is B, the second chip 30 calculates the weighted sum of the first voltage a and the second voltage B by using the following formula: c ═ a × a + B × B. Wherein C is a weighted sum of the first voltage a and the second voltage B, i.e. a third voltage; a and b are weighting coefficients, and a + b is equal to 1.
The voltage regulating device in the present application can also realize the following voltage regulating operation:
first, the first chip 20 outputs a third indication signal to the first signal input terminal 302 of the second chip 30 through the first signal output terminal 202, where the third indication signal indicates a fourth voltage to be adjusted by the first chip 20.
Step two, the second chip 30 calculates a weighted sum of the fourth voltage and the fifth voltage to obtain a sixth voltage, and outputs a fourth indication signal to the power module 10. The fourth indication signal indicates the sixth voltage.
And step three, the power module 10 increases or decreases the voltage output by the voltage output end 102 according to the sixth voltage. The fifth voltage is a voltage to be adjusted by the second chip 30.
The power module 10 increases or decreases the voltage output by the voltage output terminal 102 according to the sixth voltage, that is, the power module 10 takes the sum of the voltage originally output by the voltage output terminal 102 and the sixth voltage as the voltage output by the voltage output terminal 102 after adjustment.
Assuming that the sixth voltage is-1V, the power module 10 decreases the voltage output by the voltage output terminal 102 by 1 volt (V). Assuming that the sixth voltage is 1V, the power module 10 increases the voltage output from the voltage output terminal 102 by 1V. In other words, if the voltage output by the voltage output terminal 102 is 15V, and the sixth voltage is-1V, the power module 10 uses the sum of the voltage 15V output by the voltage output terminal 102 and the sixth voltage-1V, i.e. 14V, as the adjusted voltage output by the voltage output terminal 102. Assuming that the sixth voltage is 1V, the power module 10 uses the sum of the voltage 15V originally output by the voltage output terminal 102 and the sixth voltage 1V, that is, 16V, as the voltage output by the voltage output terminal 102 after adjustment.
The second chip 30 may preset weighting coefficients corresponding to the fourth voltage and the fifth voltage, that is, a weighting coefficient corresponding to a voltage to be adjusted by the first chip 20 and a weighting coefficient corresponding to a voltage to be adjusted by the second chip 30. The weighting coefficients corresponding to the preset voltage of the second chip 30 that needs to be adjusted by the first chip 20 and the preset voltage of the second chip 30 that needs to be adjusted by the second chip may be fixed values, or may be adjusted according to actual requirements. For example, if the weighting factor corresponding to the voltage required to be adjusted by the first chip 20 is m, the weighting factor corresponding to the voltage required to be adjusted by the second chip 30 is n, the fourth voltage required to be adjusted by the first chip 20 is C, and the fifth voltage required to be adjusted by the second chip 30 is D, the second chip 30 calculates the weighted sum of the fourth voltage C and the fifth voltage D by using the following formula: e ═ m × C + n × D. Wherein E is a weighted sum of the fourth voltage C and the fifth voltage D, i.e. a third voltage; m and n are weighting coefficients, and m + n is equal to 1.
In the application, a plurality of chips share one power supply, the voltage required by the chips is fed back in a cascading mode, and the power supply synthesizes the voltage requirements of the chips to adjust the output voltage to realize the AVS function; the number of power supplies can be reduced and the cost of the apparatus can be reduced.
Fig. 3 is another schematic diagram of the apparatus for adjusting voltage provided by the embodiment of the present application, which is a further refinement of the apparatus shown in fig. 2. As shown in fig. 3, the first chip 20 includes a first feedback module 40, and the second chip 30 includes a second feedback module 50; the output end 401 of the first feedback module 40 is connected to the first signal output end 202; the first signal input terminal 302 of the second chip 30 is connected to the first input terminal 501 of the second feedback module 50, and the output terminal 502 of the second feedback module 50 is connected to the second signal output terminal 303.
The first feedback module 40 may obtain the performance requirement and the environmental parameter of the first chip 20, and determine the first voltage according to the performance requirement and the environmental parameter of the first chip 20; the first indication signal is generated and outputted from the output terminal 401 of the first feedback module 40 to the second chip 30. The second feedback module 50 may obtain the performance requirement and the environmental parameter of the second chip 30, and determine the second voltage according to the performance requirement and the environmental parameter of the second chip 30; receiving the first indication signal through the first signal input terminal 302; calculating a weighted sum of the first voltage and the second voltage to obtain the third voltage; the second indication signal is generated and outputted from the output terminal 502 of the second feedback module 50 to the signal feedback terminal 101 of the power module 10.
In this embodiment, each chip determines its required voltage through the included feedback module and generates a corresponding indication signal, which is simple to implement.
Fig. 4 is a schematic diagram of an apparatus for adjusting voltage according to an embodiment of the present application, which is a further refinement of the apparatus shown in fig. 3. As shown in fig. 4, the apparatus further includes: a first hardware performance monitor 60 and a second hardware performance monitor 70; the output 601 of the first hardware performance monitor 60 is connected to the input 402 of the first feedback module 40; the output 701 of the second hardware performance monitor 70 is connected to the second input 503 of the second feedback module 50.
A first hardware performance monitor 60 for monitoring the performance requirement and environmental parameter of the first chip 20 and outputting the performance requirement and environmental parameter to the input terminal 402 of the first feedback module 40, so that the first feedback module 40 can determine the first voltage; the second hardware performance monitor 70 is configured to monitor performance requirements and environmental parameters of the second chip 30, and output the performance requirements and environmental parameters to the second input terminal 503 of the second feedback module 50, so that the second feedback module 50 determines the second voltage.
Optionally, the first hardware performance monitor 60 is integrated with the first chip 20 and the second hardware performance monitor 70 is integrated with the second chip 30. Optionally, the first hardware performance monitor 60 is integrated with the first feedback module 40 and the second hardware performance monitor 70 is integrated with the second feedback module 50. Optionally, the first hardware performance monitor 60 is integrated with the first chip 20, and the second hardware performance monitor 70 is integrated with the second feedback module 30.
The first feedback module 40 can determine the optimal power supply voltage according to the performance information of the first chip 20 provided by the first hardware performance monitor 60, so as to achieve the performance level required by the first chip 20. The second feedback module 50 may determine an optimal supply voltage according to the performance information of the second chip 30 provided by the second hardware performance monitor 70, so as to achieve the performance level required by the second chip 30.
In this embodiment, the performance requirement and the environmental parameter of the chip are monitored by the hardware performance monitor, so that the feedback module determines the voltage required by the chip, and the performance requirement and the environmental parameter of the chip can be detected quickly and accurately.
Fig. 5 is a schematic diagram of an apparatus for adjusting voltage according to an embodiment of the present application, which is a further refinement of the apparatus shown in fig. 2. As shown in fig. 5, the first chip 20 includes a third feedback module 80, and the second chip 30 includes a fourth feedback module 90; the first voltage input terminal 201 is connected to the input terminal 801 of the third feedback module 80; the output terminal 802 of the third feedback module 80 is connected to the first signal output terminal 202; the first signal input terminal 302 is connected to a first input terminal 901 of the fourth feedback module 90; the output terminal 902 of the fourth feedback module 90 is connected to the second signal output terminal 303; the second voltage input terminal 301 is connected to the second input terminal 903 of the fourth feedback module 90.
Optionally, the first chip 20 and the second chip 30 each have a circuit for detecting an input voltage, that is, a circuit for detecting an output voltage of the power module 10, and output the detected voltage to the third feedback module 80 and the fourth feedback module 90, respectively.
Optionally, the third feedback module 80 may detect a voltage of the first voltage input terminal 201 of the first chip 20. The fourth feedback module 90 may detect a voltage of the second voltage input terminal 301 of the second chip 30. Specifically, the third feedback module 80 and the fourth feedback module 90 each have a circuit for detecting an input voltage. Since the first voltage input terminal 201 and the second voltage input terminal 301 are both connected to the voltage output terminal 102 of the power module 10. Therefore, the voltage at the second voltage input terminal 301 of the second chip 30 and the voltage at the first voltage input terminal 201 of the first chip 20 are both the output voltages of the power supply 10. That is, the third feedback module 80 and the fourth feedback module 90 may each detect the output voltage of the power module 10. The third feedback module 80 may obtain the first preset voltage and the fourth feedback module 90 may obtain the second preset voltage.
A third feedback module 80, configured to calculate a difference between the output voltage of the power module 10 and the first preset voltage to obtain the fourth voltage; generating the third indication signal and outputting the third indication signal to the second chip 30 through the first signal output terminal 202; the first preset voltage is an operating voltage preset in the first chip 20.
A fourth feedback module 90, configured to calculate a difference between the output voltage of the power module 10 and the second preset voltage to obtain the fifth voltage; receiving the third indication signal through the first input terminal 901; calculating a weighted sum of the fourth voltage and the fifth voltage to obtain the sixth voltage; generating the fourth indication signal, and outputting the fourth indication signal to the power module 10 through the second signal output end 303; the second preset voltage is a preset operating voltage of the second chip 30.
As shown in fig. 5, the apparatus can perform the following voltage regulation operation:
5001. the third feedback module 80 calculates a difference between the output voltage of the power module 10 and the first preset voltage to obtain a fourth voltage, generates a third indication signal indicating the fourth voltage, and outputs the third indication signal to the second chip 30.
5002. The fourth feedback module 90 calculates a difference between the output voltage of the power module 10 and the second preset voltage to obtain the fifth voltage; receiving the third indication signal through the first signal input terminal 302 of the second chip 30; calculating a weighted sum of the fourth voltage and the fifth voltage to obtain the sixth voltage; a fourth indication signal indicating the sixth voltage is generated and output to the power module 10.
5003. The power module 10 increases or decreases the output voltage of the voltage output terminal 102 by the sixth voltage.
In this embodiment, the minimum reliable operating voltage set by the first chip 20 at the time of factory shipment is the first preset voltage; the minimum reliable operating voltage set by the second chip 30 at the time of factory shipment is the second preset voltage.
The plurality of chips 200 in the voltage regulator provided in the embodiment of the present application may include two or more chips. Fig. 6 shows another schematic diagram of the apparatus for adjusting voltage provided by the embodiment of the present application. Fig. 6 is a circuit diagram of fig. 2 with the addition of a third chip in cascade with the first chip 20. As shown in fig. 6, the plurality of chips 200 further includes: a third chip 110;
the third chip 110 includes a third voltage input terminal 111 and a third signal output terminal 112, and the first chip 20 further includes a second signal input terminal 203;
the voltage output end 102 is connected with the third voltage input end 111, and the third signal output end 112 is connected with the second signal input end 203;
a third chip 110 for outputting a third indication signal from a third signal output terminal 112 to the first chip 20, the third indication signal indicating a fourth voltage; the first chip 20 calculates a weighted sum of the fourth voltage and the fifth voltage to obtain the first voltage.
The fourth voltage is a voltage value required by the third chip 110, and the fifth voltage is a voltage value required by the first chip 20. Alternatively, the fourth voltage is a voltage value that needs to be adjusted by the third chip 110, and the fifth voltage is a voltage value that needs to be adjusted by the first chip 20.
The voltage adjusting device provided by the embodiment of the invention adjusts the voltage in the same way as the voltage adjusting device in fig. 2, and is not described in detail here. It is understood that the voltage output by the power module 10 can be adjusted in the manner shown in fig. 2 no matter how many chips 200 comprise cascaded chips.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (16)
1. An apparatus for regulating voltage, comprising:
a power module and a plurality of chips;
the plurality of chips include a first chip and a second chip;
the power supply module comprises a signal feedback end and a voltage output end, the first chip comprises a first voltage input end and a first signal output end, and the second chip comprises a second voltage input end, a first signal input end and a second signal output end;
the voltage output end is connected with the first voltage input end and the second voltage input end; the first signal output end is connected with the first signal input end; the second signal output end is connected with the signal feedback end;
the second chip is used for receiving a first indication signal from the first chip from the first signal input end, and the first indication signal indicates a first voltage; calculating a weighted sum of the first voltage and the second voltage to obtain a third voltage, and outputting a second indication signal from the second signal output end to the signal feedback end, wherein the second indication signal indicates the third voltage;
and the power supply module is used for receiving the second indication signal from the signal feedback end and adjusting the voltage output from the voltage output end according to the third voltage.
2. The apparatus of claim 1, wherein the plurality of chips further comprises:
a third chip;
the third chip comprises a third voltage input end and a third signal output end, and the first chip further comprises a second signal input end;
the voltage output end is connected with the third voltage input end, and the third signal output end is connected with the second signal input end;
the third chip is configured to output a third indication signal from the third signal output terminal to the first chip, where the third indication signal indicates a fourth voltage; the first chip calculates a weighted sum of the fourth voltage and the fifth voltage to obtain the first voltage.
3. The apparatus of claim 1 or 2, wherein the third voltage is a voltage value required by the plurality of chips;
the power supply module is specifically configured to adjust the voltage output by the voltage output terminal to the third voltage.
4. The apparatus of claim 3, wherein the first chip comprises a first feedback module and the second chip comprises a second feedback module; the output end of the first feedback module is connected with the first signal output end; the first signal input end is connected with the first input end of the second feedback module, and the output end of the second feedback module is connected with the second signal output end;
the first feedback module is used for determining the first voltage according to the performance requirement and the environmental parameter of the first chip; generating the first indication signal and outputting the first indication signal to the second chip from the output end of the first feedback module;
the second feedback module is used for determining the second voltage according to the performance requirement and the environmental parameter of the second chip; receiving the first indication signal through the first signal input; calculating a weighted sum of the first voltage and the second voltage to obtain the third voltage; and generating the second indication signal, and outputting the second indication signal to a signal feedback end of the power supply module from an output end of the second feedback module.
5. The apparatus of claim 4, further comprising: a first hardware performance monitor and a second hardware performance monitor; the output end of the first hardware performance monitor is connected with the input end of the first feedback module; the output end of the second hardware performance monitor is connected with the second input end of the second feedback module;
the first hardware performance monitor is used for monitoring the performance requirement and the environmental parameter of the first chip and outputting the performance requirement and the environmental parameter to the input end of the first feedback module;
and the second hardware performance monitor is used for monitoring the performance requirement and the environmental parameter of the second chip and outputting the performance requirement and the environmental parameter to a second input end of the second feedback module.
6. The apparatus of claim 1 or 2, wherein the third voltage is a voltage value required to be adjusted by the plurality of chips;
the power supply module is specifically configured to increase or decrease the voltage output by the voltage output terminal according to the third voltage.
7. The apparatus of claim 6, wherein the first chip comprises a third feedback module and the second chip comprises a fourth feedback module; the output end of the third feedback module is connected with the first signal output end; the first signal input end is connected with the first input end of the fourth feedback module, and the output end of the fourth feedback module is connected with the second signal output end;
the third feedback module is used for calculating a difference value between the output voltage of the power supply module and a first preset voltage to obtain the first voltage; generating the first indication signal and outputting the first indication signal to the second chip through the first signal output end; the first preset voltage is a working voltage preset by the first chip;
the fourth feedback module is used for calculating a difference value between the output voltage of the power supply module and a second preset voltage to obtain the second voltage; receiving the first indication signal through the first input terminal; calculating a weighted sum of the first voltage and the second voltage to obtain the third voltage; generating the second indication signal and outputting the second indication signal to the power supply module through the second signal output end; the second preset voltage is a preset working voltage of the second chip.
8. The apparatus of claim 7, wherein an input of the third feedback module is connected to the first voltage input; a second input end of the fourth feedback module is connected with the second voltage input end;
the third feedback module is further used for detecting the output voltage of the power supply module;
the fourth feedback module is further configured to detect an output voltage of the power module.
9. The apparatus of claim 1 or 2, wherein the first indicator signal and the second indicator signal are both analog signals; the amplitude of the first indication signal is positively correlated with the first voltage; the amplitude of the second indication signal is positively correlated with the third voltage;
or, the first indication signal and the second indication signal are both digital signals, the first indication signal includes the first voltage, and the second indication signal includes the third voltage.
10. The apparatus of claim 3, wherein the first indicator signal and the second indicator signal are both analog signals; the amplitude of the first indication signal is positively correlated with the first voltage; the amplitude of the second indication signal is positively correlated with the third voltage;
or, the first indication signal and the second indication signal are both digital signals, the first indication signal includes the first voltage, and the second indication signal includes the third voltage.
11. The apparatus of claim 4, wherein the first indicator signal and the second indicator signal are both analog signals; the amplitude of the first indication signal is positively correlated with the first voltage; the amplitude of the second indication signal is positively correlated with the third voltage;
or, the first indication signal and the second indication signal are both digital signals, the first indication signal includes the first voltage, and the second indication signal includes the third voltage.
12. The apparatus of claim 5, wherein the first indicator signal and the second indicator signal are both analog signals; the amplitude of the first indication signal is positively correlated with the first voltage; the amplitude of the second indication signal is positively correlated with the third voltage;
or, the first indication signal and the second indication signal are both digital signals, the first indication signal includes the first voltage, and the second indication signal includes the third voltage.
13. The apparatus of claim 6, wherein the first indicator signal and the second indicator signal are both analog signals; the amplitude of the first indication signal is positively correlated with the first voltage; the amplitude of the second indication signal is positively correlated with the third voltage;
or, the first indication signal and the second indication signal are both digital signals, the first indication signal includes the first voltage, and the second indication signal includes the third voltage.
14. The apparatus of claim 7, wherein the first indicator signal and the second indicator signal are both analog signals; the amplitude of the first indication signal is positively correlated with the first voltage; the amplitude of the second indication signal is positively correlated with the third voltage;
or, the first indication signal and the second indication signal are both digital signals, the first indication signal includes the first voltage, and the second indication signal includes the third voltage.
15. The apparatus of claim 8, wherein the first indicator signal and the second indicator signal are both analog signals; the amplitude of the first indication signal is positively correlated with the first voltage; the amplitude of the second indication signal is positively correlated with the third voltage;
or, the first indication signal and the second indication signal are both digital signals, the first indication signal includes the first voltage, and the second indication signal includes the third voltage.
16. An electronic device, comprising: the apparatus for adjusting voltage according to any one of claims 1 to 15.
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