CN110401609A - It is a kind of to accelerate convergent Gardner symbol timing recovery method and apparatus - Google Patents
It is a kind of to accelerate convergent Gardner symbol timing recovery method and apparatus Download PDFInfo
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- CN110401609A CN110401609A CN201811319602.8A CN201811319602A CN110401609A CN 110401609 A CN110401609 A CN 110401609A CN 201811319602 A CN201811319602 A CN 201811319602A CN 110401609 A CN110401609 A CN 110401609A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2657—Carrier synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
Abstract
Accelerate convergent Gardner symbol timing recovery method and apparatus the present invention relates to a kind of, wherein the described method includes: carrying out square timing loop estimation error to input symbol, obtain square timing loop error amount；Delay disposal is carried out to the input symbol；Using described square of timing loop error amount as the timing error initial value of Gardner timing loop, Gardner Timing error estimate and recovery are carried out to the input symbol after delay, obtain optimum sampling data.Described device includes square timing loop module, random storage module and Gardner timing loop module.Methods and apparatus of the present invention combines square timing loop and Gardner timing loop, using the estimated result of square timing loop as the timing error initial value of Gardner timing loop, so as to realize faster convergence rate and biggish timing error can be resisted, it is suitble to burst transmission system symbol timing recovery.
Description
Technical field
The invention belongs to fields of communication technology, and in particular to a kind of to accelerate convergent Gardner symbol timing recovery method
And device.
Background technique
Signal in actual transmissions due to the influence of system clock drift and transmission delay, when Transmitting and Receiving End is difficult to keep
Clock is synchronous.The main function of symbol timing recovery is synchronous sending and receiving signal clock, finds the optimum sampling moment accurately, specifically includes
Two funtion parts of Timing Error Detection and timing error correction.There are many extracting method of timing error, can substantially be divided into two kinds:
Data householder method and non-data-aided method, wherein non-data-aided method does not need training sequence, has lacked the feedback of signal
Link.If algorithm is simultaneously uncomplicated, non-data-aided method can quickly capture timing error than data householder method.
Common non-data-aided method includes square timing loop recovery algorithms and Gardner timing loop algorithm.Square
Ring timing recovery algorithm is in the spectrum component of base band sampling point mould quadratic sum sequence containing sampling time information, the timing of sampled point
Error can indicate the phase rotation of spectrum component thus in a frequency domain, by carrying out discrete fourier change to mould quadratic sum sequence
It changes, the phase of the available spectrum component, and then acquires timing error.Quadratic loop timing recovery algorithm is to frequency deviation and carrier wave phase
Position is insensitive, and its implementation complexity is lower, but quadratic loop timing recovery algorithm performance is poor, can not resist biggish timing
Deviation.Gardner timing loop algorithm because its structure is simple and independently of carrier phase advantage due to be widely adopted, symbol
Timing recovery loop is made of four Timing Error Detection, interpolation filter, loop filter and digital controlled oscillator basic modules,
Based on zero passage detection, need two sampled points in each symbol period, one of sampled point at the optimum sampling moment, another
Intermediate time of the sampled point at the two neighboring optimum sampling moment.But Gardner timing loop algorithm the convergence speed is slow, no
It is suitble to burst transfer.
Summary of the invention
In order to solve the above-mentioned problems in the prior art, accelerate convergent Gardner symbol the present invention provides a kind of
Number timing recovery method and device.The technical problem to be solved in the present invention is achieved through the following technical solutions:
One aspect of the present invention provides a kind of convergent Gardner symbol timing recovery method of acceleration, comprising:
S1: square timing loop estimation error is carried out to input symbol, obtains square timing loop error amount；
S2: delay disposal is carried out to the input symbol；
S3: using described square of timing loop error amount as the timing error initial value of Gardner timing loop, after delay
The input symbol carry out Gardner Timing error estimate and recovery, obtain optimum sampling data.
In one embodiment of the invention, after the S3 further include:
S4: matched filtering is carried out to the optimum sampling data, the optimum sampling data after exporting matched filtering.
In one embodiment of the invention, the S1 includes:
S11: judging whether the frame designated symbol of the input symbol is effective, if in vain, continuing to the input symbol
Number, if effectively, executing S12；
S12: the input symbol after effective to the frame designated symbol is counted to form the first variable；
S13: judging whether the count value of first variable is equal to preset value, if it is not, operation is not executed then, if so,
Execute S14；
S14: carrying out square timing loop estimation error to the input symbol, obtains square timing loop error amount.
In one embodiment of the invention, the S2 includes:
S21: after the frame indication signal is effective, the input symbol is successively stored to memory；
S22: when receiving an input symbol, the received input symbol is carried out at time lag of first order
Reason.
In one embodiment of the invention, the S3 includes:
S31: carrying out delay and scaling processing for described square of timing loop error amount, obtains the first of Gardner timing loop
Beginning timing error value；
S32: the first optimum sampling number of first input symbol after delay is obtained according to the initial timing error value
According to, and export the first optimum sampling data；
S33: the first Gardner timing loop error amount is calculated according to the first optimum sampling data；
S34: best according to second of second input symbol after the Gardner timing loop error amount computing relay
Sampled data exports the second optimum sampling data；
S35: the 2nd Gardner timing loop error amount is calculated according to the second optimum sampling data, and is repeated
Step S34 and S35.
In one embodiment of the invention, the S31 includes:
S311: time lag of first order processing is carried out to described square of timing loop error amount by delayer, and inputs multiplier；
S312: a scaling processing is carried out to described in after delay squares of timing loop error amount by multiplier, is obtained
The initial timing error value of Gardner timing loop.
In one embodiment of the invention, the S32 includes:
S321: the initial timing error value is inputted into loop filter, is corrected processing；
S322: the first interpolation filter decimal factor is calculated according to the initial timing error value after correction；
S323: it is adopted again according to first input symbol after the first interpolation filter decimal factor pair delay
Sample obtains the first optimum sampling data.
Another aspect provides a kind of convergent Gardner symbol timing recovery devices of acceleration, including square
Timing loop module, random storage module and Gardner timing loop module, wherein
Described square of timing loop module and the random storage module are separately connected the Gardner timing loop module；
Described square of timing loop module is used to carry out square timing loop estimation error according to the input symbol of predetermined number, obtains
It is squared timing loop error amount；
The random storage module is used to carry out the input symbol delay and data buffer storage；
The Gardner timing loop module is used for initial as timing error using square timing loop error amount
Value carries out Gardner timing loop estimation error and recovery to the input symbol after delay, obtains the best of the input symbol
Sampled data.
In one embodiment of the invention, the Gardner symbol timing recovery device further includes delayer and multiplication
Device, the delayer and the multiplier be connected on square timing loop module and the Gardner timing loop module it
Between, wherein
The delayer is used to carry out time lag of first order to from square timing loop error amount of described square of timing loop module；
The multiplier is used to zoom in and out processing to a square timing loop error amount described in after delay, obtain being used for described in
The initial timing error value of Gardner timing loop module.
Compared with prior art, the beneficial effects of the present invention are:
1, the convergent Gardner symbol timing recovery method of present invention acceleration combines square timing loop and Gardner is fixed
The advantage of both Shi Huifu loops determines the Timing error estimate result of square timing loop as Gardner timing recovery loop
When error initial value, so as to realize faster convergence rate and biggish timing error can be resisted, be suitble to burst transfer
System symbol Timed Recovery.
2, Gardner symbol timing recovery of the invention is only one more than the realization device of Gardner timing loop method
A simple square of timing loop module can be realized faster convergence rate and can resist biggish timing error, dress
Set that structure is simple, algorithm complexity is lower.
Detailed description of the invention
Fig. 1 is a kind of flow chart for accelerating convergent Gardner symbol timing recovery method provided in an embodiment of the present invention；
Fig. 2 is that a kind of structure for accelerating convergent Gardner symbol timing recovery device provided in an embodiment of the present invention is shown
It is intended to；
Fig. 3 a- Fig. 3 c is a kind of calculation method schematic diagram of Gardner timing loop error amount provided in an embodiment of the present invention；
Fig. 4 is a kind of module map for accelerating convergent Gardner symbol timing recovery device provided in an embodiment of the present invention；
Fig. 5 is that a kind of of the embodiment of the present invention accelerates the real without mode of making an uproar of convergent Gardner symbol timing recovery method
Portion's eye figure convergent analogous diagram；
Fig. 6 is prior art Gardner timing loop algorithm without mode real part eye figure convergent analogous diagram of making an uproar；
Fig. 7 is the convergent Gardner symbol timing recovery method of acceleration and prior art Gardner of the embodiment of the present invention
The convergent comparison diagram of the digital controlled oscillator decimal factor of timing loop algorithm.
Specific embodiment
The content of present invention is described further combined with specific embodiments below, but embodiments of the present invention are not limited to
This.
Embodiment one
Referring to Figure 1, Fig. 1 is a kind of symbol timing recovery side Gardner of fast convergence provided in an embodiment of the present invention
The flow chart of method.The symbol timing recovery method includes:
S1: square timing loop estimation error is carried out to input symbol, obtains square timing loop error amount；
S2: delay disposal is carried out to the input symbol；
S3: using described square of timing loop error amount as the timing error initial value of Gardner timing loop, after delay
The input symbol carry out Gardner Timing error estimate and recovery, obtain optimum sampling data.
Further, after the S3 further include:
S4: matched filtering is carried out to the optimum sampling data, the optimum sampling data after exporting matched filtering.
The S1 includes:
S11: judging whether the frame designated symbol of the input symbol is effective, if in vain, continuing to the input symbol
Number, if effectively, executing S12；
Specifically, the first variable c is set to count the number of input symbol, when frame indication signal s is effective, the first variable
C is started counting, initial value 0.
S12: the input symbol after effective to the frame designated symbol is counted to form the first variable；
S13: judging whether the count value of first variable is equal to preset value, if it is not, operation is not executed then, if so,
Execute S14；
S14: carrying out square timing loop estimation error to the input symbol, obtains square timing loop error amount.
The N=LQ input symbol meter that the quadratic loop Timing Error Detector is started when effective using frame designated symbol s
Calculate square timing loop error value epsilon1, calculation formula are as follows:
Wherein, Q indicates that the sampling number in a symbol period, L indicate the section gap of square timing loop, and arg is represented
Operating angle, N=LQ are taken, L usually takes 64.It should be noted that quadratic loop Timing Error Detector is merely with frame indication signal s
Start and N number of input symbol later carries out quadratic loop Timing error estimate.
In the present embodiment, frame indication signal can be used to start and 256 input sign computation square timings later
Ring error value epsilon1, N=256 here.
The S2 includes:
S21: after the frame indication signal is effective, the input symbol is successively stored to memory；
S22: when receiving an input symbol, the received input symbol is carried out at time lag of first order
Reason.
Specifically, after the frame indication signal s is effective, the input in quadratic loop Timing Error Detector will be received
Symbol ri(i >=1) is successively transferred to the RAM (random access memory) that depth is N, and RAM caches the input symbol
And delay.In the present embodiment, square timing loop error value epsilon1It is to continuously receive quadratic loop Timing Error Detection by 256
What the input sign computation in device obtained, therefore, all input symbol riCarried out in RAM 256 times delay, do so be for
Guarantee square timing loop error value epsilon1When entering Gardner timing loop after processing, first input symbol r1Also enter
Gardner timing loop guarantees ε1First significant character r is used for after processing1Timing recovery.
The S3 includes:
S31: carrying out delay and scaling processing for described square of timing loop error amount, obtains the first of Gardner timing loop
Beginning timing error value；
Specifically, described square of timing loop error value epsilon1Postpone and remove a upper zoom factor k by one, obtains
The initial timing error value ε of Gardner timing loop1' and give the loop filter of Gardner timing loop after being sent to,
Initial timing error value ε as Gardner timing loop1′.Initial timing error value ε1' calculation formula are as follows:
ε1'=ε1/k
In the present embodiment, to described square of timing loop error value epsilon1The purpose zoomed in and out is in order to fixed to described square
When ring error value epsilon1It optimizes, to improve subsequent processing accuracy.And the purpose postponed is then in order to enable ε1' alignment r1,
To use the ε after scaling and delay1' calculate first input symbol r1。
S32: according to the initial timing error value ε1' obtain first input symbol r after delay1First most preferably adopt
Sample data p1, and export the first optimum sampling data p1；
Specifically, the S32 includes:
S321: loop filter is corrected processing to the initial timing error value；
The initial timing error value obtained due to the influence of noise and the subsequent Gardner timing loop that will be described
Error amount is constantly present certain fluctuation up and down, therefore, before carrying out subsequent calculating, preferably carries out to the error amount of input
Correction, to improve its stability and dynamic property.In the present embodiment, which is realized by loop filter.
S322: according to the initial timing error value ε after the correction1' calculate interpolation filter decimal factor muk1；
It in all-digital receiver, is generally realized using interpolation filter and obtains the optimum sampling moment, in control signal
Auxiliary under by interpolation algorithm, it preferably includes linear interpolation, lagrange polynomial interpolation and segmentation parabolic interpolation, to obtain
It is taken to input symbol riOptimum sampling moment pi。
In the present embodiment, Fig. 2 is referred to, Fig. 2 is a kind of Gardner symbol of fast convergence provided in an embodiment of the present invention
The structural schematic diagram of number timing recovery apparatus, symbol timing recovery device of the invention can be realized based on the device.Such as Fig. 2 institute
Show, loop filter, digital controlled oscillator and interpolation filter are sequentially connected, wherein the front end of loop filter is connected with one
Selection switch, selection switch be selectively connected under the control of first variable quadratic loop Timing Error Detector with
Gardner Timing Error Detector.
Specifically, whether the count value for selecting switch to judge first variable is default when reaching for preset value
When value, the selection switch is connected to quadratic loop Timing Error Detector, and the initial timing error value is sent to loop filter
Wave device.When being greater than preset value, the selection switching to Gardner Timing Error Detector, Gardner timing loop mould
BOB(beginning of block) work.It should be noted that only when the count value of first variable is greater than or equal to preset value, interpolation filtering
Device, Gardner Timing Error Detection, loop filter, digital controlled oscillator and matched filter are just started to work.And when described the
When the count value of one variable is less than preset value, only quadratic loop Timing Error Detector and RAM work, to obtain square timing loop
Error value epsilon1。
Then, the digital controlled oscillator is according to the initial timing error value ε1' calculate in generation interpolation filter formula
Indicate the first interpolation filter decimal factor mu of optimal sampling position fractional offsetk1。
In addition, the digital controlled oscillator is also used to generate sampling enable signal sampEn and symbol enable signal symEn,
It is respectively used to each module control of loop.Specifically, under the control of symbol enable signal symEn, loop filter is by input
Timing error value filters out high-frequency noise by a loop filter, to complete to correct.It should be noted that working as r1Into
When Gardner timing loop, it is effective that symbol enables symEn.Gardner Timing Error Detector is in symbol enable signal sampEn
Control under calculate the Gardner timing loop error amount of corresponding input symbol.
S323: resampling is carried out according to first input symbol after interpolation filter decimal factor pair delay, is obtained
First optimum sampling data of first input symbol after taking delay；
As described above, working as initial timing error value ε1' enter Gardner timing loop when, first input symbol r1Also into
Enter Gardner timing loop, therefore, here according to the first interpolation filter decimal factor muk1First input symbol is calculated
r1The first optimum sampling data p1。
In the present embodiment, first input symbol r1The first optimum sampling data p1It is carried out in input matched filter
Filtering forming, and export.
In the present embodiment, control of the matched filter in sampling enable signal sampEn and symbol enable signal symEn
Under, to the first optimum sampling data p1Matched filtering corresponding with transmitter is completed, realizes and is transmitted without intersymbol interference, output is then
It is first input symbol r1Complete the final symbol of symbol timing recovery.
S33: the first Gardner timing loop error amount is calculated according to the first optimum sampling data；
Obtain the first optimum sampling data p1Three interpolated points, utilize three interpolated points calculate first
Gardner timing loop error amount.
Specifically, first input symbol r1The first optimum sampling data p1Be input to while matched filtering
In Gardner Timing Error Detector, Gardner timing loop error amount is calculated in Gardner Timing Error Detector.
Gardner Timing Error Detector is based on zero passage detection, needs two sampled points in each symbol period, wherein a sampling
Point is in optimum sampling moment, intermediate time of another sampled point at the two neighboring optimum sampling moment.Refer to Fig. 3 a- figure
3c, Fig. 3 a- Fig. 3 c are a kind of calculation method schematic diagrames of Gardner timing loop error amount provided in an embodiment of the present invention,
In, Fig. 3 a indicates the accurate situation of timing, when local sampling clock is synchronous with interpolation filter output valve, the value of intermediate samples point
It is 0, the value of both sides sampled point gets maximum value, error detector output at this time 0；Fig. 3 b indicates the advanced situation of timing, local
Clock is advanced, then median sample value is positive, and error detector output at this time indicates that local clock is more advanced than signal, need less than 0
Interpolation filter regressive interpolation；Fig. 3 c indicates the case where timing lags, and the value of intermediate samples point is negative, and error detector is defeated at this time
It is greater than 0 out, indicates that interpolation filter needs to be carried forward interpolation processing.Therefore, three companies of Gardner Timing Error Detector
Continuous sampled point acquires Gardner timing loop error value epsilon2:
ε2=Re { p*(n-1/2) [p (n-1)-p (n)] },
Wherein, Re { } indicates realistic portion's operation, and * indicates that conjugate operation, p (n) indicate the nth symbol of input, p (n-
1/2) median of Gardner Timing Error Detector n-th of input value and (n-1)th input value is indicated.
In the present embodiment, Gardner timing loop error value epsilon2Loop filter is transported to input as second
Symbol r2Control signal.
S34: best according to second of second input symbol after the Gardner timing loop error amount computing relay
Sampled data exports the second optimum sampling data；
S35: the 2nd Gardner timing loop error amount is calculated according to the second optimum sampling data, and is repeated
Step S34 and S35.
Specifically, the 2nd Gardner timing loop error value epsilon2Carried out in loop filter certain correction and
Filtering, and it is then sent to digital controlled oscillator；The digital controlled oscillator is according to the 2nd Gardner timing loop error after correction
Value ε2Calculate generate interpolation filter formula in expression optimal sampling position fractional offset the second interpolation filter decimal because
Sub- μk2；According to the second interpolation filter decimal factor muk2To second input symbol r after delay2Resampling is carried out, is obtained
Second input symbol r after taking delay2The second optimum sampling data p2；To the second optimum sampling data p2It is filtered
Wave forming, and export, while passing through the second optimum sampling data p2It is defeated to obtain third to calculate Gardner timing loop error amount
Enter symbol r3Third optimum sampling data p3, and so on, to successively obtain the optimum sampling data of all input symbols.
The present invention accelerates convergent Gardner symbol timing recovery method to combine square timing loop and Gardner timing
The advantage for restoring both loops, soon estimates an initial error value by square timing loop, by this initial error value
Then pass through as the initial value of Gardner timing loop for estimating the optimum sampling data of first input symbol
Gardner timing loop is based on this initial error value and handles subsequent input symbol, so as to realize convergence speed faster
Biggish timing error is spent and can be resisted, burst transmission system symbol timing recovery is suitble to.
Embodiment two
On the basis of the above embodiments, accelerate convergent Gardner symbol timing recovery present embodiment discloses a kind of
Device.Refer to Fig. 4, Fig. 4 is provided in an embodiment of the present invention a kind of to accelerate convergent Gardner symbol timing recovery device
Module map.The symbol timing recovery device includes square timing loop module 1, random storage module 2 and Gardner timing loop mould
Block 3, wherein square timing loop module 1 and random storage module 2 are separately connected Gardner timing loop module 3；Square timing
Ring moulds block 1 is used to carry out square timing loop estimation error according to the input symbol of predetermined number, obtains square timing loop error amount；
Random storage module 2 is used to carry out delay and data buffer storage to input symbol；Gardner timing loop module 3 is used for using flat
Square timing loop error amount carries out Gardner timing loop error to the input symbol after delay and estimates as timing error initial value
Meter and recovery, obtain the optimum sampling data of input symbol.
It is worth noting that, before obtaining square timing loop error amount, the Gardner timing loop module 3
It is described until described square of timing loop error amount is inputted the Gardner timing loop module 3 in off position
Gardner timing loop module 3 is just started to work.
Further, the present apparatus further includes delayer 4 and multiplier 5, and delayer 4 and multiplier 5 are connected on a square timing
Between ring moulds block 1 and Gardner timing loop module 3, wherein
Delayer 4 is used to carry out time lag of first order to square timing loop error amount from square timing loop module 1；
Multiplier 5 is for zooming in and out operation to square timing loop error amount after delay.
Specifically, referring again to Fig. 2, in the present embodiment, square timing loop module 1 is quadratic loop Timing Error Detection
Device；Random storage module 2 is RAM.Gardner timing loop module 3 includes interpolation filter 31, the inspection of Gardner timing error
Survey device 32, loop filter 33 and digital controlled oscillator 34.32 linkloop filter 33 of Gardner Timing Error Detector is used
In calculating Gardner timing loop error amount, specific calculating process refers to embodiment one, and which is not described herein again.
Loop filter 33 connects Gardner Timing Error Detector 32, quadratic loop Timing Error Detector 1 and numerical control vibration
Device 6 is swung, receives square timing loop error amount or Gardner timing loop error amount for selecting, and school is carried out to timing error
It is just sent to digital controlled oscillator 6 afterwards.Specifically, the front end of loop filter 33 is connected with a selection switch 35, is able to
Quadratic loop Timing Error Detector 1 and Gardner Timing Error Detector 32 are connected, is completed when square timing loop error amount calculates
When, the selection switch 35 is connected to quadratic loop Timing Error Detector 1, and the initial timing error value is sent to loop filter
Wave device 33, then, the selection switch 35 switch to Gardner Timing Error Detector 32, and Gardner timing loop module is opened
Beginning work.
Due to the influence of noise, received signal moves up and down near a certain mean value, and in Gardner timing loop accidentally
The transmission function of difference detector 32 be it is fixed, to improve the stability and dynamic property of the closed-loop system, loop filter 33
It can be to carrying out certain correction and filtering in the signal received, and it is then sent to digital controlled oscillator 34.
Digital controlled oscillator 6 connects interpolation filter 3, for according to square timing loop error amount or Gardner timing loop
Error amount generates the interpolation filter decimal factor；Interpolation filter 3 is used for according to after the delay of interpolation filter decimal factor pair
It inputs symbol and carries out data resampling, obtain the optimum sampling data of each input symbol.
In addition, the digital controlled oscillator can also generate sampling enable signal sampEn and symbol enable signal symEn,
It is respectively used to each module control of loop.
Specifically, under the control of the symbol enable signal symEn and count value c of digital controlled oscillator output, loop filtering
The timing error of input is filtered out high-frequency noise therein by a timing tracking loops by device, to complete to correct, is sent to
Digital controlled oscillator.Gardner Timing Error Detector triggers work by symbol enable signal sampEn.
Further, in the present embodiment, the symbol timing recovery device further includes matched filter 36, is connected to
The output end of interpolation filter 3, the optimum sampling data for exporting to interpolation filter 3 complete matching corresponding with transmitter
Filtering realizes and transmits without intersymbol interference that the output of matched filter 36 is the symbol data of final Timed Recovery.
Further, the effect of symbol timing recovery method and apparatus of the invention can be carried out by following emulation experiments
It further illustrates.
Simulated conditions: system is modulated with QPSK (Quadrature Phase Shift Keying, four phase shift keying signal)
For system, analogue system character rate 15Msps, emulation timing offset ppm is 10, and the sampling number Q in a symbol period is
4, square timing loop section gap L are 64, and interpolation filter uses 32 rank PPI filters, and the value of zoom factor k is 6.3 × 10-4, compared with the performance of prior art Gardner timing loop algorithm.
Fig. 5 to Fig. 7 is referred to, Fig. 5 is a kind of symbol timing recovery side Gardner of fast convergence of the embodiment of the present invention
The nothing of method is made an uproar mode real part eye figure convergent analogous diagram；Fig. 6 is prior art Gardner timing loop algorithm without mode of making an uproar
Real part eye figure convergent analogous diagram；Fig. 7 is the Gardner symbol timing recovery method of fast convergence of the embodiment of the present invention and shows
There is the convergent comparison diagram of the digital controlled oscillator decimal factor of technology Gardner timing loop algorithm.By Fig. 5 to Fig. 7 as it can be seen that
The Gardner symbol timing recovery method and apparatus of the present embodiment fast convergence can obtain while resisting larger timing error
Obtain convergence rate more faster than square timing loop, it can realize in convergence rate more faster than Gardner timing loop algorithm
And anti-timing error ability more stronger than square timing loop, it is suitble to burst transmission system symbol timing recovery.
In addition, the Gardner symbol timing recovery device of the present embodiment fast convergence is only than Gardner timing loop method
The more simple square of timing loop modules of realization device, faster convergence rate can be realized and can resist biggish
Timing error, apparatus structure is simple, algorithm complexity is lower.
The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be said that
Specific implementation of the invention is only limited to these instructions.For those of ordinary skill in the art to which the present invention belongs, In
Under the premise of not departing from present inventive concept, a number of simple deductions or replacements can also be made, all shall be regarded as belonging to of the invention
Protection scope.
Claims (9)
1. a kind of accelerate convergent Gardner symbol timing recovery method, which is characterized in that the described method includes:
S1: square timing loop estimation error is carried out to input symbol, obtains square timing loop error amount；
S2: delay disposal is carried out to the input symbol；
S3: using described square of timing loop error amount as the timing error initial value of Gardner timing loop, to the institute after delay
It states input symbol and carries out Gardner Timing error estimate and recovery, obtain optimum sampling data.
2. the method according to claim 1, wherein after the S3 further include:
S4: matched filtering is carried out to the optimum sampling data, the optimum sampling data after exporting matched filtering.
3. the method according to claim 1, wherein the S1 includes:
S11: judging whether the frame designated symbol of the input symbol is effective, if in vain, continuing to the input symbol, if
Effectively, then S12 is executed；
S12: the input symbol after effective to the frame designated symbol is counted to form the first variable；
S13: judging whether the count value of first variable is equal to preset value, if it is not, operation is not executed then, if so, executing
S14；
S14: carrying out square timing loop estimation error to the input symbol, obtains square timing loop error amount.
4. according to the method described in claim 3, it is characterized in that, the S2 includes:
S21: after the frame indication signal is effective, the input symbol is successively stored to memory；
S22: when receiving an input symbol, time lag of first order processing is carried out to the received input symbol.
5. the method according to claim 1, wherein the S3 includes:
S31: carrying out delay and scaling processing for described square of timing loop error amount, obtains the initial fixed of Gardner timing loop
When error amount；
S32: obtaining the first optimum sampling data of first input symbol after delay according to the initial timing error value, and
Export the first optimum sampling data；
S33: the first Gardner timing loop error amount is calculated according to the first optimum sampling data；
S34: according to the second optimum sampling of second input symbol after the Gardner timing loop error amount computing relay
Data export the second optimum sampling data；
S35: the 2nd Gardner timing loop error amount is calculated according to the second optimum sampling data, and repeats step
S34 and S35.
6. according to the method described in claim 5, it is characterized in that, the S31 includes:
S311: time lag of first order processing is carried out to described square of timing loop error amount by delayer, and inputs multiplier；
S312: a scaling processing is carried out to described in after delay squares of timing loop error amount by multiplier, obtains Gardner
The initial timing error value of timing loop.
7. according to the method described in claim 5, it is characterized in that, the S32 includes:
S321: the initial timing error value is inputted into loop filter, is corrected processing；
S322: the first interpolation filter decimal factor is calculated according to the initial timing error value after correction；
S323: resampling is carried out according to first input symbol after the first interpolation filter decimal factor pair delay, is obtained
To the first optimum sampling data.
8. a kind of accelerate convergent Gardner symbol timing recovery device, which is characterized in that including a square timing loop module (1),
Random storage module (2) and Gardner timing loop module (3), wherein
Described square of timing loop module (1) and the random storage module (2) are separately connected the Gardner timing loop module
(3)；
Described square of timing loop module (1) is used to carry out square timing loop estimation error according to the input symbol of predetermined number, obtains
It is squared timing loop error amount；
The random storage module (2) is used to carry out the input symbol delay and data buffer storage；
The Gardner timing loop module (3) is used for square timing loop error amount described in as timing error initial value,
Gardner timing loop estimation error and recovery are carried out to the input symbol after delay, obtain most preferably adopting for the input symbol
Sample data.
9. device according to claim 8, which is characterized in that further include delayer (4) and multiplier (5), the delay
Device (4) and the multiplier (5) be connected on square timing loop module (1) and the Gardner timing loop module (3) it
Between, wherein
The delayer (4) is used to once be prolonged to from a square timing loop error amount for square timing loop module (1)
Late；
The multiplier (5) is used to zoom in and out processing to a square timing loop error amount described in after delay, obtain being used for described in
The initial timing error value of Gardner timing loop module (3).
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111106925A (en) * | 2019-12-17 | 2020-05-05 | 北京航空航天大学杭州创新研究院 | Timing synchronization method for reducing steady-state error |
| CN113542166A (en) * | 2021-06-10 | 2021-10-22 | 西安电子科技大学 | Timing recovery method and device with low jitter and rapid convergence |
| CN115473775A (en) * | 2022-07-26 | 2022-12-13 | 西安电子科技大学 | Parallel symbol timing recovery method suitable for low earth orbit satellite Internet system |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060101706A (en) * | 2005-03-21 | 2006-09-26 | 엘지전자 주식회사 | Timing recovery device for mobile broadcasting receiver |
| CN101299657A (en) * | 2008-06-26 | 2008-11-05 | 上海交通大学 | Symbol timing synchronizing apparatus for complete digital receiver |
| CN102164002A (en) * | 2011-04-15 | 2011-08-24 | 南京理工大学 | Lock detection method for bit synchronization of all-digital receiver |
| CN203166916U (en) * | 2013-01-25 | 2013-08-28 | 西安空间无线电技术研究所 | Aggregate burst narrowband-signal continuous-demodulation bit synchronization structure |
| CN103457680A (en) * | 2013-08-20 | 2013-12-18 | 重庆邮电大学 | Satellite communication timing synchronization error detection method based on full-digital receiving |
| CN104270239A (en) * | 2014-10-23 | 2015-01-07 | 天津市德力电子仪器有限公司 | Timing error recovery method suitable for WCDMA |
| KR101652083B1 (en) * | 2015-04-09 | 2016-08-29 | 한국항공대학교산학협력단 | Time of arrival estimation method based on Zigbee and apparatus thereof |
| US20160356634A1 (en) * | 2015-06-05 | 2016-12-08 | Qualcomm Incorporated | Sampling delay indications in mems sensors |
| CN106534023A (en) * | 2016-09-20 | 2017-03-22 | 西安电子科技大学 | Timing and carrier united synchronization method of MQAM in non-cooperative communication |
| US20170180063A1 (en) * | 2015-12-21 | 2017-06-22 | Vecima Networks Inc. | Method of Estimating the Frequency Response of Multipath Channels |
| CN106998236A (en) * | 2017-02-07 | 2017-08-01 | 中国人民解放军国防科学技术大学 | A kind of feedback-type symbol timing synchronizing apparatus and method based on filtering interpolation |
| CN107623654A (en) * | 2017-09-14 | 2018-01-23 | 中国电子科技集团公司第五十四研究所 | A kind of bit timing synchronous method of the high speed 16apsk signals based on FPGA |
-
2018
- 2018-11-07 CN CN201811319602.8A patent/CN110401609B/en active Active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060101706A (en) * | 2005-03-21 | 2006-09-26 | 엘지전자 주식회사 | Timing recovery device for mobile broadcasting receiver |
| CN101299657A (en) * | 2008-06-26 | 2008-11-05 | 上海交通大学 | Symbol timing synchronizing apparatus for complete digital receiver |
| CN102164002A (en) * | 2011-04-15 | 2011-08-24 | 南京理工大学 | Lock detection method for bit synchronization of all-digital receiver |
| CN203166916U (en) * | 2013-01-25 | 2013-08-28 | 西安空间无线电技术研究所 | Aggregate burst narrowband-signal continuous-demodulation bit synchronization structure |
| CN103457680A (en) * | 2013-08-20 | 2013-12-18 | 重庆邮电大学 | Satellite communication timing synchronization error detection method based on full-digital receiving |
| CN104270239A (en) * | 2014-10-23 | 2015-01-07 | 天津市德力电子仪器有限公司 | Timing error recovery method suitable for WCDMA |
| KR101652083B1 (en) * | 2015-04-09 | 2016-08-29 | 한국항공대학교산학협력단 | Time of arrival estimation method based on Zigbee and apparatus thereof |
| US20160356634A1 (en) * | 2015-06-05 | 2016-12-08 | Qualcomm Incorporated | Sampling delay indications in mems sensors |
| US20170180063A1 (en) * | 2015-12-21 | 2017-06-22 | Vecima Networks Inc. | Method of Estimating the Frequency Response of Multipath Channels |
| CN106534023A (en) * | 2016-09-20 | 2017-03-22 | 西安电子科技大学 | Timing and carrier united synchronization method of MQAM in non-cooperative communication |
| CN106998236A (en) * | 2017-02-07 | 2017-08-01 | 中国人民解放军国防科学技术大学 | A kind of feedback-type symbol timing synchronizing apparatus and method based on filtering interpolation |
| CN107623654A (en) * | 2017-09-14 | 2018-01-23 | 中国电子科技集团公司第五十四研究所 | A kind of bit timing synchronous method of the high speed 16apsk signals based on FPGA |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111106925A (en) * | 2019-12-17 | 2020-05-05 | 北京航空航天大学杭州创新研究院 | Timing synchronization method for reducing steady-state error |
| CN111106925B (en) * | 2019-12-17 | 2022-06-24 | 北京航空航天大学杭州创新研究院 | Timing synchronization method for reducing steady-state error |
| CN113542166A (en) * | 2021-06-10 | 2021-10-22 | 西安电子科技大学 | Timing recovery method and device with low jitter and rapid convergence |
| CN115473775A (en) * | 2022-07-26 | 2022-12-13 | 西安电子科技大学 | Parallel symbol timing recovery method suitable for low earth orbit satellite Internet system |
| CN115473775B (en) * | 2022-07-26 | 2024-04-16 | 西安电子科技大学 | Parallel symbol timing recovery method suitable for low-orbit satellite Internet system |
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