CN110380216B - Phase configuration method, device, equipment and storage medium in phased array radar - Google Patents
Phase configuration method, device, equipment and storage medium in phased array radar Download PDFInfo
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- CN110380216B CN110380216B CN201910694946.5A CN201910694946A CN110380216B CN 110380216 B CN110380216 B CN 110380216B CN 201910694946 A CN201910694946 A CN 201910694946A CN 110380216 B CN110380216 B CN 110380216B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q3/00—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
- H01Q3/26—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture
- H01Q3/30—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture varying the relative phase between the radiating elements of an array
- H01Q3/34—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture varying the relative phase between the radiating elements of an array by electrical means
- H01Q3/36—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture varying the relative phase between the radiating elements of an array by electrical means with variable phase-shifters
- H01Q3/38—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture varying the relative phase between the radiating elements of an array by electrical means with variable phase-shifters the phase-shifters being digital
- H01Q3/385—Scan control logics
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Abstract
The application relates to a phase configuration method, a phase configuration device, phase configuration equipment and a storage medium in a phased array radar. The method comprises the following steps: obtaining a plurality of phase measurement information of a phased array antenna; obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information; and on the basis of the theoretical phase compensation value, performing online adjustment on the phase compensation value of each phase shifter by adopting a Field Programmable Gate Array (FPGA) so as to match the phase measurement information of the phased array antenna with the phase design value. The method can improve the phase configuration efficiency of the phase shifter.
Description
Technical Field
The present application relates to the field of phased array antenna technology, and in particular, to a method, an apparatus, a device, and a storage medium for phase configuration in a phased array radar.
Background
With the rapid development of the detection technology, the phased array antenna is also more and more widely applied. In a phased array antenna, because there are multiple phase shifters at each wave position, there is a phase difference between each phase shifter due to position, cable, and other device inconsistencies.
In order to make the phased array antenna have better radiation characteristics, the phase difference between the phase shifters is corrected by phase-configuring each phase shifter. The conventional phase configuration process is to write initial phase data into a memory, modify the phase data in the program according to the measured phase distribution, and recompile and download the program to implement phase configuration.
However, in the conventional phase allocation method, the program needs to be recompiled and downloaded every time the phase data is modified, which is computationally intensive and thus inefficient.
Disclosure of Invention
In view of the above, it is necessary to provide a phase arranging method, apparatus, device, and storage medium in a phased array radar that can improve the arrangement efficiency in view of the above technical problems.
In a first aspect, an embodiment of the present application provides a method for configuring a phase in a phased array radar, where the method includes:
obtaining a plurality of phase measurement information of a phased array antenna;
obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
and on the basis of the theoretical phase compensation value, performing online adjustment on the phase compensation value of each phase shifter by adopting a Field Programmable Gate Array (FPGA) so as to match the phase measurement information of the phased array antenna with the phase design value.
In one embodiment, the online adjustment of the phase compensation value of each phase shifter by using a field programmable gate array FPGA based on the theoretical phase compensation value to match the phase measurement information of the phased array antenna with the phase design value includes:
acquiring phase measurement information corresponding to the theoretical phase compensation value of each phase shifter;
judging whether the phase measurement information corresponding to each theoretical phase compensation value is matched with the phase design value or not;
if not, adopting a preset adjusting strategy, and carrying out online adjustment on the theoretical phase compensation value through the FPGA to obtain an actual phase compensation value; each actual phase compensation value is used for being superposed with a corresponding original phase configuration value so that the phase measurement information of the phased array antenna is matched with a corresponding phase design value.
In one embodiment, the method further comprises:
and if the phase measurement information corresponding to the theoretical phase compensation value is matched with the corresponding phase design value, determining the theoretical phase compensation value as the actual phase compensation value.
In one embodiment, the obtaining phase measurement information corresponding to the theoretical phase compensation value of each phase shifter further includes:
superposing the theoretical phase compensation value and the original phase configuration value of each phase shifter to generate a corrected phase value of each phase shifter;
when each correction phase value is obtained, the phase measurement information obtained by measurement is obtained;
and taking the phase measurement information corresponding to the corrected phase value as the phase measurement information corresponding to the theoretical phase compensation value.
In one embodiment, the adjustment strategy comprises a gradient adjustment strategy; the phase measurement information includes a phase measurement value, the theoretical phase compensation value is adjusted on line through the FPGA by adopting a preset adjustment strategy to obtain an actual phase compensation value, and the method includes the following steps:
judging the magnitude relation between the phase measurement value corresponding to the theoretical phase compensation value and the phase design value;
and if the phase measurement value corresponding to the theoretical phase compensation value is larger than the designed phase value, gradually reducing the theoretical phase compensation value according to preset adjustment steps until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value.
In one embodiment, the method further comprises: and if the phase measurement value corresponding to the theoretical phase compensation value is smaller than the designed phase value, gradually increasing the theoretical phase compensation value according to the adjustment step until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value.
In one embodiment, the method further comprises:
and updating the original phase configuration value of each phase shifter in a Read Only Memory (ROM) according to the actual phase compensation value.
In a second aspect, an embodiment of the present application provides an apparatus for configuring a phase in a phased array radar, the apparatus including:
the acquisition module is used for acquiring a plurality of phase measurement information of the phased array antenna;
the configuration module is used for obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
and the adjusting module is used for adjusting the phase compensation value of each phase shifter on line by adopting a Field Programmable Gate Array (FPGA) based on the theoretical phase compensation value so as to match the phase measurement information of the phased array antenna with the phase design value.
In a third aspect, an embodiment of the present application provides a computer device, including a memory and a processor, where the memory stores a computer program, and the processor implements the following steps when executing the computer program:
obtaining a plurality of phase measurement information of a phased array antenna;
obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
and on the basis of the theoretical phase compensation value, performing online adjustment on the phase compensation value of each phase shifter by adopting a Field Programmable Gate Array (FPGA) so as to match the phase measurement information of the phased array antenna with the phase design value.
In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the following steps:
obtaining a plurality of phase measurement information of a phased array antenna;
obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
and on the basis of the theoretical phase compensation value, performing online adjustment on the phase compensation value of each phase shifter by adopting a Field Programmable Gate Array (FPGA) so as to match the phase measurement information of the phased array antenna with the phase design value.
According to the phase configuration method, the phase configuration device, the phase configuration equipment and the storage medium, the computer equipment is used for obtaining a plurality of phase measurement information of the phased array antenna, then the theoretical phase compensation value required by each phase shifter is obtained according to the phase design value and the phase measurement information of each phase shifter, and the FPGA is used for carrying out online adjustment on the phase compensation value of each phase shifter based on the theoretical phase compensation value so as to enable the phase measurement information of the phased array antenna to be matched with the phase design value. In the method, because the computer equipment adopts the FPGA to carry out online adjustment on the phase compensation value of each phase shifter so as to match the phase measurement information with the phase design value of the phased array antenna, the process of downloading and compiling a program required by modifying the phase compensation value each time in the traditional technology is avoided, the FPGA is adopted to carry out online adjustment on the phase compensation value of each phase shifter, the modified phase measurement information can be obtained on site, and the result of each adjustment is obtained in time, so that the debugging time of the phase compensation value is greatly shortened, the debugging efficiency is greatly improved, and the phase configuration efficiency of the phase shifters is greatly improved. The method reduces the procedures of program downloading and compiling, saves time and greatly reduces the calculation amount, thereby greatly saving system resources.
Drawings
FIG. 1 is a diagram illustrating an internal structure of a computer device according to an embodiment;
FIG. 2 is a flow chart illustrating a method for phase configuration in a phased array radar, according to an exemplary embodiment;
fig. 3 is a schematic flowchart of a phase configuration method in a phased array radar according to another embodiment;
fig. 4 is a flowchart illustrating a phase configuration method in a phased array radar according to yet another embodiment;
fig. 5 is a flowchart illustrating a phase configuration method in a phased array radar according to yet another embodiment;
fig. 6 is a flowchart illustrating a phase configuration method in a phased array radar according to yet another embodiment;
fig. 7 is a schematic structural diagram of a phase configuration apparatus in a phased array radar according to an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The phase configuration method provided in the embodiment of the present application may be applied to a phased array radar to automatically configure the phase of a phased array antenna, and of course, the method may also be applied to other fields to achieve automatic configuration of the phase of the phased array antenna, which is not limited in the embodiment of the present application. The phase configuration method provided by the embodiment of the application can be applied to the computer equipment shown in fig. 1. The computer device comprises a processor, a memory, a network interface, a database, a display screen and an input device which are connected through a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The database of the computer device is used for storing the phase compensation values in the following embodiments, and the detailed description of the phase compensation values is provided in the following embodiments. The network interface of the computer device may be used to communicate with other devices outside over a network connection. Optionally, the computer device may be a server, a desktop, a personal digital assistant, other terminal devices such as a tablet computer, a mobile phone, and the like, or a cloud or a remote server, and the specific form of the computer device is not limited in the embodiment of the present application. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on the shell of the computer equipment, an external keyboard, a touch pad or a mouse and the like. Of course, the input device and the display screen may not belong to a part of the computer device, and may be external devices of the computer device.
Those skilled in the art will appreciate that the architecture shown in fig. 1 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
The following describes the technical solutions of the present application and how to solve the above technical problems with specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present application will be described below with reference to the accompanying drawings.
It should be noted that the execution subject of the method embodiments described below may be a phase configuration device, which may be implemented by software, hardware or a combination of software and hardware as part or all of the computer apparatus described above. The following method embodiments are described by taking the execution subject as the computer device as an example.
Fig. 2 is a flowchart illustrating a phase configuration method in a phased array radar according to an embodiment. The present embodiment relates to a specific process in which a computer device determines a phase compensation value based on phase measurement information and a phase design value of a phase shifter. As shown in fig. 2, the method includes:
and S10, acquiring a plurality of phase measurement information of the phased array antenna.
In particular, the computer device may obtain a plurality of phase measurement information for the phased array antenna, the plurality of phase measurement information being phase measurement information for each phase shifter in the phased array antenna. Alternatively, the computer device may read a plurality of phase measurement information measured by other measuring devices, and may perform scaling according to the measurement result, thereby obtaining the phase measurement information of each phase shifter. Alternatively, the phase measurement information can be indicative of the amount of phase shift of each phase shifter, and may be, for example, a phase measurement value of each phase shifter.
And S20, obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information.
It should be noted that each phase shifter in the phased array antenna has a corresponding phase design value, and the phase design value enables the corresponding phase shifter to perform appropriate phase shift on a signal, so that the phase of the signal reaches a synchronous state, thereby improving the antenna performance.
Specifically, the computer device may compare the phase measurement information obtained by actual measurement with the designed phase value of each phase shifter, and determine a theoretical phase compensation value to be compensated for each phase shifter according to a difference between the two values. For example, if the design phase of phase shifter a is 5 degrees and the measured phase of phase shifter a is 3 degrees, the computer device may use 5-3-2 to obtain the theoretical phase compensation value of phase shifter a as 2 degrees.
And S30, based on the theoretical phase compensation value, adopting a Field Programmable Gate Array (FPGA) to perform online adjustment on the phase compensation value of each phase shifter, so that the phase measurement information of the phased Array antenna is matched with the phase design value.
Specifically, the computer device performs online adjustment on the phase compensation value of each phase shifter in the memory based on the theoretical phase compensation value by using the function of online data modification of the FPGA, for example, the phase compensation value of the phase shifter may be online modified to the theoretical phase compensation value, and then a phase measurement value under the condition of the theoretical phase compensation value is tested and the phase measurement value is online adjusted; the phase compensation value of the phase shifter may also be updated after the correction is performed on the basis of the theoretical phase compensation value, which is not limited in this embodiment. Alternatively, there may be multiple iterations of adjusting the phase measurements on-line, or there may be one adjustment. Optionally, the computer device may adopt random adjustment, gradient adjustment, or other adjustment manners, and the specific adjustment manner is not limited in this embodiment as long as the phase measurement information can be finally matched with the corresponding phase design value. The matching between the phase measurement information and the corresponding phase design value may be equal to each other, or the difference between the two may be smaller than a certain threshold, so that the difference between the two is determined to be smaller, and the design requirement of the antenna can be met.
In this embodiment, the computer device obtains a plurality of phase measurement information of the phased array antenna, then obtains a theoretical phase compensation value required by each phase shifter according to the phase design value and the phase measurement information of each phase shifter, and performs online adjustment on the phase compensation value of each phase shifter by using the FPGA based on the theoretical phase compensation value, so that the phase measurement information of the phased array antenna is matched with the phase design value. In the method, because the computer equipment adopts the FPGA to carry out online adjustment on the phase compensation value of each phase shifter so as to match the phase measurement information with the phase design value of the phased array antenna, the process of downloading and compiling a program required by modifying the phase compensation value each time in the traditional technology is avoided, the FPGA is adopted to carry out online adjustment on the phase compensation value of each phase shifter, the modified phase measurement information can be obtained on site, and the result of each adjustment is obtained in time, so that the debugging time of the phase compensation value is greatly shortened, the debugging efficiency is greatly improved, and the phase configuration efficiency of the phase shifters is greatly improved. The method reduces the procedures of program downloading and compiling, saves time and greatly reduces the calculation amount, thereby greatly saving system resources.
Optionally, on the basis of the embodiment shown in fig. 2, the S30 may specifically include:
and S31, acquiring phase measurement information corresponding to the theoretical phase compensation value of each phase shifter.
Specifically, the computer device modifies the original phase configuration value of each phase shifter into a theoretical phase compensation value on line by using the FPGA, and then obtains phase measurement information corresponding to the theoretical phase compensation value obtained by measurement. The original phase configuration value is a theoretical phase shift quantity determined according to the position of the phase shifter and the signal wavelength, is only a theoretical value, and does not consider the difference caused by inconsistency of devices in a hardware circuit.
Optionally, one possible implementation manner of this step S31 may also be as shown in fig. 4, including:
s311, superposing the theoretical phase compensation value and the original phase configuration value of each phase shifter to generate a corrected phase value of each phase shifter.
And S312, measuring the obtained phase measurement information when each corrected phase value is obtained.
And S313, taking the phase measurement information corresponding to the correction phase value as the phase measurement information corresponding to the theoretical phase compensation value.
Specifically, the computer device superimposes the theoretical phase compensation value and the original phase configuration value of each phase shifter to obtain a corrected phase value of each phase shifter. In the case of the corrected phase value, the measuring device detects phase measurement information, and the computer device may receive the phase measurement information measured by the measuring device, and use the phase measurement information corresponding to the corrected phase value as the phase measurement information corresponding to the theoretical compensation phase value.
In the implementation shown in fig. 4, the computer device generates a corrected phase value for each phase shifter by superimposing the theoretical phase compensation value and the original phase configuration value of each phase shifter, and obtains phase measurement information that can be measured when each corrected phase value is obtained because the corrected phase value can correct the phase shift amount of the phase shifter. And then the computer equipment takes the phase measurement information corresponding to the corrected phase value as the phase measurement information corresponding to the theoretical phase compensation value, so that the phase measurement information corresponding to the theoretical phase compensation value is obtained, the phase shift amount of the phase shifter can be adjusted to a design target based on the theoretical phase compensation value, and the rapid configuration of the phase is realized.
S32, judging whether the phase measurement information corresponding to each theoretical phase compensation value is matched with the phase design value; if not, S33A is executed, and if yes, S33B may be executed.
And the computer equipment respectively judges whether the measured phase measurement information is matched with the corresponding phase design value under the condition of each theoretical phase compensation value. When the two do not match, S33A is executed; alternatively, when both match, S33B may be performed.
S33A, adopting a preset adjusting strategy, and carrying out online adjustment on the theoretical phase compensation value through the FPGA to obtain an actual phase compensation value; each actual phase compensation value is used for being superposed with a corresponding original phase configuration value so that the phase measurement information of the phased array antenna is matched with a corresponding phase design value.
Specifically, the computer device may adopt a preset adjustment strategy, and perform online adjustment on the theoretical phase compensation value through the FPGA. The preset adjustment strategy may include increasing or decreasing, once per adjustment, superimposing the adjusted phase compensation value and a preset original phase configuration value, correcting the phase shift amount of the phase shifter, and then acquiring the adjusted phase measurement information by the computer device. In the adjustment process, the adjustment step of the theoretical phase compensation value by the computer equipment can be 1 degree, and can also be 0.5 degree or less; it may also be a variable step, for example, a step adjustment of 1 degree is started, and when the adjustment is within a proper range, the step adjustment is reduced to obtain a final actual phase compensation value. The actual phase compensation value is a final debugging result, and after the actual phase compensation value is superposed with the corresponding original phase configuration value, the phase shift amount of the phase shifter can be corrected, and the phase measurement information of the corresponding phase shifter meets the design requirement, namely is matched with the corresponding phase design value.
Optionally, possible implementation manners of this step may also refer to the following specific processes shown in fig. 5 or fig. 6, which are not described herein for the moment.
And S33B, determining the theoretical phase compensation value as the actual phase compensation value.
Specifically, since the theoretical phase compensation value enables the phase measurement information to be matched with the phase design value, the computer device takes the theoretical phase compensation value as the actual phase compensation value.
In this embodiment, the computer device obtains phase measurement information corresponding to the theoretical phase compensation value of each phase shifter, and determines whether the phase measurement information corresponding to each theoretical phase compensation value matches the corresponding designed phase value, and when the two are not matched, the computer device adopts a preset adjustment strategy to perform online adjustment on the theoretical phase compensation value through the FPGA to obtain an actual phase compensation value. Because each actual phase compensation value can be superposed with the corresponding original phase configuration value, and the phase measurement information of the phased array antenna is matched with the corresponding phase design value, the computer equipment adopts the adjustment strategy, and online adjusts the theoretical phase compensation value through the FPGA to obtain the actual phase compensation value, so that the phase shift amount of the phase shifter meets the requirement, the directional diagram of the antenna meets the requirement, and the performance of the antenna is improved. Optionally, the computer device may further determine the theoretical phase compensation value as the actual phase compensation value when the phase measurement information corresponding to the theoretical phase compensation value matches the corresponding phase design value, so that the phase shift amount of the phase shifter meets the requirement, multiple redundant adjustments are avoided, the computation amount is reduced, and the efficiency of phase configuration is further improved.
Fig. 5 is a specific process of one possible implementation manner of step S33A in the foregoing embodiment, and includes:
and S331, performing multiple online random adjustments on the theoretical phase compensation value through the FPGA, and acquiring phase measurement information corresponding to the adjusted phase compensation value each time.
And S332, determining one of the phase compensation values corresponding to the phase measurement information matched with the phase design value as the actual phase compensation value.
Specifically, the computer device may perform multiple online adjustments on the theoretical phase compensation value through the FPGA, that is, a plurality of randomly selected compensation values are used, and phase measurement information corresponding to the phase compensation value after each adjustment is obtained. And the computer equipment compares the phase measurement information corresponding to each adjusted phase compensation value with the phase design value respectively and judges whether the phase measurement information is matched with the phase design value or not. When the phase compensation value corresponding to the matched phase measurement information is one, taking the phase compensation value as an actual phase compensation value; when the phase compensation values corresponding to the matched phase measurement information are multiple, one of the phase compensation values can be selected as the actual phase compensation value, or the phase compensation value with the highest matching degree can be selected as the actual phase compensation value. The actual phase compensation value can enable the phase shifting amount of the phase shifter to meet the design requirement. It should be noted that "the matching degree is the highest" may be the smallest difference between the two, or the difference between the two is 0, which is not limited in this embodiment.
In the implementation mode, the computer equipment carries out multiple online random adjustments on the theoretical phase compensation value through the FPGA and acquires the phase measurement information corresponding to the phase compensation value after each adjustment, so that the rapid adjustment can be realized and the adjusted phase measurement information can be rapidly acquired. And then the computer equipment determines one of the phase compensation values corresponding to the phase measurement information matched with the phase design value as an actual phase compensation value.
Fig. 6 is a specific process of another possible implementation manner of step S33A in the foregoing embodiment, where the adjustment strategy includes a gradient adjustment strategy; the phase measurement information includes a phase measurement value, as shown in fig. 5, the method includes:
and S333, judging the magnitude relation between the phase measurement value corresponding to the theoretical phase compensation value and the phase design value. If the phase measurement value corresponding to the theoretical phase compensation value is greater than the designed phase value, executing S334A; if the phase measured value corresponding to the theoretical phase compensation value is smaller than the designed phase value, S334B is executed.
S334A, according to the preset adjustment steps, gradually decreasing the theoretical phase compensation value until the phase measurement value corresponding to the adjusted phase compensation value matches the phase design value, and determining the adjusted phase compensation value as the actual phase compensation value.
S334B, according to the adjustment steps, gradually increasing the theoretical phase compensation value until the phase measurement value corresponding to the adjusted phase compensation value matches the phase design value, and determining the adjusted phase compensation value as the actual phase compensation value.
It should be noted that the adjustment strategy may include a gradient adjustment strategy; the phase measurement information may include a phase measurement value. Specifically, the computer device determines a magnitude relationship between a phase measurement value and a phase design value corresponding to the theoretical phase compensation value. And when the phase measurement value corresponding to the theoretical phase compensation value is greater than the phase design value, gradually reducing the theoretical phase compensation value according to preset adjustment steps, and acquiring adjusted phase measurement information every time the theoretical phase compensation value is reduced until the phase measurement value corresponding to the adjusted phase compensation value is matched with the phase design value.
In this implementation, the computer device determines a magnitude relationship between a phase measurement value and a phase design value corresponding to the theoretical phase compensation value. When the phase measurement value corresponding to the theoretical phase compensation value is larger than the phase design value, the computer device gradually reduces the theoretical phase compensation value according to preset adjustment steps until the phase measurement value corresponding to the adjusted phase compensation value is matched with the phase design value, and determines the adjusted phase compensation value as an actual phase compensation value; when the phase measurement value corresponding to the theoretical phase compensation value is smaller than the phase design value, the theoretical phase compensation value is gradually increased according to the adjustment steps, the adjusted phase measurement information is obtained every time the theoretical phase compensation value is increased, and the adjusted phase measurement information is obtained until the phase measurement value corresponding to the adjusted phase compensation value is matched with the phase design value, so that the phase compensation value can be sequentially debugged in a certain direction according to the preset debugging steps, the debugging on the phase compensation value is directional, the condition that short-time debugging is not in place possibly caused by disordered debugging is avoided, and the phase configuration efficiency is further improved.
Optionally, on the basis of the foregoing embodiments, the method further includes: and updating the original phase configuration value of each phase shifter in a Read Only Memory (ROM) according to the actual phase compensation value. Specifically, the computer device may further superimpose the actual phase compensation value and the original phase configuration value, and replace the original phase configuration value in the ROM, thereby changing the phase shift amount of the phase shifter. In this embodiment, the computer device updates the original phase configuration value in the ROM, thereby storing the adjustment result of the phase compensation value, avoiding the inconvenience of debugging at each time, and facilitating subsequent use.
It should be understood that although the various steps in the flow charts of fig. 2-6 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 2-6 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternating with other steps or at least some of the sub-steps or stages of other steps.
In one embodiment, as shown in fig. 7, there is provided a phase configuration apparatus in a phased array radar, including:
an obtaining module 100, configured to obtain multiple phase measurement information of a phased array antenna;
a configuration module 200, configured to obtain a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
and the adjusting module 300 is configured to perform online adjustment on the phase compensation value of each phase shifter by using a field programmable gate array FPGA based on the theoretical phase compensation value, so that the phase measurement information of the phased array antenna is matched with the phase design value.
In an embodiment, the adjusting module 300 is specifically configured to obtain phase measurement information corresponding to the theoretical phase compensation value of each phase shifter; judging whether the phase measurement information corresponding to each theoretical phase compensation value is matched with the phase design value or not; if not, adopting a preset adjusting strategy, and carrying out online adjustment on the theoretical phase compensation value through the FPGA to obtain an actual phase compensation value; each actual phase compensation value is used for being superposed with a corresponding original phase configuration value so that the phase measurement information of the phased array antenna is matched with a corresponding phase design value.
In an embodiment, the adjusting module 300 is specifically configured to determine the theoretical phase compensation value as the actual phase compensation value if the phase measurement information corresponding to the theoretical phase compensation value matches the corresponding phase design value.
In an embodiment, the adjusting module 300 is specifically configured to superimpose the theoretical phase compensation value and the original phase configuration value of each phase shifter to generate a corrected phase value of each phase shifter; when each correction phase value is obtained, the phase measurement information obtained by measurement is obtained; and taking the phase measurement information corresponding to the corrected phase value as the phase measurement information corresponding to the theoretical phase compensation value.
In one embodiment, the adjustment strategy comprises a gradient adjustment strategy; the phase measurement information comprises a phase measurement value; the adjusting module 300 is specifically configured to determine a magnitude relationship between a phase measurement value corresponding to the theoretical phase compensation value and the phase design value; and if the phase measurement value corresponding to the theoretical phase compensation value is larger than the designed phase value, gradually reducing the theoretical phase compensation value according to preset adjustment steps until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value.
In one embodiment, if the phase measurement value corresponding to the theoretical phase compensation value is smaller than the designed phase value, the theoretical phase compensation value is gradually increased according to the adjustment step until the phase measurement value corresponding to the adjusted phase compensation value matches the designed phase value, and the adjusted phase compensation value is determined as the actual phase compensation value.
In one embodiment, the adjusting module 300 is further configured to update the original phase configuration value of each phase shifter in a read only memory ROM according to the actual phase compensation value.
For the specific definition of the phase configuration device, reference may be made to the above definition of the phase configuration method, which is not described herein again. The modules in the phase configuration device can be wholly or partially implemented by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
In one embodiment, a computer device is provided, comprising a memory and a processor, the memory having a computer program stored therein, the processor implementing the following steps when executing the computer program:
obtaining a plurality of phase measurement information of a phased array antenna;
obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
and on the basis of the theoretical phase compensation value, performing online adjustment on the phase compensation value of each phase shifter by adopting a Field Programmable Gate Array (FPGA) so as to match the phase measurement information of the phased array antenna with the phase design value.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
acquiring phase measurement information corresponding to the theoretical phase compensation value of each phase shifter;
judging whether the phase measurement information corresponding to each theoretical phase compensation value is matched with the phase design value or not;
if not, adopting a preset adjusting strategy, and carrying out online adjustment on the theoretical phase compensation value through the FPGA to obtain an actual phase compensation value; each actual phase compensation value is used for being superposed with a corresponding original phase configuration value so that the phase measurement information of the phased array antenna is matched with a corresponding phase design value.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
and if the phase measurement information corresponding to the theoretical phase compensation value is matched with the corresponding phase design value, determining the theoretical phase compensation value as the actual phase compensation value.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
superposing the theoretical phase compensation value and the original phase configuration value of each phase shifter to generate a corrected phase value of each phase shifter;
when each correction phase value is obtained, the phase measurement information obtained by measurement is obtained;
and taking the phase measurement information corresponding to the corrected phase value as the phase measurement information corresponding to the theoretical phase compensation value.
In one embodiment, the adjustment strategy comprises a gradient adjustment strategy; the phase measurement information comprises a phase measurement value, and the processor, when executing the computer program, further implements the following steps:
judging the magnitude relation between the phase measurement value corresponding to the theoretical phase compensation value and the phase design value;
if the phase measurement value corresponding to the theoretical phase compensation value is larger than the designed phase value, gradually reducing the theoretical phase compensation value according to preset adjustment steps until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value;
in one embodiment, the processor, when executing the computer program, further performs the steps of:
and if the phase measurement value corresponding to the theoretical phase compensation value is smaller than the designed phase value, gradually increasing the theoretical phase compensation value according to the adjustment step until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
and updating the original phase configuration value of each phase shifter in a Read Only Memory (ROM) according to the actual phase compensation value.
It should be clear that, in the embodiments of the present application, the process of executing the computer program by the processor is consistent with the process of executing the steps in the above method, and specific reference may be made to the description above.
In one embodiment, a computer-readable storage medium is provided, having a computer program stored thereon, which when executed by a processor, performs the steps of:
obtaining a plurality of phase measurement information of a phased array antenna;
obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
and on the basis of the theoretical phase compensation value, performing online adjustment on the phase compensation value of each phase shifter by adopting a Field Programmable Gate Array (FPGA) so as to match the phase measurement information of the phased array antenna with the phase design value.
In one embodiment, the computer program when executed by the processor further performs the steps of:
acquiring phase measurement information corresponding to the theoretical phase compensation value of each phase shifter;
judging whether the phase measurement information corresponding to each theoretical phase compensation value is matched with the phase design value or not;
if not, adopting a preset adjusting strategy, and carrying out online adjustment on the theoretical phase compensation value through the FPGA to obtain an actual phase compensation value; each actual phase compensation value is used for being superposed with a corresponding original phase configuration value so that the phase measurement information of the phased array antenna is matched with a corresponding phase design value.
In one embodiment, the computer program when executed by the processor further performs the steps of:
and if the phase measurement information corresponding to the theoretical phase compensation value is matched with the corresponding phase design value, determining the theoretical phase compensation value as the actual phase compensation value.
In one embodiment, the computer program when executed by the processor further performs the steps of:
superposing the theoretical phase compensation value and the original phase configuration value of each phase shifter to generate a corrected phase value of each phase shifter;
when each correction phase value is obtained, the phase measurement information obtained by measurement is obtained;
and taking the phase measurement information corresponding to the corrected phase value as the phase measurement information corresponding to the theoretical phase compensation value.
In one embodiment, the computer program when executed by the processor further performs the steps of:
in one embodiment, the adjustment strategy comprises a gradient adjustment strategy, and the phase measurement information comprises a phase measurement value; the computer program when executed by the processor further realizes the steps of:
judging the magnitude relation between the phase measurement value corresponding to the theoretical phase compensation value and the phase design value;
if the phase measurement value corresponding to the theoretical phase compensation value is larger than the designed phase value, gradually reducing the theoretical phase compensation value according to preset adjustment steps until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value;
in one embodiment, the computer program when executed by the processor further performs the steps of:
and if the phase measurement value corresponding to the theoretical phase compensation value is smaller than the designed phase value, gradually increasing the theoretical phase compensation value according to the adjustment step until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value.
In one embodiment, the computer program when executed by the processor further performs the steps of:
and updating the original phase configuration value of each phase shifter in a Read Only Memory (ROM) according to the actual phase compensation value.
It should be clear that, in the embodiments of the present application, the process of executing the computer program by the processor is consistent with the process of executing the steps in the above method, and specific reference may be made to the description above.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A method of phase configuration in a phased array radar, the method comprising:
obtaining a plurality of phase measurement information of a phased array antenna;
obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
acquiring phase measurement information corresponding to the theoretical phase compensation value of each phase shifter;
judging whether the phase measurement information corresponding to each theoretical phase compensation value is matched with the phase design value or not;
if not, adopting a preset adjusting strategy, and carrying out online adjustment on the theoretical phase compensation value through the FPGA to obtain an actual phase compensation value; each actual phase compensation value is used for being superposed with a corresponding original phase configuration value so as to enable phase measurement information of the phased array antenna to be matched with a corresponding phase design value;
the obtaining of the phase measurement information corresponding to the theoretical phase compensation value of each phase shifter further includes:
superposing the theoretical phase compensation value and the original phase configuration value of each phase shifter to generate a corrected phase value of each phase shifter; measuring phase measurement information corresponding to the corrected phase value based on the corrected phase value of each phase shifter; and taking the phase measurement information corresponding to the corrected phase value as the phase measurement information corresponding to the theoretical phase compensation value.
2. The method of claim 1, further comprising:
and if the phase measurement information corresponding to the theoretical phase compensation value is matched with the corresponding phase design value, determining the theoretical phase compensation value as the actual phase compensation value.
3. The method of claim 1, wherein the adjustment strategy comprises a gradient adjustment strategy; the phase measurement information includes a phase measurement value, the theoretical phase compensation value is adjusted on line through the FPGA by adopting a preset adjustment strategy to obtain an actual phase compensation value, and the method includes the following steps:
judging the magnitude relation between the phase measurement value corresponding to the theoretical phase compensation value and the phase design value;
and if the phase measurement value corresponding to the theoretical phase compensation value is larger than the designed phase value, gradually reducing the theoretical phase compensation value according to preset adjustment steps until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value.
4. The method of claim 3, further comprising:
and if the phase measurement value corresponding to the theoretical phase compensation value is smaller than the designed phase value, gradually increasing the theoretical phase compensation value according to the adjustment step until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value.
5. The method of claim 4, further comprising:
and updating the original phase configuration value of each phase shifter in a Read Only Memory (ROM) according to the actual phase compensation value.
6. An apparatus for phase configuration in a phased array radar, the apparatus comprising:
the acquisition module is used for acquiring a plurality of phase measurement information of the phased array antenna;
the configuration module is used for obtaining a theoretical phase compensation value required by each phase shifter according to the phase design value of each phase shifter and the phase measurement information;
the adjusting module is used for acquiring phase measurement information corresponding to the theoretical phase compensation value of each phase shifter, judging whether the phase measurement information corresponding to each theoretical phase compensation value is matched with the designed phase value or not, and if not, adopting a preset adjusting strategy to perform online adjustment on the theoretical phase compensation value through the FPGA to obtain an actual phase compensation value; each actual phase compensation value is used for being superposed with a corresponding original phase configuration value so as to enable phase measurement information of the phased array antenna to be matched with a corresponding phase design value;
the adjusting module is specifically configured to superimpose the theoretical phase compensation value and the original phase configuration value of each phase shifter to generate a corrected phase value of each phase shifter; measuring phase measurement information corresponding to the corrected phase value based on the corrected phase value of each phase shifter; and taking the phase measurement information corresponding to the corrected phase value as the phase measurement information corresponding to the theoretical phase compensation value.
7. The apparatus of claim 6, wherein the adjusting module is specifically configured to determine the theoretical phase compensation value as the actual phase compensation value if phase measurement information corresponding to the theoretical phase compensation value matches the corresponding phase design value.
8. The apparatus of claim 6, wherein the adjustment strategy comprises a gradient adjustment strategy; the phase measurement information includes a phase measurement value, and the adjustment module is specifically configured to:
judging the magnitude relation between the phase measurement value corresponding to the theoretical phase compensation value and the phase design value; and if the phase measurement value corresponding to the theoretical phase compensation value is larger than the designed phase value, gradually reducing the theoretical phase compensation value according to preset adjustment steps until the phase measurement value corresponding to the adjusted phase compensation value is matched with the designed phase value, and determining the adjusted phase compensation value as the actual phase compensation value.
9. A computer device comprising a memory and a processor, the memory storing a computer program, wherein the processor implements the steps of the method of any one of claims 1 to 5 when executing the computer program.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 5.
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