CN110379930A - Array substrate and preparation method thereof, display panel - Google Patents
Array substrate and preparation method thereof, display panel Download PDFInfo
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- CN110379930A CN110379930A CN201910650186.8A CN201910650186A CN110379930A CN 110379930 A CN110379930 A CN 110379930A CN 201910650186 A CN201910650186 A CN 201910650186A CN 110379930 A CN110379930 A CN 110379930A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
- H10K50/115—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising active inorganic nanostructures, e.g. luminescent quantum dots
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/805—Electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
- H10K2102/301—Details of OLEDs
- H10K2102/302—Details of OLEDs of OLED structures
- H10K2102/3023—Direction of light emission
- H10K2102/3026—Top emission
Abstract
The embodiment of the present invention provides a kind of array substrate and preparation method thereof, display panel, is related to field of display technology, display effect can be improved.A kind of array substrate, comprising: substrate, the top emission type luminescent device for being set on the substrate and being located at each subpixel area；The luminescent layer that the top emission type luminescent device includes first electrode, is set to second electrode of the first electrode far from the one side of substrate and is set between the first electrode and the second electrode；In the luminescent layer region Chong Die with the first electrode, the thickness of the luminescent layer is uniformly and without segment difference.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of array substrate and preparation method thereof, display panel.
Background technique
With the development of display technology, top emission type luminescent device is more next because of its good device stability and commutating ratio
More it is taken seriously.Top emission type luminescent device is emitted light from top, is not influenced by pixel circuit, has biggish opening
Rate.That is, the ratio that light-emitting area accounts for elemental area is higher, so that top emission type luminescent device reaches and bottom emitting type luminescent device
Driving current needed for same brightness is smaller, is conducive to extend the service life of top emission type luminescent device.Also, it is similarly shining
Under the premise of efficiency and light-emitting area, the elemental area of the display panel including top emission type luminescent device is relatively small, favorably
In the resolution ratio for improving display panel.
Summary of the invention
The embodiment of the present invention provides a kind of array substrate and preparation method thereof, display panel, and display effect can be improved.
In order to achieve the above objectives, the embodiment of the present invention adopts the following technical scheme that
In a first aspect, providing a kind of array substrate, comprising: substrate is set on the substrate and is located at each sub-pix
The top emission type luminescent device in area；The top emission type luminescent device includes first electrode, to be set to the first electrode separate
The second electrode of the one side of substrate and the luminescent layer being set between the first electrode and the second electrode；Institute
The luminescent layer region Chong Die with the first electrode is stated, the thickness of the luminescent layer is uniformly and without segment difference.
Optionally, above-mentioned array substrate further include: be set to the pixel circuit of each subpixel area；The pixel
Insulating layer is additionally provided between circuit and the top emission type luminescent device, the top emission type luminescent device is located at the insulation
Layer is far from the pixel circuit side；The first electrode passes through the via hole that is set on the insulating layer and the pixel circuit
Electrical connection；In the luminescent layer region Chong Die with the first electrode, the upper surface of the insulating layer is flat.
Optionally, the insulating layer includes inorganic insulation sublayer and organic insulation sublayer；The organic insulation sublayer is located at
The side of the inorganic insulation sublayer far from the substrate；The inorganic insulation sublayer is in the region Chong Die with the luminescent layer
Upper surface it is flat；The organic insulation molecular layers thick is uniform.
Optionally, above-mentioned array substrate further include: the signal wire being connect with the pixel circuit；The signal wire is at it
On extending direction, it is at least partially disposed between the substrate and the top emission type luminescent device.
Optionally, the first electrode is anode, and the second electrode is cathode；Alternatively, the first electrode is cathode,
The second electrode is anode.
Second aspect provides a kind of display panel, including above-mentioned array substrate.
The third aspect provides a kind of preparation method of array substrate, comprising: each subpixel area sequentially forms on substrate
Top emission type luminescent device is prepared in first electrode, luminescent layer and second electrode；In the luminescent layer and first electricity
The region of pole overlapping, the light emitting layer thickness is uniformly and without segment difference.
Optionally, before forming the top emission type luminescent device, the preparation method of the array substrate further include:
Pixel circuit is formed in each subpixel area；On the substrate for forming the pixel circuit, inorganic insulation film is formed；?
Photoresist is coated on the inorganic insulation film；It is exposed using intermediate tone mask plate to the photoresist is formed, after development
Formation photoresist is fully retained part, half reservation part of photoresist and photoresist and completely removes part；Wherein, the photoresist is complete
The region of complete corresponding first via hole to be formed in removal part；The photoresist half retain part at least correspond to the first electrode with
Part region is protruded in the region of the luminescent layer overlapping；The photoresist is fully retained part and corresponds to other regions；It adopts
With etching technics, the inorganic insulation film that the photoresist completely removes the segment thickness of part exposing is removed；Using ash
Chemical industry skill removes the photoresist that the photoresist half retains part；First via hole to be formed is removed using etching technics
The residue inorganic insulation film in region, while removing the photoresist that the photoresist half retains part and being removed
Afterwards, the segment thickness of the inorganic insulation film of exposing, so that being located at the luminescent layer area Chong Die with the first electrode
The inorganic insulation film surface in domain is flat；The photoresist that part is fully retained in the photoresist is removed using stripping technology,
Obtain the inorganic insulation sublayer；Organic insulation sublayer in homogeneous thickness is formed in the inorganic insulation sublayer, it is described organic
Insulator layer includes the second via hole for corresponding and being laminated with first via hole, and the size of second via hole is greater than described
The size of first via hole；The first electrode passes through second via hole of stacking and first via hole and the pixel circuit
Electrical connection.
Optionally, the pixel circuit includes driving transistor；During forming inorganic insulation sublayer, the photoetching
Glue half retains part and also corresponds to the inorganic insulation film part area Chong Die with the driving source electrode and drain electrode of transistor
Domain.
Optionally, the preparation method of above-mentioned array substrate further include: when forming pixel circuit, it is synchronous formed with it is described
The signal wire of pixel circuit connection；At least partly described signal wire is located at the substrate and the top emission type to be formed shines
Between device；During forming inorganic insulation sublayer, the photoresist half retains part and corresponds to top emission type hair
The region of optical device and the signal line overlap.
The embodiment of the present invention provides a kind of array substrate and preparation method thereof, display panel, in top emission type luminescent device
Luminescent layer in the region be overlapped with first electrode, the thickness of luminescent layer can avoid being located at top emission type and send out uniformly and without segment difference
TFT, capacitor below optical device or the signal wire being electrically connected with pixel circuit etc. and cause luminescent layer film layer it is whole it is concave-convex not
It is flat, so as to improve the uniformity of luminescent layer, improve the illumination effect of top emission type luminescent device.When array substrate is applied to
When display device, the display effect and stability of display device can be improved.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of schematic top plan view of display panel provided in an embodiment of the present invention；
Fig. 2 is a kind of structural schematic diagram of sub-pix provided in an embodiment of the present invention；
Fig. 3 is the structural schematic diagram of another sub-pix provided in an embodiment of the present invention；
Fig. 4 is a kind of structural schematic diagram of array substrate provided in an embodiment of the present invention；
Fig. 5 is a kind of structural schematic diagram for array substrate that the prior art provides；
Fig. 6 is the structural schematic diagram of another array substrate provided in an embodiment of the present invention；
Fig. 7 is the structural schematic diagram of another array substrate provided in an embodiment of the present invention；
Fig. 8 is a kind of flow diagram of the preparation method of array substrate provided in an embodiment of the present invention；
Fig. 9 is a kind of preparation process schematic diagram of array substrate provided in an embodiment of the present invention；
Figure 10 is the preparation process schematic diagram of another array substrate provided in an embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
The embodiment of the present invention provides a kind of display panel.As shown in Figure 1, the display panel has viewing area (active
The area area, abbreviation AA) and peripheral region S, peripheral region S for example around the area AA one enclose be arranged.Multiple sub- pictures are provided in the above-mentioned area AA
Plain P；Multiple sub-pix P include at least the first color sub-pix, the second color sub-pix and third color sub-pix, the first face
Color, the second color and third color are three primary colours (such as red, green and blue).
The explanation carried out so that above-mentioned multiple sub-pixes are in array format arrangement as an example in Fig. 1.In the case, along level side
The sub-pix being arranged in a row to X is known as with a line sub-pix, and the sub-pix that Y is arranged in a row along the vertical direction is known as same row
Sub-pix.
On this basis, optionally, it can be connect with a grid line with a line sub-pix, same row sub-pix can be with one
The connection of root data line.
In the case, as shown in Fig. 2-Fig. 3, display panel includes array substrate 10 and package substrate 60.Wherein, it seals
Dress substrate 60 can be thin-film encapsulation layer, be also possible to rigid substrates.
Optionally, as shown in Fig. 2-Fig. 3, it includes pixel circuit 50 and top hair that each sub-pix P is corresponded in array substrate 10
Emitting luminescent device 40.The pixel circuit 50 is by thin film transistor (TFT) (Thin Film Transistor, abbreviation TFT), capacitor
The composition such as (Capacitance, abbreviation C) electronic devices.For example, pixel circuit 50 can be by two TFT (switch TFT
The pixel circuit 50 of the 2T1C structure constituted with a driving TFT) and a capacitor；Certainly, pixel circuit 50 can also be by
The pixel circuit 50 that more than two TFT (multiple switch TFT and a driving TFT) and at least one capacitor are constituted.
It should be noted that Fig. 2-Fig. 3 is only schematic diagram, pixel circuit 50 and top emission type luminescent device 40 are not showed that
Connection relationship (can according to need in practice selection suitable pixel circuit 50).
In the case where the light that top emission type luminescent device 40 issues is white light, optionally, as shown in Fig. 2, in array base
On plate 10 corresponding each sub-pix P and the light emission side of top emission type luminescent device 40 can be with corresponding setting filter unit
20.Certainly, filter unit 20 also can be set on package substrate 60.
Wherein, in red sub-pixel, filter unit 20 is red filter unit, in green sub-pixels, filter unit
20 be green filter unit, and in blue subpixels, filter unit 20 is blue filter unit.Arbitrary neighborhood filter unit can be with
It is separated by black matrix pattern.
As shown in figure 4, the embodiment of the present invention provides a kind of array substrate, comprising: substrate 11 is set on substrate 11 and position
In the top emission type luminescent device 40 of each subpixel area；Top emission type luminescent device 40 includes first electrode 41, is set to the
Second electrode 43 of one electrode 41 far from 11 side of substrate and it is set to shining between first electrode 41 and second electrode 43
Layer 42；In the region Chong Die with first electrode 41 of luminescent layer 42, the thickness of luminescent layer 42 is uniformly and without segment difference.
It is understood that the region Chong Die with first electrode 41 in luminescent layer 42, the thickness of luminescent layer 42 is uniformly and nothing
Segment difference, that is, in the region Chong Die with first electrode 41 of luminescent layer 42, luminescent layer 42 is flat.
It is exemplary, it, can be by opening in technique in the case where the light that top emission type luminescent device 40 issues is white light
Mouth mask plate (Open Mask) vapor deposition forms luminescent layer 42, and luminescent layer 42 can be located at the entire area AA at this time.
Wherein, first electrode 41 is opaque, and second electrode 43 is transparent or translucent, so that light is from top emitting
It projects at the top of type luminescent device 40.Second electrode 43 can be located at the entire area AA.
Optionally, as shown in Fig. 2, first electrode 41 is anode, second electrode 43 is cathode；Alternatively, as shown in figure 3,
One electrode 41 is cathode, and second electrode 43 is anode.
It is understood that as shown in Fig. 2, being top in the case that anode second electrode 43 is cathode in first electrode 41
Emission type luminescent device 40, which is positive, to be set.As shown in figure 3, first electrode 41 be cathode, second electrode 43 be anode the case where
Under, top emission type luminescent device 40 is inverted.
It should be noted that as shown in Fig. 2, being top in the case that anode second electrode 43 is cathode in first electrode 41
Emission type luminescent device 40 further includes hole transmission layer 44 between luminescent layer 42 and first electrode 41, is located at luminescent layer 42
Electron transfer layer 45 between second electrode 43.It certainly, as needed in some embodiments, can also be in hole transmission layer
Hole injection layer is set between 44 and first electrode 41, electronics note can be set between electron transfer layer 45 and second electrode 43
Enter layer.Alternatively, as shown in figure 3, being in the case that cathode second electrode 43 is anode in first electrode 41, top emission type shines
Device 40 further includes hole transmission layer 44 between luminescent layer 42 and second electrode 43, is located at luminescent layer 42 and first electrode
Electron transfer layer 45 between 41, it is, of course, also possible to hole injection layer is set between hole transmission layer 44 and second electrode 43,
Electron injecting layer can be set between electron transfer layer 45 and first electrode 41.
On this basis, optionally, luminescent layer 42 can be organic luminous layer or quantum dot light emitting layer.
Wherein, array substrate further includes the pixel defining layer 14 being set on substrate 11, and pixel defining layer 14 limits more
The region of a sub-pix.The material of pixel defining layer 14 can use resin material.
It should be noted that the pixel circuit 50 in Fig. 4 only illustrates driving transistor, other parts are not shown.
Under normal conditions, as shown in figure 5, top emission type luminescent device 40 compared to pixel circuit 50 far from substrate 11, as
At least one of TFT, capacitor, the signal wire 13 being electrically connected with pixel circuit 50 can shine positioned at top emission type in plain circuit 50
The lower section of device 40 is likely located in the region Chong Die with first electrode 41 of luminescent layer 42, in this way, forming top emitting in technique
During type luminescent device 40, luminescent layer 42 in the region Chong Die with first electrode 41 can due to lower section cabling presence and
To far from 11 side of substrate protrusion, the hair of reduction top emission type luminescent device 40 concave-convex uneven so as to cause 42 film layer of luminescent layer
Light effect.
A kind of array substrate provided in an embodiment of the present invention, luminescent layer 42 in top emission type luminescent device 40 is with first
The region that electrode 41 is overlapped, the thickness of luminescent layer 42 can avoid being located at 40 lower section of top emission type luminescent device uniformly and without segment difference
TFT, capacitor or the signal wire 13 that is electrically connected with pixel circuit 50 etc. and cause 42 film layer of luminescent layer integrally uneven, from
And the uniformity of luminescent layer 42 can be improved, improve the illumination effect of top emission type luminescent device 40.When array substrate is applied to
When display device, the display effect and stability of display device can be improved.
Optionally, as shown in Figure 4 and Figure 6, insulation is additionally provided between pixel circuit 50 and top emission type luminescent device 40
Layer 12, top emission type luminescent device 40 is located at insulating layer 12 far from 50 side of pixel circuit；First electrode 41 is by being set to absolutely
Via hole 30 in edge layer 12 is electrically connected (via hole 30 is not shown in Fig. 4) with pixel circuit 50；In luminescent layer 42 and 41 weight of first electrode
The upper surface in folded region, insulating layer 12 is flat.
It is understood that first electrode 41 is directly contacted with insulating layer 12, and first electrode 41 and insulating layer 12 connect
Contacting surface is flat.
Since first electrode 41 and the contact surface of luminescent layer 42 are flat, and the surface that first electrode 41 is contacted with insulating layer 12
Flat, therefore, in the region Chong Die with first electrode 41 of luminescent layer 42, first electrode 41 is without segment difference, to improve first electrode
41 uniformity promotes the electric property of first electrode 41.
Optionally, as shown in figs. 4 and 7, insulating layer 12 includes inorganic insulation sublayer 121 and organic insulation sublayer 122；Have
Machine insulator layer 122 is located at side of the inorganic insulation sublayer 121 far from substrate 11；Inorganic insulation sublayer 121 with luminescent layer 42
Upper surface in the region of overlapping is flat；122 thickness of organic insulation sublayer is uniform.
Wherein, inorganic insulation sublayer 121 and organic insulation sublayer 122 all can be single or multi-layer structures.It is exemplary, nothing
The material of machine insulator layer 121 can be silicon nitride (SiNx) or silica (SiOx).The material of organic insulation sublayer 122 can be with
For resin material.
On this basis, as shown in fig. 7, inorganic insulation sublayer 121 includes the first via hole 31, in organic insulation sublayer 122
Including the second via hole 32 for corresponding and being laminated with the first via hole 31, the size of the second via hole 32 is greater than the ruler of the first via hole 31
Very little, first electrode 41 is electrically connected by the second via hole 32 and the first via hole 31 with pixel circuit 50.
It is understood that upper surface of the inorganic insulation sublayer 121 in the region Chong Die with luminescent layer 42 is flat, accordingly
, the organic insulation sublayer 122 and the contact surface of inorganic insulation sublayer 121 positioned at 121 upper surface of inorganic insulation sublayer are flat.And
And 122 thickness of organic insulation sublayer is uniform, therefore, organic insulation sublayer 122 in the region Chong Die with luminescent layer 42 without segment difference,
That is, organic insulation sublayer 122 is flat in the upper surface in the region Chong Die with luminescent layer 42, to improve organic insulation sublayer 122
The uniformity of film layer.
On this basis, during forming inorganic insulation sublayer 121 in technique, inorganic insulation sublayer can be made
It, can also be to inorganic insulation sublayer 121 and pixel circuit while upper surface in 121 regions Chong Die with luminescent layer 42 is flat
The partial region of 50 (such as TFT etc.) overlapping is planarized.
Optionally, as shown in Fig. 4, Fig. 6 and Fig. 7, signal wire 13 in their extension direction, is at least partially disposed at substrate 11
Between top emission type luminescent device 40.
Wherein, signal wire 13 can be power supply line.Pixel circuit 50 includes driving transistor, drive the drain electrode of transistor with
Power supply line same layer is the same as material and electrical connection.
Optionally, driving transistor can be bottom gate thin film transistor or top gate type thin film transistor.
The embodiment of the present invention also provides a kind of preparation method of array substrate, comprising: refers to Fig. 4, Fig. 6 and Fig. 7, substrate
Each subpixel area sequentially forms first electrode 41, luminescent layer 42 and second electrode 43 on 11, and top emission type hair is prepared
Optical device 40；In the region Chong Die with first electrode 41 of luminescent layer 42,42 thickness of luminescent layer is uniformly and without segment difference.
Exemplary, in the case where the light that top emission type luminescent device 40 issues is white light, luminescent layer 42 can be by opening
Mouth mask plate (Open Mask), which is deposited, to be formed, at this point, luminescent layer 42 is located at the entire area AA.
Wherein, first electrode 41 is opaque, and second electrode 43 is transparent or translucent, so that light is from top emitting
It projects at the top of type luminescent device 40.Second electrode 43 can be located at the entire area AA.
Optionally, luminescent layer 42 can be organic luminous layer or quantum dot light emitting layer.
It is understood that the preparation method of array substrate further includes formation pixel defining layer 14, pixel on substrate 11
Define the region that layer 14 limits multiple sub-pixes.The material of pixel defining layer 14 can use such as resin material.
A kind of preparation method of array substrate provided in an embodiment of the present invention, the luminescent layer in top emission type luminescent device 40
42 in the region Chong Die with first electrode 41, and the thickness of luminescent layer 42 can avoid shining positioned at top emission type uniformly and without segment difference
The TFT of the lower section of device 40, capacitor or signal wire 13 for being electrically connected with pixel circuit 50 to be formed etc. and lead to luminescent layer 42
Film layer is integrally uneven, so as to improve the uniformity of luminescent layer 42, improves the luminous effect of top emission type luminescent device 40
Fruit.When array substrate is applied to display device, the display effect and stability of display device can be improved.
Optionally, as shown in figure 8, the preparation method of array substrate is also wrapped before forming top emission type luminescent device 40
It includes:
S10, with reference to Fig. 4, Fig. 6 and Fig. 7, pixel circuit 50 is formed in each subpixel area.
S20, as shown in Fig. 9-Figure 10, formed pixel circuit 50 substrate 11 on, formed inorganic insulation film 1210.
Wherein it is possible to form inorganic insulation film 1210 far from 11 side of substrate in pixel circuit 50 using sedimentation.Show
Example, the material of inorganic insulation film 1210 can use silicon nitride, silica etc..
S21, as shown in Fig. 9-Figure 10, on inorganic insulation film 1210 coat photoresist 1211；Using intermediate tone mask
80 pairs of formation photoresists 1211 of plate are exposed, form that part is fully retained in photoresist, photoresist half retains part after development and
Photoresist completely removes part；Wherein, photoresist completely removes the region that part corresponds to the first via hole 31 to be formed；Photoresist half
Retain part and at least corresponds to protrusion part region in the region Chong Die with luminescent layer 42 of first electrode 41；Photoresist is protected completely
Part is stayed to correspond to other regions.
It is understood that intermediate tone mask plate is to make to be exposed on the intensity that different zones penetrate light by grating effect
Difference, and photoresist is made to carry out selective exposure, development.
Wherein, in the case where photoresist is positive photoresist, half-tone mask plate may include opaque section, semi-transparent
Bright part and transparent part, after photoresist exposure, photoresist is fully retained part and corresponds to the opaque of half-tone mask plate
Part, photoresist half retain the translucent portion that part corresponds to half-tone mask plate, and photoresist completely removes part and corresponds to
The transparent part of half-tone mask plate.In the case where photoresist is negative photoresist, half-tone mask plate may include transparent
Partially, translucent portion and opaque section, after photoresist exposure, photoresist is fully retained part and corresponds to half-tone mask
The transparent part of plate, photoresist half retain the translucent portion that part corresponds to half-tone mask plate, and photoresist completely removes portion
Divide the opaque section corresponding to half-tone mask plate.
On this basis, by taking positive photoresist as an example, as shown in figure 9, transparent part 81 in half-tone mask plate 80 with
The region of first via hole 31 to be formed is corresponding, in the region at least Chong Die with luminescent layer 42 with first electrode 41 of translucent portion 82
It is corresponding to protrude part region, opaque section 83 is corresponding with other regions.
S22, as shown in Fig. 9-Figure 10, using etching technics, remove the segment thickness that photoresist completely removes part exposing
Inorganic insulation film 1210.
That is, the transparent part 81 in removal half-tone mask plate 80 and the part in the region of the first via hole 31 to be formed are thick
The inorganic insulation film 1210 of degree, so that also retaining the inorganic insulation film of segment thickness in the region of the first via hole 31 to be formed
1210。
S23, as shown in Fig. 9-Figure 10, the photoresist 1211 of part is retained using cineration technics removal photoresist half.
S24, as shown in Fig. 9-Figure 10, using etching technics remove in 31 region of the first via hole to be formed residue it is inorganic absolutely
Edge film 1210, at the same remove photoresist half retain part photoresist 1211 be removed after, the inorganic insulation film of exposing
1210 segment thickness, so that 1210 surface of inorganic insulation film for being located at the region Chong Die with first electrode 41 of luminescent layer 42 is flat
It is smooth.
It is understood that photoresist completely removes inorganic insulation film 1210 and the photoetching of the segment thickness of part exposing
After the photoresist 1211 that glue half retains part is removed, the segment thickness of the inorganic insulation film 1210 of exposing is approximately equal, that is,
The thickness of remaining inorganic insulation film 1210, Chong Die with luminescent layer 42 with first electrode 41 in first via hole, 31 region to be formed
Region in protrude part region in inorganic insulation film 1210 thickness it is approximately equal.
Since the inorganic insulation film 1210 that photoresist completely removes part is not completely removed, that is, the first mistake to be formed
The region in hole 31 also retains the inorganic insulation film 1210 of segment thickness, therefore, removes photoetching using etching technics subsequent
It, can during the segment thickness of the inorganic insulation film 1210 of exposing after the photoresist 1211 that glue half retains part is removed
The problem for overetch occur to avoid the first via hole 31 to be formed, and causing the region of the first via hole 31 exposure impaired.
Those skilled in the art can control the thickness of inorganic insulation film 1210 by conditions such as control etch periods.
S25, as shown in Fig. 9-Figure 10, the photoresist of part is fully retained using stripping technology removal photoresist 1211
1211, obtain inorganic insulation sublayer 121.
S26, as shown in figure 9, form organic insulation sublayer 122 in homogeneous thickness in inorganic insulation sublayer 121, it is organic absolutely
Edge sublayer 122 includes the second via hole 32 for corresponding and being laminated with the first via hole 31, and the size of the second via hole 32 is greater than first
The size of via hole 31；First electrode 41 is electrically connected by the second via hole 32 and the first via hole 31 of stacking with pixel circuit 50.
Wherein it is possible to which organic insulator layer 122 is formed in inorganic insulation sublayer 121 using coating processes.Organic insulation
The material of sublayer 122 can use resin material.
It is understood that upper surface of the inorganic insulation sublayer 121 in the region Chong Die with luminescent layer 42 is flat, accordingly
, the organic insulation sublayer 122 and the contact surface of inorganic insulation sublayer 121 positioned at 121 upper surface of inorganic insulation sublayer are flat.And
And 122 thickness of organic insulation sublayer is uniform, therefore, organic insulation sublayer 122 in the region Chong Die with luminescent layer 42 without segment difference,
That is, organic insulation sublayer 122 is flat in the upper surface in the region Chong Die with luminescent layer 42, to improve organic insulation sublayer 122
The uniformity of film layer.
Optionally, pixel circuit 50 includes driving transistor；As shown in Figure 10, in the mistake for forming inorganic insulation sublayer 121
Cheng Zhong, photoresist half retain part and also correspond to inorganic insulation film 1210 and drive 513 weights of source electrode 512 and drain electrode of transistor
Folded partial region.
That is, by taking positive photoresist as an example, as shown in Figure 10, transparent part 81 in half-tone mask plate 80 and to be formed the
The region of one via hole 31 is corresponding；Translucent portion 82 is in addition to protruding part in the region Chong Die with luminescent layer 42 with first electrode 41
Source electrode 512 and the 513 Chong Die parts that drain except region is corresponding, also with inorganic insulation film 1210 and driving transistor
Region is corresponding；Opaque section 83 is corresponding with other regions.
Wherein, driving transistor can be bottom gate thin film transistor or top gate type thin film transistor.
It is exemplary, in the case where driving transistor is bottom gate thin film transistor, as shown in Figure 10, form driving crystal
Pipe includes that grid 511, gate insulation layer 515, active layer 514 and source electrode 512 and drain electrode 513 are sequentially formed on substrate 11.
Photoresist half retains part and also corresponds to inorganic insulation film 1210 and drive source electrode 512 and the drain electrode of transistor
The partial region of 513 overlappings, that is, thin in the remaining inorganic insulation removed in 31 region of the first via hole to be formed using etching technics
After film 1210 and the removal reservation of photoresist 1,211 half part are removed, the segment thickness inorganic insulation film 1210 of exposing
Meanwhile it can also remove and the inorganic insulation film in the 513 Chong Die partial regions of source electrode 512 and drain electrode for driving transistor
1210。
It is understood that inorganic insulation film 1210 with driving transistor source electrode 512 and drain 513 Chong Die parts
Remaining inorganic insulation film in the segment thickness of the inorganic insulation film 1210 in region, with 31 region of the first via hole to be formed
The inorganic insulation in the region of part is protruded in 1210 thickness and the region Chong Die with luminescent layer 42 with first electrode 41
The thickness of film 1210 is approximately equal.
Since the source electrode 512 of driving transistor and drain electrode 513 are located at the lower section of inorganic insulation film 1210, so that inorganic exhausted
Edge film 1210 is understanding protrusion with the film layer of the source electrode 512 of driving transistor and the 513 Chong Die regions that drain, and therefore, is being formed
It, can be to inorganic insulation film 1210 and the source electrode 512 for driving transistor and drain electrode 513 during inorganic insulation sublayer 121
The segment thickness of the inorganic insulation film 1210 of the partial region of overlapping performs etching, and reduces the section of inorganic insulation layer film 1210
Difference, to improve the uniformity of inorganic insulation sublayer 121.
Optionally, the preparation method of above-mentioned array substrate further include: as shown in Fig. 9-Figure 10, forming pixel circuit 50
When, it is synchronous to form the signal wire 13 connecting with pixel circuit 50；At least partly signal wire 13 is located at substrate 11 and top to be formed
Between emission type luminescent device 40；During forming inorganic insulation sublayer 121, photoresist half retains part and corresponds to top hair
The region Chong Die with signal wire 13 of emitting luminescent device 40.
Wherein, which can be power supply line.In the case, the drain electrode of the driving transistor in pixel circuit 50
513 formation synchronous with signal wire 13 and electrical connection.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.
Claims (10)
1. a kind of array substrate characterized by comprising substrate is set on the substrate and is located at each subpixel area
Top emission type luminescent device；
The top emission type luminescent device includes first electrode, is set to second of the first electrode far from the one side of substrate
Electrode and the luminescent layer being set between the first electrode and the second electrode；
In the luminescent layer region Chong Die with the first electrode, the thickness of the luminescent layer is uniformly and without segment difference.
2. array substrate according to claim 1, which is characterized in that further include: it is set to each subpixel area
Pixel circuit；
Insulating layer, the top emission type luminescent device are additionally provided between the pixel circuit and the top emission type luminescent device
Positioned at the insulating layer far from the pixel circuit side；The first electrode by the via hole that is set on the insulating layer with
The pixel circuit electrical connection；
In the luminescent layer region Chong Die with the first electrode, the upper surface of the insulating layer is flat.
3. array substrate according to claim 2, which is characterized in that the insulating layer includes inorganic insulation sublayer and organic
Insulator layer；
The organic insulation sublayer is located at the side of the inorganic insulation sublayer far from the substrate；
Upper surface of the inorganic insulation sublayer in the region Chong Die with the luminescent layer is flat；The organic insulation sublayer is thick
Degree is uniform.
4. array substrate according to claim 2, which is characterized in that further include: the signal being connect with the pixel circuit
Line；
The signal wire in their extension direction, is at least partially disposed between the substrate and the top emission type luminescent device.
5. array substrate according to claim 1, which is characterized in that the first electrode is anode, the second electrode
For cathode；Alternatively, the first electrode is cathode, the second electrode is anode.
6. a kind of display panel, which is characterized in that including the described in any item array substrates of claim 1-5.
7. a kind of preparation method of array substrate characterized by comprising
Each subpixel area sequentially forms first electrode, luminescent layer and second electrode on substrate, and top emission type is prepared
Luminescent device；
In the luminescent layer region Chong Die with the first electrode, the light emitting layer thickness is uniformly and without segment difference.
8. the preparation method of array substrate according to claim 7, which is characterized in that shine forming the top emission type
Before device, the preparation method of the array substrate further include:
Pixel circuit is formed in each subpixel area；
On the substrate for forming the pixel circuit, inorganic insulation film is formed；
Photoresist is coated on the inorganic insulation film；
It is exposed using intermediate tone mask plate to the photoresist is formed, forms photoresist after development and part, light is fully retained
Photoresist half retains part and photoresist completely removes part；Wherein, the photoresist completely removes part and corresponds to be formed first
The region of via hole；The photoresist half retains part and at least corresponds to the first electrode region convexity Chong Die with the luminescent layer
Part region out；The photoresist is fully retained part and corresponds to other regions；
Using etching technics, the inorganic insulation film that the photoresist completely removes the segment thickness of part exposing is removed；
The photoresist that the photoresist half retains part is removed using cineration technics；
The residue inorganic insulation film in first via area to be formed is removed using etching technics, while removing institute
State photoresist half retain part the photoresist be removed after, the segment thickness of the inorganic insulation film of exposing so that
The inorganic insulation film surface in the region Chong Die with the first electrode positioned at the luminescent layer is flat；
The photoresist that part is fully retained in the photoresist is removed using stripping technology, obtains the inorganic insulation sublayer；
Form organic insulation sublayer in homogeneous thickness in the inorganic insulation sublayer, the organic insulation sublayer include with it is described
First via hole corresponds and the second via hole of stacking, and the size of second via hole is greater than the size of first via hole；
The first electrode is electrically connected by second via hole and first via hole of stacking with the pixel circuit.
9. the preparation method of array substrate according to claim 8, which is characterized in that the pixel circuit includes that driving is brilliant
Body pipe；
During forming inorganic insulation sublayer, the photoresist half retain part also correspond to the inorganic insulation film with
The partial region of the source electrode and drain electrode overlapping of the driving transistor.
10. the preparation method of array substrate according to claim 8, which is characterized in that further include: forming pixel circuit
When, it is synchronous to form the signal wire connecting with the pixel circuit；At least partly described signal wire be located at the substrate with it is to be formed
The top emission type luminescent device between；
During forming inorganic insulation sublayer, the photoresist half retains part and corresponds to the top emission type luminescent device
With the region of the signal line overlap.
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