CN110366329A - A kind of manufacturing method and multilager base plate of multilager base plate - Google Patents
A kind of manufacturing method and multilager base plate of multilager base plate Download PDFInfo
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- CN110366329A CN110366329A CN201810317623.XA CN201810317623A CN110366329A CN 110366329 A CN110366329 A CN 110366329A CN 201810317623 A CN201810317623 A CN 201810317623A CN 110366329 A CN110366329 A CN 110366329A
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- insulating properties
- conductive pattern
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a kind of manufacturing methods of multilager base plate, comprising the following steps: step 1 provides a kind of insulating properties base material；Step 2 covers insulation film on the surface of the insulating properties base material；Step 3 makes at least one hole portion on the basis of the above；Step 4 fills electrocondution slurry at least one described hole portion, and makes the electrocondution slurry filled in hole portion solidification；Step 5 removes the insulation film, exposes at least one electrocondution slurry after solidifying on the insulating properties base material surface, forms at least one interlayer connection conductor；Step 6 is bonded conductive foil layer at least one surface of the insulating properties base material and pressing is bonded；Step 7 is etched at least one described conductive foil layer, forms scheduled conductive pattern；Step 8 is repeated several times one of above step to the seven of step, is finally pressed into multilager base plate.The present invention provides the multilager base plates using above method manufacture simultaneously.
Description
Technical field
The present invention relates to a kind of manufacturing method of multilager base plate and utilize the multilager base plate of the method production.
Background technique
Closely apparently, various multilager base plates are popularized in large quantities, it is known that it is multiple formed conductive patterns insulated substrates and formed
Multilager base plate (for example, referring to patent document 1).
The multilager base plate of patent document 1 carries out pattern to conductor in insulated substrate and is formed, and passes through interlayer connection conductor
Carry out the electrical interlayer connection of each layer.
Existing technical literature
Patent document
Patent document 1: China Patent Publication No. CN206698489U.
However, the interlayer connection conductor in patent document 1 need to be considered when to need the cementability of multiplanar conductive pattern layer
Interlayer connection conducting is realized after extraly adding plating salient point to connect with conductive paste on copper face, to guarantee the electrical of conductive pattern interlayer
The reliability of connection.Therefore, manufacturing process is bound to, and complicated, efficiency is also low, and due to high to manufacture craft and equipment requirement, can
The effect is unsatisfactory for the interlayer conduction and signal transporting of its realization of energy.
Summary of the invention
Aiming at the problem that background technique, the purpose of the present invention is to provide one kind do not need to make in conductive pattern layer it is convex
Portion realizes the technique of interlayer electrical connection and also can guarantee the manufacturing method of interlayer conduction and signal transmission effect, and openly
A kind of multilager base plate made using this manufacturing method.
To achieve the goals above, the present invention adopts the following technical scheme:
A kind of multilager base plate is made up of the insulated substrate that stacking pressing multilayer is formed with conductive pattern, and feature exists
In manufacturing the manufacturing method of the multilager base plate, at least include the following steps:
One of wherein the step of, provides a kind of insulating properties base material；
The two of wherein the step of cover insulation film on the surface of the insulating properties base material；
The three of wherein the step of make at least one hole portion in the insulating properties base material for covering the insulation film；
The four of wherein the step of fill electrocondution slurry at least one described hole portion, and make filling in the hole portion
Electrocondution slurry solidification；
The five of wherein the step of remove the insulation film on the insulating properties base material surface, in the insulating properties base material table
At least one electrocondution slurry after solidifying is showed out, at least one interlayer connection conductor is formed；
The six of wherein the step of are bonded conductive foil layer and press and glued at least one surface of the insulating properties base material
Knot makes to form electrical connection between the conductive foil layer and the interlayer connection conductor；
The seven of wherein the step of are etched at least one described conductive foil layer, form scheduled conductive pattern；
The eight of wherein the step of are repeated several times one of above step to the seven of step, finally press together to form multilayer
Between the multilager base plate that is electrically connected.
Further, the insulation film is PET polyester film or PI film.
It further, is that electrocondution slurry is filled to the hole portion by printing technology in step 4 therein.
Further, the conductive foil layer fitting in step 6 therein is glued by high-temperature vacuum pressing mode
Knot.
Further, the insulation film removing method in step 5 therein is real by way of cutting technique or gasification
Existing.
Meanwhile the present invention provides a kind of multilager base plates manufactured using the above method, it is by passing through stacking pressing multilayer
It is formed with the insulated substrate of conductive pattern and constitutes, including multiple interlayer connection conductors, multiple conductive pattern layers and including extremely
The insulating properties base material of a few hole portion；The interlayer connection conductor is by thin in the covering insulation of the surface of the insulating properties base material
Electrocondution slurry is filled after film into the hole portion and exposes the insulating properties surface after solidifying and removes the insulation film again and shape
At；The interlayer connection conductor makes to form electrical connection between conductive pattern.
Further, pair of lamina insulated substrate is included at least, which is led by the first conductive pattern layer, second
Electrograph pattern layer and a upper and lower surfaces are all that the edge edge substrate layer on insulating properties surface is laminated and closed；First conductive pattern
Pattern layer is formed in the insulating properties base material；Second conductive pattern layer is formed in the insulating properties base material, and relative to described
First conductive pattern layer separates in the stacking direction；The interlayer connection conductor exposes the upper insulating properties table of the edge edge substrate
Face and lower insulating properties surface, and respectively in the upper insulating properties surface and lower insulating properties surface and first, second conductive pattern
Case presses to form the double hyer insulation base, so that first conductive pattern and the second conductive pattern be made to carry out electrical interlayer company
It connects.
Further, a single layer dielectrics base is included at least, the single layer dielectrics base is by a conductive pattern layer and one
Upper and lower surfaces are all that the edge edge substrate layer on insulating properties surface is laminated and closed；The conductive pattern layer is formed in the insulation
One of insulating properties surface of property substrate；The interlayer connection conductor expose the edge edge substrate upper insulating properties surface and
Lower insulating properties surface, and press to form the single layer dielectrics base with the conductive pattern on an insulating properties surface wherein.
(invention effect)
Compared with prior art, the manufacturing method of multilager base plate of the invention, core are using pretreating process, exhausted
Edge substrate surface is pre-formed one layer of glue film, and after drilling out hole portion and filling electrocondution slurry solidification in hole, glue film is removed
Afterwards, one section of electrocondution slurry solid that protrusion surface will necessarily be exposed in the hole along virgin rubber film thickness, thus in conductive pattern
The interlayer connection conductor that can be carried out electrical interlayer connection is formed between layer.
According to the technique and scheme of the present invention, using single material, the patent of the loss and comparison that are connected between multilager base plate
Document 1 is close, and this technology only needs to directly generate interlayer connection conductor by printing technology, compared with patent document 1, system
It is simple and convenient thus more efficient to make method, manufacturing cost reduces, and not high to the precision of equipment requirement, thus more just
In mass production, product quality performance is improved.
Detailed description of the invention
Fig. 1 is to show the lateral sectional view of a part amplification for the multilager base plate that presently preferred embodiments of the present invention is related to.
Fig. 2 is to show the flow chart of the manufacturing method of multilager base plate involved in presently preferred embodiments of the present invention.
Fig. 3 (A)~Fig. 3 (G) is shown in the manufacturing method of multilager base plate involved in presently preferred embodiments of the present invention
Each process in lateral sectional view.
Fig. 4 (A) is to show the double hyer insulation base for belonging to multilager base plate involved in preferred embodiment according to the present invention
A part amplification lateral sectional view.
Fig. 4 (B) is to show the double hyer insulation base for belonging to multilager base plate involved in preferred embodiment according to the present invention
A part amplification stacking when lateral sectional view.
Fig. 5 (A) is to show the single layer dielectrics base for belonging to multilager base plate involved in preferred embodiment according to the present invention
A part amplification lateral sectional view.
Fig. 5 (B) is to show the single layer dielectrics base for belonging to multilager base plate involved in preferred embodiment according to the present invention
A part amplification stacking when lateral sectional view.
Fig. 6 (A) is to show to belong to a kind of a part amplification of multilager base plate involved in an embodiment according to the present invention
Stacking when lateral sectional view.
Fig. 6 (B) is to show to belong to a kind of a part amplification of multilager base plate involved in an embodiment according to the present invention
Stacking when lateral sectional view.
Specific embodiment
In order to fully understand advantages of the present invention and by embodiments of the present invention target obtained, part reality is shown
The structure of example is applied, however, the present invention can be embodied in many different forms, and should not be construed as the implementation herein proposed
The limitation of example.On the contrary, proposing that these embodiments are intended merely to reach abundant and completely separate, and make the technology of the art
Personnel understand the scope of the present invention completely.In these figures, for the sake of clarity, the size and phase in layer and region be may be exaggerated
To size.The preferable implementation content that the present invention will be described in more detail below with reference to the accompanying drawings.
Referring to Fig. 1, in conjunction with shown in Fig. 3 A~Fig. 3 G, in general, multilager base plate 00 is led including insulating properties base material 001, first
Electrograph pattern layer 002, the second conductive pattern layer 003 and interlayer connection conductor 004.
Insulating properties base material 001 is made of thermoplastic resin, such as liquid crystal polymer (LCP), PPS, MODIFIED PP S etc..Separately
Outside, insulating properties base material 001 may not be thermoplastic resin, as long as insulator.In addition, insulating properties base material 001 is upper
Surface and lower surface can be arbitrary electrical properties, can be electric conductivity, i.e. insulating material surface covers one layer of conduction
Layer, or can be insulating properties, in the present embodiment, 001 surface of insulating properties base material is not covered with any other layer, because
And upper and lower surfaces are all insulating properties.
Continue such as Fig. 1, the first conductive pattern layer 002 and the second conductive pattern layer 003 are by conductivities such as copper (Cu) respectively
High material is constituted, preferably the metallic conductions layers of foil such as copper foil of thinner thickness, passes through the etched circuit pattern in conductive foil layer
And formed, the first conductive pattern layer 002 is formed in the upper surface of insulating properties base material, and the second conductive pattern layer 003 is formed in insulation
The lower surface of property substrate 001, that is to say, that the first conductive pattern layer 002 and the second conductive pattern layer 003 are to clip insulating properties base
Material 001 from stacking direction sight be separation.
With reference to Fig. 1, interlayer connection conductor 004 is formed in the upper of the first conductive pattern layer 002 and the second conductive pattern layer 003
In the region of lower overlapping, to the functional layer (i.e. the first conductive pattern layer 002 and the second conductive pattern layer 003) of the multilager base plate 00
Between carry out electrical interlayer connection.
In conjunction with shown in Fig. 3 A~Fig. 3 G, interlayer connection conductor 004 is by keeping the electrocondution slurry P004 in hole portion V004 solid
Change (metallization) and formation, be by the conducting particles comprising tin (Sn), copper (Cu), alloyed copper etc. and with the material for making clothes of cementability
It can thermally cured material be constituted Deng what is formed at subassembly.On thickness direction (i.e. stacking direction), hole herein
Portion V004 is through insulating properties base material 001, and in other embodiments, hole portion V004 is also possible in insulating properties base material 001
One of surface be opening, and be not to be open on another surface, thus so that the electrocondution slurry P004 of mobility is protected
It holds in hole portion V004.Certainly, if hole portion V004 is designed as perforation portion, electrocondution slurry P004 is flowed into hole portion V004
It will not fill more abundant in other end residual air, entire hole portion V004 can be full of substantially, thus, it is connected between each layer
The effect for forming electrical interlayer connection is more preferable.In addition, hole portion V004 can be cylindrical hole because of the difference of processing technology, it can
To be bellmouth, it can also be and guarantee electrocondution slurry P004 and other any shapes of the hole portion V004 bond strength engaged
Hole.
The multilager base plate that the structure as the present embodiment is constituted is formed by following manufacturing method, such as Fig. 2 and figure
Shown in 3A~Fig. 3 G:
Step 1 provides a kind of insulating properties base material 001, can be by cutting into the flat of predetermined shape on insulating properties embryo material
Full wafer material.
Step 2 is superimposed one layer absolutely respectively on the surface (i.e. upper surface S1, lower surface S2) of above-mentioned insulating properties base material 001
Then edge film M1, M2 are pressed or are bonded together into one by laminating technology.In this step, two insulation films
M1, M2 are with certain thickness film, and thickness is preferably 25um, they are entirely fitted in upper surface S1, lower surface respectively
On S2, material is preferably easily worked, very power is good, the high-temperature-resistant thermoplastic of dimensionally stable and stable chemical performance, such as PET thin
Film is also possible to through materials such as the smears of meeting partial gasification when heating crimping.
Step 3 makes hole portion V004, the hole portion in the insulating properties base material 001 for covering described insulation film M1, M2
V004 arranged by predetermined position it is multiple, generally at least one, the preferred machine drilling of bore mode or laser drill mode.
Step 4 fills electrocondution slurry P004 in hole portion V004, so that electrocondution slurry P004 is filled up the hole portion and make it
Solidification.In the present embodiment, it in order to simplify processing procedure and high efficiency mass production, is printed in hole portion V004 using mode of printing
Electrocondution slurry P004, etc. fill up in hole portions V004 entirely pressing against by jig with preset space length after electrocondution slurry P004 and insulating
The outer surface of film M1, M2, and be heating and curing, finally being formed electrocondution slurry P004 has certain volume, mechanical strength preferable
And the interlayer connection conductor 004 with certain conductivity.
Step 5 removes insulation film M1, the M2 on 001 surface of insulating properties base material, thus after making each solidification
Electrocondution slurry P004 exposes described insulating properties surface S1, S2 after removing described insulation film M1, M2, forms interlayer connection and leads
Body 004.At this point, the part for exposing the electrocondution slurry P004 of insulating properties surface S1, S2 is the lug boss T for protruding outer surface S1, S2,
It will be bonded together by lamination pressing mode with the first conductive pattern layer 002, the second conductive pattern layer 003 to future.
Conductive foil layer P1, P2 is fitted on insulating properties surface S1 and S2 described above by step 6, by laminating technology into
Row pressing forms insulated substrate L, makes to form electrical connection between the interlayer connection conductor 004 and conductive foil layer P1, P2.
Here conductive foil layer can be at least one, and single layer shown in Fig. 4 (A), Fig. 4 (B) is constituted if only one conductive foil layer
Insulated substrate 11 (is discussed further below), then constitutes double hyer insulation base shown in Fig. 5 (A), Fig. 5 (B) if it is two conductive foil layers
Layer 10.
Step 7 is etched conductive foil layer P1, P2 of the insulated substrate L respectively, forms scheduled conductive pattern
Layer: the first conductive pattern layer 002 and the second conductive pattern layer 003 ultimately form multilager base plate 00.Furthermore, it is possible to only to wherein
One conductive foil layer P1 or P2 are etched, and conductive pattern layer is made, if be not etched to conductive foil layer, generally leads this
Electric layers of foil is used as complete reference horizontal plane of manufacturing, this step can be omitted, but does not violate the principle of the present invention intention, is also belonged to
Protection category of the invention.
It is worth noting that, as described above, repeatable above step makes other multiple insulated substrate L, then by institute
It states multiple insulated substrate L to be pressed by laminating technology, to form the multilager base plate with three layers or more conductive pattern layers.
Further, the invention discloses according to multilager base plate made of above-mentioned manufacturing method, it is by by stacking pressure
It closes multilayer to be formed with the insulated substrate L of conductive pattern and constitute, below with exhausted by a double hyer insulation base 10 and a single layer
Three layers of the multilager base plate 100 that edge base 11 forms is illustrated.
The multilager base plate 100 is by passing through stacking one double hyer insulation base 10 for being formed with conductive pattern of pressing and a shape
It is constituted at the single layer dielectrics base 11 for having conductive pattern, referring to shown in Fig. 6 (A), Fig. 6 (B).
Such as Fig. 4 (A), Fig. 4 (B), the structure of double hyer insulation base 10 is shown, it includes the first insulating properties base material 104, the
One conductive pattern layer 102, the second conductive pattern layer 103 and the first interlayer connection conductor 101, first conductive pattern layer 102
With the second conductive pattern layer 103 by 104 spaced-apart of the first insulating properties base material, first interlayer connection conductor 101 is logical
It crosses after filling electrocondution slurry P004 in the hole portion of first insulating properties base material 104 and solidifying the electrocondution slurry described in exposing
Insulating properties surface and formed.As shown, the surface element of the first insulating properties base material of exposing of first interlayer connection conductor 101
It is divided into protrusion T, by the way that the first conductive pattern layer 102, the second conductive pattern layer 103 are pressed together on the first insulating properties base respectively
The upper and lower surfaces of material 104 lead first conductive pattern layer 102 and second via the first interlayer connection conductor 101
Electrograph pattern layer 103 is electrically connected together.It is easy to obtain the manufacturing process of the double hyer insulation base 10 by above description content, no
It repeats again, it is notable that it is easily concluded that double hyer insulation base 10 is the structure of bilayer multiple layer substrate.
With continued reference to Fig. 5 (A), Fig. 5 (B), the structure of single layer dielectrics base 11, including the second insulating properties base material are shown
105, third conductive pattern layer 107 and the second interlayer connection conductor 106 are all by third conductive pattern layer 107 and upper and lower surfaces
Second edge edge substrate 105 stacking on insulating properties surface presses, and second interlayer connection conductor 106 passes through described the
Electrocondution slurry is filled in the hole portion of two insulating properties base materials 105 and expose the insulating properties surface S after solidifying the electrocondution slurry and
Lug boss T ' is formed, is also easy to obtain the manufacturing process of the single layer dielectrics base 11 by above description content, be repeated no more.
Referring to shown in Fig. 6 (A), Fig. 6 (B), three layers of the multilager base plate 100 includes the first conductive pattern layer 102, second
Conductive pattern layer 103, third conductive pattern 107, the first insulating properties base material 104 and the second insulating properties base material 105, described first leads
Electrograph pattern layer 102, the second conductive pattern layer 103 are electrically connected by the first interlayer connection conductor 101, the second interlayer connection conductor
106 press to the second conductive pattern layer 103 by the lug boss T ', keep second conductive pattern layer 103 and third conductive
Electrical connection is formed between pattern layer 107.
By upper narration, it should be apparent that, compared with prior art, according to the technique and scheme of the present invention, directly using conductive
Slurry prints in the hole portion of insulating properties base material and is solidified into interlayer connection conductor, the multilayer for facilitating insulating properties base material to be superimposed up and down
Conductive pattern electrically conducting does not reduce junction loss, and manufacturing method is simple and convenient, thus more efficient, manufacture at
This reduction, and it is not high to the precision of equipment requirement, thus mass production of being more convenient for, product quality performance improve.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
Limitations on the scope of the patent of the present invention therefore cannot be interpreted as.It should be pointed out that for those of ordinary skill in the art
For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to guarantor of the invention
Protect range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (8)
1. a kind of multilager base plate is made up of the insulated substrate that stacking pressing multilayer is formed with conductive pattern, which is characterized in that
The manufacturing method for manufacturing the multilager base plate, at least includes the following steps:
One of wherein the step of, provides a kind of insulating properties base material；
The two of wherein the step of cover insulation film on the surface of the insulating properties base material；
The three of wherein the step of make at least one hole portion in the insulating properties base material for covering the insulation film；
The four of wherein the step of fill electrocondution slurry at least one described hole portion, and make the conduction filled in the hole portion
Slurry curing；
The five of wherein the step of remove the insulation film on the insulating properties base material surface, reveal on the insulating properties base material surface
At least one electrocondution slurry after solidifying out, forms at least one interlayer connection conductor；
The six of wherein the step of are bonded conductive foil layer at least one surface of the insulating properties base material and pressing are bonded,
Make to form electrical connection between the conductive foil layer and the interlayer connection conductor；
The seven of wherein the step of are etched at least one described conductive foil layer, form scheduled conductive pattern；
Above multiple steps are repeated several times in the eight of wherein the step of, finally press together to be formed and are electrically connected between multilayer
Multilager base plate.
2. a kind of manufacturing method of multilager base plate according to claim 1, which is characterized in that the insulation film is PET
Polyester film or PI film.
3. a kind of manufacturing method of multilager base plate according to claim 1 or 2, which is characterized in that in step 4 therein
It is that electrocondution slurry is filled to the hole portion by printing technology.
4. a kind of manufacturing method of multilager base plate according to claim 1 or 2, which is characterized in that in step 6 therein
Conductive foil layer fitting be to be bonded by high-temperature vacuum pressing mode.
5. a kind of manufacturing method of multilager base plate according to claim 1 or 2, which is characterized in that in step 5 therein
Insulation film removing method be to be realized by way of cutting technique or gasification.
6. a kind of multilager base plate, which is characterized in that by the insulated substrate structure for being formed with conductive pattern by stacking pressing multilayer
At including multiple interlayer connection conductors, multiple conductive pattern layers and including the insulating properties base material of at least one hole portion；The layer
Between connection conductor be by into the hole portion filling electrocondution slurry after the surface of the insulating properties base material covers insulation film
And exposes the insulating properties surface after solidifying and remove the insulation film again and formed；The interlayer connection conductor makes conductive pattern
Electrical connection is formed between case.
7. a kind of multilager base plate according to claim 6, which is characterized in that include at least pair of lamina insulated substrate, this pair
Layer insulated substrate is all the edge edge on insulating properties surface by the first conductive pattern layer, the second conductive pattern layer and a upper and lower surfaces
Property substrate layer, which laminates, to be closed；First conductive pattern layer is formed in the insulating properties base material；Second conductive pattern layer
It is formed in the insulating properties base material, and is separated in the stacking direction relative to first conductive pattern layer；The interlayer connection
Conductor exposes the upper insulating properties surface and lower insulating properties surface of the edge edge substrate, and respectively on the upper insulating properties surface and
Lower insulating properties surface and first, second conductive pattern press, to make first conductive pattern and the second conductive pattern
Carry out electrical interlayer connection.
8. a kind of multilager base plate according to claim 6, which is characterized in that include at least a single layer dielectrics base, the list
Layer insulated substrate by the edge edge substrate layer that a conductive pattern layer and a upper and lower surfaces are all insulating properties surface laminate conjunction and
At；The conductive pattern layer is formed in one of insulating properties surface of the insulating properties base material；The interlayer connection conductor dew
The upper insulating properties surface and lower insulating properties surface of the edge edge substrate out, and led on an insulating properties surface with described wherein
Electrical pattern presses to form the single layer dielectrics base.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810317623.XA CN110366329A (en) | 2018-04-10 | 2018-04-10 | A kind of manufacturing method and multilager base plate of multilager base plate |
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| CN201810317623.XA CN110366329A (en) | 2018-04-10 | 2018-04-10 | A kind of manufacturing method and multilager base plate of multilager base plate |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113543493A (en) * | 2021-07-12 | 2021-10-22 | 上海嘉捷通电路科技股份有限公司 | Preparation method of Z-direction interconnection printed circuit board |
| CN114449771A (en) * | 2021-09-27 | 2022-05-06 | 深圳市百柔新材料技术有限公司 | Preparation method of double-sided via hole ceramic copper-clad plate and circuit board |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010003610A1 (en) * | 1993-09-21 | 2001-06-14 | Seiichi Nakatani | Connecting member of a circuit substrate and method of manufacturing multilayer circuit substrates by using the same |
| JP3311899B2 (en) * | 1995-01-20 | 2002-08-05 | 松下電器産業株式会社 | Circuit board and method of manufacturing the same |
| CN1722940A (en) * | 2004-06-10 | 2006-01-18 | 住友电气工业株式会社 | Method for manufacturing multi-layer printed circuit board and multi-layer printed circuit board |
| CN101449630A (en) * | 2006-04-19 | 2009-06-03 | 动态细节有限公司 | Printed circuit boards with stacked micros vias |
| CN102884872A (en) * | 2010-12-29 | 2013-01-16 | 松下电器产业株式会社 | Multilayer wiring board and method for manufacturing multilayer wiring board |
| CN103841771A (en) * | 2012-11-26 | 2014-06-04 | 北大方正集团有限公司 | Combined printed circuit board manufacturing method and printed circuit board |
| CN104349592A (en) * | 2013-08-09 | 2015-02-11 | 富葵精密组件(深圳)有限公司 | Multi-layer circuit board and manufacturing method thereof |
| CN106537519A (en) * | 2015-02-27 | 2017-03-22 | 拓自达电线株式会社 | Conductive paste and multilayer substrate using same |
-
2018
- 2018-04-10 CN CN201810317623.XA patent/CN110366329A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010003610A1 (en) * | 1993-09-21 | 2001-06-14 | Seiichi Nakatani | Connecting member of a circuit substrate and method of manufacturing multilayer circuit substrates by using the same |
| JP3311899B2 (en) * | 1995-01-20 | 2002-08-05 | 松下電器産業株式会社 | Circuit board and method of manufacturing the same |
| CN1722940A (en) * | 2004-06-10 | 2006-01-18 | 住友电气工业株式会社 | Method for manufacturing multi-layer printed circuit board and multi-layer printed circuit board |
| CN101449630A (en) * | 2006-04-19 | 2009-06-03 | 动态细节有限公司 | Printed circuit boards with stacked micros vias |
| CN102884872A (en) * | 2010-12-29 | 2013-01-16 | 松下电器产业株式会社 | Multilayer wiring board and method for manufacturing multilayer wiring board |
| CN103841771A (en) * | 2012-11-26 | 2014-06-04 | 北大方正集团有限公司 | Combined printed circuit board manufacturing method and printed circuit board |
| CN104349592A (en) * | 2013-08-09 | 2015-02-11 | 富葵精密组件(深圳)有限公司 | Multi-layer circuit board and manufacturing method thereof |
| CN106537519A (en) * | 2015-02-27 | 2017-03-22 | 拓自达电线株式会社 | Conductive paste and multilayer substrate using same |
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