CN110324625A - A kind of video encoding/decoding method and device - Google Patents

A kind of video encoding/decoding method and device Download PDF

Info

Publication number
CN110324625A
CN110324625A CN201810279296.3A CN201810279296A CN110324625A CN 110324625 A CN110324625 A CN 110324625A CN 201810279296 A CN201810279296 A CN 201810279296A CN 110324625 A CN110324625 A CN 110324625A
Authority
CN
China
Prior art keywords
decoded
frame image
entropy decoder
memory space
binary string
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201810279296.3A
Other languages
Chinese (zh)
Other versions
CN110324625B (en
Inventor
赵日洋
张志明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CN201810279296.3A priority Critical patent/CN110324625B/en
Priority to CN202310472995.0A priority patent/CN116506644A/en
Priority to PCT/CN2019/080473 priority patent/WO2019185032A1/en
Publication of CN110324625A publication Critical patent/CN110324625A/en
Application granted granted Critical
Publication of CN110324625B publication Critical patent/CN110324625B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/90Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
    • H04N19/91Entropy coding, e.g. variable length coding [VLC] or arithmetic coding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/172Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a picture, frame or field
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/182Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being a pixel
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/184Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being bits, e.g. of the compressed video stream
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/70Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/90Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
    • H04N19/96Tree coding, e.g. quad-tree coding

Abstract

The application provides a kind of video encoding/decoding method and device, at least one entropy decoder, for the bit stream parallel decoding of at least frame image to be decoded for will acquire at intermediate binary string, each entropy decoder at least one described entropy decoder decodes at least one band slice of a frame image;Resolver, for giving the intermediate binary string distributed by row of an at least frame image to multiple pixel processors;The multiple pixel processor, for behavior unit and being about to the multirow of intermediate binary string of at least frame image to be decoded and being decoded into displayable image data.The application handles the bit stream of a frame image simultaneously by multiple entropy decoders or multiple entropy decoders handle the bit stream of a frame image respectively, to improve the decoding performance of entropy decoder.Meanwhile handling the data that do not go together of a frame image simultaneously by multiple pixel processors, to improve the processing capacity of pixel processor.

Description

A kind of video encoding/decoding method and device
Technical field
This application involves video technique field more particularly to a kind of video encoding/decoding methods and device.
Background technique
Video compression technology is widely used in the fields such as internet, television broadcasting, storage media, communication.As image is big Small and frame per second promotion, it is also higher and higher to the performance requirement of respective decoder.
Two field pictures are solved parallel by using two decoders in the prior art a kind of, promote two ploidies to reach The purpose of energy.But in the similar association such as high efficiency Video coding (HEVC, High Efficiency Video Coding) agreement In view, using binary arithmetic coding (CABAC, Context-based the Adaptive Binary based on context Arithmetic Coding) coding.The data of next frame only include the variance data with previous frame.Therefore, it is solved to CABAC When the data of code mode are decoded, after having solved a frame image, update probability table could solve next frame image.
Under above-mentioned video compress mode, when reference frame does not decode completion, present frame cannot be according to reference frame decoding.From And causing multiple decoders that can only decode a frame image in the same time, the actual performance of decoder cannot get a promotion.
Summary of the invention
The application specific embodiment provides a kind of video encoding/decoding method and device, for promoting the decoded performance of decoder.
The application realizes in the following way:
In a first aspect, the application specific embodiment provides a kind of video encoding/decoding method, including the M frame figure to be decoded that will be obtained Multiple band slice parallel decodings of the bit stream of picture are at intermediate binary string;Wherein, appointing in the M frame image to be decoded One frame image to be decoded includes at least one slice, and the M is the positive integer greater than 0;By the institute of the M frame image to be decoded It states intermediate binary string and is divided into multirow;It is displayable image data by the multirow parallel decoding of the intermediate binary string.
The image of bit stream form is divided into multiple slice by the embodiment of the present application, and will be schemed by multiple entropy decoder modules Multiple slice parallel decodings of picture are bin stream, then give the image data in bin manifold state at multiple pixels by row Module is managed, the bin stream parallel decoding of image is the image data that can be shown with behavior unit by multiple processes pixel modules, this Scheme passes through parallel processing at two: i.e. and being about to the bit stream decoding of image as bin stream, then with behavior unit and is about to bin stream It is decoded as displayable image, accelerates the decoded rate of video, improves the decoded performance of decoder.
In a possible design, which is 1, multiple bands of the bit stream of the M frame image to be decoded that will acquire Slice parallel decoding is specifically included at intermediate binary string: the bit for the frame image to be decoded that N number of entropy decoder will acquire Each entropy decoder solution of the multiple slice parallel decoding of stream at the intermediate binary string, in N number of entropy decoder At least one slice, the slice that the quantity of the N includes according to the frame image of the code one frame image to be decoded Number determines.
Number based on the slice that a frame image is included passes through multiple entropy decoder modules while one frame figure of parallel processing The bit stream of picture, improves decoding efficiency at the time needed for reducing one frame image of decoding.
In a possible design, the frame image includes N number of slice, N number of entropy decoder parallel decoding institute State N number of slice of frame image to be decoded, wherein each entropy decoder in N number of entropy decoder decodes described one respectively A slice in frame image to be decoded.
One frame image includes that several slice just use several entropy decoder modules, i.e., each entropy decoder module decodes a frame figure One slice of picture can promote the rate of one frame image of decoding as far as possible.
In a possible design, Y entropy decoder in N number of entropy decoder is by the ratio of the frame image to be decoded Special stream is decoded as the intermediate binary string, and the next frame that the N-Y being in idle condition entropy decoders will acquire waits solving Some or all of the bit stream of code image is decoded as the intermediate binary string, and the Y is more than or equal to 1, and the Y is less than N.
When multiple entropy decoder modules handle the bit stream of a frame image simultaneously and when there is idle entropy decoder module, lead to The bit stream for crossing the entropy decoder module processing next frame image of at least one idle state, to further increase entropy decoder module Decoding performance.
In a possible design, multiple band slice of the bit stream of the M frame image to be decoded that will acquire are simultaneously Row is decoded into intermediate binary string, specifically includes: M entropy decoder is by the bit stream of the M frame image to be decoded of the acquisition Multiple band slice parallel decodings are at the intermediate binary string, wherein each entropy decoder in the M entropy decoder At least one slice described in the bit stream of any frame image to be decoded in the M frame image to be decoded is decoded as respectively The intermediate binary string.
Multiple entropy decoder modules handle the bit stream of multiple image simultaneously, wherein each entropy decoder module is by a frame image Bit stream decoding is bin stream, and the decoding process between multiple entropy decoder modules can synchronize progress, without necessarily referring to frame, be not necessarily to The decoding progress for waiting reference frame, improves the decoding efficiency of entropy decoding.
In a possible design, the multirow parallel decoding by the intermediate binary string is displayable image Before data, the method also includes: the intermediate binary string of the M frame image to be decoded is store by row at least one In a memory space, each memory space of at least one memory space belongs to same frame image to be decoded for storing Intermediate binary string
By the way that the bin of a frame image is flowed distributed by row to multiple sub- memory spaces of the same memory space, make pixel Processing module reads data from corresponding word memory space respectively, keeps multiple processes pixel modules more square when reading data Just.
In a possible design, the multirow parallel decoding by the intermediate binary string is displayable image Before data, further includes: read the institute of at least frame image to be decoded with behavior unit from the corresponding memory space respectively State a line of intermediate binary string.
In a possible design, at least one described memory space includes multiple sub- memory spaces, the multiple son The corresponding counter of every sub- memory space in memory space, the counter is for recording depositing for the sub- memory space Storage state.
In a possible design, a sub- memory space write-in of the resolver into a memory space is primary When data, the write-in number of frame recorder corresponding with the memory space adds 1 in multiple frame recorders.The multiple pixel When the sub- memory space of one of a pixel processor from a memory space in processor reads a data, multiple frame notes The write-in number of frame recorder corresponding with the memory space subtracts 1 in record device.Said write number is used to indicate in frame recorder The storage state of each word memory space.
By being managed to different memory spaces using the counter of frame recording module, avoid untreated data coating Lid or data are read repeatedly.
In a possible design, the resolver is multiple, the centre by the M frame image to be decoded It includes: that each resolver in the multiple resolver incites somebody to action at least frame image to be decoded respectively that binary string, which is divided into multirow, In the intermediate binary string of any frame image to be decoded be divided into multirow.
In a possible design, when the coding protocol of the video is high efficiency Video coding HEVC agreement, institute The a line for stating the intermediate binary string of frame image to be decoded includes at least one tree-like encoding block CTB.When the volume of the video Code agreement be H.264 agreement when, a line of the intermediate binary string of the frame image to be decoded includes at least one macro block MB.
In a possible design, multiple band slice of the bit stream of the M frame image to be decoded that will acquire are simultaneously Row be decoded into intermediate binary string after, further includes: N number of entropy decoder respectively by decoded intermediate binary string storage to it is complete At the corresponding memory space of decoded entropy decoder, so that resolver is from described corresponding with decoded entropy decoder is completed Memory space obtains the intermediate binary string of corresponding image to be decoded.
By storing decoded intermediate binary string, entropy decoder module is set to can continue to solution next frame to be decoded The bit stream of image improves the decoding efficiency of entropy decoder module.
In a possible design, further includes: when every row that the bin of a frame image flows is respectively by the pixel processor It is decoded as displayable image data or is currently decoded for displayable image data, and in the multiple pixel processor When at least one pixel processor is in idle condition, at least one pixel processor being in idle condition simultaneously is about to next frame At least a line of the bin stream of image is decoded into displayable image data.To improve the treatment effeciency of processes pixel module.
The bin stream of one frame image includes F block including Z row, every row, to the decoded processes pixel of C+1 row of bin stream The decoding progress of module lags behind the decoding progress of the decoded processes pixel module of line c to bin stream.
Second aspect, the application specific embodiment provides a kind of decoder, including at least one entropy decoder, for that will obtain The bit stream parallel decoding of at least frame image to be decoded taken is at intermediate binary string, at least one described entropy decoder At least one band slice of each entropy decoder decoding one frame image to be decoded.Resolver, for waiting for an at least frame The intermediate binary string distributed by row of image is decoded to multiple pixel processors.The multiple pixel processor, for behavior The unit and multirow of intermediate binary string for being about at least frame image to be decoded is decoded into displayable image data.
In a possible design, the number of entropy decoder is N, N number of entropy decoder, for obtaining frame figure to be decoded The bit stream of picture.The bit stream parallel decoding for the frame image to be decoded that N number of entropy decoder will acquire is centre two The number of system string, the slice that the quantity of the N includes according to the frame image to be decoded determines.
In a possible design, the frame image to be decoded includes N number of slice, and N number of entropy decoder is parallel Decode N number of slice of the frame image to be decoded, wherein each entropy decoder in N number of entropy decoder module solves respectively A slice in the code one frame image to be decoded.
In a possible design, when the frame that the part entropy decoder at least one entropy decoder will acquire waits solving When the bit stream decoding of code image is intermediate binary string, the entropy decoding that is in idle condition at least one described entropy decoder Device, for obtaining the bit stream of next frame image to be decoded.The entropy decoder being in idle condition, for will acquire it is described under Some or all of the bit stream of one frame image to be decoded is decoded as intermediate binary string.
In a possible design, the number of the entropy decoder is N, and N number of entropy decoder waits solving for obtaining N frame The bit stream of code image.Each entropy decoder in N number of entropy decoder, for respectively by one in the N frame image to be decoded The bit stream decoding of frame image to be decoded is intermediate binary string.
In a possible design, described device further includes at least one memory space, at least one described storage is empty Between in each memory space there are multiple word memory spaces.Resolver, for by the centre two of an at least frame image into In multiple sub- memory spaces that system string is store by row at least one memory space, each of at least one described memory space Memory space is for storing the intermediate binary string for belonging to same frame image, the multiple sub- memory space and the multiple pixel Processor corresponds.
The each processes pixel in multiple pixel processors for including in a possible design, in the decoder Device is also used to read the intermediate binary string of an at least frame image with behavior unit from the corresponding sub- memory space respectively A line.
The corresponding counting of every sub- memory space in a possible design, in the multiple sub- memory space Device, the counter are used to record the storage state of the sub- memory space.
In a possible design, a data are written in a sub- memory space of the resolver into a memory space When, the write-in number of frame recorder corresponding with the memory space adds 1 in multiple frame recorders.The multiple processes pixel When the sub- memory space of one of a pixel processor from a memory space in device reads a data, multiple frame recorders In the write-in number of frame recorder corresponding with the memory space subtract 1.Said write number is used to indicate in frame recording module The storage state of each word memory space.
In a possible design, the resolver be it is multiple, the resolver will be in an at least frame image Between binary string distributed by row to the multiple pixel processors for including include each resolver in multiple resolvers in decoder Give the intermediate binary string distributed by row of any frame image in an at least frame image to multiple pixel processors respectively.
In a possible design, when the coding protocol of the video is high efficiency Video coding HEVC agreement, institute The a line for stating the intermediate binary string of a frame image includes at least one tree-like encoding block CTB.When the coding protocol of the video When for H.264 agreement, a line of the intermediate binary string of the frame image includes at least one macro block MB.
In a possible design, the bit stream parallel decoding of the M frame image to be decoded that will acquire is at centre two After system string, N number of entropy decoder respectively arrives the storage of decoded intermediate binary string opposite with decoded entropy decoder is completed The memory space answered, so that resolver is schemed from the memory space acquisition corresponding with the decoded entropy decoder of completion is corresponding The intermediate binary string of picture.
In a possible design, when a frame image intermediate binary string every row respectively by the pixel processor It is decoded as displayable image information or is currently decoded for displayable image data, and in the multiple pixel processor When at least one pixel processor is in idle condition, at least one pixel processor being in idle condition simultaneously is about to next frame At least a line of the intermediate binary string of image is decoded into displayable image data.
The third aspect, the application specific embodiment provide a kind of video decoder, comprising: N number of entropy decoder module is used for The bit stream parallel decoding for at least frame image to be decoded that will acquire is at intermediate binary string, in N number of entropy decoder module Each entropy decoder module decoding one frame image to be decoded at least one slice, N is positive integer more than or equal to 1.Parse mould Block, for giving the intermediate binary string distributed by row of at least frame image to be decoded to multiple processes pixel modules.It is multiple Processes pixel module, for behavior unit and be about at least frame image to be decoded intermediate binary string multirow solution Code is at displayable image data.
In a possible design, N number of entropy decoder module, at least frame image to be decoded for will acquire Bit stream parallel decoding is specifically included at intermediate binary string: obtaining the bit stream of frame image to be decoded.N number of entropy solution Code module, the bit stream parallel decoding for the frame image to be decoded that will acquire are intermediate binary string, the number of the N The number for the slice that amount includes according to the frame image to be decoded determines.
In a possible design, the frame image to be decoded includes N number of slice, and N number of entropy decoder module is simultaneously Row decodes N number of slice of the frame image to be decoded, wherein each entropy decoder module point in N number of entropy decoder module A slice in the frame image to be decoded is not decoded.
The Y entropy decoder module in a possible design, in the N number of entropy decoder module for including in the decoder By the bit stream decoding of the frame image to be decoded of the acquisition be intermediate binary string when, further include obtain next frame it is to be decoded The bit stream of image.The N-Y entropy decoder modules being in idle condition, the next frame figure to be decoded for will acquire Some or all of bit stream of picture is decoded as intermediate binary string, and the Y is more than or equal to 1, and the Y is less than N.
In a possible design, N number of entropy decoder module, at least frame image to be decoded for will acquire Bit stream parallel decoding specifically includes the bit that N number of entropy decoder module obtains N frame image to be decoded at intermediate binary string Stream.Each entropy decoder module in N number of entropy decoder module is respectively by the frame figure to be decoded in the N frame image to be decoded The bit stream decoding of picture is intermediate binary string.
In a possible design, the parsing module, for by the intermediate binary string of an at least frame image Distributed by row is given before multiple processes pixel modules, further includes the parsing module, for will be in an at least frame image Between binary string be store by row in multiple sub- memory spaces at least one memory space, at least one described memory space Each memory space for store the intermediate binary string for belonging to same frame image, the multiple sub- memory space with it is described more A processes pixel module corresponds.
In a possible design, the multiple processes pixel module, for behavior unit and be about to it is described at least It further include the multiple processes pixel before the multirow of the intermediate binary file of one frame image is decoded into displayable image data Each processes pixel module in module, be respectively used to from the corresponding sub- memory space to read with behavior unit it is described to A line of the intermediate binary string of a few frame image.
The corresponding counting of every sub- memory space in a possible design, in the multiple sub- memory space Device, the counter are used to record the storage state of the sub- memory space.
In a possible design, parsing module, for a sub- memory space write-in into a memory space When data, the write-in number of frame recording module corresponding with the memory space adds 1 in multiple frame recording modules.It is described A processes pixel module in multiple processes pixel modules, for reading one from a sub- memory space of a memory space When secondary data, the write-in number of frame recording module corresponding with the memory space subtracts 1 in multiple frame recording modules.Number is written to use The storage state of each word memory space in instruction frame recording module.
In a possible design, the parsing module is multiple, the multiple parsing module, is used for by described at least The intermediate binary string distributed by row of one frame image gives multiple processes pixel modules, including, the multiple parsings for including in decoder Each parsing module in module, be respectively used to by the intermediate binary string of any frame image in an at least frame image by Row distributes to multiple processes pixel modules.
In a possible design, the intermediate binary string by the M frame image to be decoded is divided into multirow, It include: the intermediate binary of the one frame image when the coding protocol of the video is high efficiency Video coding HEVC agreement A line of string includes at least one tree-like encoding block CTB.When the coding protocol of the video is H.264 agreement, a frame A line of the intermediate binary string of image includes at least one macro block MB.
In a possible design, N number of entropy decoder module, the ratio of mono- frame of the M image to be decoded for will acquire After spy's stream parallel decoding is at intermediate binary string, further includes N number of entropy decoder module, be respectively used to decoded intermediate binary String storage is to memory space corresponding with decoded entropy decoder module is completed, so that parsing module is from described decoded with completion The corresponding memory space of entropy decoder module obtains the intermediate binary string of corresponding image.
It further include every row when the intermediate binary string of a frame image respectively by the pixel in a possible design Processing module is decoded as displayable image data or is currently decoded for displayable image data, and at the multiple pixel When at least one processes pixel module in reason module is in idle condition, at least one processes pixel mould being in idle condition Block, at least a line for being used for and being about to the intermediate binary string of next frame image are decoded into displayable image data.
Fourth aspect is deposited in the computer readable storage medium this application provides a kind of computer readable storage medium Instruction is contained, when it runs on a computer or a processor, so that the computer or processor execute above-mentioned first aspect Or method described in its any one possible design.
5th aspect, this application provides a kind of computer program products comprising instruction, when it is in computer or processing When being run on device, so that computer or processor execute side described in above-mentioned first aspect or its any one possible design Method.
Detailed description of the invention
Fig. 1 is a kind of video decoder structural schematic diagram that the application specific embodiment provides;
Fig. 2 is a kind of video decoder that the application specific embodiment provides;
Fig. 3 is a kind of video encoding/decoding method that the application specific embodiment provides;
Fig. 4 is the image to be decoded that the application specific embodiment provides;
Fig. 5 is the data that a kind of pixel processing unit that the application specific embodiment provides needs decoded CTB row;
Fig. 6 is a kind of frame image that the application specific embodiment provides;
Fig. 7 is a kind of decoder architecture schematic diagram provided by the embodiments of the present application.
Specific embodiment
Below in conjunction with attached drawing, the technical scheme provided by various embodiments of the present application will be described in detail.
Fig. 1 is a kind of video decoder structural schematic diagram that the application specific embodiment provides.As shown in Figure 1, including Bus arbiter module (Bus Arbit) 101, entropy decoder (Entropy Decoder) 102, resolver (Bin Parser) 103, frame recorder (Frame Recoder) 104 and pixel processor (Pixel Processor) 105.Wherein, entropy decoder 102, resolver 103, frame recorder 104 and pixel processor 105 can respectively include multiple.
Bus arbiter module 101 respectively with external bus (External Data Bus), entropy decoder 102, resolver 103 and pixel processor 105 couple, it should be understood that in each embodiment of the application, coupling refers to phase by ad hoc fashion Mutually connection, including be connected directly or be indirectly connected by other equipment, such as all kinds of interfaces, transmission line, bus can be passed through Deng connected.Bus arbiter module 101 is obtained by external bus needs decoded bit stream, and bit is flowed to entropy decoder 102 send, which is intermediate binary string by entropy decoder 102.Entropy decoder 102 is solved by resolver 103 The intermediate binary string distributed by row of code gives multiple pixel processors, by multiple pixel processors 105 by the intermediate binary String is decoded as displayable image data.
It should be appreciated that in the embodiment of the present application, bit stream, which can be used as, carries out binary coding to initial data image Final form.From original uncoded image data, to final bit stream, there is also one in the cataloged procedure of image Intermediate binary form.Illustratively, original uncoded data image is encoded to obtain intermediate binary string, in this Between binary string carry out the final binary morphological for the processing such as compressing, being encoded, such as can be bit stream.The application's In specific embodiment, which can be bin stream (bin string), in a kind of optional scheme, by right Bin stream compresses the bit stream of available final form.Described in the embodiment of the present application, intermediate binary string does not include described Bit stream.
The displayable image data can be used for the data that display is shown.In one example, this is displayable Image data can be a kind of data (colour coding method) of yuv format.
Wherein, between entropy decoder 102 and resolver 103, resolver 103 and frame recorder 104,104 and of frame recorder It is coupled to each other between pixel processor 105.
In one example, Fig. 2 is a kind of video decoder that the application specific embodiment provides.As shown in Fig. 2, packet Include bus arbiter module 101, entropy decoder 102, resolver 103, frame recorder 104 and pixel processor 105.Wherein, entropy solution Code device 102 includes first to fourth entropy decoder, and resolver 103 includes first to fourth resolver, and frame recorder 104 includes the One to nth frame logger, and pixel processor 105 includes first to fourth pixel processor.
Wherein, one end of bus arbiter module 101 is connect with external bus, the other end and view of bus arbiter module 101 Entropy decoder 102, resolver 103 and pixel processor 105 inside frequency decoder connect.Wherein, entropy decoder 102 and parsing Also pass through independence respectively between device 103, between resolver 103 and frame recorder 104, frame recorder 104 and pixel processor 105 Bus connection.
Specifically, entropy decoder 102 is connect with bus arbiter module 101, and receive the ratio of the transmission of bus arbiter module 101 Spy's stream (bit stream).It include multiple entropy decoders in entropy decoder.In the specific embodiment of the application, multiple entropy decodings Module can both handle frame image to be decoded respectively, can also handle the different bands of frame image to be decoded simultaneously (slice)。
When multiple entropy decoders handle frame image to be decoded simultaneously, entropy decoder 102 by including in the bit stream Frame level information and slice information, which are determined, is decoded as bin to the different bands of the bit stream of the frame image using several entropy decoders Stream.Frame level information includes that image size, the coding mode of image use and frame image to be decoded include several slice etc., Slice information is for indicating that the frame image includes the coding mode of several bands and each band.In frame image to be decoded In use a complete area of different coding mode for a band with adjacent area.When frame image to be decoded is using a kind of When coding mode, which includes a slice, is a band.
Certainly, when different band of the part entropy decoder to frame image to be decoded decodes, the entropy of another part free time Decoder can continue to be decoded next frame image to be decoded, can promote the code efficiency of encoder as far as possible in this way.
When multiple entropy decoders handle different frame image to be decoded respectively, each entropy decoder is according to the successive of video playing Sequence handles each frame image to be decoded.After having handled frame image to be decoded, next frame image to be decoded is reprocessed.
Entropy decoder is decoded including by at least frame figure to be decoded the bit stream of at least frame image to be decoded The bit stream decoding of picture is bin stream.In one example, when the coding protocol of video is high efficiency Video coding (HEVC, High Efficiency Video Coding) agreement when, entropy decoder by bit stream decoding be bin stream can be used based on context Binary arithmetic coding (Context-based Adaptive Binary Arithmetic Coding, CABAC) or other Decode engine is decoded.When the coding protocol of video is that H.264 (H.264 agreement is ITU-T and ISO/IEC in 1997 to agreement Joint development group joint development International video coding standard) when, entropy decoder by bit stream decoding be bin stream can be used Adaptability changes length coding method (Context-based Adaptive Variable-Length code, CAVLC) decoding and draws It holds up and is decoded.It is decoded using CAVLC Decode engine including cutting bit stream, the bit stream after cutting is as bin Stream.Certainly, the coding protocol of above-mentioned video be only the application specific implementation in citing, for different video encoding protocols with And used coding mode be prior art the application to this without limit.
Resolver 103 is used to decoded bin flow point being fitted on different pixel processors, thus at by multiple pixels Reason device is simultaneously about to the bin stream of at least frame image to be decoded and is decoded into YUV.
Optionally, by before the multiple pixel processors of bin flow point dispensing, bus arbiter module 101 is also used to bin resolver Stream arrives memory space corresponding with each entropy decoder by external bus storage.Resolver is different by bin flow point dispensing Before pixel processor, resolver 103 also reads bin stream from designated memory space by external data bus.
Specifically, each entropy decoder in multiple entropy decoders 102 respectively includes corresponding memory space, the storage is empty Between for temporarily storing the entropy decoder decoded bin stream.Entropy decoder 102 by after the completion of frame image decoding to be decoded, By memory space corresponding to decoded bin stream storage to the entropy decoder for decoding the image.Resolver 103 is by entropy decoder 102 decoding obtain bin stream is read from the memory space, then by belong to a frame image bin stream distributed by row to pixel at Manage multiple pixel processors of device.
When the coding protocol of video is HEVC agreement, the decoded bin stream of at least one entropy decoder is pressed CTB by resolver Row divides;When the coding protocol of video is H.264 agreement, the decoded bin stream of at least one entropy decoder is pressed MB by resolver Row divides.
When resolver gives the bin stream distributed by row of an at least frame image to multiple pixel processors, an at least frame figure is determined Pixel processor corresponding to every row of the bin stream of picture.By son storage corresponding to the row data storage to the pixel processor Space.Pass through the bin that tree-like encoding block (coding tree blocks, CTB) row or macro block (Macro Block, MB) are gone Stream storage corresponds to memory space to a pixel processor, and the pixel processor is enable to directly read the CTB row or MB row bin Stream.
Optionally, multiple frame recorders that the application specific embodiment provides, each frame recorder is for recording a frame figure The storage state of the memory space of picture.In one example, when a data are written to designated memory space in resolver 103, The counter of frame recorder corresponding with the frame adds 1;When resolver 104 reads a data from the designated memory space, with Subtract 1 to the counter of the corresponding frame recorder of its frame.
Resolver 104 determines the storage state of the memory space by query counts device, determine the memory space whether be It is full.When memory space is full, then data cannot be written to the memory space.A pixel in multiple pixel processors 105 When processor query counts device is less than or equal to 0, then show that no data can be read in the memory space.
Each pixel processor in multiple pixel processors can individually handle the bin stream of a CTB row or MB row.
Resolver and frame recorder described herein can use general central processor (Central respectively Processing Unit, CPU), system on chip (System on Chip, SOC), the processor being integrated on SOC, individually Processor chips or controller etc.;Alternatively, resolver and frame recorder also may include dedicated treatment facility respectively, such as dedicated Integrated circuit (Application Specific Integrated Circuit, ASIC), field programmable gate array (Field Programmable Gate Array, FPGA) or digital signal processor (Digital Signal Processor, DSP) Deng.
In the following, the video decoder in the application is described in more details by specific method and step.Fig. 3 A kind of video encoding/decoding method provided for the application specific embodiment.As shown in figure 3, this method comprises:
S301, by multiple band slice parallel decodings of the bit stream of the image to be decoded of M frame bit stream form at centre Binary string;Wherein, any frame image to be decoded in the M frame image to be decoded includes at least one slice, and the M is Positive integer greater than 0.
Entropy including N number of entropy decoder, when needing to be decoded video by the decoder in the application, in decoder Decoder obtains the mutually bit stream in requisition for decoded video from external bus by bus arbiter module.In the specific of the application In embodiment, the multiple entropy decoders for including in entropy decoder can both handle frame image to be decoded respectively, in entropy decoder Including multiple entropy decoders can also be jointly processed by the different bands (slice) of frame image to be decoded.
In the specific embodiment of the application, the bit stream of the decoded video of needs of acquisition waits for either obtaining a frame The bit stream for decoding image is also possible to obtain the bit stream of multiframe image to be decoded.A frame is handled respectively in entropy decoder to wait for When decoding the bit stream of image, the frame number for the image that entropy decoder obtains is identical as the quantity of entropy decoder.
When multiple entropy decoders handle frame image to be decoded simultaneously, entropy decoder passes through the frame level that includes in the bit stream Information and slice information, which are determined, is decoded the bit stream of the frame using several entropy decoders.Each entropy decoder is complete Decode at least one slice in frame image to be decoded.One slice is for indicating a region in image, the figure in the region As using a kind of coding mode.
For example, frame image to be decoded has 1 Slice, then the frame image is decoded using an entropy decoder;When There are two Slice for one frame image to be decoded, then are decoded using one or two entropy decoders to the frame image;One frame waits for Decoding image has 20 Slice, then is decoded, is shown to the frame image using one, two, three or four entropy decoder Example property can also be using 20 entropy decoders, one frame of parallel decoding image to be decoded simultaneously in the case where hardware allows 20 slice.
Optionally, when part entropy decoder handles frame image to be decoded, the entropy decoder that is in idle condition can be with Obtain the bit stream of next frame image to be decoded.Pass through the frame level letter for including in the entropy decoder and the bit stream of current idle Breath, slice information determine that the entropy decoder of current idle decodes next frame image to be decoded, illustratively, in idle shape The entropy decoder of state has 2, and in frame image to be decoded includes 3 slice, then based on 2 entropys being in idle condition 2 slice of decoder processes image, again to remaining 1 after the entropy decoder in decoded state can be waited idle Slice decoding.
Including multiple entropy decoders handle frame image to be decoded respectively when, it is to be decoded that each entropy decoder decodes a frame Image.For example, the first entropy decoder handles first frame image to be decoded, the second entropy decoder handles the second frame image, third entropy Decoder processes third frame image, the 4th entropy decoder handle the 4th frame image.It is waited for when the first entropy decoder has handled first frame When decoding image, the 5th frame image is reprocessed.Video is decoded in the way of above-mentioned circulation and is completed.
The application passes through multiple Slice of multiple one frames of entropy decoder parallel decoding image to be decoded or decodes a frame respectively Image to be decoded promotes the decoding performance of entropy decoder.
The bit stream decoding of at least frame image to be decoded can be used into various ways for bin stream in entropy decoder.When When the coding protocol of video is HEVC agreement, entropy decoder uses CABAC or other Decode engines, is bin by bit stream decoding Stream.When the coding protocol of video is H.264 agreement, entropy decoder uses CAVLC Decode engine, and bit stream is cut, Bit stream after cutting is flowed as bin.It by bit stream decoding is that bin flows by CABAC or other Decode engines, or, using CAVLC Decode engine cuts bit stream, and the bit stream after cutting is the prior art as bin stream, and the application is to this Without limiting.
Optionally, each entropy decoder is for individually decoding complete frame image to be decoded, and each entropy decoder point Independent memory space is not corresponded to.The bin stream that each entropy decoder solution comes out, writes the corresponding memory space of the entropy decoder.
In one example, Fig. 4 is the image to be decoded that the application specific embodiment provides.As shown in figure 4, should Image includes 8 rows, wherein the first row to the first band of third behavior (the first slice), fourth line to the 8th behavior second strip (the 2nd slice).First slice is encoded by the first coding mode, and the 2nd slice is encoded by the second coding mode.
In the method for solving frame image to be decoded simultaneously using multiple decoders, when which includes two slice, It can determine and the bit stream of the frame is decoded parallel by two entropy decoders.Wherein, the first entropy decoder decoding first Slice, the second entropy decoder decode the 2nd slice.After the completion of first entropy decoder decodes the first slice, decoding is obtained Bin stream storage to the corresponding memory space of the first entropy decoder.Second entropy decoder will obtain after the completion of the 2nd slice decoding Bin stream storage to the corresponding memory space of the second entropy decoder.
Entropy decoder continues to be decoded the second frame image and will solve after the decoding for completing first frame image to be decoded Bin stream after code continues storage to the memory space of corresponding entropy decoder.To the decoding process and aforesaid way of the second frame image Identical, the application is to this without repeating.
S302, the intermediate binary string of the M frame image to be decoded is divided into multirow.
It further include resolver in the decoder of the application, resolver is used to the bin of an at least frame image flowing distributed by row To multiple pixel processors.
Optionally, a resolver in resolver is before by the multiple pixel processors of bin flow point dispensing, also from corresponding entropy Corresponding bin stream is obtained in the memory space of decoder.
The multiple resolvers for including in resolver can obtain respectively a frame image bin stream, and will acquire bin stream by Row arrangement.Each parsing is respectively by being about to the multiple pixel processors of bin flow point dispensing.
The bin stream for the frame image that one resolver will acquire may include various ways by rows, for example, resolver The bin stream for the frame image that can be will acquire is arranged by CTB row or MB row.When the coding protocol of video is HEVC agreement, solution Parser is divided the bin stream of a frame image by CTB row;When the coding protocol of video is H.264 agreement, resolver is by a frame figure The bin stream of picture is divided by MB row.
Resolver will be also about to after dividing the decoded bin stream of entropy decoder by CTB row or MB row by CTB row or MB Bin flow point is fitted on different memory spaces.Specifically, the memory space include it is multiple, each memory space is respectively used to by row Store the bin stream of a frame image.Meanwhile each memory space further includes multiple sub- memory spaces, every sub- memory space is corresponding Different pixel processors, and sub- memory space and pixel processor correspond.Illustratively, pixel processor is from a certain frame Sub- memory space kind corresponding with the pixel processor reads the one of the bin stream of a frame image in the corresponding memory space of image Row.
In one example, resolver may include: that basis should by frame image storage is about to specified memory space The information of frame determines which memory space the frame image is stored in.And determine that a CTB row or MB row in a frame image lead to Which pixel processor decoding crossed;The corresponding sub- memory space of the pixel processor is determined again.By the data of the CTB row or MB row Store the sub- memory space of designated memory space.
In one example, bin stream of the resolver after obtaining the frame decoding in entropy decoder, by bin stream by row Distribution, wherein the coding of the video uses HEVC agreement.According to the size requirements of first CTB block of the first row, bin flowed First CTB block of the preceding a certain number of data as the first row.It is true with the size of image in frame level information in the manner described above It include the quantity of CTB block in fixed every row.
Need to illustrate when, at least one decoded slice of entropy decoder bin stream be a whole string data.This Shen The whole string data is please divided into multirow by using resolver, to make each pixel processor in multiple pixel processors The data that do not go together can be handled respectively.To which multiple pixel processors handle a frame image simultaneously, decoding performance is improved.Its In, resolver by whole string data be divided into multirow be determined according to the coding protocol of the video every row include how many a data blocks, Each data block includes how many data.
Meanwhile not going together in frame image to be decoded is respectively stored into same storage sky by pixel processor by resolver Between the sub- memory spaces of difference.Memory space corresponding with frame image when the same memory space.For example, by 0CTB Row data storage corresponding first sub- memory space of the first pixel processor into the memory space, the storage of 1CTB row is arrived should The corresponding second sub- memory space of second pixel processor in memory space, by the storage of 2CTB row data into the memory space The sub- memory space of the corresponding third of third pixel processor, by the storage of 3CTB row data into the memory space at the 4th pixel The corresponding 4th sub- memory space of device is managed, it is corresponding that the data of 4CTB row are stored into the memory space the first pixel processor The first sub- memory space.It is deposited in the way of above-mentioned circulation until storing the frame image to different pixels processor is corresponding Store up space.
Frame recorder includes multiple, the write-in and reading of one frame image of each frame recorder record.Specifically, each frame note Record device includes multiple counters for each pixel processor.In a kind of optional scheme, resolver is at a pixel When a data are written in the corresponding memory space of reason device, pixel processor described in the frame recorder opposite with the memory space Write-in record plus 1.
In a specific example, resolver sends write-once information to frame recorder, and frame recorder is write according to this Enter information and determines that the corresponding counter of the pixel processor adds 1.
Specifically, the write-in information includes the information of the information of the frame of write-in and the row of the frame image.Information, which is written, includes Which frame is write-in data belong to, data are written to which memory space pixel processor corresponding with write-in data.Frame recorder Which frame belonged to according to the write-in data for including in write-in information, determination handles the write-in information by which frame recorder. Determining frame recorder is written to which memory space according to the data for including in write-in information and corresponding sub- storage is empty Between, 1 is added to the counter for the sub- memory space for corresponding to memory space in frame recorder.
Write-in number is used to indicate the storage state of each word memory space in frame recorder.When counter is greater than one in advance If threshold value, then the sub- memory space does not have space to store more data, at this point, frame recorder is sent to resolver stops data Information is written.Stopping data write information, which is used to indicate resolver, stops that number is written to the sub- memory space of the memory space According to.Wherein, the preset threshold value of counter can be determined according to the size of each write-in data and the size of sub- memory space, thus Ensure that the data of sub- memory space storage are less than the capacity of the memory space.
S303, by the multirow parallel decoding of the intermediate binary string be displayable image data.
Decoder in the application specific embodiment further includes multiple pixel processors, and the multiple pixel processor is with row For unit and the multirow of bin stream of being about to an at least frame image is decoded into image information.
Each pixel processor in multiple pixel processors respectively corresponds respective sub- memory space.In processing one When frame image, each pixel processor reads data from corresponding sub- memory space respectively.Pixel processor is deposited from corresponding Before storing up space reading data, primary reading information also is sent to frame recorder.Frame recorder is according to the reading information, to frame recording The write-in number of corresponding memory space subtracts 1 in device.
Reading information includes the pixel processor for reading data and belonging to which frame and reading.Frame recorder is according to reading information In include the data that need to read belong to which frame, determination handles the reading information by which frame recorder.Determining frame Logger includes the pixel processor read according to reading in information, subtracts 1 to the counter for corresponding to memory space in frame recorder.
Determine whether to read data by query counts device, if counter is less than or equal to 0, the sub- memory space is current The data of storage are sky.Frame recorder sends the information for stopping reading data, corresponding pixel processor to the pixel processor The data of the frame image cannot be read.When the counting of counter is more than or equal to 1, corresponding pixel processor reads corresponding number According to.By the way that multiple frame recorders are arranged, storage shape of the bin stream in the corresponding memory space of pixel processor of multiple image is recorded State.To make entropy decoder after the decoding for completing a frame image, can continue to be decoded next frame image.
After the data that pixel processor is not gone together in getting a frame, each pixel processor is simultaneously to the number that do not go together It is displayable image data by bit stream decoding according to being decoded parallel.For example, the displayable image data is can to lead to Cross the yuv data that display screen is shown, decoded YUV storage to specified memory space.
In one example, Fig. 5 is that a kind of pixel processor that the application specific embodiment provides needs a decoded CTB Capable data.As shown in figure 5, the corresponding CTB row of each pixel processor respectively includes 6 CTB blocks.First processes pixel When device is to four row CTB of the 4th pixel processor parallel decoding, further include whether inquiry adjacent data can be used.By inquiring consecutive number According to whether can be used, to guarantee the decoding order and correctness of four row CTB.For example, as the 6th CTB of the first pixel processor When row is completed without decoding, the 6th CTB block of the second pixel processor, the 5th CTB block of third pixel processor and the 6th CTB block, the 4th CTB block, the 5th CTB block and the 6th CTB block of the 4th pixel processor cannot all decode.
In the above-mentioned example of the application, it is decoded the effect for improving image decoding simultaneously by multiple pixel processors Rate.Simultaneously as the forward-backward correlation of image decoding, the application by decoding a frame image for each pixel processor simultaneously The problem of not going together, different frame cannot be decoded so as to avoid each pixel processor.Improve decoded efficiency.
Above method embodiment is only the coding/decoding method when Video Decoder decodes a frame image.Since video decodes Each device is mutually indepedent device in device.Therefore, after a device has handled a frame image, can continue to carry out next frame image Decoding, and without paying attention to subsequent each device whether by the frame image decoding complete.
In the following, being carried out specifically by an example to a kind of video encoding/decoding method that the application specific embodiment provides It is bright.Fig. 6 is a kind of frame image that the application specific embodiment provides.As shown in fig. 6,5 slice, each slice is using a kind of Coding mode.In this example embodiment, entropy decoder 1 decodes the data of slice0, and entropy decoder 2 decodes the data of slice1, entropy solution Code device 3 decodes the data of slice2, and entropy decoder 4 decodes the data of slice3, and entropy decoder 1 decodes the data of slice4, entropy The data of the decoding of decoder 2 slice5.
Resolver obtains the decoded bin stream of entropy decoder, and bin is then flowed distributed by row.Specifically, resolver is from entropy solution The corresponding sub- memory space of code device 1 reads 0 data of Slice, and resolver reads Slice from the corresponding memory space of entropy decoder 2 1 data, resolver read 2 data of Slice from the corresponding memory space of entropy decoder 3, and resolver is corresponding from entropy decoder 4 Memory space reads the data of Slice 3, and resolver reads 4 data of Slice, parsing from the corresponding memory space of entropy decoder 1 Device reads the data of Slice 5 from the corresponding memory space of entropy decoder 2.
For the bin stream distributed by row for the frame image that resolver also will acquire to four pixel processor decodings, process is as follows It is described:
0th row CTB is distributed to pixel processor 0;1st row CTB is distributed to pixel processor 1;The 2nd row CTB points Dispensing pixel processor 2;3rd row CTB is distributed to pixel processor 3;4th row CTB is distributed to pixel processor 0;The 5th Row CTB distributes to pixel processor 1;6th row CTB is distributed to pixel processor 2;7th row CTB is distributed to pixel processor 3;Eighth row CTB is distributed to pixel processor 0;9th row CTB is distributed to pixel processor 1;10th row CTB is distributed to picture Plain processor 2.
Fig. 7 is a kind of decoder architecture schematic diagram provided by the embodiments of the present application.As shown in fig. 7, the wholesale price device includes: Processor 701, memory 702, communication interface 703.
Processor 701 can use general central processor (Central Processing Unit, CPU), system on chip (System on Chip, SOC), processor, individual processor chips or the controller being integrated on SOC etc.;The processing system System 130 can also include dedicated treatment facility, such as specific integrated circuit (Application Specific Integrated Circuit, ASIC), field programmable gate array (Field Programmable Gate Array, FPGA) or digital signal Processor (Digital Signal Processor, DSP) etc..The processor group that can also be constituted using multiple processors is more It is coupled to each other by one or more buses between a processor, for executing relative program, to realize aforementioned the method for the present invention Technical solution provided by embodiment.In a specific example, which can be as depicted in figs. 1 and 2.
Memory 702 can be non-power-failure volatile memory, e.g. EMMC (Embedded Multi Media Card, embedded multi-media card), UFS (Universal Flash Storage, Common Flash Memory storage) or read-only memory (Read-Only Memory, ROM), or the other kinds of static storage device of static information and instruction can be stored, also It can be power down volatile memory (volatile memory), such as random access memory (Random Access Memory, RAM) or the other kinds of dynamic memory of information and instruction can be stored, it is also possible to electric erazable programmable Read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), read-only light Disk (Compact Disc Read-Only Memory, CD-ROM) or other optical disc storages, optical disc storage (including compression optical disc, Laser disc, optical disc, Digital Versatile Disc, Blu-ray Disc etc.), magnetic disk storage medium or other magnetic storage apparatus or can By carry or store have instruction or data structure form program code and can by computer access any other based on Calculation machine readable storage medium storing program for executing, but not limited to this.Memory 702 can store application program.By software or firmware come real When existing technical solution provided in an embodiment of the present invention, mentioned for realizing the step of earlier figures 3 of the present invention implementation with embodiment of the method The program code of any optional technical solution supplied is stored in memory 702, and is executed by processor 701.
Communication interface 703 needs decoded video or will can show after decoding to be connected with other equipment to obtain Image data transmit output.
It include at least one entropy decoder, the bit of at least frame image to be decoded for will acquire in processor 701 Flow parallel decoding into intermediate binary string, each entropy decoder decoding one frame image to be decoded at least one entropy decoder At least one band slice.Resolver, for giving the intermediate binary string distributed by row of an at least frame image to multiple pictures Plain processor.The multiple pixel processor is with behavior unit and is about to the more of at least intermediate binary string of a frame image Row is decoded into displayable image data.
It include N number of entropy decoder in processor 701, for obtaining the bit stream of a frame image.Include in processor 701 The bit stream parallel decoding for the frame image that N number of entropy decoder will acquire is intermediate binary string, the quantity of the N according to The number for the slice that the one frame image to be decoded includes determines.
One frame image to be decoded includes N number of slice, the N of frame image to be decoded described in N number of entropy decoder parallel decoding A slice, wherein each entropy decoder in N number of entropy decoder decodes one in the frame image to be decoded respectively A slice.
The bit stream decoding for the frame image to be decoded that part entropy decoder in N number of entropy decoder will acquire is centre two When system string, the entropy decoder being in idle condition at least one described entropy decoder, for obtaining next frame figure to be decoded The bit stream of picture.The entropy decoder being in idle condition, the bit stream of the next frame image to be decoded for will acquire Partly or entirely it is decoded as bin stream.
The number of entropy decoder is N, N number of entropy decoder, for obtaining the bit stream of N frame image to be decoded.N number of entropy Each entropy decoder in decoder, for respectively by the bit stream decoding of the frame image to be decoded in N frame image to be decoded For intermediate binary string.
Device further includes at least one memory space, and there are multiple for each of at least one memory space memory space Sub- memory space: the resolver, for the intermediate binary string of at least frame image to be decoded to be store by row at least one In multiple sub- memory spaces in a memory space, each memory space of at least one memory space belongs to together for storing The intermediate binary string of one frame image to be decoded, multiple sub- memory space and multiple pixel processor correspond.
Each pixel processor in multiple pixel processor, be also used to respectively from the corresponding sub- memory space with Behavior unit reads a line of at least intermediate binary string of a frame image.
The corresponding counter of every sub- memory space in multiple sub- memory spaces, counter is for recording the sub- storage The storage state in space.
When a data are written in a sub- memory space of the resolver into a memory space, in multiple frame recorders The write-in number of frame recorder corresponding with memory space adds 1.A pixel processor in multiple pixel processor from It is corresponding with the memory space in multiple frame recorders when the sub- memory space of one of one memory space reads a data The write-in number of frame recorder subtracts 1.The write-in number is used to indicate the storage state of each word memory space in frame recorder.
Resolver be it is multiple, multiple resolvers by the intermediate binary string distributed by row of an at least frame image give multiple pixels Processor includes each resolver in multiple resolvers respectively by the centre two of any frame image in this at least a frame image System string distributed by row gives multiple pixel processor.
When the coding protocol of the video is high efficiency Video coding HEVC agreement, the intermediate binary string of a frame image A line includes at least one tree-like encoding block CTB.When the coding protocol of the video is H.264 agreement, the centre of a frame image A line of binary string includes at least one macro block MB.
After the bit stream parallel decoding for at least frame image that N number of entropy decoder will acquire is at intermediate binary string, also Decoded intermediate binary string is stored to corresponding with decoded entropy decoder is completed respectively including N number of entropy decoder and is deposited Space is stored up, so that resolver obtains in corresponding image from the memory space corresponding with the decoded entropy decoder of completion Between binary string.
Believe when every row of the intermediate binary string of a frame image is decoded as displayable image by the pixel processor respectively It ceases or is currently decoded as displayable image data, and at least one pixel processor in multiple pixel processor is in When idle state, at least one pixel processor being in idle condition, be also used to and be about to the centre two of next frame image into At least a line of system string is decoded into image information.
The application specific embodiment provides a kind of computer readable storage medium, the computer-readable recording medium storage one A or multiple programs, one or more of programs include instruction, and described instruction is set when by the electronics including multiple application programs When standby execution, so that step some or all of in any of the above-described a method of shown electronic equipment execution.
Based on this understanding, the embodiment of the present application also provides a kind of computer program product comprising instruction, the application Technical solution substantially all or part of the part that contributes to existing technology or the technical solution can be in other words It is expressed in the form of software products, which is stored in a storage medium, including some instructions are used So that a computer equipment, mobile terminal or in which processor execute the whole of each embodiment the method for the application Or part steps.It should be noted that it is the alternative embodiment that the application is introduced, this field skill that the application, which provides embodiment, Art personnel on this basis, can be designed that more embodiments completely, therefore not repeat here.
Those of ordinary skill in the art may be aware that list described in conjunction with the examples disclosed in the embodiments of the present disclosure Member and algorithm steps can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually It is implemented in hardware or software, the specific application and design constraint depending on technical solution.Professional technician Each specific application can be used different methods to achieve the described function, but this realization is it is not considered that exceed Scope of the present application.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description, The specific work process of device and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods, it can be with It realizes by another way.For example, the apparatus embodiments described above are merely exemplary, for example, the division of unit, Only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components can be with In conjunction with or be desirably integrated into another system, or some features can be ignored or not executed.Another point, it is shown or discussed Mutual coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING of device or unit or Communication connection can be electrical property, mechanical or other forms.
Unit may or may not be physically separated as illustrated by the separation member, shown as a unit Component may or may not be physical unit, it can and it is in one place, or may be distributed over multiple networks On unit.It can some or all of the units may be selected to achieve the purpose of the solution of this embodiment according to the actual needs.
It, can also be in addition, each functional unit in each embodiment of the application can integrate in one processing unit It is that each unit physically exists alone, can also be integrated in one unit with two or more units.
If function is realized in the form of SFU software functional unit and when sold or used as an independent product, can store In a computer readable storage medium.Based on this understanding, the technical solution of the application is substantially in other words to existing Having the part for the part or the technical solution that technology contributes can be embodied in the form of software products, the computer Software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be personal meter Calculation machine, server or network equipment etc.) or processor (processor) execute each embodiment method of the application whole Or part steps.And storage medium above-mentioned includes: USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic or disk etc. are various can store journey The medium of sequence code.
More than, the only specific embodiment of the application, but the protection scope of the application is not limited thereto, and it is any to be familiar with Those skilled in the art within the technical scope of the present application, can easily think of the change or the replacement, and should all cover Within the protection scope of the application.Therefore, the protection scope of the application should be subject to the protection scope in claims.

Claims (18)

1. a kind of decoder characterized by comprising
At least one entropy decoder, the bit stream parallel decoding of at least frame image to be decoded for will acquire at centre two into System is gone here and there, at least one band of each entropy decoder decoding one frame image to be decoded at least one described entropy decoder slice;
Resolver, for giving the intermediate binary string distributed by row of at least frame image to be decoded to multiple processes pixels Device;
The multiple pixel processor, for behavior unit and being about to the intermediate binary of at least frame image to be decoded The multirow of string is decoded into displayable image data.
2. decoder according to claim 1, which is characterized in that the number of the entropy decoder is N:
N number of entropy decoder, for obtaining the bit stream of frame image to be decoded;
The bit stream parallel decoding for the frame image to be decoded that N number of entropy decoder will acquire at intermediate binary string, The number for the slice that the quantity of the N includes according to the frame image to be decoded determines.
3. decoder according to claim 2, which is characterized in that the frame image to be decoded includes N number of slice, institute State N number of slice of frame image to be decoded described in N number of entropy decoder parallel decoding, wherein every in N number of entropy decoder A entropy decoder decodes a slice in the frame image to be decoded respectively.
4. the apparatus according to claim 1, which is characterized in that the part entropy decoding at least one described entropy decoder Device by the bit stream decoding of the frame image to be decoded of the acquisition be the intermediate binary string when:
The entropy decoder being in idle condition at least one described entropy decoder, for obtaining the ratio of next frame image to be decoded Spy's stream;
The entropy decoder being in idle condition, the part of the bit stream of the next frame image to be decoded for will acquire Or all it is decoded as the intermediate binary string.
5. decoder according to claim 1, which is characterized in that the number of the entropy decoder is N:
N number of entropy decoder, for obtaining the bit stream of N frame image to be decoded;
Each entropy decoder in N number of entropy decoder, for respectively that the frame in the N frame image to be decoded is to be decoded The bit stream decoding of image is the intermediate binary string.
6. decoder according to any one of claims 1-5, which is characterized in that described device further include: at least one Memory space, there are multiple sub- memory spaces for each of at least one described memory space memory space:
The resolver: for by the intermediate binary string of at least frame image to be decoded be store by row to it is described extremely In the multiple sub- memory space in a few memory space, each memory space of at least one memory space is used for Storage belongs to the intermediate binary string of same frame image to be decoded, the multiple sub- memory space and the multiple pixel processor It corresponds.
7. according to decoder as claimed in claim 6, which is characterized in that every sub- memory space in the multiple sub- memory space A corresponding counter, the counter are used to record the storage state of the sub- memory space.
8. decoder according to claim 1, it is characterised in that:
When the coding protocol of the video is high efficiency Video coding HEVC agreement, the centre two of the frame image to be decoded A line of system string includes at least one tree-like encoding block CTB;
When the coding protocol of the video is H.264 agreement, a line of the intermediate binary string of the frame image to be decoded Including at least one macro block MB.
9. decoder according to claim 1, it is characterised in that:
When every row of the intermediate binary string of frame image to be decoded is decoded as displayable figure by the pixel processor respectively It as data or is currently decoded as displayable image data, and at least one processes pixel in the multiple pixel processor When device is in idle condition, at least one pixel processor being in idle condition is also used to and is about to next frame figure to be decoded At least a line of the intermediate binary string of picture is decoded into displayable image data.
10. a kind of video encoding/decoding method characterized by comprising
Multiple band slice parallel decodings of the bit stream for the M frame image to be decoded that will acquire are at intermediate binary string, wherein Any frame image to be decoded in the M frame image to be decoded includes at least one slice, and the M is the positive integer greater than 0;
The intermediate binary string of the M frame image to be decoded is divided into multirow;
It is displayable image data by the multirow parallel decoding of the intermediate binary string.
11. according to the method described in claim 10, it is characterized in that, the M be 1, the M frame image to be decoded that will acquire Bit stream multiple band slice parallel decodings at intermediate binary string, specifically include:
The multiple slice parallel decoding of the bit stream for the frame image to be decoded that N number of entropy decoder will acquire is in described Between binary string, each entropy decoder in N number of entropy decoder decodes at least one of the frame image to be decoded The number for the slice that the quantity of slice, the N include according to the frame image determines.
12. according to the method for claim 11, which is characterized in that the frame image to be decoded includes N number of slice, institute State N number of slice of frame image to be decoded described in N number of entropy decoder parallel decoding, wherein every in N number of entropy decoder A entropy decoder decodes a slice in the frame image to be decoded respectively.
13. according to the method described in claim 10, it is characterized by:
Y entropy decoder in N number of entropy decoder by the bit stream decoding of the frame image to be decoded be the centre two into System string;
The part or complete of the bit stream for the next frame image to be decoded that the N-Y entropy decoders being in idle condition will acquire Portion is decoded as the intermediate binary string, and the Y is more than or equal to 1, and the Y is less than N.
14. according to the method described in claim 10, it is characterized in that, the bit stream of the M frame image to be decoded that will acquire Multiple band slice parallel decodings at intermediate binary string, specifically include:
M entropy decoder is by multiple band slice parallel decodings of the bit stream of the M frame image to be decoded of the acquisition at described Intermediate binary string, wherein each entropy decoder in the M entropy decoder respectively will be in the M frame image to be decoded At least one described slice of the bit stream of any frame image to be decoded is decoded as the intermediate binary string.
15. method described in any one of 0-14 according to claim 1, which is characterized in that described by the intermediate binary string Multirow parallel decoding be displayable image data before, the method also includes:
The intermediate binary string of the M frame image to be decoded is store by row at least one memory space, it is described extremely Each memory space of a few memory space is for storing the intermediate binary string for belonging to same frame image to be decoded.
16. according to method of claim 15, which is characterized in that at least one described memory space includes that multiple sub- storages are empty Between, the corresponding counter of every sub- memory space in the multiple sub- memory space, the counter is used to record described The storage state of sub- memory space.
17. according to the method described in claim 10, it is characterized by:
When the coding protocol of the video be high efficiency Video coding HEVC agreement when, the frame image to be decoded it is described in Between a line of binary string include at least one tree-like encoding block CTB;
When the coding protocol of the video is H.264 agreement, the intermediate binary string of the frame image to be decoded A line includes at least one macro block MB.
It include being stored with instruction in the computer readable storage medium, described in it 18. a kind of computer readable storage medium When instruction is run on a computer or a processor, so that the computer or processor are executed as claim 10-17 is any one Method described in.
CN201810279296.3A 2018-03-31 2018-03-31 Video decoding method and device Active CN110324625B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201810279296.3A CN110324625B (en) 2018-03-31 2018-03-31 Video decoding method and device
CN202310472995.0A CN116506644A (en) 2018-03-31 2018-03-31 Video decoding method and device
PCT/CN2019/080473 WO2019185032A1 (en) 2018-03-31 2019-03-29 Video decoding method and apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810279296.3A CN110324625B (en) 2018-03-31 2018-03-31 Video decoding method and device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN202310472995.0A Division CN116506644A (en) 2018-03-31 2018-03-31 Video decoding method and device

Publications (2)

Publication Number Publication Date
CN110324625A true CN110324625A (en) 2019-10-11
CN110324625B CN110324625B (en) 2023-04-18

Family

ID=68060955

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201810279296.3A Active CN110324625B (en) 2018-03-31 2018-03-31 Video decoding method and device
CN202310472995.0A Pending CN116506644A (en) 2018-03-31 2018-03-31 Video decoding method and device

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN202310472995.0A Pending CN116506644A (en) 2018-03-31 2018-03-31 Video decoding method and device

Country Status (2)

Country Link
CN (2) CN110324625B (en)
WO (1) WO2019185032A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112073731A (en) * 2020-09-16 2020-12-11 厦门市美亚柏科信息股份有限公司 Image decoding method, image decoding device, computer-readable storage medium and electronic equipment
WO2023160470A1 (en) * 2022-02-28 2023-08-31 华为技术有限公司 Encoding/decoding method and apparatus

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101001373A (en) * 2006-01-12 2007-07-18 Lsi罗吉克公司 Context adaptive binary arithmetic decoding for high definition video
US20100097250A1 (en) * 2008-10-17 2010-04-22 Texas Instruments Incorporated Parallel CABAC Decoding for Video Decompression
US20120014429A1 (en) * 2010-07-15 2012-01-19 Jie Zhao Methods and Systems for Parallel Video Encoding and Parallel Video Decoding
US20140328411A1 (en) * 2012-01-20 2014-11-06 Samsung Electronics Co., Ltd. Video encoding method and apparatus and video decoding method and appartus using unified syntax for parallel processing
CN105978575A (en) * 2010-09-30 2016-09-28 夏普株式会社 Methods and systems for context initialization in video coding and decoding
CN106210728A (en) * 2015-04-10 2016-12-07 澜起科技(上海)有限公司 Circuit, method and Video Decoder for video decoding

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6449325B1 (en) * 1998-03-13 2002-09-10 Samsung Electronics Co., Ltd. Circuitry operative on selected symbol slicing results for synchronizing data fields in a digital television receiver
US8306125B2 (en) * 2006-06-21 2012-11-06 Digital Video Systems, Inc. 2-bin parallel decoder for advanced video processing
WO2012048053A2 (en) * 2010-10-05 2012-04-12 Massachusetts Institute Of Technology System and method for optimizing context-adaptive binary arithmetic coding
US10277913B2 (en) * 2014-10-22 2019-04-30 Samsung Electronics Co., Ltd. Application processor for performing real time in-loop filtering, method thereof and system including the same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101001373A (en) * 2006-01-12 2007-07-18 Lsi罗吉克公司 Context adaptive binary arithmetic decoding for high definition video
US20100097250A1 (en) * 2008-10-17 2010-04-22 Texas Instruments Incorporated Parallel CABAC Decoding for Video Decompression
US20120014429A1 (en) * 2010-07-15 2012-01-19 Jie Zhao Methods and Systems for Parallel Video Encoding and Parallel Video Decoding
CN105978575A (en) * 2010-09-30 2016-09-28 夏普株式会社 Methods and systems for context initialization in video coding and decoding
US20140328411A1 (en) * 2012-01-20 2014-11-06 Samsung Electronics Co., Ltd. Video encoding method and apparatus and video decoding method and appartus using unified syntax for parallel processing
CN106210728A (en) * 2015-04-10 2016-12-07 澜起科技(上海)有限公司 Circuit, method and Video Decoder for video decoding

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112073731A (en) * 2020-09-16 2020-12-11 厦门市美亚柏科信息股份有限公司 Image decoding method, image decoding device, computer-readable storage medium and electronic equipment
WO2023160470A1 (en) * 2022-02-28 2023-08-31 华为技术有限公司 Encoding/decoding method and apparatus

Also Published As

Publication number Publication date
CN110324625B (en) 2023-04-18
WO2019185032A1 (en) 2019-10-03
CN116506644A (en) 2023-07-28

Similar Documents

Publication Publication Date Title
JP7057453B2 (en) Point cloud coding method, point cloud decoding method, encoder, and decoder
EP3107289A1 (en) Picture coding and decoding methods and devices
EP3089453A1 (en) Image coding and decoding methods and devices
CN107886560B (en) Animation resource processing method and device
US8824560B2 (en) Virtual frame buffer system and method
JP2020522181A (en) Coding the last significant coefficient flag
US10834428B2 (en) Image coding and decoding method and device
JP2017519467A5 (en)
KR101925681B1 (en) Parallel video processing using multicore system
CN103379333B (en) The decoding method and its corresponding device of decoding method, video sequence code stream
CN112995662A (en) Method and device for attribute entropy coding and entropy decoding of point cloud
CN101841707B (en) High-speed real-time processing arithmetic coding method based on JPEG 2000 standard
CN110324625A (en) A kind of video encoding/decoding method and device
CN113271493A (en) Video stream decoding method and computer-readable storage medium
US20110216827A1 (en) Method and apparatus for efficient encoding of multi-view coded video data
CN110401850A (en) A kind of method and apparatus of the customized SEI of transparent transmission
US7123656B1 (en) Systems and methods for video compression
CN116866576A (en) Encoding/decoding device, storage medium, and transmitting device
WO2011143585A1 (en) Parallel processing of sequentially dependent digital data
WO2023130896A1 (en) Media data processing method and apparatus, computer device and storage medium
WO2021103013A1 (en) Methods for data encoding and data decoding, device, and storage medium
WO2014051745A1 (en) Entropy coding techniques and protocol to support parallel processing with low latency
CN204131646U (en) A kind of digital video signal decoder
US20200236360A1 (en) Methods and apparatuses for coding and decoding mode information and electronic device
CN114173127A (en) Video processing method, device, equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant