CN110311846A - EtherCAT master-slave system based on IGH Open Framework - Google Patents
EtherCAT master-slave system based on IGH Open Framework Download PDFInfo
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- CN110311846A CN110311846A CN201910350898.8A CN201910350898A CN110311846A CN 110311846 A CN110311846 A CN 110311846A CN 201910350898 A CN201910350898 A CN 201910350898A CN 110311846 A CN110311846 A CN 110311846A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40169—Flexible bus arrangements
- H04L12/40176—Flexible bus arrangements involving redundancy
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
The invention discloses a kind of EtherCAT master-slave systems based on IGH Open Framework, including EtherCAT main website, EtherCAT slave station and distributed clock mechanism, the EtherCAT includes multiple slave stations, and first slave station connecting with EtherCAT main website is equipped with the distributed clock mechanism that can be used as System Clock Reference.Using the EtherCAT master-slave system of the invention based on IGH Open Framework, precise synchronization may be implemented.
Description
Technical field
The present invention relates to technical field of industrial ethernet, are about a kind of based on IGH Open Framework specifically
EtherCAT master-slave system.
Background technique
EtherCAT (Ethernet auto-control technology) is that the scene of an open architecture based on Ethernet is total
Linear system is united, and the CAT in EtherCAT title is Control Automation Technology (auto-control technology) lead-in
Female abbreviation.Initially researched and developed by Elektro Beckhoff GmbH (Beckhoff Automation GmbH).EtherCAT
New standard is set up in flexibility for the real-time performance and topology of system, meanwhile, it also is compliant with or even reduces fieldbus
Use cost.
Requirement of the industry spot to transmission speed and reliability is higher and higher, and traditional ethernet transmission speed is fast and transmits
Distance, but its CSMA/CD access mechanism used is a kind of access mechanism of uncertainty, is difficult to meet industry spot
It is required that.Major automation manufacturer has launched respective Industrial Ethernet standard in the world, as ProfiNet, PowerLink,
MechatroLink, SERCOS, EtherCAT etc..The EtherCAT that wherein Germany Beckhoff is released has high performance-price ratio, makes
With simple, the topological remarkable advantages such as flexibly, bandwidth effective rate of utilization up to 90% or more, and real-time with higher with it is synchronous
Performance.ETG(EtherCAT Technology Group) official statistics indicate that, the refresh time of 1000 I/O is 30us, is passed
It is 300us the time required to defeated maximum 1486 bytes, the refresh time of 100 axis servomotors is about 100us, may be implemented 1us's
Clock synchronization accuracy.Due to these outstanding advantages, EtherCAT has obtained very fast development in recent years, at present the whole world ETG member
3500 are alreadyd exceed, is widely used in the advanced manufacturing industries such as robot, numerically-controlled machine tool.
Existing EtherCAT uses host-guest architecture, and main website uses standard ethernet card, and slave station uses special ESC
(EtherCAT Slave Controller) chip such as ET1100, ET1200, LAN9252 realize slave station function.EtherCAT master
The data message sent of standing traverses all slave nodes, and EtherCAT slave station high speed dynamically reads data and is inserted into data, number
It is delayed according to the transmission delay of message depending on hardware transport, after the last one slave node open port, utilizes Ethernet
Data message is returned to main website by duplex nature.Data message job count device (WKC, Working after slave station is handled
Count it) will increase.The communication protocol stack of EtherCAT control system is as shown in Figure 1.Main website needs to realize that EtherCAT data are logical
Letter, including EtherCAT initialization, periodic data transmission and process data transmission.
EtherCAT main website is the core of entire EtherCAT master-slave system, and EtherCAT main website must be stable to reliably
Operation, guarantee the real-time and synchronism of slave station equipment.Commercialization main website on the market is external product at present, such as again
EtherCAT Master of TwinCAT, KPA of good fortune etc., it is domestic in recent years more and more to the research of EtherCAT main website, but
There has been no companies to release commercialized main website product at present.To guarantee that main website real-time, main website scheme generally use RTOS+ARM/
The hardware structure of X86/ZYNQ, common RTOS system has Vxworks, QNX, uC/OS II, however Windows and Linux are not
Have real-time but real-time reconstruction can be carried out.It can be realized using INtime or RTX under windows platform and be expanded in real time
Exhibition;Linux platform can realize real-time extension using RTAI, Xenomai, RT-Preempt, RT Linux etc., meet industrial field
Close the requirement of real-time.
There can be clock drift due to crystal oscillator etc. between existing each slave node and main website, so in operational process
In need to the slave station local clock speed of service carry out dynamic adjustment, to clock drift carry out dynamic compensation to guarantee each slave station
System clock it is consistent, it is complicated for operation.
There is SOME(Simple Open EtherCAT Master in the EtherCAT open source main website announced on the net) and IgH
EtherCAT Master, SOME support Windows and Linux2.6 platform, and SOME function is relatively easy;The EtherCAT of IGH
Master is based on Linux platform, and from issuing nearly 10 years so far and having carried out multiple update, function comparatively perfect is also propped up
A variety of real-time extensions such as RTAI, RT-Preempt, Xenomai are held, and support DC distribution clock, support COE, SOE, EOE etc.
Various communications protocols.
The EtherCAT main website of IGH consists of three parts, including master station module, control application program, support EtherCAT
Trawl performance module.IGH provides two kinds of trawl performance modes: generic driving and native driving, generic driving
Directly hardware can not be grasped by calling Linux network protocol stack to realize the transmitting-receiving of data packet suitable for all network interface cards
Make, real-time is relatively difficult to guarantee.Some specific network interface cards that native driving is supported for main website, can grasp bottom hardware
Make, can support the real-time extensions such as RATI, Xenomai, it is ensured that the real-time of EtherCAT main website.Based on IGH's
EtherCAT main website state machine is as shown in Figure 2.
IGH main website Open Source Code is transplanted on ARM framework for PC Platform Designing and needs to complete much to work.First
Construct the real-time system of built-in Linux;Then IGH main website is recompilated so as to operate on arm processor.
Summary of the invention
It is existing to solve the purpose of the present invention is to provide a kind of EtherCAT master-slave system based on IGH Open Framework
Real-time be difficult to guarantee, the low problem low with reliability of synchronism.
To achieve the above object, the invention provides the following technical scheme:
A kind of EtherCAT master-slave system based on IGH Open Framework, including EtherCAT main website, EtherCAT slave station and distribution
Formula clock (DC, Distributed Clock) mechanism, the EtherCAT includes multiple slave stations, is connect with EtherCAT main website
First slave station be equipped with DC mechanism so that the slave station can be used as System Clock Reference, the clock of other slave stations and main website
Using the reference clock as benchmark, make all slave stations system time having the same, substantially increases distinct device task and hold
Capable synchronism.
According to the present invention, the EtherCAT master-slave system based on IGH Open Framework further includes Linux-RTAI real-time
System, the Linux-RTAI real-time system are real-time core to be compiled in Linux real time operating system, and compiling real-time core
There is the kernel of the performance of configuration RTAI to form for configuration in the process, and the kernel of configuration is enabled to give full play to the performance of RTAI.
Further, the Linux real time operating system is the kernel and RTAI-3.9 by Linux-2.6.35.9 version
It is built-up.
Further, IGH main website is compiled in the Linux-RTAI real-time system, the trawl performance of IGH main website is selected
RTL8169, and specified RTAI real-time extension.
According to the present invention, the EtherCAT master-slave system based on IGH Open Framework further includes that built-in Linux is real-time
Kernel, the built-in Linux real-time kernel are after beating RT-Preempt patch to embedded Linux kernel, to carry out to kernel
It is formed with recompility kernel is postponed.
Further, the EtherCAT master-slave system based on IGH Open Framework further includes embedded platform main website frame
Frame, embedded platform main website frame be add in IGH main website to the support of cpsw network interface card and be transplanted to ARM platform and
At.
EtherCAT master-slave system based on IGH Open Framework of the invention, the beneficial effect is that:
1, the real-time performance of the Linux-RTAI real-time system of EtherCAT master-slave system can satisfy the requirement of EtherCAT;
2, precise synchronization may be implemented under EtherCAT main website 1ms duty cycle.
Detailed description of the invention
Fig. 1 is the hypotactic module diagram of existing EtherCAT.
Fig. 2 is the structural schematic diagram of existing EtherCAT main website state machine.
Fig. 3 is the structural schematic diagram of the EtherCAT master-slave system of the invention based on IGH Open Framework.
Fig. 4 is the schematic diagram of the treatment process of data frame of the invention.Wherein, the part A of Fig. 4 is the data of interrupt operation
The schematic diagram of the treatment process of frame, the part of Fig. 4 are the schematic diagram of the treatment process of the data frame without interrupt operation.
Fig. 5 is EtherCAT master-slave system Testing Platform.
Fig. 6 is the test result figure of the real-time core performance test of EtherCAT master-slave system.
Fig. 7 is the experiment porch that the net synchronization capability of EtherCAT master-slave system is tested.
Fig. 8 is the test result figure that the net synchronization capability of EtherCAT master-slave system is tested.
Fig. 9 A and Fig. 9 B are the slave station SYNC signal figure of EtherCAT master-slave system.
Specific embodiment
Below in conjunction with specific attached drawing, the EtherCAT master-slave system of the invention based on IGH Open Framework is done further
It is described in detail.
As shown in figure 3, a kind of EtherCAT master-slave system based on IGH Open Framework, including EtherCAT main website,
EtherCAT slave station and distributed clock (DC, Distributed Clock) mechanism, the EtherCAT includes multiple slave stations,
First slave station connecting with EtherCAT main website is equipped with DC mechanism, so that the slave station can be used as System Clock Reference,
The clock of its slave station and main website is made all slave stations system time having the same, is mentioned significantly using the reference clock as benchmark
The high synchronism of distinct device task execution.
The treatment process of 1 data frame of embodiment
The treatment process that data frame is carried out by comparison interrupt operation and without interrupt operation, determines the internal core real-time of interrupt operation
Influence, as shown in Figure 4.
The results show that interrupt operation will affect the real-time of kernel, uncertainty is introduced, so as to cause result inaccuracy.
Conclusion: it can avoid calling interrupt processing function as far as possible in EtherCAT communication process.Therefore, EtherCAT main website needs
Construct reliable and stable main website state machine.
The building of EtherCAT master-slave system of the embodiment 2 based on PC platform
In order to guarantee the real-time of system, RTL8139, RTL8169, e100, e1000 that PC machine network interface card should be supported using IGH
Deng.In addition to this also need to construct Linux-RTAI real-time system, IGH increase income main website support RTAI, RT-Preempt,
The Linux real-time extension such as Xenomai, therefore the present embodiment realizes Linux real-time extension using RTAI.The present embodiment uses
The kernel and RTAI-3.9 of Linux-2.6.35.9 version construct Linux real time operating system, and in the process of compiling real-time core
In kernel is configured, enable the kernel of configuration to give full play to the performance of RTAI.
Then, IGH main website is recompilated in the Linux-RTAI real-time system built, trawl performance is selected
RTL8169, and specified RTAI real-time extension.Configuration order is as follows:
# ./configure --enable-8139too=no \
--enable-r8169=yes --enable-rtdm=yes \
--with-rtdi-dir=/usr/realtime
The building of PC main website is completed after compiling successfully, next EtherCAT main website can be carried out on the basis of Open Source Code
Corresponding exploitation.
The building of EtherCAT master-slave system of the embodiment 3 based on embedded platform
Real-time proposals such as RTAI, Xenomai that Linux carries out dual core transformation are less perfect to the support of ARM platform, and RT-
Preempt is a kind of relatively general real-time patch, unrelated with specific implementation platform, portable stronger, without change
It is transplanted to arm processor.RT-Preempt realizes spin lock again, and IRQ interrupt handling routine is become in preemptive type
The real-time of core thread transformation Linux.After beating RT-Preempt patch to embedded Linux kernel, kernel is carried out with postponing
Recompilate kernel, construction complete built-in Linux real-time kernel.
In order to guarantee embedded platform main website real-time performance, the trawl performance for needing to modify embedded platform makes winner
Network interface card hardware can be operated by standing.It include: to avoid calling linux kernel network to the rule that network interface card carries out real-time reconstruction
Protocol stack;It avoids enabled interruption and carries out interrupt call.According to these basic principles to the trawl performance cpsw.c of AM3359 into
Row modification, remodifies the configuration file and Makefile of IGH, support of the addition to cpsw network interface card in IGH main website.
IGH main website is recompilated, configuration order is as follows:
# ./configure --enable-8139too=no \
--enable-r8169=yes --enable-rtdm=yes
The building that ARM platform completes embedded platform main website frame is transplanted to after completing the compiling of IGH main website.
The experiment porch of 4 EtherCAT master-slave system of embodiment
Experiment porch is made of EtherCAT main website and slave station, as shown in Figure 5.Mainly to the Linux-RTAI real-time system of building
Performance and the net synchronization capability of EtherCAT main website tested.
The real-time core performance test of the EtherCAT master-slave system of 5 embodiment 2 of embodiment and embodiment 3
The performance of Linux-RTAI real-time system is affected to the real-time of EtherCAT main website.RTAI provides test routine
Latency, switches, preempt performance of user control and kernel spacing can be tested, wherein to EtherCAT
Main website be affected be system latency performance.System is applied and is loaded, makes system operation under full capacity, test system
The response time of system.Pass through LTP(Linux Test project) apply to system and load, including 5 calculation procedures, in 5
Read-write process, 5 file write process, 5 synchronized process are deposited, the CPU and memory for making system were close to full load condition, by 2 hours
Test, as a result as shown in Figure 6.Under conditions of close to fully loaded, the maximum response time of Linux+RTAI real-time system is
10053ns has good real-time, can satisfy the requirement of EtherCAT main website.
Conclusion: the real-time performance of the EtherCAT master-slave system of embodiment 2 and embodiment 3 can satisfy wanting for EtherCAT
It asks.
The test of the net synchronization capability of 6 embodiment 2 of embodiment and embodiment 3
In multi-axis control system, the net synchronization capability of each axis will affect the control precision of whole system, the DC machine of EtherCAT
System can guarantee the consistent of system clock between each slave station, can be realized the synchronization accuracy of the clock of 1us.EtherCAT is synchronous
Property realize key be main website periodically the system clock of slave station is synchronized with system clock.Using design
EtherCAT main website and two EtherCAT slave stations are tested, and the net synchronization capability of slave station, experimental system are tested by oscillograph
As shown in Figure 7.
Activate slave station distribution clock, be arranged slave station synchronous mode be periodic synchronous mode, synchronizing cycle 1ms,
Slave station pulse width is 500us.Read slave station ESC time difference register (0x092C:0x092F), the local zone time of slave station with
The difference of reference clock is as shown in Figure 8.
The results show that deviation, between ± 5ns, the clock jitter between slave station is smaller, it is synchronous that EtherCAT can be reached
The requirement of performance.
The SYNC signal of slave station ESC is connected on microcontroller, and SYNC pulse can synchronize the interruption of trigger controller after arriving
To guarantee the synchronism between slave station;Using the SYNC0 signal of oscilloscope measurement slave station, as a result as shown in fig. 9 a and fig. 9b.
The results show that the SYNC signal of slave station can reach precise synchronization, the requirement of multi-axis synchronized control can satisfy.
Conclusion: the EtherCAT master-slave system of embodiment 2 and embodiment 3 may be implemented accurate same under 1ms duty cycle
Step.
In conclusion the EtherCAT master-slave system based on IGH Open Framework that the present invention constructs, respectively in PC platform and
ARM platform construction real-time system;Browsing real-time data is carried out to the Linux-RTAI real-time system of building, real-time performance can satisfy
The requirement of EtherCAT;And synchronizing property of EtherCAT main website is tested, it may be implemented under 1ms duty cycle accurate same
Step.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of art technology
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (6)
1. a kind of EtherCAT master-slave system based on IGH Open Framework, which is characterized in that including EtherCAT main website,
EtherCAT slave station and distributed clock mechanism, the EtherCAT include multiple slave stations, connect with EtherCAT main website
One slave station is equipped with the distributed clock mechanism that can be used as System Clock Reference.
2. as described in claim 1 based on the EtherCAT master-slave system of IGH Open Framework, which is characterized in that further include
Linux-RTAI real-time system, the Linux-RTAI real-time system be real-time core is compiled in Linux real time operating system, and
There is the kernel of the performance of configuration RTAI to form for configuration during compiling real-time core.
3. as claimed in claim 2 based on the EtherCAT master-slave system of IGH Open Framework, which is characterized in that the Linux
Real time operating system is built-up by the kernel and RTAI-3.9 of Linux-2.6.35.9 version.
4. as claimed in claim 2 based on the EtherCAT master-slave system of IGH Open Framework, which is characterized in that described
IGH main website is compiled in Linux-RTAI real-time system, the trawl performance of IGH main website is RTL8169, the real-time extension of IGH main website
For RTAI.
5. as described in claim 1 based on the EtherCAT master-slave system of IGH Open Framework, which is characterized in that further include embedding
Enter formula Linux real-time kernel, the built-in Linux real-time kernel is to beat RT-Preempt patch to embedded Linux kernel
Afterwards, to kernel carry out with postpone recompilate kernel form.
6. as claimed in claim 5 based on the EtherCAT master-slave system of IGH Open Framework, which is characterized in that further include embedding
Ru Shi platform main website frame, embedded platform main website frame are support and shifting of the addition to cpsw network interface card in IGH main website
ARM platform is planted to form.
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Cited By (5)
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CN111061225A (en) * | 2019-12-17 | 2020-04-24 | 上海维宏电子科技股份有限公司 | Method for realizing real-time control processing of numerical control system based on Xenomai real-time kernel |
CN111478834A (en) * | 2020-03-25 | 2020-07-31 | 武汉迈信电气技术有限公司 | EtherCAT master station synchronization method based on non-real-time system |
CN111885160A (en) * | 2020-07-23 | 2020-11-03 | 中国航发控制系统研究所 | Gas turbine control software time sequence task scheduling method based on network communication |
CN113064577A (en) * | 2021-03-09 | 2021-07-02 | 北京工业大学 | Linux real-time transformation method based on multi-core ARM |
CN114666185A (en) * | 2022-03-30 | 2022-06-24 | 合肥哈工图南智控机器人有限公司 | Improved EtherCAT communication master station method and system based on IGH open source framework |
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Publication number | Priority date | Publication date | Assignee | Title |
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CN111061225A (en) * | 2019-12-17 | 2020-04-24 | 上海维宏电子科技股份有限公司 | Method for realizing real-time control processing of numerical control system based on Xenomai real-time kernel |
CN111478834A (en) * | 2020-03-25 | 2020-07-31 | 武汉迈信电气技术有限公司 | EtherCAT master station synchronization method based on non-real-time system |
CN111478834B (en) * | 2020-03-25 | 2022-04-29 | 武汉迈信电气技术有限公司 | EtherCAT master station synchronization method based on non-real-time system |
CN111885160A (en) * | 2020-07-23 | 2020-11-03 | 中国航发控制系统研究所 | Gas turbine control software time sequence task scheduling method based on network communication |
CN111885160B (en) * | 2020-07-23 | 2022-07-01 | 中国航发控制系统研究所 | Gas turbine control software time sequence task scheduling method based on network communication |
CN113064577A (en) * | 2021-03-09 | 2021-07-02 | 北京工业大学 | Linux real-time transformation method based on multi-core ARM |
CN114666185A (en) * | 2022-03-30 | 2022-06-24 | 合肥哈工图南智控机器人有限公司 | Improved EtherCAT communication master station method and system based on IGH open source framework |
CN114666185B (en) * | 2022-03-30 | 2024-02-23 | 合肥哈工图南智控机器人有限公司 | EtherCAT communication master station method and system based on IGH open source framework improvement |
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