CN110308933B - Access instruction determining method, device and storage medium - Google Patents

Access instruction determining method, device and storage medium Download PDF

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CN110308933B
CN110308933B CN201910337918.8A CN201910337918A CN110308933B CN 110308933 B CN110308933 B CN 110308933B CN 201910337918 A CN201910337918 A CN 201910337918A CN 110308933 B CN110308933 B CN 110308933B
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accessed
address
access
aligned
instruction
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CN110308933A (en
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张利霞
余银
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Longxin Zhongke Hefei Technology Co ltd
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Longxin Zhongke Hefei Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824Operand accessing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution

Abstract

The invention provides an access instruction determining method, an access instruction determining device and a storage medium, wherein the method comprises the following steps: receiving a request instruction input by a user, wherein the request instruction is used for indicating whether the initial address of a first address to be accessed is uncertain to be aligned or not, and the first address to be accessed is any address to be accessed in a program; acquiring the number of addresses to be accessed corresponding to the initial address in the program according to the request instruction and the program; and determining an access instruction used by the program to access the first address to be accessed according to the number and the length of the data to be accessed corresponding to the first address to be accessed. The access instruction determining method, the device and the storage medium provided by the invention can reasonably determine the access instruction for accessing the initial address of the address to be accessed in a scene that whether the initial address of the address to be accessed is aligned or not, thereby improving the performance of a program optimized by multimedia instructions.

Description

Access instruction determining method, device and storage medium
Technical Field
The present invention relates to computer technologies, and in particular, to a method and an apparatus for determining an access instruction, and a storage medium.
Background
In the prior art, multimedia instructions of computers support word-based integer parallel operations as well as double-word-based integer parallel operations. If the computer uses a floating-Point register of a floating-Point Unit (FPU) to implement parallel operation of integers, the computer needs to access the integers to be computed in parallel from a memory by using an access instruction for accessing floating-Point type data. The access instruction for accessing the floating point type data is divided into an aligned access instruction and a non-aligned access instruction, wherein the aligned access instruction is used for accessing the memory address with the aligned initial address, and the non-aligned access instruction is used for accessing the memory address with the non-aligned initial address. When a computer accesses an integer to be parallel-computed from a memory by using an access instruction for accessing floating-point type data, if a start address of a memory address (to-be-accessed address for short) where the to-be-accessed data is located is an aligned start address, the computer can access the integer by using an aligned access instruction. If the starting address of the address to be accessed is a non-aligned starting address, the access needs to be performed through two non-aligned access instructions.
At present, when a developer is used for accessing a multimedia instruction of an integer which needs to be computed in parallel from a memory in an optimization program, the developer cannot accurately determine which access instruction is used for accessing an address to be accessed in a scene in which whether the starting addresses of the address to be accessed are aligned or not. If a developer mistakenly applies an access instruction for accessing the aligned data to a memory address with a non-aligned access start address, the program operation fails or the program performance is significantly degraded. Because the processing time of two non-aligned access instructions is much longer than that of a single aligned access instruction, if a developer directly uses the non-aligned access instructions, the performance of the program is also reduced.
Therefore, for a scenario in which it cannot be determined whether the start addresses of the addresses to be accessed are aligned, how to determine the access instruction for accessing the start address of the address to be accessed is an urgent problem to be solved.
Disclosure of Invention
The invention provides an access instruction determining method, an access instruction determining device and a storage medium, which are used for solving the technical problem of how to determine an access instruction for accessing a starting address of an address to be accessed in a scene in which whether the starting address of the address to be accessed is aligned or not can not be determined in the prior art.
A first aspect of the present invention provides an access instruction determining method, including:
receiving a request instruction input by a user, wherein the request instruction is used for indicating whether the initial address of a first address to be accessed is uncertain to be aligned or not, and the first address to be accessed is any address to be accessed in a program;
acquiring the number of addresses to be accessed corresponding to the initial address in the program according to the request instruction and the program;
and determining an access instruction used by the program to access the first address to be accessed according to the number and the length of the data to be accessed corresponding to the first address to be accessed.
In a possible implementation manner, the determining, according to the number and the length of the data to be accessed corresponding to the first address to be accessed, the access instruction used by the program to access the first address to be accessed includes:
if the number is 1, determining that the first address to be accessed is accessed by using a first type of access interface corresponding to the length of the data to be accessed, wherein the first type of access interface comprises a non-aligned access instruction and an aligned access instruction, and when the first address to be accessed is accessed by using the first type of access interface, the first type of access interface selects the access instruction used for accessing the first address to be accessed according to the length of the data to be accessed and the initial address.
In a possible implementation manner, the determining, according to the number and the length of the data to be accessed corresponding to the first address to be accessed, the access instruction used by the program to access the first address to be accessed includes:
if the number is larger than 1, determining whether the initial addresses are aligned according to the length of the data to be accessed and the initial addresses;
and determining an access instruction used for accessing the first address to be accessed according to whether the starting address is aligned and the length of the data to be accessed.
In a possible implementation manner, the determining, according to whether the start address is aligned and the length of the data to be accessed, an access instruction used for accessing the first address to be accessed includes:
determining a second type of access interface used for accessing the first address to be accessed according to whether the starting address is aligned and the length of the data to be accessed, wherein the second type of access interface comprises: and accessing the first address to be accessed by using an access instruction, wherein the access instruction used for accessing the first address to be accessed is an aligned access instruction or a non-aligned access instruction.
In a possible implementation manner, after determining, according to the number and the length of the data to be accessed corresponding to the first address to be accessed, an access instruction used by the program to access the first address to be accessed, the method further includes:
and updating the multimedia instructions of the program according to the determined access instructions used for accessing the first address to be accessed.
A second aspect of the present invention provides an access instruction determination apparatus, including:
the system comprises a receiving module, a judging module and a processing module, wherein the receiving module is used for receiving a request instruction input by a user, the request instruction is used for indicating whether the initial address of a first address to be accessed is uncertain to be aligned or not, and the first address to be accessed is any address to be accessed in a program;
an obtaining module, configured to obtain, according to the request instruction and the program, the number of addresses to be accessed in the program, where the addresses correspond to the start address;
and the determining module is used for determining an access instruction used by the program to access the first address to be accessed according to the number and the length of the data to be accessed corresponding to the first address to be accessed.
In a possible implementation manner, the determining module is specifically configured to determine, when the number is 1, to use a first type of access interface corresponding to the length of the data to be accessed to access the first address to be accessed, where the first type of access interface includes a non-aligned access instruction and an aligned access instruction, and when the first type of access interface is used to access the first address to be accessed, the first type of access interface selects an access instruction used to access the first address to be accessed according to the length of the data to be accessed and the start address.
In a possible implementation manner, the determining module is specifically configured to determine, when the number is greater than 1, whether the start addresses are aligned according to the length of the data to be accessed and the start address; and determining an access instruction used for accessing the first address to be accessed according to whether the starting address is aligned or not and the length of the data to be accessed.
In a possible implementation manner, the determining module is specifically configured to determine, according to whether the start addresses are aligned and the length of the data to be accessed, a second type of access interface used for accessing the first address to be accessed, where the second type of access interface includes: and accessing the first address to be accessed by using an access instruction, wherein the access instruction used for accessing the first address to be accessed is an aligned access instruction or a non-aligned access instruction.
In a possible embodiment, the apparatus further comprises:
and the updating module is used for updating the multimedia instruction of the program according to the determined access instruction used for accessing the first address to be accessed after the determining module determines the access instruction used for accessing the first address to be accessed by the program according to the quantity and the length of the data to be accessed corresponding to the first address to be accessed.
A third aspect of the present invention provides an access instruction determination apparatus, including: at least one processor and memory;
the memory stores computer-executable instructions; the at least one processor executes computer-executable instructions stored by the memory to perform the method of any of the first aspects.
A fourth aspect of the invention provides a computer readable storage medium having stored thereon program instructions which, when executed by a processor, implement the method of any of the first aspects.
According to the access instruction determining method, the access instruction determining device and the storage medium provided by the invention, for a scene that whether the initial addresses of the addresses to be accessed are aligned or not cannot be determined, the access instruction used by the program for accessing the addresses to be accessed can be reasonably determined according to the number of the addresses to be accessed corresponding to the same initial address in the program and the length of the data to be accessed corresponding to the addresses to be accessed, so that the performance of the program optimized by the multimedia instruction is improved, and excessive time can be avoided for judging the access instruction used for accessing the addresses to be accessed.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flowchart of an access instruction determination method according to the present invention;
FIG. 2 is a flow chart illustrating another method for determining access commands according to the present invention;
fig. 3 is a schematic structural diagram of an access instruction determining apparatus according to the present invention;
fig. 4 is a schematic structural diagram of another access instruction determination apparatus provided in the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
A variable of a basic data type located in memory is considered to be naturally aligned if the starting address of its memory address can be divided by its length. This variable may be referred to as alignment data and vice versa as misalignment data. Accordingly, the start address of the aligned data may be referred to as an aligned start address, and the start address of the misaligned data may be referred to as a non-aligned start address.
It should be understood that in embodiments of the present invention, the terms aligned start address and alignment data may be equivalent, both used to characterize the data as being naturally aligned. The terms non-aligned start address and misaligned data may be equivalent, both used to characterize the data as non-aligned.
In the prior art, for a computer (hereinafter, referred to as a computer for short) using a Microprocessor with interlocked pipeline stages (MIPS) architecture, a multimedia instruction of the computer supports parallel operations of integer based on words and parallel operations of integer based on double words. The parallel operation here means that arithmetic processing is performed on a plurality of integers at the same time. It should be understood that the word referred to herein is 32 bits (i.e., four bytes) in length and that a doubleword is 64 bits (i.e., eight bytes) in length.
If the computer uses a floating-Point register of a floating-Point Unit (FPU) to implement parallel operation of integers, the computer needs to access the integers to be computed in parallel from a memory by using an access instruction for accessing floating-Point type data. The following describes how to access an integer requiring parallel computation from a memory using an access instruction for accessing floating-point type data, specifically:
the floating point type data includes two types of floating point numbers of single precision and double precision, wherein the floating point number of single precision is represented by four bytes, and the floating point number of double precision is represented by eight bytes. That is, a word of four bytes and a double word of eight bytes may be accessed using an access instruction that accesses floating point type data.
The access instructions used to access the four byte word and the eight byte doubleword may be as shown in table 1 below:
TABLE 1
Figure BDA0002039766790000051
Figure BDA0002039766790000061
In an embodiment of the present invention, the first write instruction, the first read instruction, the third write instruction, and the third read instruction may be referred to as an aligned access instruction. The second write instruction, the second read instruction, the fourth write instruction, and the fourth read instruction may be referred to as non-aligned access instructions. That is, the aligned access instruction is used to access a memory address whose starting address is aligned, and the non-aligned access instruction is used to access a memory address whose starting address is non-aligned.
As can be seen from table 1, when the computer accesses an integer to be parallel-computed from the memory by using the access instruction for accessing floating point type data, if the start address of the memory address where the data to be accessed is located (referred to as the address to be accessed for short) is the aligned start address, the data can be accessed by using an aligned access instruction. For example, a third read instruction. If the starting address of the address to be accessed is a non-aligned starting address, the access needs to be performed through two non-aligned access instructions. For example, second read 1/second read 2.
At present, when a developer is used for accessing a multimedia instruction of an integer requiring parallel computation from a memory in an optimization program, the developer may discriminate whether a start address of an address to be accessed is an aligned start address (i.e., discriminate whether data to be accessed is aligned data) based on an access scenario, thereby determining which access instruction is used to access the address to be accessed and perform an access operation on the data to be accessed.
For a scene that cannot determine whether the starting addresses of the addresses to be accessed are aligned, a developer cannot accurately determine which access instruction is used to access the addresses to be accessed. If a developer mistakenly applies an access instruction for accessing aligned data to a memory address with a non-aligned access start address, the program may fail to run or the program performance may be significantly degraded (for example, the performance of the program may be degraded by more than 10 times). Since the processing time of two non-aligned access instructions is much longer than that of a single aligned access instruction (for example, the processing time of two non-aligned access instructions is about five times longer than that of a single aligned access instruction), if a developer directly uses the non-aligned access instruction, the program performance may also be reduced. In general, the starting addresses of most multimedia instruction optimized addresses are aligned, and if all multimedia instruction optimized access operations are implemented by two pairs of non-aligned access instructions, the running performance of the multimedia instruction optimized program is low. Therefore, for a multimedia instruction applied to a program of a "computer using MIPS architecture", how to determine an access instruction for accessing an address to be accessed is an urgent problem for a scenario in which it is not possible to determine whether a start address of the address to be accessed is aligned.
In view of the above, the present invention provides an access instruction determination method for solving the above technical problem. The execution subject of the access instruction determining method provided by the present invention may be an access instruction determining device, which may be a driver, program code software, or a medium storing related execution codes, such as a usb disk; alternatively, the access instruction determining device may also be a physical device integrated or installed with relevant execution codes, for example, a chip, a Micro Controller Unit (MCU), a computer, or the like.
It should be understood that the memory address, the address to be accessed, and the start address referred to in the embodiments of the present invention all refer to addresses in the memory, and are not described in detail herein.
In addition, the access instruction determining method provided in the embodiment of the present invention includes, but is not limited to, a computer using an MIPS architecture, and may also be applied to a computer using another architecture, which has the above problem, and details thereof are not described again.
The technical solution of the present invention will be described in detail below with specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
Fig. 1 is a schematic flowchart of an access instruction determining method according to the present invention. The execution subject of the access instruction determining method provided by the invention can be an access instruction determining device, and can also be electronic equipment integrated with the access instruction determining device, and the like. The following application documents describe the method of the present application by taking an execution subject as an electronic device (simply referred to as an electronic device) integrated with an access instruction determination device. As shown in fig. 1, the method includes:
s101, receiving a request instruction input by a user, wherein the request instruction is used for indicating whether the initial address of a first address to be accessed is uncertain to be aligned or not, and the first address to be accessed is any address to be accessed in a program.
In this embodiment, when the developer is used in the optimization program to access the multimedia instruction of "the integer to be computed in parallel from the memory", if a scenario that it cannot be determined whether the start addresses of the addresses to be accessed are aligned is encountered, the developer may input a request instruction to the electronic device to indicate that it is not determined whether the start addresses of the addresses to be accessed (i.e., the first addresses to be accessed) are aligned.
As a possible implementation manner, the request instruction may indicate that whether the start address of the first to-be-accessed address is not determined to be aligned by carrying the first to-be-accessed address. Or, the request instruction may indicate whether the start address of the uncertain first address to be accessed is aligned by carrying the first address to be accessed and indication information indicating whether the start address of the uncertain first address to be accessed is aligned.
S102, acquiring the number of addresses to be accessed corresponding to the initial address in the program according to the request instruction and the program.
In this embodiment, the electronic device may obtain the program of the multimedia instruction to be optimized, for example, a developer may input the program into the electronic device in advance, or the developer may input the program into the electronic device along with the request instruction, or the electronic device obtains the program from another device (for example, a database server, etc.) in advance, or the request instruction carries an identifier of the program, so that the electronic device obtains the program from another device according to the identifier of the program.
Therefore, after receiving a request instruction input by a user, the electronic device may obtain the number of addresses to be accessed in the program corresponding to the start address according to the request instruction and the program.
For example, the program includes an address 1 to be accessed, an address 2 to be accessed, an address 3 to be accessed, and an address 4 to be accessed. The starting addresses of the address to be accessed 1, the address to be accessed 2 and the address to be accessed 4 are the same, but the offset of the starting addresses is different. Assuming that a developer sends a request instruction to the electronic device, indicating that whether the start addresses of the addresses 1 to be accessed are aligned cannot be determined, in this case, the electronic device may determine, according to the request instruction and the program, that the number of addresses to be accessed in the program corresponding to the start address of the address 1 to be accessed is 3.
S103, determining an access instruction used by the program to access the first address to be accessed according to the number and the length of the data to be accessed corresponding to the first address to be accessed.
It should be understood that the data to be accessed referred to herein is the data to be accessed to the first address to be accessed.
As a possible implementation manner, the electronic device determines, according to the number and the length of the data to be accessed corresponding to the first address to be accessed, the access instruction used by the program to access the first address to be accessed, may include the following several cases:
in the first case: if the number is 1, determining that the first address to be accessed is accessed by using a first type of access interface corresponding to the length of the data to be accessed, wherein the first type of access interface comprises a non-aligned access instruction and an aligned access instruction, and when the first address to be accessed is accessed by using the first type of access interface, the first type of access interface selects the access instruction used for accessing the first address to be accessed according to the length of the data to be accessed and the initial address.
And if the data to be accessed is a word, namely the length of the data to be accessed is 32 bits, determining that the first address to be accessed is accessed by using a first type of access instruction for accessing the 32-bit word. The first type of access instruction may be a first type of write instruction if the access operation is a write operation. The first type of access instruction may be a first type of read instruction if the access operation is a read operation.
And if the data to be accessed is a double word, namely the length of the data to be accessed is 64 bits, determining that the first address to be accessed is accessed by using a first type of access instruction for accessing the 64-bit double word. The first type of access instruction may be a first type of write instruction if the access operation is a write operation. The first type of access instruction may be a first type of read instruction if the access operation is a read operation.
As mentioned above, a word is 32 bits long and a dword is 64 bits long. In addition, if the start address of the memory address storing a variable is divisible by the length of the variable, the variable is considered to be naturally aligned. Therefore, the first type of access interface may determine whether the start address of the first address to be accessed is aligned by determining whether the start address of the first address to be accessed is divisible by the length of the data to be accessed, and further determine an access instruction used to access the first address to be accessed according to whether the start address of the first address to be accessed is aligned and the length of the data to be accessed. That is, the first type of access interface includes an instruction to determine whether a start address of the first address to be accessed is aligned, and an aligned access instruction and a non-aligned access instruction.
For example, the remainder obtained by dividing the start address of the first to-be-accessed address by the length of the data to be accessed may be used to determine whether the start address of the first to-be-accessed address is aligned. If the remainder is 0, determining that the starting address of the first address to be accessed is aligned, namely, using an aligned access instruction in the interface to access the first address to be accessed. If the remainder is greater than 0, determining that the starting address of the first address to be accessed is not aligned, namely, using a non-aligned access instruction in the interface to access the first address to be accessed.
For another example, for a word with a length of 32 bits, if the lower 2 bits of the start address of the first address to be accessed are 0, the start address of the first address to be accessed can be divided by 32. Therefore, the last 2 bits of the start address of the first address to be accessed may be bitwise and-ed with a binary number (11) of 3, and if the result is 00, it is determined that the start address of the first address to be accessed is aligned, i.e., the first address to be accessed is accessed using an aligned access instruction in the interface. If the result is not 00 (e.g., 01, or 10 or 11), it is determined that the starting address of the first to-be-accessed address is not aligned, i.e., the first to-be-accessed address is accessed using a non-aligned access instruction in the interface.
Accordingly, for a word of length 64 bits, if the lower 3 bits of the start address of the first address to be accessed are 0, the start address of the first address to be accessed can be divided by 64. Therefore, the last 3 bits of the start address of the first address to be accessed may be bitwise and-ed with a binary number of 7 (111), and if the result is 000, it is determined that the start address of the first address to be accessed is aligned, i.e., the first address to be accessed is accessed using an aligned access instruction in the interface. If the result is not 000, it is determined that the starting address of the first to-be-accessed address is not aligned, i.e., the first to-be-accessed address is accessed using a non-aligned access instruction in the interface.
In the second case: if the number is greater than 1, the electronic device may determine, according to the length of the data to be accessed and the start address of the first address to be accessed, whether the start address of the first address to be accessed is aligned, and further determine, according to whether the start address of the first address to be accessed is aligned and the length of the data to be accessed, an access instruction used for accessing the first address to be accessed.
For the description how the electronic device determines whether the start address of the first address to be accessed is aligned according to the length of the data to be accessed and the start address of the first address to be accessed, refer to the above description of how the first type of access interface determines whether the start address of the first address to be accessed is aligned.
After determining whether the start address of the first address to be accessed is aligned, the electronic device may determine an access instruction used for accessing the first address to be accessed according to whether the start address of the first address to be accessed is aligned and the length of the data to be accessed. For example, if the starting address of the first to-be-accessed address is aligned, the electronic device determines to access the first to-be-accessed address using an aligned access instruction corresponding to the length of the data to be accessed. And if the starting address of the first address to be accessed is not aligned, determining that the first address to be accessed is accessed by using a non-aligned access instruction corresponding to the length of the data to be accessed.
In some embodiments, the above-mentioned aligned access instruction or non-aligned access instruction may also be implemented by an access interface, and in this scenario, in order to distinguish from the above-mentioned first type of access interface including both non-aligned access instructions and aligned access instructions, an access interface including only non-aligned access instructions or aligned access instructions is referred to herein as a second type of access interface. In this implementation, the electronic device may determine, according to whether the start addresses are aligned and the length of the data to be accessed, a second type of access interface used for accessing the first address to be accessed.
By the method for packaging the access instruction to the access interface, when a developer is used for accessing the multimedia instruction of the integer needing parallel computation from the memory in the optimization program, the multimedia instruction in the program can be optimized directly through the determined access interface without writing the access instruction again, and the problem that the access instruction in the program is wrong due to manual writing errors, and the performance of the program is reduced is solved.
By the above manner, for a scene in which it cannot be determined whether the start address of the first address to be accessed is aligned, when the number of addresses to be accessed corresponding to the start address of the first address to be accessed in the program is greater than 1, the electronic device may further combine the length of the data to be accessed and the start address of the first address to be accessed to discriminate whether the start address of the first address to be accessed is aligned, so as to accurately determine the access instruction used for accessing the first address to be accessed. Therefore, after the access instruction is used for updating the program subsequently, the performance of the program optimized by the multimedia instruction can be improved, and the problem that the performance of the program is reduced due to misuse of the access instruction is avoided. Meanwhile, by determining a plurality of access instructions used by the address to be accessed using the starting address at one time, the efficiency of optimizing the multimedia instruction can be improved. And for a scenario in which the number of addresses to be accessed corresponding to the start address of the first address to be accessed in the program is 1 (that is, only when whether the start address of the first address to be accessed is aligned is uncertain), the electronic device may directly determine to use the access interface including the determining action to access the first address to be accessed, so as to avoid spending too much time on determining the access instruction used for accessing the first address to be accessed.
Furthermore, after determining the access instruction used by the program to access the first address to be accessed, the electronic device may update the multimedia instruction of the program according to the access instruction, so as to optimize the multimedia instruction of the program, thereby improving the performance of the program after the multimedia instruction optimization.
The access instruction determination method provided by the present invention is described in detail below by a specific example. It is assumed that in this example, a first type of access interface and a second type of access interface are defined as shown in table 2 below, specifically:
TABLE 2
Figure BDA0002039766790000121
Figure BDA0002039766790000131
It should be understood that the name of the access instruction is only an illustration, and for convenience of subsequent reference, the name of the access instruction is not limited by the present invention.
With reference to the first type access interface and the second type access interface shown in table 2, how to determine an access instruction for accessing an address to be accessed in a scenario where it cannot be determined whether the start address of the address to be accessed is aligned is schematically described below. Fig. 2 is a flowchart illustrating another access instruction determination method according to the present invention. As shown in fig. 2, the method includes:
s201, receiving a request instruction input by a user, wherein the request instruction is used for indicating whether the initial address of a first address to be accessed is uncertain to be aligned or not, and the first address to be accessed is any address to be accessed in a program.
S202, judging whether the initial address of the first address to be accessed is aligned or not according to the request instruction. If not, executing S203, and if so, executing S212.
And if the request instruction is used for indicating that whether the initial address of the first address to be accessed is not determined to be aligned, determining whether the initial address of the first address to be accessed is aligned. And if the request instruction is used for indicating that the starting address of the first address to be accessed is aligned, determining that the starting address of the first address to be accessed is aligned.
S203, acquiring the number of addresses to be accessed corresponding to the initial address in the program.
And S204, judging whether the number is more than 1. If so, S205 is executed, and if not, S213 is executed.
S205, judging whether the length of the data to be accessed is 32 bits. If so, S206 is executed, and if not, S209 is executed.
S206, judging whether the last 2 bits of the initial address of the first address to be accessed are 0. If so, it indicates that the start address of the first to-be-accessed address is aligned, then S207 is executed, and if not, it indicates that the start address of the first to-be-accessed address is not aligned, then S208 is executed.
S207, determining that the first address to be accessed is accessed by using a second type of access interface for accessing the 32-bit word, wherein the second type of access interface comprises an alignment access instruction corresponding to the 32-bit word.
That is, it is determined to access the first to-be-accessed address using the second type of aligned read interface 32 access interface or the second type of aligned write interface 32 access interface.
S208, determining that the first address to be accessed is accessed by using a second type of access interface for accessing the 32-bit word, wherein the second type of access interface comprises a non-aligned access instruction corresponding to the 32-bit word.
That is, it is determined to access the first to-be-accessed address using the second type of non-aligned read interface 32 access interface or the second type of non-aligned write interface 32 access interface.
S209, judging whether the last 3 bits of the initial address of the first address to be accessed are 0. If so, it indicates that the start address of the first to-be-accessed address is aligned, then S210 is executed, and if not, it indicates that the start address of the first to-be-accessed address is not aligned, then S211 is executed.
S210, determining that the first address to be accessed is accessed by using a second type of access interface for accessing the 64-bit double word, wherein the second type of access interface comprises an alignment access instruction corresponding to the 64-bit double word.
That is, it is determined to access the first to-be-accessed address using the second type of aligned read interface 64 access interface or the second type of aligned write interface 64 access interface.
S211, determining that the first address to be accessed is accessed by using a second type of access interface for accessing the 64-bit double word, wherein the second type of access interface comprises a non-aligned access instruction corresponding to the 64-bit double word.
That is, it is determined to access the first to-be-accessed address using the second type of non-aligned read interface 64 access interface or the second type of non-aligned write interface 64 access interface.
S212, determining that the first address to be accessed is accessed by using a second type of access interface corresponding to the length of the data to be accessed, wherein the second type of access interface comprises an alignment access instruction corresponding to the length of the data to be accessed.
That is, it is determined to access the first address to be accessed using the second type of aligned read interface 32 access interface or the second type of aligned write interface 32 access interface or the second type of aligned read interface 64 access interface or the second type of aligned write interface 64 access interface.
S213, determining that the first address to be accessed is accessed by using the first type of access interface corresponding to the length of the data to be accessed.
That is, it is determined to access the first address to be accessed using the first type read interface 64 access interface or the first type write interface 64 access interface or the first type read interface 32 access interface or the first type write interface 32 access interface.
As a possible implementation manner, the method shown in fig. 2 may be packaged as an access instruction function interface, so that a developer may call the access instruction function interface in the process of performing multimedia instruction optimization on a program, so as to find a program data access problem and accurately identify an access interface required to be used for each address to be accessed by calling the access function interface, thereby updating a multimedia instruction of the program using a correct access interface, so as to improve the performance of the program after the multimedia instruction optimization.
The access instruction determining method provided by the invention can reasonably determine the access instruction used by the program to access the address to be accessed according to the number of the addresses to be accessed corresponding to the same initial address in the program and the length of the data to be accessed corresponding to the address to be accessed for the scene that whether the initial addresses of the addresses to be accessed are aligned or not, thereby improving the performance of the program optimized by the multimedia instruction and avoiding the excessive time spent on judging the access instruction used for accessing the address to be accessed.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Fig. 3 is a schematic structural diagram of an access instruction determining apparatus according to the present invention. The access instruction determination means may implement part or all of the electronic device by software, hardware, or a combination of both. As shown in fig. 3, the access instruction determining means may include: a receiving module 11, an obtaining module 12 and a determining module 13. Wherein the content of the first and second substances,
a receiving module 11, configured to receive a request instruction input by a user, where the request instruction is used to indicate that whether a start address of a first address to be accessed is uncertain and aligned, and the first address to be accessed is any address to be accessed in a program;
an obtaining module 12, configured to obtain, according to the request instruction and the program, the number of addresses to be accessed in the program, where the addresses correspond to the start address;
a determining module 13, configured to determine, according to the number and the length of the data to be accessed corresponding to the first address to be accessed, an access instruction used by the program to access the first address to be accessed.
Optionally, the determining module 13 is specifically configured to determine, when the number is 1, to use a first type of access interface corresponding to the length of the data to be accessed to access the first address to be accessed, where the first type of access interface includes a non-aligned access instruction and an aligned access instruction, and when the first type of access interface is used to access the first address to be accessed, the first type of access interface selects the access instruction used to access the first address to be accessed according to the length of the data to be accessed and the start address.
Or, the determining module 13 is specifically configured to determine, when the number is greater than 1 and when the number is greater than 1, whether the start addresses are aligned according to the length of the data to be accessed and the start address; and determining an access instruction used for accessing the first address to be accessed according to whether the starting address is aligned or not and the length of the data to be accessed. For example, according to whether the start address is aligned or not and the length of the data to be accessed, determining a second type of access interface used for accessing the first address to be accessed, where the second type of access interface includes: and accessing the first address to be accessed by using an access instruction, wherein the access instruction used for accessing the first address to be accessed is an aligned access instruction or a non-aligned access instruction.
With continuing reference to fig. 3, optionally, in some embodiments, the apparatus may further comprise: the module 14 is updated. Wherein the content of the first and second substances,
an updating module 14, configured to, after the determining module 13 determines, according to the number and the length of the to-be-accessed data corresponding to the first to-be-accessed address, an access instruction used by the program to access the first to-be-accessed address, update the multimedia instruction of the program according to the determined access instruction used to access the first to-be-accessed address.
The access instruction determining apparatus provided by the present invention may implement the above method embodiments, and the implementation principle and technical effect are similar, which are not described herein again.
Fig. 4 is a schematic structural diagram of another access instruction determination apparatus provided in the present invention. As shown in fig. 4, the access instruction determining means may include: at least one processor 21 and a memory 22. Fig. 4 shows an access instruction determination apparatus, for example, a processor, in which,
and a memory 22 for storing a program. In particular, the program may include program code comprising computer operating instructions. The memory 22 may comprise high-speed RAM memory, and may also include non-volatile memory (non-volatile memory), such as at least one disk memory.
The processor 21 is configured to execute the computer-executable instructions stored in the memory 22 to implement the access instruction determination method in the foregoing embodiments, and the implementation principle and the technical effect are similar, and are not described herein again.
The processor 21 may be a Central Processing Unit (CPU), an Application Specific Integrated Circuit (ASIC), or one or more Integrated circuits configured to implement embodiments of the present invention.
Alternatively, in a specific implementation, if the communication interface, the memory 22 and the processor 21 are implemented independently, the communication interface, the memory 22 and the processor 21 may be connected to each other through a bus and perform communication with each other. The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (EISA) bus, or the like. The buses may be divided into address buses, data buses, control buses, etc., but do not represent only one bus or one type of bus.
Alternatively, in a specific implementation, if the communication interface, the memory 22 and the processor 21 are integrated on a chip, the communication interface, the memory 22 and the processor 21 may complete the same communication through an internal interface.
The present invention also provides a computer-readable storage medium, which may include: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes. Specifically, the computer-readable storage medium stores therein program instructions for the method in the above-described embodiment.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (12)

1. An access instruction determination method, the method comprising:
receiving a request instruction input by a user, wherein the request instruction is used for indicating whether the initial address of a first address to be accessed is uncertain to be aligned or not, and the first address to be accessed is any address to be accessed in a program;
acquiring the number of addresses to be accessed, which are the same as the initial address of the first address to be accessed, in the program according to the request instruction and the program;
and determining an access instruction used by the program to access the first address to be accessed according to the number and the length of the data to be accessed corresponding to the first address to be accessed.
2. The method according to claim 1, wherein the determining, according to the number and the length of the data to be accessed corresponding to the first address to be accessed, the access instruction used by the program to access the first address to be accessed includes:
if the number is 1, determining that the first address to be accessed is accessed by using a first type of access interface corresponding to the length of the data to be accessed, wherein the first type of access interface comprises a non-aligned access instruction and an aligned access instruction, and when the first address to be accessed is accessed by using the first type of access interface, the first type of access interface selects the access instruction used for accessing the first address to be accessed according to the length of the data to be accessed and the initial address.
3. The method according to claim 1, wherein the determining, according to the number and the length of the data to be accessed corresponding to the first address to be accessed, the access instruction used by the program to access the first address to be accessed includes:
if the number is larger than 1, determining whether the initial addresses are aligned according to the length of the data to be accessed and the initial addresses;
and determining an access instruction used for accessing the first address to be accessed according to whether the starting address is aligned and the length of the data to be accessed.
4. The method of claim 3, wherein determining the access instruction used to access the first address to be accessed according to whether the start address is aligned and the length of the data to be accessed comprises:
determining a second type of access interface used for accessing the first address to be accessed according to whether the starting address is aligned and the length of the data to be accessed, wherein the second type of access interface comprises: and accessing the first address to be accessed by using an access instruction, wherein the access instruction used for accessing the first address to be accessed is an aligned access instruction or a non-aligned access instruction.
5. The method according to any one of claims 1 to 4, wherein after determining, according to the number and the length of the data to be accessed corresponding to the first address to be accessed, the access instruction used by the program to access the first address to be accessed, the method further comprises:
and updating the multimedia instructions of the program according to the determined access instructions used for accessing the first address to be accessed.
6. An access instruction determination apparatus, characterized in that the apparatus comprises:
the system comprises a receiving module, a judging module and a processing module, wherein the receiving module is used for receiving a request instruction input by a user, the request instruction is used for indicating whether the initial address of a first address to be accessed is uncertain to be aligned or not, and the first address to be accessed is any address to be accessed in a program;
an obtaining module, configured to obtain, according to the request instruction and the program, the number of addresses to be accessed that are the same as the starting address of the first address to be accessed in the program;
and the determining module is used for determining an access instruction used by the program to access the first address to be accessed according to the number and the length of the data to be accessed corresponding to the first address to be accessed.
7. The apparatus according to claim 6, wherein the determining module is specifically configured to determine, when the number is 1, to use a first type of access interface corresponding to the length of the data to be accessed to access the first address to be accessed, where the first type of access interface includes a non-aligned access instruction and an aligned access instruction, and when the first type of access interface is used to access the first address to be accessed, the first type of access interface selects the access instruction used to access the first address to be accessed according to the length of the data to be accessed and the starting address.
8. The apparatus according to claim 6, wherein the determining module is specifically configured to determine whether the start addresses are aligned according to the length of the data to be accessed and the start addresses when the number is greater than 1; and determining an access instruction used for accessing the first address to be accessed according to whether the starting address is aligned or not and the length of the data to be accessed.
9. The apparatus according to claim 8, wherein the determining module is specifically configured to determine, according to whether the start address is aligned and a length of the data to be accessed, a second type of access interface used for accessing the first address to be accessed, where the second type of access interface includes: and accessing the first address to be accessed by using an access instruction, wherein the access instruction used for accessing the first address to be accessed is an aligned access instruction or a non-aligned access instruction.
10. The apparatus according to any one of claims 6-9, further comprising:
and the updating module is used for updating the multimedia instruction of the program according to the determined access instruction used for accessing the first address to be accessed after the determining module determines the access instruction used for accessing the first address to be accessed by the program according to the quantity and the length of the data to be accessed corresponding to the first address to be accessed.
11. An access instruction determination apparatus, comprising: at least one processor and memory;
the memory stores computer-executable instructions; the at least one processor executes computer-executable instructions stored by the memory to perform the method of any of claims 1-5.
12. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored therein program instructions, which when executed by a processor, implement the method of any one of claims 1-5.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104461925A (en) * 2014-11-14 2015-03-25 浪潮(北京)电子信息产业有限公司 Automatic correcting method and device for aligning storage device addresses
CN104866428A (en) * 2014-02-21 2015-08-26 联想(北京)有限公司 Data access method and data access device
CN108255741A (en) * 2017-12-19 2018-07-06 深圳忆联信息系统有限公司 A kind of method and solid state disk of the write-in of solid state disk atom
CN109408427A (en) * 2017-08-18 2019-03-01 龙芯中科技术有限公司 A kind of clock-domain crossing data processing method and system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10203902B2 (en) * 2013-12-13 2019-02-12 Netapp, Inc. Techniques for dynamically aligning a partition with a block size boundary

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104866428A (en) * 2014-02-21 2015-08-26 联想(北京)有限公司 Data access method and data access device
CN104461925A (en) * 2014-11-14 2015-03-25 浪潮(北京)电子信息产业有限公司 Automatic correcting method and device for aligning storage device addresses
CN109408427A (en) * 2017-08-18 2019-03-01 龙芯中科技术有限公司 A kind of clock-domain crossing data processing method and system
CN108255741A (en) * 2017-12-19 2018-07-06 深圳忆联信息系统有限公司 A kind of method and solid state disk of the write-in of solid state disk atom

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