CN110297788B - Transmitting circuit, receiving circuit and serial signal transmission system - Google Patents
Transmitting circuit, receiving circuit and serial signal transmission system Download PDFInfo
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- CN110297788B CN110297788B CN201910410823.4A CN201910410823A CN110297788B CN 110297788 B CN110297788 B CN 110297788B CN 201910410823 A CN201910410823 A CN 201910410823A CN 110297788 B CN110297788 B CN 110297788B
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- 230000008054 signal transmission Effects 0.000 title claims abstract description 24
- 230000005540 biological transmission Effects 0.000 claims abstract description 90
- 238000000605 extraction Methods 0.000 claims abstract description 15
- 238000011084 recovery Methods 0.000 claims description 34
- 238000006243 chemical reaction Methods 0.000 claims description 23
- 230000000630 rising effect Effects 0.000 claims description 18
- 239000003990 capacitor Substances 0.000 claims description 17
- 230000000903 blocking effect Effects 0.000 claims description 7
- 238000001514 detection method Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 description 23
- 238000010586 diagram Methods 0.000 description 14
- 230000003321 amplification Effects 0.000 description 7
- 238000003199 nucleic acid amplification method Methods 0.000 description 7
- 239000000284 extract Substances 0.000 description 6
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- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000011664 signaling Effects 0.000 description 3
- 238000003708 edge detection Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0002—Serial port, e.g. RS232C
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0004—Parallel ports, e.g. centronics
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3852—Converter between protocols
Abstract
The embodiment of the invention provides a transmitting circuit, a receiving circuit and a serial signal transmission system, wherein the input end of the transmitting circuit is used for receiving a direct-current square wave signal, and the output end of the transmitting circuit is used for being connected with a transmission line; the transmitting circuit comprises an edge taking circuit; the edge extraction circuit is used for extracting edge information of the direct-current square wave signal, generating an alternating-current signal and outputting the alternating-current signal to the transmission line; the alternating current signal comprises edge information of the direct current square wave signal, and the direct current square wave signal and the alternating current signal are serial signals. According to the embodiment of the application, high-level and low-level transmission information in the direct-current square wave signal is not used any more, information is transmitted through the alternating-current signal comprising the edge information of the direct-current square wave signal, and even if the waveform of the alternating-current signal changes due to signal interference, the edge information is difficult to influence, so that the anti-interference capability is improved, and the error rate is reduced.
Description
Technical Field
The embodiment of the invention relates to the technical field of communication, in particular to a transmitting circuit, a receiving circuit and a serial signal transmission system.
Background
Along with the higher and higher chip integration level, more and more chips are interconnected among chips in a serial communication mode, so that chip pins are effectively saved. Therefore, the serial signal transmission system is widely developed and applied.
The serial signal transmission system includes a transmitting circuit that outputs a serial signal to a transmission line, and a receiving circuit that receives the serial signal after transmission through the transmission line. For example, in a serial transmission (english: serialize and deserialize, abbreviated as SerDes) circuit or a low voltage differential signal (english: low Voltage Differential Signaling, abbreviated as LVDS) circuit, a transmitter converts a parallel signal into a serial signal, outputs the serial signal to a transmission line through a transmission circuit, the serial signal is transmitted to a receiver through the transmission line, the receiver receives the serial signal through a reception circuit, and restores the received serial signal to a parallel signal.
The serial signal output by the transmitting circuit to the transmission line is usually a direct current square wave signal. However, the dc square wave signal has poor anti-interference capability due to the high and low level transmission information, for example, due to signal interference such as intersymbol interference, signal crosstalk, transmission delay, etc., so that non-ideal waveforms can easily appear at the high and low levels, and further, the error rate is high.
Disclosure of Invention
The technical problem solved by the embodiment of the invention is to provide a transmitting circuit, a receiving circuit and a serial signal transmission system so as to improve the anti-interference capability and further reduce the bit error rate when transmitting serial signals.
Therefore, the technical scheme for solving the technical problems in the embodiment of the invention is as follows:
in a first aspect, an embodiment of the present invention provides a transmitting circuit, where an input end of the transmitting circuit is configured to receive a direct current square wave signal, and an output end of the transmitting circuit is configured to connect to a transmission line; the transmitting circuit comprises an edge taking circuit;
the edge extraction circuit is used for extracting edge information of the direct-current square wave signal, generating an alternating-current signal and outputting the alternating-current signal to the transmission line;
the alternating current signal comprises edge information of the direct current square wave signal, and the direct current square wave signal and the alternating current signal are serial signals.
In a first possible implementation manner of the first aspect, a peak of the ac signal corresponds to a rising edge of the dc square wave signal, and a trough of the ac signal corresponds to a falling edge of the dc square wave signal; or,
the wave crest of the alternating current signal corresponds to the falling edge of the direct current square wave signal, and the wave trough of the alternating current signal corresponds to the rising edge of the direct current square wave signal.
In a second possible implementation manner of the first aspect, the transmitting circuit further includes a driving circuit connected in series with the edge taking circuit, and the driving circuit is located at a front end of the edge taking circuit;
the driving circuit is used for carrying out power amplification on the direct-current square wave signal, generating a power amplification signal and outputting the power amplification signal to the edge taking circuit;
the edge extraction circuit is used for extracting edge information of the power amplification signal output by the driving circuit, generating the alternating current signal and outputting the alternating current signal to the transmission line.
In a third possible implementation manner of the first aspect, the transmitting circuit further includes a driving circuit connected in series with the edge taking circuit, and the edge taking circuit is located at a front end of the driving circuit;
the edge taking circuit is used for extracting edge information of the direct current square wave signal, generating an edge signal and outputting the edge signal to the driving circuit;
the driving circuit is used for amplifying the power of the edge signal output by the edge taking circuit, generating the alternating current signal and outputting the alternating current signal to the transmission line.
In a fourth possible implementation manner of the first aspect, the transmitting circuit further includes a single-ended-rotation differential circuit located at a front end of the edge taking circuit;
The single-ended to differential circuit is used for carrying out single-ended to differential signal conversion on the direct-current square wave signal to generate a differential signal;
the edge extraction circuit is used for extracting edge information of the differential signal output by the single-ended-to-differential circuit, generating the alternating current signal and outputting the alternating current signal to a transmission line.
In a fifth possible implementation manner of the first aspect, the edge taking circuit includes at least one capacitor or a dc-to-ac circuit.
In a second aspect, an embodiment of the present invention provides a transmitter, including a parallel-to-serial conversion circuit, and any one of possible implementations of the foregoing transmission circuit;
the parallel-serial conversion circuit is used for converting parallel signals into serial signals to generate the direct-current square wave signals, and outputting the direct-current square wave signals to the input end of the sending circuit;
the transmitter is used in a serial transmission SerDes circuit or a low voltage differential signaling LVDS circuit.
In a third aspect, an embodiment of the present invention provides a receiving circuit, where an input end of the receiving circuit is used to connect to a transmission line; the receiving circuit includes a recovery circuit;
the recovery circuit is used for detecting edge information from the alternating current signal output by the transmission line and recovering the alternating current signal into a direct current square wave signal according to the edge information;
The alternating current signal comprises edge information of the direct current square wave signal, and the direct current square wave signal and the alternating current signal are serial signals.
In a first possible implementation manner of the third aspect, a peak of the ac signal corresponds to a rising edge of the dc square wave signal, and a trough of the ac signal corresponds to a falling edge of the dc square wave signal; or,
the wave crest of the alternating current signal corresponds to the falling edge of the direct current square wave signal, and the wave trough of the alternating current signal corresponds to the rising edge of the direct current square wave signal.
In a second possible implementation manner of the third aspect, the recovery circuit includes an amplifying circuit and a latch circuit connected in series;
the amplifying circuit is used for amplifying the alternating current signal, generating an alternating current amplified signal and outputting the alternating current amplified signal to the latch circuit;
the latch circuit is used for latching the alternating current amplified signal output by the amplifying circuit to generate the direct current square wave signal.
In a third possible implementation manner of the third aspect, the recovery circuit includes a comparison circuit;
the comparison circuit is used for comparing the alternating current signals and generating the direct current square wave signals.
In a fourth possible implementation manner of the third aspect, the apparatus further includes a common mode adjustment circuit located at a front end of the recovery circuit;
the common mode adjusting circuit is used for integrally adjusting the level value of the alternating current signal output by the transmission line, so that the adjusted level value is positioned in the level detection range of the recovery circuit.
In a fifth possible implementation manner of the third aspect, the circuit further includes at least one blocking capacitor located at a front end of the recovery circuit.
In a fourth aspect, embodiments of the present invention provide a receiver, including any one of the possible implementations of the above-described receiving circuit, and a serial-parallel conversion circuit;
the receiving circuit is also used for outputting the direct-current square wave signal to the serial-parallel conversion circuit;
the serial-parallel conversion circuit is used for converting the direct-current square wave signals output by the receiving circuit from serial to parallel to generate parallel signals;
the receiver is used in a serial transmission SerDes circuit or a low voltage differential signaling LVDS circuit.
In a fifth aspect, an embodiment of the present invention provides a serial signal transmission system, including a transmitting circuit and a receiving circuit, where an input end of the transmitting circuit is used for receiving a direct current square wave signal, and an output end of the transmitting circuit and an input end of the receiving circuit are used for connecting a transmission line;
The transmitting circuit comprises an edge taking circuit; the edge extraction circuit is used for extracting edge information of the direct current square wave signal, generating an alternating current signal and outputting the alternating current signal to the transmission line, wherein the alternating current signal comprises the edge information of the direct current square wave signal;
the receiving circuit includes a recovery circuit; the recovery circuit is used for detecting the edge information from the alternating current signal output by the transmission line and recovering the alternating current signal into the direct current square wave signal according to the edge information;
wherein, the direct current square wave signal and the alternating current signal are serial signals.
In a sixth aspect, an embodiment of the present invention provides a transmission method, for any one of possible implementation manners of the foregoing transmission circuit; the transmitting method comprises the following steps:
the sending circuit extracts edge information of the direct-current square wave signal to generate the alternating-current signal;
the transmitting circuit outputs the alternating current signal to the transmission line
In a seventh aspect, an embodiment of the present invention provides a receiving method, for any one of possible implementation manners of the foregoing receiving circuit; the receiving method comprises the following steps:
the receiving circuit detects edge information from an alternating current signal output by the transmission line;
And the receiving circuit restores the alternating current signal into a direct current square wave signal according to the edge information.
According to the technical scheme, when the transmitting circuit transmits the serial signal, the direct-current square wave signal is not directly adopted, the edge information of the direct-current square wave signal is extracted through the edge extraction circuit in the transmitting circuit, the alternating-current signal comprising the edge information of the direct-current square wave signal is generated, and the alternating-current signal is adopted for transmission. Therefore, the embodiment of the application does not use high and low level transmission information in the direct current square wave signal any more, but transmits the information through the alternating current signal comprising the edge information of the direct current square wave signal, even if the alternating current signal changes due to signal interference, the waveform is difficult to influence the edge information, so that the anti-interference capability is improved, and the error rate is further reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a Serdes circuit;
FIG. 2 is a schematic diagram of a DC square wave signal;
FIG. 3 is a schematic diagram of a DC square wave signal with jitter;
FIG. 4 is a schematic diagram of a transmitting circuit;
fig. 5 is a schematic diagram of a configuration of an embodiment of a transmitting circuit 100 according to an embodiment of the present invention;
fig. 6 is a schematic diagram of another embodiment of a transmitting circuit 100 according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of an AC signal according to an embodiment of the present invention;
fig. 8 is a schematic diagram of another embodiment of a transmitting circuit 100 according to an embodiment of the present invention;
fig. 9 is a schematic diagram of another embodiment of a transmitting circuit 100 according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of an embodiment of a transmitter 10 according to the present invention;
fig. 11 is a schematic diagram of a structure of an embodiment of a receiving circuit 400 according to an embodiment of the present invention;
fig. 12 is a schematic diagram of a structure of another embodiment of a receiving circuit 400 according to an embodiment of the present invention;
fig. 13 is a schematic diagram of a structure of another embodiment of a receiving circuit 400 according to an embodiment of the present invention;
fig. 14 is a schematic structural diagram of an embodiment of a receiver 20 according to the present invention;
Fig. 15 is a flow chart of an embodiment of a method of sending a message according to an embodiment of the present invention;
fig. 16 is a flowchart of a method embodiment of a receiving method according to an embodiment of the present invention.
Detailed Description
With more and more chips being interconnected in a serial communication manner, serial signal transmission systems such as SerDes circuits and LVDS circuits have been widely developed and applied.
The serial signal transmission system includes a transmitting circuit that outputs a serial signal to a transmission line, and a receiving circuit that receives the serial signal after transmission through the transmission line. For example, in a Serdes circuit shown in FIG. 1, the serializer (corresponding to the transmitter) includes a transmitting circuit, and the deserializer (corresponding to the receiver) includes a receiving circuit and a clock recovery (English: clock data recovery, simply referred to as CDR) circuit. The serializer converts the parallel signal into a serial signal, the serial signal is output to the transmission line through the transmitting circuit, the serial signal is transmitted to the deserializer through the transmission line, after the deserializer receives the serial signal through the receiving circuit, the CDR circuit recovers the clock according to the serial signal, the serial signal is aligned with the recovered clock, and the deserializer recovers the aligned serial signal into the parallel signal.
The serial signal output by the transmitting circuit to the transmission line is usually a direct current square wave signal. A direct current square wave signal refers to a level signal composed of a low level (e.g., 0 level) and a high level (e.g., 1 level), as shown in fig. 2. It should be noted that the dc square wave signal mentioned in the embodiments of the present application may be deformed due to interference, but is still a square wave signal.
However, since the dc square wave signal transmits information through high and low levels, the anti-interference capability is poor, and in particular, the dc square wave signal is relatively sensitive to signal interference such as intersymbol interference, signal crosstalk, transmission delay, etc., so that non-ideal waveforms may occur in the high and low levels, for example, overshoot waveforms may occur as shown in fig. 3. When non-ideal waveforms appear, the high and low levels cannot be detected correctly, resulting in a high bit error rate.
In addition, the direct current square wave signal can generate non-ideal waveforms due to level attenuation and the like, and the error rate is high.
In order to solve the above problem of high error rate due to poor anti-interference capability and level attenuation, one way is to provide an equalization circuit in the transmission circuit. For example, as shown in fig. 4, a transmitting circuit includes a single-end-to-differential circuit for single-end-to-differential signal conversion of the serial signal shown in fig. 2, an equalizing circuit for equalizing compensation of loss of a transmission line, and a driving circuit for driving a load of the transmission line.
Although the transmitting circuit shown in fig. 4 alleviates the problem of high error rate caused by the characteristics of poor anti-interference capability, level attenuation and the like of the direct current square wave signal through the equalizing circuit, the equalizing circuit not only causes larger power consumption, but also is difficult to be applied to equipment with lower power consumption requirements, such as mobile terminals like mobile phones, and the like, and the complexity of the circuit is increased to a certain extent.
In addition, since the driving circuit is directly connected to the transmission line, a higher driving capability is required to directly drive the load of the transmission line, and in addition, since the driving is performed by using a direct current square wave signal, the driving circuit also needs a higher driving capability, and the increase of the driving capability will result in higher driving power consumption. The technical problem solved by the embodiment of the invention is to provide a transmitting circuit, a receiving circuit and a serial signal transmission system, so that when serial signals are transmitted, direct-current square wave signals are not adopted, alternating-current signals comprising edge information of the direct-current square wave signals are adopted, the anti-interference capability can be improved, level attenuation is avoided, and the error rate is reduced. In addition, the driving capability and the driving power consumption of the driving circuit are also low.
Referring to fig. 5, an embodiment of a device for transmitting a signal 100 is provided. The input end of the transmitting circuit 100 in the embodiment of the present invention is used for receiving a direct current square wave signal, and the output end of the transmitting circuit 100 is used for connecting with the transmission line 200.
In an embodiment of the present invention, the transmitting circuit 100 includes an edge taking circuit 101.
The edge extraction circuit 101 is used for extracting edge information of the direct current square wave signal, generating an alternating current signal, and outputting the alternating current signal to the transmission line 200. Wherein, the direct current square wave signal and the alternating current signal are serial signals. The direct current square wave signal can be generated by a parallel-serial conversion circuit or other circuits, and the embodiment of the application is not limited in this way.
The edge extraction circuit 101 may also be referred to as an edge detection circuit (english: edge detect module), and is specifically configured to extract edge information, that is, extract rising edge information and falling edge information of the dc square wave signal, so that the generated ac signal includes the edge information of the dc square wave signal. The waveform characteristics of the ac signal correspond to the edge information. The waveform characteristics include wave crests, wave troughs and the like for reflecting waveform characteristics, that is, the alternating current signal carries the edge information through the wave characteristics such as the wave crests, the wave troughs and the like, and in an optional implementation manner, the wave crests of the alternating current signal correspond to rising edges of the direct current square wave signal, and the wave troughs of the alternating current signal correspond to falling edges of the direct current square wave signal; in another alternative implementation, the peak of the ac signal corresponds to a falling edge of the dc square wave signal, and the trough of the ac signal corresponds to a rising edge of the dc square wave signal. For example, the edge information extraction circuit 101 extracts the edge information of the dc square wave signal shown in fig. 2, so that an ac signal as shown in fig. 7 can be obtained, where the peak and the trough of the ac signal in fig. 7 correspond to the rising edge and the falling edge of the dc square wave signal, respectively.
In an embodiment of the present invention, the transmitting circuit 100 may further include a driving circuit 102 connected in series with the edge taking circuit 101. The driving circuit 102 is specifically configured to perform power amplification, so as to drive transmission of the ac signal output from the transmitting circuit 100 on the transmission line 200. Specifically, the edge extraction circuit 101 and the driving circuit 102 are used for respectively extracting edge information and amplifying power of the direct current square wave signal to generate the alternating current signal.
In the embodiment of the present invention, the positional relationship between the edge taking circuit 101 and the driving circuit 102 may be as shown in fig. 6, where the edge taking circuit 101 is located at the front end of the driving circuit 102; specifically, the edge extraction circuit 101 is configured to extract edge information of a direct current square wave signal, generate an edge signal, and output the edge signal to the driving circuit 102; the driving circuit 102 is configured to power amplify the edge signal output from the edge taking circuit 101, generate the ac signal, and output the ac signal to the transmission line 200. The edge taking circuit 101 is located at the front end of the driving circuit 102, which means that the output end of the edge taking circuit 101 is directly connected to the input end of the driving circuit 102 or indirectly connected to the input end of the driving circuit (for example, connected through other circuits).
In fig. 6, since the driving circuit 102 is directly connected to the transmission line 200, the driving circuit 102 can adaptively adjust the driving capability according to the load on the transmission line 200. For example, the driving capability of the driving circuit 102 may be increased to increase the output distance when the transmission line 200 is long (when a load is generally large), or the driving capability of the driving circuit 102 may be decreased to reduce the power consumption when the transmission line 200 is short (i.e., a load is small).
In another embodiment, the positions of the edge taking circuit 101 and the driving circuit 102 may be interchanged. For example, as shown in fig. 8, the driving circuit 102 is located at the front end of the edge taking circuit 101; specifically, the driving circuit 102 is configured to power amplify the dc square wave signal, generate a power amplified signal, and output the power amplified signal to the edge taking circuit 101; the edge extraction circuit 101 is configured to extract edge information of the power amplified signal output by the driving circuit 102, and generate the ac signal. The driving circuit 102 is located at the front end of the edge taking circuit 101, which means that the output end of the driving circuit 102 is directly or indirectly connected to the input end of the edge taking circuit 101 (for example, connected through other circuits).
The operation of the transmitting circuit 100 of the present embodiment includes:
the transmitting circuit 100 receives a serial, direct current square wave signal, where the direct current square wave signal may be shown in fig. 2, and the edge extracting circuit 101 in the transmitting circuit 100 extracts edge information of the direct current square wave signal to generate a serial, alternating current signal, where the alternating current signal may be shown in fig. 7, and a peak and a trough correspond to a rising edge and a falling edge of the direct current square wave signal respectively. The transmitting circuit 100 outputs the generated ac signal to the transmission line 200, and the ac signal is transmitted through the transmission line 200 and then received by the receiving circuit. The receiving circuit can restore the direct current square wave signal by utilizing the edge information in the alternating current signal.
The transmitting circuit 100 may be used in a serial signal transmission system such as a Serdes circuit and an LVDS circuit.
As can be seen from the above technical solution, when transmitting the serial signal, the transmitting circuit 100 of the present embodiment does not directly use the dc square wave signal any more, but extracts the edge information of the dc square wave signal through the edge extracting circuit 501, generates an ac signal including the edge information of the dc square wave signal, and uses the ac signal for transmission. Therefore, the embodiment of the application does not use high and low level transmission information in the direct current square wave signal any more, but transmits the information through the alternating current signal comprising the edge information of the direct current square wave signal, even if the alternating current signal changes due to signal interference, the waveform is difficult to influence the edge information, so that the anti-interference capability is improved, and the error rate is further reduced. In addition, the alternating current level information does not have high and low levels, so that the problem of level attenuation does not exist, and the problem of high error rate caused by the level attenuation is solved.
For example, when the serial signal is transmitted by using the dc square wave signal shown in fig. 2, if the dc square wave signal has an overshoot waveform or other non-ideal waveform shown in fig. 3 due to signal interference such as intersymbol interference, signal crosstalk, transmission delay, etc., the high and low levels of transmission cannot be detected correctly, resulting in a higher bit error rate. However, when the serial signal is transmitted using the ac signal as shown in fig. 7, even if the ac signal is changed in waveform due to signal interference, such as peak-to-peak reduction of the peak, the peak and trough can be detected from the ac signal, that is, the transmitted edge information can still be correctly detected, and thus the error rate is low.
In addition, in the embodiment of the invention, the serial signal is transmitted by adopting the alternating current signal, so that the anti-interference capability is improved, and an equalization circuit is not required to be adopted in the circuit for equalization compensation, so that the power consumption is further saved, the method is particularly suitable for equipment with the power consumption lower than a certain threshold value, such as mobile terminals like mobile phones, and the actual measurement power consumption of a transmitting circuit and a receiving circuit can be lower than 12 milliwatts. And is also more suitable for scenes with shorter transmission line distances, for example, transmission line distances less than 10 cm.
In addition, in the circuit structure shown in fig. 6, although the driving circuit 102 is still directly connected to the transmission line 200, since the driving circuit 102 outputs an ac signal to the transmission line 200 instead of a dc square wave signal, the driving capability requirement is lower for driving the ac signal than for driving the dc square wave signal. In the circuit structure shown in fig. 8, the driving circuit 102 is not directly connected to the transmission line 200, so that the load of directly driving the transmission line 200 is not required, the requirement on the driving capability of the driving circuit 102 can be further reduced, and the driving power consumption can be reduced.
In the embodiment of the present invention, the ac signal output by the transmitting circuit 100 may be a differential signal or a single-ended signal. The following is a detailed description.
For example, as shown in fig. 9, the transmitting circuit 100 may further include a single-ended-to-differential circuit 103 located at the front end of the edge taking circuit 101.
The single-end-to-differential circuit 103 is configured to perform single-end-to-differential signal conversion on the dc square wave signal, so as to generate a differential signal; the edge extraction circuit 101 is configured to extract edge information of the differential signal output by the single-ended differential circuit 103, generate the ac signal, and output the ac signal to the transmission line 200.
In addition, in order to achieve the purpose of saving pins, the transmitting circuit 100 may not include a single-ended to differential circuit, and the ac signal and the dc square wave signal may be single-ended signals.
Alternative implementations of the fetch circuit 101 and the drive circuit 102, respectively, are provided in the following embodiments of the invention.
Optionally, the edge taking circuit 101 comprises at least one capacitor. For example, as shown in fig. 9, the single-ended to differential circuit 103 includes two output terminals, the edge taking circuit 101 includes at least two sets of capacitors, and each set of capacitors is correspondingly connected to each output terminal of the single-ended to differential circuit 103 (fig. 9 is an indirect connection). The number of capacitors in each group of capacitors in the embodiment of the present invention is not limited, and may be 1 or more as shown in fig. 9.
The edge taking circuit 501 may be other forms of edge detection circuits besides a capacitor, and may include a dc-ac circuit, for example.
The direct current square wave signal mentioned in the present application may include both voltage signals and current signals. If the edge taking circuit 501 includes a capacitor, or if the driving circuit is located at the front end of the edge taking circuit 501, the dc square wave signal may be a voltage signal, or may be a voltage signal or a current signal in other cases.
Optionally, the driving circuit 102 includes a power amplifying circuit, and may specifically include at least one power amplifier. For example, as shown in fig. 9, the single-ended to differential circuit 103 includes two output terminals, the driving circuit 102 includes at least two sets of power amplifiers, and each set of power amplifiers and each output terminal of the single-ended to differential circuit 103 are respectively connected correspondingly (fig. 9 is a direct connection). The number of the power amplifiers in each group of the power amplifiers is not limited in the embodiment of the present invention, and may be 2 as shown in fig. 9, or may be 1 or more than 2.
The positions between the edge taking circuit 101 and the driving circuit 102 in fig. 9 can be interchanged.
It should be noted that, the transmitting circuit 100 in the embodiment of the present application may be an internal circuit provided in the transmitter or an independent external circuit, which is not limited in this embodiment of the present invention. One specific embodiment in which the transmission circuit is provided in the transmitter is described below.
Referring to fig. 10, an embodiment of a device of a transmitter 10 is provided in the present embodiment, where the transmitter 10 includes a parallel-to-serial conversion circuit 300 and a transmitting circuit 100.
The parallel-to-serial conversion circuit 300 is configured to convert a parallel signal into a serial signal, generate the dc square wave signal, and output the dc square wave signal to an input terminal of the transmitting circuit 100. The transmitting circuit 100 is any embodiment of a transmitting circuit provided in an embodiment of the present invention.
The transmitter 10 may be used in a serial signal transmission system such as a Serdes circuit, an LVDS circuit, and the like. For example, the transmitter 10 may be a serializer in a Serdes circuit.
Corresponding to the above-mentioned transmitting circuit and transmitter, the present application also provides apparatus embodiments of the receiving circuit and receiver. The following is a detailed description.
As shown in fig. 11, an embodiment of the present invention provides an apparatus embodiment of a receiving circuit 400. The input of the receiving circuit 400 in the embodiment of the present invention is used to connect to the transmission line 200.
In an embodiment of the present invention, the receiving circuit 400 includes a recovery circuit.
The recovery circuit is configured to detect edge information from the ac signal output from the transmission line 200, and recover the ac signal into a dc square wave signal according to the edge information. The alternating current signal comprises edge information of the direct current square wave signal, and the direct current square wave signal and the alternating current signal are serial signals. The ac signal may be a signal generated and output by the transmission circuit 100 in any of the above embodiments.
Wherein the waveform characteristics of the alternating current signal correspond to edge information. The waveform characteristics comprise wave crests, wave troughs and the like, that is to say, the alternating current signals carry the edge information through the wave crest, the wave troughs and the like. In an alternative implementation, the peak of the ac signal corresponds to a rising edge of the dc square wave signal, and the trough of the ac signal corresponds to a falling edge of the dc square wave signal; in another alternative implementation, the peak of the ac signal corresponds to a falling edge of the dc square wave signal, and the trough of the ac signal corresponds to a rising edge of the dc square wave signal. For example, the recovery circuit may recover the ac signal shown in fig. 7 into the dc square wave signal shown in fig. 2, where the peaks and valleys of the ac signal in fig. 7 correspond to the rising edge and the falling edge of the dc square wave signal, respectively.
Fig. 11 and 12 provide two specific configurations of the recovery circuit, respectively, and are described below.
The recovery circuit may include an amplifying circuit 401 and a latch circuit 402 connected in series as shown in fig. 11.
The amplifying circuit 401 is configured to amplify the ac signal, generate an ac amplified signal, and output the ac amplified signal to the latch circuit 402. The amplifying circuit 401 may include one or more amplifiers, such as a voltage amplifier, a current amplifier, etc., among others. The latch circuit 402 is configured to latch the ac amplified signal output from the amplifying circuit 401, and generate the dc square wave signal. Latch circuit 402 may include one or more latches.
The recovery circuit may also include a comparison circuit 403, as shown in fig. 12, where the comparison circuit 403 is configured to compare the ac signal to generate the dc square wave signal.
The alternating current signal can be a single-ended signal or a differential signal. If the ac signal is a differential signal, the differential signal is input to two input terminals of the amplifying circuit 401 or to two input terminals of the comparing circuit 403, respectively. If the ac signal is a single-ended signal, the single-ended signal is input to one input terminal of the amplifying circuit 401 or to one input terminal of the comparing circuit 403, and the reference voltage or the reference current is input to the other input terminal of the amplifying circuit 401 or the comparing circuit 403.
Since the recovery circuit including the comparison circuit 403 or the amplification circuit 401 or the like has a certain level detection range, for example, 3V to 5V. Whereas the ac signal may float up and down at the 0 level, for example as shown in fig. 7, the recovery circuit cannot directly detect the ac signal.
In order to solve the above-mentioned problem, as shown in fig. 13, the receiving circuit 400 of the present embodiment may further include a common mode adjustment circuit 405 located at the front end of the recovery circuit. The common mode adjustment circuit 405 is configured to perform overall adjustment, such as overall raising or lowering, on the level value of the ac signal output by the transmission line 200, so that the adjusted level value is located in the level detection range of the recovery circuit. For example, in fig. 13, the common mode adjustment circuit 405 may raise the voltage value of the ac signal as a whole so that the amplification circuit 401 can amplify the ac signal. The amplifying circuit 401 in fig. 13 is specifically an amplifier.
Optionally, the receiving circuit 400 in the embodiment of the present application may further include at least one blocking capacitor 404 located at the front end of the recovery circuit. The blocking capacitor 404 is used to prevent the dc signal of the receiving circuit 400 from being loaded onto the transmission line 200. For example, as shown in fig. 13, the receiving circuit includes two blocking capacitors, and the transmission lines 200 are two in number, and each transmission line is correspondingly connected to each blocking capacitor. The receiving circuit 400 receives the ac signal output from the transmitting circuit 100, and the transmitting circuit may specifically include a capacitor in the edge taking circuit 101 as shown in fig. 9.
Optionally, the receiving circuit 400 in the embodiment of the present application may further include an impedance matching circuit 406 located at the front end of the recovery circuit, for performing impedance matching.
The receiving circuit 400 of the embodiment of the present application may be used in serial signal transmission systems such as Serdes circuits and LVDS circuits.
It should be noted that, the receiving circuit 400 in the embodiment of the present application may be an internal circuit provided in the receiver or an independent external circuit, which is not limited in this embodiment of the present invention. One specific embodiment in which the receiving circuit is provided in the receiver is described below.
Referring to fig. 14, an embodiment of an apparatus of a receiver 20 is provided in the present embodiment, and the receiver 20 of the present embodiment includes a receiving circuit 400 and a serial-parallel conversion circuit 500.
The receiving circuit 400 is any embodiment of a receiving circuit provided in the embodiments of the present application. The receiving circuit 400 is further configured to output the dc square wave signal to the serial-parallel conversion circuit 500.
The serial-parallel conversion circuit 500 is configured to perform serial-to-parallel conversion on the dc square wave signal output by the receiving circuit 400, and generate a parallel signal.
The receiver 20 may be used in a serial signal transmission system such as a Serdes circuit, an LVDS circuit, and the like. For example, receiver 20 may be a deserializer in a Serdes circuit.
Optionally, the receiver 20 also includes CDR circuitry, such as when the receiver 20 is used in a Serdes circuit. The CDR circuit is located between the receiving circuit 400 and the serial-parallel conversion circuit 500, and is configured to perform clock recovery according to the dc square wave signal output by the receiving circuit 400, and align the dc square wave signal with the recovered clock; the serial-parallel conversion circuit 500 is configured to perform serial-to-parallel conversion on the aligned direct current square wave signal output by the CDR circuit, and generate a parallel signal.
The embodiment of the invention also provides a system embodiment of the serial signal transmission system. The serial signal transmission system of the present embodiment includes a transmitting circuit 100 and a receiving circuit 400, wherein an input terminal of the transmitting circuit 100 is used for receiving a direct current square wave signal, and an output terminal of the transmitting circuit 100 and an input terminal of the receiving circuit 400 are used for connecting the transmission line 200.
The transmitting circuit 100 includes an edge taking circuit 101; the edge extraction circuit 101 is configured to extract edge information of the dc square wave signal, generate an ac signal, and output the ac signal to the transmission line 200, where the ac signal includes the edge information of the dc square wave signal.
The receiving circuit 400 includes a recovery circuit; the recovery circuit is configured to detect the edge information from the ac signal output from the transmission line 200, and recover the ac signal into the dc square wave signal according to the edge information.
Wherein, the direct current square wave signal and the alternating current signal are serial signals.
The transmitting circuit 100 may be any embodiment of a transmitting circuit provided in an embodiment of the present invention, and the receiving circuit 400 may be any embodiment of a receiving circuit provided in an embodiment of the present invention. For details, please refer to the above embodiments, and details are not repeated here. The serial signal transmission system of the embodiment of the invention can be a SerDes circuit or an LVDS circuit.
Referring to fig. 15, the embodiment of the present invention further provides a method embodiment of the transmission method. The embodiment is used for a transmitting circuit. The method of the embodiment comprises the following steps:
1501: and the transmitting circuit extracts edge information of the direct-current square wave signal to generate the alternating-current signal.
1502: the transmission circuit outputs the alternating current signal to the transmission line.
The transmitting circuit in this embodiment may be any embodiment of the transmitting circuit 100 provided in the embodiment of the present invention. For details, please refer to the above embodiments, and details are not repeated here.
Referring to fig. 16, the embodiment of the present invention further provides a method embodiment of the receiving method. The embodiment is used in a receiving circuit. The receiving method of the present embodiment includes:
1601: the receiving circuit detects edge information from an alternating current signal output from the transmission line.
1602: and the receiving circuit restores the alternating current signal into a direct current square wave signal according to the edge information.
The receiving circuit in this embodiment may be any embodiment of the receiving circuit 400 provided in the embodiment of the present invention. For details, please refer to the above embodiments, and details are not repeated here.
The terms first, second, third and fourth in the description and in the claims of the invention and in the above-described figures, etc. are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods may be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (19)
1. A transmitting circuit for a serial signal transmission system, wherein an input of the transmitting circuit is electrically connected to an output of a parallel-to-serial conversion circuit, and an output of the transmitting circuit is electrically connected to a transmission line, the transmitting circuit comprising:
the input end of the edge taking circuit is electrically connected with the input end of the transmitting circuit, and the output end of the edge taking circuit is electrically connected with the output end of the transmitting circuit;
the edge extraction circuit is used for extracting edge information of the direct current square wave signals received by the sending circuit to generate alternating current signals and output the alternating current signals, wherein the alternating current signals comprise edge information of the direct current square wave signals, and the direct current square wave signals and the alternating current signals are serial signals.
2. The transmit circuit of claim 1, further comprising a drive circuit in series with the edge circuit, wherein:
the input end of the edge taking circuit is electrically connected with the input end of the transmitting circuit, the edge taking circuit is positioned at the front end of the driving circuit, and the output end of the driving circuit is electrically connected with the output end of the transmitting circuit.
3. The transmit circuit of claim 2, further comprising a single-ended to differential circuit having an input electrically coupled to the input of the transmit circuit and an output electrically coupled to the input of the edge circuit.
4. The transmit circuit of claim 1, further comprising a drive circuit in series with the edge circuit, wherein:
the input end of the driving circuit is electrically connected with the input end of the transmitting circuit, the driving circuit is positioned at the front end of the edge taking circuit, and the output end of the edge taking circuit is electrically connected with the output end of the transmitting circuit.
5. The transmit circuit of claim 4, further comprising a single-ended to differential circuit having an input electrically coupled to the input of the transmit circuit and an output electrically coupled to the input of the drive circuit.
6. The transmitting circuit of any of claims 1 to 5, wherein the edge taking circuit comprises at least one of a capacitor or a dc to ac circuit.
7. The transmitting circuit of claim 1, wherein a peak of the ac signal corresponds to a rising edge of the dc square wave signal and a trough of the ac signal corresponds to a falling edge of the dc square wave signal; or,
the wave crest of the alternating current signal corresponds to the falling edge of the direct current square wave signal, and the wave trough of the alternating current signal corresponds to the rising edge of the direct current square wave signal.
8. The transmission circuit according to claim 1, wherein the driving circuit is configured to power-amplify the received signal and output the power-amplified signal.
9. A transmitter for a serial signal transmission system, comprising a parallel-to-serial conversion circuit and a transmitting circuit as claimed in any one of claims 1 to 8, wherein:
the parallel-serial conversion circuit is used for converting parallel signals into serial signals and outputting the serial signals to the input end of the sending circuit.
10. A receiving circuit for a serial signal transmission system, wherein an input of the receiving circuit is electrically connected to a transmission line, an output of the receiving circuit is electrically connected to a serial-to-parallel circuit, the receiving circuit comprises a recovery circuit front end comprising:
An amplifying circuit and a latch circuit connected in series, wherein:
the input end of the amplifying circuit is electrically connected with the input end of the receiving circuit, and the output end of the latch circuit is electrically connected with the output end of the receiving circuit;
the front end of the recovery circuit is used for detecting edge information from the alternating current signal output by the transmission line, and recovering the alternating current signal into a direct current square wave signal according to the edge information.
11. The receive circuit of claim 10, wherein the receive circuit further comprises a common mode adjustment circuit, wherein:
the common mode adjusting circuit is used for adjusting the level value of the alternating current signal output by the transmission line and outputting the adjusted alternating current signal to the front end of the recovery circuit, wherein the level value of the adjusted alternating current signal is positioned in the level detection range of the front end of the recovery circuit.
12. The receive circuit of claim 11, further comprising at least one blocking capacitor electrically connected to an input of the receive circuit and an input of the common mode adjustment circuit, respectively.
13. The receive circuit of claim 10, wherein a peak of the ac signal corresponds to a rising edge of the dc square wave signal and a trough of the ac signal corresponds to a falling edge of the dc square wave signal; or,
The wave crest of the alternating current signal corresponds to the falling edge of the direct current square wave signal, and the wave trough of the alternating current signal corresponds to the rising edge of the direct current square wave signal.
14. A receiving circuit for a serial signal transmission system, wherein an input of the receiving circuit is electrically connected to a transmission line, an output of the receiving circuit is electrically connected to a serial-to-parallel circuit, the receiving circuit comprises a recovery circuit front end comprising:
the comparison circuit is used for comparing the alternating current signals received by the receiving circuit to generate direct current square wave signals;
the front end of the recovery circuit is used for detecting edge information from the alternating current signal output by the transmission line, and recovering the alternating current signal into a direct current square wave signal according to the edge information.
15. The receive circuit of claim 14, wherein the receive circuit further comprises a common mode adjustment circuit, wherein:
the common mode adjusting circuit is used for adjusting the level value of the alternating current signal output by the transmission line and outputting the adjusted alternating current signal to the front end of the recovery circuit, wherein the level value of the adjusted alternating current signal is positioned in the level detection range of the front end of the recovery circuit.
16. The receive circuit of claim 15, further comprising at least one blocking capacitor electrically connected to an input of the receive circuit and an input of the common mode adjustment circuit, respectively.
17. The receive circuit of claim 15, wherein a peak of the ac signal corresponds to a rising edge of the dc square wave signal and a trough of the ac signal corresponds to a falling edge of the dc square wave signal; or,
the wave crest of the alternating current signal corresponds to the falling edge of the direct current square wave signal, and the wave trough of the alternating current signal corresponds to the rising edge of the direct current square wave signal.
18. A receiver for a serial signal transmission system, comprising a serial-to-parallel conversion circuit and a receiving circuit, the receiving circuit being a receiving circuit as claimed in any one of claims 10 to 13 or a receiving circuit as claimed in any one of claims 14 to 17;
the serial-parallel conversion circuit is used for converting the direct-current square wave signals output by the receiving circuit from serial to parallel to generate parallel signals.
19. A serial signal transmission system comprising a transmitting circuit according to any one of claims 1 to 8 and a receiving circuit according to any one of claims 10 to 13 or a receiving circuit according to any one of claims 14 to 17, the transmitting circuit and the receiving circuit being signalled by means of alternating AC-coupled signals.
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| CN201910410823.4A CN110297788B (en) | 2016-07-21 | 2016-07-21 | Transmitting circuit, receiving circuit and serial signal transmission system |
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| CN201910410823.4A CN110297788B (en) | 2016-07-21 | 2016-07-21 | Transmitting circuit, receiving circuit and serial signal transmission system |
| CN201610580593.2A CN106301468B (en) | 2016-07-21 | 2016-07-21 | Serial signal transmitting line receives circuit and Transmission system and method |
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| CN111913170B (en) * | 2020-08-12 | 2023-08-08 | 南京英锐创电子科技有限公司 | Signal transmitting device |
| CN113759920A (en) * | 2021-09-10 | 2021-12-07 | 南京苏美达智能技术有限公司 | Automatic walking equipment, base station and boundary line signal interaction method |
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| CN110297788A (en) | 2019-10-01 |
| CN106301468B (en) | 2019-05-28 |
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