CN110289042A - EMMC chip test system - Google Patents
EMMC chip test system Download PDFInfo
- Publication number
- CN110289042A CN110289042A CN201910289428.5A CN201910289428A CN110289042A CN 110289042 A CN110289042 A CN 110289042A CN 201910289428 A CN201910289428 A CN 201910289428A CN 110289042 A CN110289042 A CN 110289042A
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- emmc
- chip
- daughter board
- mainboard
- test
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
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- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
This application involves a kind of EMMC chip test systems.The EMMC chip test system allows host computer to monitor the test process of the EMMC chip of multiple slave computers simultaneously by setting host computer and multiple slave computers, and testing efficiency is high.In addition, each slave computer allows slave computer successively to test multiple EMMC chips, test process automation, testing efficiency further increases, and uses manpower and material resources sparingly equipped with multiple EMMC chips.
Description
Technical field
This application involves electronic product testing fields, more particularly to a kind of EMMC chip test system.
Background technique
EMMC (Embedded Multi Media Card) is embedded multi-media card.EMMC uses unified MMC standard
Interface, high density NAND-Flash, (one kind of flash storage, inside use non-linear macroelement mode, are that solid-state is big
The realization of capacity memory provides cheap effective solution scheme) memory and MMC-Controller (multimedia controller)
It is encapsulated in a BGA (Ball Grid Array, welded ball array encapsulation) chip.The main advantage of EMMC is can simplify
Design, the renewal speed of mobile phone memory are fast and accelerate the research and development speed of product, therefore by the favor of cell phone manufacturer.
The EMMC compatibility test of system-level (system on chip) hardware and software on legacy hosts dististyle mainly includes two kinds of sides
Formula: direct welding manner and EMMC daughter board test mode.
Direct welding manner is that directly EMMC chip to be measured is welded on the system on chip grade mainboard of host side, then
It is tested.Direct welding manner the problem is that: when replacing EMMC chip to be measured, need the EMMC core tested
Piece unloads, and welds one piece of new EMMC chip, and this mode not only takes time and effort, and be easily damaged system on chip grade mainboard and
EMMC chip leads to the waste of resource.
EMMC daughter board test mode is that EMMC chip to be measured is welded on one piece of daughter board, forms EMMC daughter board, will
It is tested on the card slot of EMMC daughter board insertion system on chip grade mainboard.But this test mode the problem is that: every time
Test still can only test an EMMC chip, test and need dismounting and change EMMC daughter board, testing efficiency is low.
Summary of the invention
Based on this, it is necessary to an EMMC core can only be tested for EMMC chip test system single test in traditional scheme
Piece, the low problem of testing efficiency provide a kind of EMMC chip test system.
The application provides a kind of EMMC chip test system, comprising:
Host computer, for monitoring the test process of EMMC chip；
Multiple slave computers, the slave computer and the host computer communicate to connect, for executing the test of the EMMC chip
Process, each slave computer carry multiple EMMC chips.
In one embodiment, the host computer includes:
Monitoring module, for monitoring the test process of EMMC chip described in multiple slave computers simultaneously.
In one embodiment, the slave computer is system on chip grade mainboard, each described system on chip grade mainboard
It is embedded one piece of EMMC daughter board.
In one embodiment, the system on chip grade mainboard includes:
Mainboard interface, and upper mechatronics, the system on chip grade mainboard is by the mainboard interface to described
Host computer sends the test result of the EMMC chip.
In one embodiment, the EMMC daughter board carries the multiple EMMC chip.
In one embodiment, the EMMC daughter board further include:
Control module is electrically connected with multiple EMMC chips respectively, for when the system on chip grade mainboard is to one
After the test process that EMMC chip executes, switch the EMMC chip so that the system on chip grade mainboard executes another
The test process of the EMMC chip；
Processor is electrically connected with the control module, for sending control signal to the control module, described in control
Control module completes the switching of the EMMC chip；
Daughterboard interface, respectively with the processor and the upper mechatronics, the host computer connect by the daughter board
Mouth issues the control instruction for switching the EMMC chip to the processor.
In one embodiment, the EMMC daughter board further include:
Signal attachment base is set to the EMMC daughter board, is electrically connected with the control module, for connecting the on piece system
Irrespective of size mainboard and the EMMC daughter board.
In one embodiment, the signal attachment base further include:
Slot is set to the signal attachment base；
The EMMC daughter board is detachably connected by the slot and the system on chip grade mainboard.
In one embodiment, the EMMC daughter board further include:
Power supply change-over device is electrically connected with the processor and the signal attachment base, for sub to the EMMC
Plate and the system on chip grade main board power supply；
The power supply change-over device is also used to when switching the EMMC chip, to the EMMC daughter board and the on piece system
Irrespective of size mainboard is performed simultaneously the operation that power supply is restarted, by the EMMC chip weight after the system on chip grade mainboard and switching
Newly establish connection.
In one embodiment, the power supply change-over device includes:
Power circuit, for providing power supply to the EMMC daughter board and the system on chip grade mainboard；
Relay is electrically connected with the power circuit, the processor and the signal attachment base respectively, for described
Under the control of processor, it is switched in or out the power circuit.
EMMC chip test system provided by the present application, by setting host computer and multiple slave computers, so that host computer can
To monitor the test process of the EMMC chip of multiple slave computers simultaneously, testing efficiency is high.In addition, each slave computer is equipped with more
A EMMC chip, allows slave computer successively to test multiple EMMC chips, test process automation, and testing efficiency further mentions
Height, and use manpower and material resources sparingly.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of one embodiment of EMMC chip test system provided by the present application；
Fig. 2 is the structural schematic diagram of host computer in EMMC chip test system provided by the present application；
Fig. 3 is that the structure of one embodiment of system on chip grade mainboard in EMMC chip test system provided by the present application is shown
It is intended to；
Fig. 4 is that the structure of one embodiment of system on chip grade mainboard in EMMC chip test system provided by the present application is shown
It is intended to；
Fig. 5 is that the structure of one embodiment of system on chip grade mainboard in EMMC chip test system provided by the present application is shown
It is intended to；
Fig. 6 is that the structure of one embodiment of system on chip grade mainboard in EMMC chip test system provided by the present application is shown
It is intended to；
Fig. 7 is the structural schematic diagram of one embodiment of EMMC chip test system provided by the present application.
Appended drawing reference:
100 host computers
110 monitoring modules
200 slave computers
210 system on chip grade mainboards
211 mainboard interfaces
220 EMMC daughter boards
221 EMMC chips
222 control modules
223 processors
224 daughterboard interfaces
225 signal attachment bases
226 slots
227 power supply change-over devices
228 power circuits
229 relays
Specific embodiment
It is with reference to the accompanying drawings and embodiments, right in order to which the objects, technical solutions and advantages of the application are more clearly understood
The application is further elaborated.It should be appreciated that specific embodiment described herein is only used to explain the application, and
It is not used in restriction the application.
The application provides a kind of EMMC chip test system.It should be noted that EMMC chip testing provided by the present application
System does not limit the test-types of its application.The EMMC chip test system can be used for the survey of a variety of EMMC chips 221
Try type.The EMMC chip test system can be used in power supply test, signal testing, power consumption test and stability test
It is one or more.
As shown in Figure 1, in the embodiment of the application, the EMMC chip test system includes host computer 100 and more
A slave computer 200.The slave computer 200 is communicated to connect with the host computer 100.Each slave computer 200 carries multiple EMMC
Chip 221.The host computer 100 is used to monitor the test process of EMMC chip 221.The slave computer 200 is described for executing
The test process of EMMC chip 221.The EMMC chip 221 is embedded multi-media card.
Specifically, EMMC chip 221 is also referred to as embedded multi-media card.Optionally, the host computer 100 can be movement
Terminal.Specifically, the host computer 100 can be PC (personal computer).The EMMC chip 221 is built-in with firmware.Institute
EMMC chip 221 is stated in production, the test program burning of the EMMC chip 221 is entered the EMMC chip by producers
In 221 firmware.When the slave computer 200 executes the test process of the EMMC chip 221, the slave computer 200 is read
Test program in the firmware of the EMMC chip 221 is tested.The host computer 100 can monitor simultaneously it is multiple it is described under
The test process of position machine 200.Each described slave computer 200 can only test an EMMC chip 221 in the same time.
After an EMMC chip 221 is completed, the host computer 100 controls the slave computer 200 and replaces the EMMC core
Piece 221, until all EMMC chips 221 are completed.This test mode realizes the automation of test process.
In the present embodiment, by setting host computer 100 and multiple slave computers 200, host computer 100 is monitored simultaneously
The test process of the EMMC chip 221 of multiple slave computers 200, testing efficiency are high.In addition, each slave computer 200 is equipped with more
A EMMC chip 221 allows slave computer 200 successively to test multiple EMMC chips 221, test process automation, test effect
Rate further increases, and uses manpower and material resources sparingly.
As shown in Fig. 2, the host computer 100 includes monitoring module 110 in the embodiment of the application.The monitoring
Module 110 is used for while monitoring the test process of EMMC chip 221 described in multiple slave computers 200.
Specifically, the monitoring module 110 is built in the host computer 100.When an EMMC chip 221 is completed to survey
After examination, the slave computer 200 sends test to the host computer 100 and completes message, the monitoring module of the host computer 100
110 send the instruction of replacement EMMC chip 221 to the slave computer 200.The slave computer 200 is according to the replacement EMMC chip
The test program in the firmware of another EMMC chip 221 is read in 221 instruction, starts to test another EMMC core
Piece 221.
In the present embodiment, by the way that the monitoring module 110 is arranged in the host computer 100, realize while to multiple
The real time monitoring of 221 test process of EMMC chip of the slave computer 200, so that test process automation, high-efficient.
As shown in figure 3, the slave computer 200 can be system on chip grade mainboard 210 in the embodiment of the application.
Each described system on chip grade mainboard 210 is embedded one piece of EMMC daughter board 220.
Specifically, the slave computer 200 can be system on chip grade mainboard 210, that is, run SOC system (system on chip)
Mainboard.Multiple electronic devices are integrated on each described system on chip grade mainboard 210.Each described system on chip grade mainboard
210 are embedded one piece of EMMC daughter board 220.The EMMC chip 221 can be carried on the EMMC daughter board 220.Optionally, the EMMC
Daughter board 220 is detachably connected with the system on chip grade mainboard 210.The EMMC chip 221 on one piece of EMMC daughter board 220
After completing test process, the EMMC daughter board 220 can be extracted and replace another EMMC daughter board 220 and tested.
In the present embodiment, by the way that EMMC daughter board 220 is arranged on system-level mainboard 210 on said sheets, EMMC chip is realized
221 can be recycled after a test, will not damage, save physical resource.
Please continue to refer to Fig. 3, in the embodiment of the application, the system on chip grade mainboard 210 includes mainboard interface
211.The mainboard interface 211 is electrically connected with the host computer 100.The system on chip grade mainboard 210 is connect by the mainboard
Mouth 211 sends the test result of the EMMC chip 221 to the host computer 100.
Specifically, after the EMMC chip 221 is tested, described higher level's system board passes through the mainboard interface
211 send the test result of the EMMC chip 221 to the host computer 100.Optionally, whenever one piece of EMMC chip
After 221 complete test, described higher level's system board pass through the mainboard interface 211 sent to the host computer 100 it is described
The test result of EMMC chip 221.Optionally, when all EMMC chips 221 on described higher level's system board are completed to survey
After examination, described higher level's system board sends all EMMC chips to the host computer 100 by the mainboard interface 211
221 test result.
In the present embodiment, by the way that the mainboard interface 211 is arranged on system-level mainboard 210 on said sheets, so that described
Host computer 100 can obtain the test result of the EMMC chip 221 in real time.
Please continue to refer to Fig. 3, in the embodiment of the application, the EMMC daughter board 220 carries the multiple EMMC core
Piece 221.
Specifically, the multiple EMMC chip 221 can be welded in the EMMC daughter board 220.The EMMC chip 221
The arrangement mode of quantity and the EMMC chip 221 is determined by the circuit structure of the EMMC daughter board 220.Optionally, one piece of institute
It states EMMC daughter board 220 and carries 8 EMMC chips 221.
In the present embodiment, by carrying the multiple EMMC chip 221 on the EMMC daughter board 220, so that primary
In total test, single piece higher level system board can take turns the multiple EMMC chips 221 of current test, eliminate frequently plug EMMC
The trouble of plate 220, greatly improves testing efficiency.
Please continue to refer to Fig. 3, in the embodiment of the application, the EMMC daughter board 220 further include control module 222,
Processor 223 and daughterboard interface 224.The control module 222 is electrically connected with the EMMC chip 221 respectively.The processor
223 are electrically connected with the control module 222.The daughterboard interface 224 respectively with the processor 223 and the host computer 100
Electrical connection.The control module 222 is used for the test when the system on chip grade mainboard 210 executes an EMMC chip 221
After process, switch the EMMC chip 221 so that the system on chip grade mainboard 210 executes another described EMMC chip
221 test process.The processor 223 is used to send control signal to the control module 222, to control the control mould
Block 222 completes the switching of the EMMC chip 221.The host computer 100 passes through the daughterboard interface 224 to the processor
223 issue the control instruction for switching the EMMC chip 221.
Specifically, the processor 223 can be MCU (micro-control unit).The control module 222 can be opened for simulation
Pass group.The processor 223 is the processing core of the EMMC daughter board 220.The control module 222 is provided with multiple EMMC and connects
Mouthful, each described EMMC interface connects an EMMC chip 221.When described higher level's system board is to described in one
When EMMC chip 221 executes test process, the processor 223 controls the control module 222 and opens and the EMMC to be measured
The corresponding EMMC interface of chip 221, and close EMMC interface corresponding with other non-EMMC chips 221 to be measured.When described
After piece higher level's system board terminates the execution test process of an EMMC chip 221, described higher level's system board is to institute
It states host computer 100 and returns to test result.The host computer 100 passes through the daughterboard interface 224, Xiang Suoshu EMMC daughter board 220
The processor 223 sends the control instruction of switching EMMC chip 221.Further, the processor 223 is to the control mould
Block 222 sends control signal, complete to control the EMMC interface that the control module 222 opens another EMMC chip 221 to be measured
At the switching of the EMMC chip 221.
In the present embodiment, by the way that the control module 222, processor 223 and daughter board are arranged on the EMMC daughter board 220
Interface 224 realizes after the test process of an EMMC chip 221, automatically switches to another EMMC
The test process of chip 221 realizes the automation that the EMMC chip 221 is tested, without manually replacing the EMMC chip
221, without manually keeping an eye on, save manpower.
Please continue to refer to Fig. 3, in the embodiment of the application, the EMMC daughter board 220 further includes signal attachment base
225.The signal attachment base 225 is set to the EMMC daughter board 220.The signal attachment base 225 and the control module 222
Electrical connection.The signal attachment base 225 is for connecting the system on chip grade mainboard 210 and the EMMC daughter board 220.
Specifically, the signal attachment base 225 is built-in with connection circuit, so that the EMMC daughter board 220 and the on piece
System-level mainboard 210 realizes circuit connection.
In the present embodiment, by the way that the signal attachment base 225 is arranged on the EMMC daughter board 220, so that the EMMC
Daughter board 220 can be achieved a fixed connection by the signal attachment base 225 with the system on chip grade mainboard 210 to be connected with circuit
It connects.
As shown in figure 4, the signal attachment base 225 further includes slot 226 in the embodiment of the application.It is described to insert
Slot 226 is set to the signal attachment base 225.The EMMC daughter board 220 passes through the slot 226 and the system on chip grade master
Plate 210 is detachably connected.
Specifically, when the test of an EMMC daughter board 220 starts, the EMMC daughter board 220 is inserted into the letter
In the slot 226 of number attachment base 225.At the end of the test of an EMMC daughter board 220, by the EMMC daughter board 220 from
It is extracted in the slot 226 of the signal attachment base 225.
In the present embodiment, by the way that the slot 226 is arranged on the signal attachment base 225, the EMMC daughter board is realized
220 are detachably connected with the system on chip grade mainboard 210, so that the EMMC daughter board 220 is after test, Ke Yian
It is complete to extract, the EMMC daughter board 220 is neither damaged, the EMMC chip 221 inside the EMMC daughter board 220 is not damaged yet, can follow
Ring test saves testing cost.
As shown in figure 5, the EMMC daughter board 220 further includes power supply change-over device 227 in the embodiment of the application.
The power supply change-over device 227 is electrically connected with the processor 223.The power supply change-over device 227 is also connect with the signal
Seat 225 is electrically connected.The power supply change-over device 227 is by the signal attachment base 225, with the system on chip grade mainboard 210
Electrical connection.The power supply change-over device 227 is used to power to the EMMC daughter board 220 and the system on chip grade mainboard 210.
The power supply change-over device 227 is also used to when switching the EMMC chip 221, to 220 He of EMMC daughter board
The system on chip grade mainboard 210 is performed simultaneously the operation that power supply is restarted, after the system on chip grade mainboard and switching
The EMMC chip re-establishes connection.
Specifically, the EMMC daughter board 220 is required to when switching the EMMC chip 221 each time to the EMMC
Daughter board 220 and the system on chip grade mainboard 210 carry out primary power source simultaneously and restart.In the EMMC daughter board 220 and described
Upper system-level mainboard 210 is performed both by after power supply restarts, and executes test process to the new EMMC chip 221 after switching.Switching
When next EMMC chip, power supply is carried out again and is restarted.Due to being tested each described EMMC chip 221
Before, need to establish the connection relationship of the EMMC chip 221 and the system on chip grade mainboard 210.Switching the EMMC core
It when piece 221, needs to disconnect the connection relationship of the EMMC chip 221 and the system on chip grade mainboard 210, establishes new
The EMMC chip 221 and the system on chip grade mainboard 210 connection relationship.Therefore, it is necessary to the EMMC daughter board 220
Power supply is performed both by with the system on chip grade mainboard 210 to restart.In the embodiment of the application, turned by the way that the power supply is arranged
Changing device 227 is realized when switching the EMMC chip 221, to the EMMC daughter board 220 and the system on chip grade mainboard
The operation that 210 execution power supplys are restarted, so that the EMMC chip 221 after the system on chip grade mainboard 210 and switching is again
Connection is established, host computer 100 is facilitated to replace monitoring objective.
As shown in fig. 6, in the embodiment of the application, the power supply change-over device 227 include power circuit 228 and after
Electric appliance 229.The relay 229 is electric with the power circuit 228, the processor 223 and the signal attachment base 225 respectively
Connection.The power circuit 228 is used to provide power supply to the EMMC daughter board 220 and the system on chip grade mainboard 210.It is described
Relay 229 is used under the control of the processor 223, is switched in or out the power circuit 228.
Specifically, when needing to power on the EMMC daughter board 220 and the system on chip grade mainboard 210, the processing
The switch that device 223 controls the relay 229 is attracted, and the relay 229 is connected to the power circuit 228.When needs pair
When the EMMC daughter board 220 and the system on chip grade mainboard 210 power off, the processor 223 controls the relay 229
Switch disconnects, and the relay 229 is disconnected with the power circuit 228.
In the embodiment of the application, by the way that the relay 229 and the power circuit 228 is arranged, realize to institute
Electricity under the powering on of EMMC daughter board 220 and the system on chip grade mainboard 210 is stated, in order to which the EMMC chip test system is automatic
Change the test process for executing the EMMC chip 221.
Fig. 7 is the structural schematic diagram of one embodiment of EMMC chip test system provided by the present application.The embodiment is contained
The technical characteristic mentioned in above-mentioned whole embodiments is covered.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The several embodiments of the application above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously
The limitation to the application the scope of the patents therefore cannot be interpreted as.It should be pointed out that for those of ordinary skill in the art
For, without departing from the concept of this application, various modifications and improvements can be made, these belong to the guarantor of the application
Protect range.Therefore, the scope of protection shall be subject to the appended claims by the application.
Claims (10)
1. a kind of EMMC chip test system characterized by comprising
Host computer (100), for monitoring the test process of EMMC chip (221)；The EMMC chip (221) is embedded more matchmakers
Body card；
Multiple slave computers (200), each slave computer (200) and the host computer (200) communicate to connect, described for executing
The test process of EMMC chip (221), each described slave computer (200) carry multiple EMMC chips (221).
2. EMMC chip test system according to claim 1, which is characterized in that the host computer (100) includes:
Monitoring module (110), for monitoring the test of EMMC chip (221) described in multiple slave computers (200) simultaneously
Journey.
3. EMMC chip test system according to claim 1, which is characterized in that the slave computer (200) is on piece system
Irrespective of size mainboard (210), each described system on chip grade mainboard (210) are embedded one piece of EMMC daughter board (220).
4. EMMC chip test system according to claim 3, which is characterized in that the system on chip grade mainboard (210)
Include:
Mainboard interface (211) is electrically connected with the host computer (100), and the system on chip grade mainboard (210) passes through the mainboard
Interface (211) Xiang Suoshu host computer (100) sends the test result of the EMMC chip (221).
5. EMMC chip test system according to claim 3, which is characterized in that the EMMC daughter board (220) carries institute
State multiple EMMC chips (221).
6. EMMC chip test system according to claim 5, which is characterized in that the EMMC daughter board (220) further include:
Control module (222) is electrically connected with multiple EMMC chips (221) respectively, for working as the system on chip grade mainboard
(210) after the test process executed to an EMMC chip (221), switch the EMMC chip (221) so that described
Upper system-level mainboard (210) executes the test process of another EMMC chip (221)；
Processor (223) is electrically connected with the control module (222), for sending control letter to the control module (222)
Number, to control the switching that the control module (222) complete the EMMC chip (221)；And
Daughterboard interface (224) is electrically connected with the processor (223) and the host computer (100), the host computer respectively
(100) referred to by the control that the daughterboard interface (224) Xiang Suoshu processor (223) issues the switching EMMC chip (221)
It enables.
7. EMMC chip test system according to claim 6, which is characterized in that the EMMC daughter board (220) further include:
Signal attachment base (225) is set to the EMMC daughter board (220), is electrically connected with the control module (222), for connecting
Connect the system on chip grade mainboard (210) and the EMMC daughter board (220).
8. EMMC chip test system according to claim 7, which is characterized in that the signal attachment base (225) is also wrapped
It includes:
Slot (226) is set to the signal attachment base (225)；
The EMMC daughter board (220) is detachably connected by the slot (226) and the system on chip grade mainboard (210).
9. EMMC chip test system according to claim 8, which is characterized in that the EMMC daughter board (220) further include:
Power supply change-over device (227) is electrically connected with the processor (223) and the signal attachment base (225), for
The EMMC daughter board (220) and the system on chip grade mainboard (210) power supply；
The power supply change-over device (227) is also used to when switching EMMC chip (221), to the EMMC daughter board (220)
Be performed simultaneously the operation that power supply is restarted with the system on chip grade mainboard (210), by the system on chip grade mainboard (210) with
The EMMC chip (221) after switching re-establishes connection.
10. EMMC chip test system according to claim 9, which is characterized in that power supply change-over device (227) packet
It includes:
Power circuit (228), for providing power supply to the EMMC daughter board (220) and the system on chip grade mainboard (210)；
Relay (229), respectively with the power circuit (228), the processor (223) and the signal attachment base (225)
Electrical connection, for being switched in or out the power circuit (228) under the control of the processor (223).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910289428.5A CN110289042B (en) | 2019-04-11 | 2019-04-11 | EMMC chip test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910289428.5A CN110289042B (en) | 2019-04-11 | 2019-04-11 | EMMC chip test system |
Publications (2)
| Publication Number | Publication Date |
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| CN110289042A true CN110289042A (en) | 2019-09-27 |
| CN110289042B CN110289042B (en) | 2021-05-18 |
Family
ID=68001435
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| CN201910289428.5A Active CN110289042B (en) | 2019-04-11 | 2019-04-11 | EMMC chip test system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113282439A (en) * | 2021-05-08 | 2021-08-20 | 成都佰维存储科技有限公司 | eMMC test method, device, readable storage medium and electronic equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102788947A (en) * | 2011-05-17 | 2012-11-21 | 联咏科技股份有限公司 | Testing chip and chip testing system thereof |
| CN106887257A (en) * | 2017-03-16 | 2017-06-23 | 数据通信科学技术研究所 | A kind of many intelligent card test systems and method |
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2019
- 2019-04-11 CN CN201910289428.5A patent/CN110289042B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102788947A (en) * | 2011-05-17 | 2012-11-21 | 联咏科技股份有限公司 | Testing chip and chip testing system thereof |
| CN106887257A (en) * | 2017-03-16 | 2017-06-23 | 数据通信科学技术研究所 | A kind of many intelligent card test systems and method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113282439A (en) * | 2021-05-08 | 2021-08-20 | 成都佰维存储科技有限公司 | eMMC test method, device, readable storage medium and electronic equipment |
| CN113282439B (en) * | 2021-05-08 | 2023-05-23 | 成都佰维存储科技有限公司 | eMMC test method and device, readable storage medium and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110289042B (en) | 2021-05-18 |
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