CN110288951B - Solid state total reflection display panel, display device and driving method - Google Patents

Solid state total reflection display panel, display device and driving method Download PDF

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CN110288951B
CN110288951B CN201910535669.3A CN201910535669A CN110288951B CN 110288951 B CN110288951 B CN 110288951B CN 201910535669 A CN201910535669 A CN 201910535669A CN 110288951 B CN110288951 B CN 110288951B
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signal line
voltage
control switch
switch tube
electrically connected
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CN110288951A (en
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卢峰
姚绮君
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Shanghai Tianma Microelectronics Co Ltd
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Shanghai Tianma Microelectronics Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source

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Abstract

The embodiment of the invention provides a solid state total reflection display panel, a display device and a driving method, relates to the technical field of display, and can realize heating control of pixels under the condition of bearing larger current by using a diode as a gating device. The solid state total reflection display panel includes: the pixel units comprise heating devices, reflecting layers, resonant cavities and phase change material layers which are sequentially stacked; each pixel unit further comprises a diode, and the heating device and the diode are connected between the first voltage end and the second voltage end in series; the first control switch tube is used for controlling the connection or disconnection between the first voltage signal wire and the first power supply signal wire; the second control switch tube is used for controlling the connection or disconnection between the second voltage signal wire and the second power signal wire; the second control switch tube is a PMOS transistor.

Description

Solid state total reflection display panel, display device and driving method
Technical Field
The invention relates to the technical field of display, in particular to a solid state total reflection display panel, a display device and a driving method.
Background
The solid state total reflection display panel comprises a Phase Change Material (PCM), wherein the Phase Change Material has a crystallization state and an amorphization state, the Phase Change Material in the two states has different refractive indexes, so that different display effects can be realized in the two states to realize a display function, the two states are switched in a heating mode, a gating device is required to be used for heating control of different pixels, and the gating device needs to pass through larger current, so that the problem to be solved is that the gating device realizes gating control under the condition of bearing larger current.
Disclosure of Invention
The embodiment of the invention provides a solid state total reflection display panel, a display device and a driving method, wherein a diode can be used as a gating device, and the diode can realize heating control of pixels under the condition of bearing larger current.
In one aspect, an embodiment of the present invention provides a solid state total reflection display panel, including:
an array substrate;
the pixel units are positioned on the array substrate and arranged in a matrix manner along the row direction and the column direction, and each pixel unit comprises a heating device, a reflecting layer, a resonant cavity and a phase-change material layer which are sequentially stacked;
each pixel unit further comprises a first voltage end, a second voltage end and a diode, wherein in each pixel unit, the heating device and the diode are connected in series between the first voltage end and the second voltage end, the cathode of the diode is electrically connected to the first voltage end, the anode of the diode is electrically connected to the first voltage end through the cathode of the diode, and the anode of the diode is electrically connected to the second voltage end;
the first voltage ends of the pixel units in one row are electrically connected with a first voltage signal line;
the second voltage ends of the pixel units in one row are electrically connected with a second voltage signal line;
a first power supply signal line for supplying a first power supply signal;
a second power supply signal line for supplying a second power supply signal;
a first control switch tube electrically connected between the first voltage signal line and the first power signal line for controlling the connection or disconnection between the first voltage signal line and the first power signal line;
a second control switch tube electrically connected between the second voltage signal line and the second power signal line for controlling the connection or disconnection between the second voltage signal line and the second power signal line;
the second control switch tube is a PMOS transistor.
On the other hand, an embodiment of the present invention further provides a display device, including the solid state total reflection display panel.
On the other hand, an embodiment of the present invention further provides a driving method for the solid state total reflection display panel, where the driving method includes:
in the same time interval, only one first voltage signal line and the first power signal line are controlled to be conducted through the first control switch tube, and the other first voltage signal lines and the first power signal line are controlled to be cut off;
and in the same time period, only one second voltage signal wire and the second power signal wire are controlled to be conducted through the second control switch tube, and the other second voltage signal wires and the second power signal wire are controlled to be cut off.
In the solid state total reflection display panel, the display device and the driving method in the embodiment of the invention, the diode is used as the gating device of each pixel unit, the diode can realize the heating control of the pixel under the condition of bearing larger current, and in addition, the second control switch tube is arranged to be PMOS, so that the grid voltage of the second control switch tube can be lower, the requirement of a driving chip is met, and the driving stability is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of an equivalent circuit structure of a partial region of a solid-state total reflection display panel according to an embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view of a partial area of a solid state total reflection display panel according to an embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view of a partial region of a solid state total reflection display panel according to another embodiment of the present invention;
fig. 4 is a schematic diagram of a layout structure of a partial region of a solid-state total reflection display panel according to an embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view of a partial region of a solid state total reflection display panel according to another embodiment of the present invention;
FIG. 6 is a schematic diagram of an equivalent circuit structure of a partial region of another solid state total reflection display panel according to an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of a display device according to an embodiment of the invention;
FIG. 8 is a timing diagram of a pixel unit during a crystallization period and an amorphization period according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
As shown in fig. 1 and fig. 2, fig. 1 is a schematic diagram of an equivalent circuit structure of a partial region of a solid state total reflection display panel in an embodiment of the present invention, and fig. 2 is a schematic diagram of a cross-sectional structure of a partial region of a solid state total reflection display panel in an embodiment of the present invention, where an embodiment of the present invention provides a solid state total reflection display panel, including: an array substrate 1; a plurality of pixel units 2 arranged in a matrix along a row direction h1 and a column direction h2 on an array substrate, each pixel unit 2 includes a heating device R, a reflective layer 21, a resonant cavity 22 and a phase-change material layer 23 stacked in sequence, where the heating device R is illustrated as a heating resistor in fig. 1, but not limited thereto, and is described here as an example of a heating resistor, which generates heat under the action of current, and changes the crystallization state of the phase-change material layer 23 by releasing heat, such as switching between the crystallization state and the amorphization state, the reflective layer 21 is used to reflect light, the resonant cavity 22 is used to form a microcavity, and the phase-change material layer 23 cooperates to realize the emergence of light with specific wavelength, that is, different pixel units 2 can realize different color display by adjusting the thickness of the resonant cavity 22, and the phase-change material layer 23 is used to switch between the crystallization state and the amorphization state, the two states are different physical states, atoms in the phase-change material layer 23 in the crystallization state are arranged periodically, atoms in the phase-change material layer 23 in the non-crystallization state are arranged out of order, and the phase-change material layer 23 has a state maintaining characteristic, namely, is bistable, and in the two states, the phase-change material layer 23 can realize switching between two colors by matching with the resonant cavity 22; each pixel cell 2 further comprises a first voltage terminal V1, a second voltage terminal V2 and a diode D, in each pixel cell 2, the heating device R and the diode D are connected in series between a first voltage terminal V1 and a second voltage terminal V2, wherein the cathode of the diode D is electrically connected to the first voltage terminal V1, the anode of the diode D is electrically connected to the first voltage terminal V1 through the cathode of the diode D, the anode of the diode D is electrically connected to the second voltage terminal V2, only the structure in which the diode D is connected in series between the heating device R and the first voltage terminal V1 is illustrated in fig. 1, in the embodiment of the present invention, the electrical connection position of the diode D and the heating device R is not limited as long as both are connected in series between the first voltage terminal V1 and the second voltage terminal V2, the cathode of the diode D is electrically connected to the first voltage terminal V1, and the anode of the diode D is electrically connected to the second voltage terminal V2; the first voltage terminal V1 of one ROW of pixel cells 2 is electrically connected to one first voltage signal line ROW; the second voltage terminal V2 of one column of pixel units 2 is electrically connected to one second voltage signal line COL; a first power supply signal line Vrow for supplying a first power supply signal; a second power signal line Vcol supplying a second power signal; a first control switch tube M electrically connected between the first voltage signal line ROW and the first power signal line Vrow for controlling the on/off between the first voltage signal line ROW and the first power signal line Vrow; a second control switch tube T electrically connected between the second voltage signal line COL and the second power signal line Vcol for controlling the on/off between the second voltage signal line COL and the second power signal line Vcol; the second control switch tube T is a PMOS transistor. In order to enable the heating resistor to provide heat, a power supply signal needs to be provided for the heating resistor, and the power supply signal needs to be controlled so as to apply the power supply signal to the heating resistor when the heating resistor needs to provide heat, and to prohibit the power supply signal from being applied to the heating resistor when the heating resistor does not need to provide heat, and at the moment, the switching action of the transistor can be used for realizing the control of the power supply signal.
On the other hand, an embodiment of the present invention further provides a driving method for the solid state total reflection display panel, where the driving method includes: in the same time period, only one first voltage signal line ROW is controlled to be connected with the first power signal line Vnow through the first control switch tube M, and the other first voltage signal lines ROW are controlled to be disconnected with the first power signal line Vnow; in the same time period, only one second voltage signal line COL is controlled to be connected with the second power signal line Vcol through the second control switch tube T, and the other second voltage signal lines COL are controlled to be disconnected with the second power signal line Vcol.
Specifically, fig. 1 only illustrates a pixel unit matrix formed by two ROWs and two columns and four pixel units 2 in total, and actually, there are usually a greater number of pixel units 2 forming the matrix to realize image display, each ROW of pixel units 2 corresponds to each first voltage signal line ROW one by one, each column of pixel units 2 corresponds to each column of second voltage signal lines COL one by one, each first voltage signal line ROW is electrically connected to the first power signal line Vrow through the corresponding first control switch tube M, and each second voltage signal line COL is electrically connected to the second power signal line Vcol through the corresponding second control switch tube T. During the driving process, signal input is respectively performed to each pixel unit 2 to realize state transition of the phase change material layer 23 corresponding to the pixel unit 2, so that the pixel unit 2 realizes corresponding color display according to the state after transition of the phase change material layer 23, for example, when signal input is performed to the first ROW and first column of pixel units 2, the first control switch M corresponding to the first ROW of pixel units 2 is turned on, the other first control switch M is turned off, that is, the first ROW first voltage signal line ROW and the first power signal line Vrow are turned on, during the period, the second control switch T corresponding to the first column of pixel units 2 is turned on, the other second control switch T is turned off, that is, the first column second voltage signal line COL and the second power signal line Vcol are turned on, at this time, the first voltage terminal V1 of the first ROW and first column of pixel units 2 has the first power signal, the second voltage terminal V2 of the first row and column of pixel cells 2 has a second power supply signal, the voltage difference between them provides the heating device R and the diode D in the pixel cell 2 to conduct, that is, a current flows through the heating device R and the diode D, the heating device R generates heat when the current flows through the heating device R, the phase change material layer 23 above the heating device R is phase-changed by the heat generated by the heating device R, the phase change material layer 23 is switched between a crystallized state and an amorphized state, and after the state switching is completed, the pixel cell 2 has completed the state change of the display color, and when the heating device R in the pixel cell 2 generates heat, the heating devices R in the other pixel units 2 do not generate heat, and therefore, only the phase change material layer 23 corresponding to the pixel unit 2 changes phase, and the phase change material layers 23 corresponding to the other pixel units 2 all maintain the original state. After the signal input of a certain pixel unit 2 is completed, the signal input can be performed on other pixel units 2, and so on, and the signal input is performed on the pixel units 2 one by one, so as to refresh the whole display screen.
It should be noted that, since a large current needs to flow when the heating device R generates heat, at this time, a large voltage difference needs to be between the first voltage terminal V1 and the second voltage terminal V2, when the voltage value corresponding to the second voltage terminal V2 is large, for example, the second power signal line Vcol provides a voltage of 30V, if the second control switch tube T is NMOS, the turn-on voltage corresponding to the gate thereof is 30V + Vth, that is, when the gate voltage thereof is greater than 30V + Vth, the absolute value of the required gate voltage value is large, Vth is the threshold voltage of the second control switch tube T, the gate voltage thereof is provided by the driver chip, and the capability of the driver chip to provide a large voltage value is poor, therefore, in order to ensure the driving stability, the second control switch tube T may be set to PMOS, at this time, if the second power signal line Vcol provides a voltage of 30V, the turn-on voltage corresponding to the gate of the second control switch tube T is 30V-Vth, namely, when the grid voltage is less than 30V-Vth, the grid is switched on, and at the moment, the amplitude of the voltage required to be provided by the driving chip is smaller, namely, the driving stability is higher.
In the solid state total reflection display panel and the driving method in the embodiment of the invention, the diode is used as the gating device of each pixel unit, the diode can realize the heating control of the pixel under the condition of bearing larger current, and in addition, the second control switch tube is set to be PMOS, so that the grid voltage of the second control switch tube can be lower, the requirement of a driving chip is met, and the driving stability is improved.
Optionally, the first control switch M is an NMOS transistor.
Specifically, when a signal is input to a certain pixel unit 2, the first voltage terminal V1 has a lower voltage, the second voltage terminal V2 has a higher voltage, when the voltage value corresponding to the first voltage terminal V1 is lower, for example, when the first power signal line Vrow provides a voltage of-30V, if the first control switch tube M is PMOS, the gate corresponding to the first control switch tube is-30-Vth, i.e., it is turned on when the gate voltage is lower than-30-Vth, the absolute value of the required gate voltage value is larger, Vth is the threshold voltage of the first control switch tube, the gate voltage of the first control switch tube is provided by the driver chip, and the capability of the driver chip to provide a large voltage amplitude is poor, therefore, in order to ensure the driving stability, the first control switch tube M may be set to NMOS, at this time, if the first power signal line Vrow provides a voltage value of-30V, the gate corresponding to the first control switch tube M is-30V + Vth, namely, when the grid voltage is larger than-30V + Vth, the grid is switched on, and at the moment, the absolute value of the voltage required to be provided by the driving chip is smaller, namely, the driving stability is higher.
Optionally, the solid state total reflection display panel includes a semiconductor layer 24, a first metal layer 25, a second metal layer 26, a heating device R, a reflective layer 21, a resonant cavity 22, and a phase change material layer 23, which are sequentially stacked in a direction perpendicular to a plane of the solid state total reflection display panel; a PN junction of the diode D is positioned on the semiconductor layer 24, an anode D1 and a cathode D2 of the diode D are positioned on the second metal layer 26, and the anode D1 and the cathode D2 are electrically connected to the PN junction through vias; an active layer M1 of the first control switch M and the second control switch T is located on the semiconductor layer 24 for forming a channel, a source M2 and a drain M3 of the first control switch M and the second control switch T are located on the second metal layer 26, the source M2 and the drain M3 are electrically connected to the active layer M1 through a via, and a gate M4 of the first control switch M and the second control switch T is located on the first metal layer 25, wherein only a film layer structure of the first control switch M is illustrated in fig. 2.
Specifically, for each pixel unit 2, the cathode D2 of the diode D is electrically connected to the first voltage signal line ROW, the connection node of the two is the first voltage terminal V1, the first voltage signal line ROW is electrically connected to the source M2 of the first control switch M, the anode D1 of the diode D is electrically connected to one end of the heating device R, the other end of the heating device R is electrically connected to the second voltage signal line COL, the connection node of the two is the second voltage terminal V2, the drain M3 of the first control switch M is electrically connected to the first power signal line Vrow, the source of the second control switch T is electrically connected to the second power signal line Vcol, and the drain of the second control switch T is electrically connected to the second voltage signal line COL. In fig. 2, a glass substrate or a flexible substrate may be disposed below the semiconductor layer 24, and the side of the phase change material layer 23 away from the heating device R includes an organic layer with low thermal conductivity, so that the phase change material layer 23 can reach a desired temperature as soon as possible under the action of the heating device R to realize state transition.
Alternatively, one of the first voltage signal line ROW and the second voltage signal line COL is located in the first metal layer 25, and the other is located in the second metal layer 26. In the structure illustrated in fig. 2, the first voltage signal line ROW is located in the second metal layer 26, the second voltage signal line COL is located in the first metal layer 25, and since the first voltage signal line ROW is used for connecting each ROW of pixel units 2, the second voltage signal line COL is used for connecting each column of pixel units 2, and the first voltage signal line ROW and the second voltage signal line COL need to be arranged in an insulating and crossing manner, they are directly arranged in different metal layers, so that the cross-line processing of the first voltage signal line ROW and the second voltage signal line COL in the same layer can be avoided, and the manufacturing process is simplified.
Alternatively, as shown in fig. 1, fig. 3 and fig. 4, fig. 3 is a schematic cross-sectional structure diagram of a partial region of another solid state total reflection display panel in the embodiment of the present invention, fig. 4 is a schematic layout structure diagram of a partial region of a solid state total reflection display panel in the embodiment of the present invention, and a third metal layer 27 is disposed between the heating device R and the second metal layer 26; one of the first voltage signal line ROW and the second voltage signal line COL is located in the third metal layer 27, and the other is located in the first metal layer 25 or the second metal layer 26.
Specifically, in the structures illustrated in fig. 3 and 4, the first voltage signal line ROW is located in the second metal layer 26, and the second voltage signal line COL is located in the third metal layer 27, so that the first voltage signal line ROW located in the third metal layer 27 may overlap with a lower metal layer, that is, may have a larger line width, and may make the voltage values transmitted by the first voltage signal line ROW received by each pixel unit 2 closer, thereby improving the uniformity of the display screen. It should be noted that fig. 4 does not illustrate the heating device R, and only illustrates the via connection position R1 between the heating device R and the first voltage signal line ROW, and the via connection position R2 between the heating device R and the second metal layer 26, at R2, the heating device R is electrically connected to the metal pad in the second metal layer 26 through the via, and the metal pad is electrically connected to the PN junction of the diode D in the semiconductor layer 24 through the via, as can be seen from fig. 4, since the second voltage signal line COL is located in the third metal layer 27, the second voltage signal line COL is not affected by other metal layers, and the second voltage signal line COL has a larger line width, so as to reduce the voltage drop on the second voltage signal line COL during signal transmission.
Alternatively, as shown in fig. 1 and fig. 5, fig. 5 is a schematic cross-sectional view of a partial region of another solid-state total reflection display panel according to an embodiment of the present invention, where one of the first voltage signal line ROW and the second voltage signal line COL is located in the reflective layer 21, and the other is located in the first metal layer 25 or the second metal layer 26.
Specifically, in the structure illustrated in fig. 5, the first voltage signal line ROW is located in the second metal layer 26, and the second voltage signal line COL is located in the reflective layer 21, because the reflective layer 21 can be made of a metal material to implement the function of reflecting light, the second voltage signal line COL can be made through the reflective layer 21, so that the second voltage signal line COL can be reused as the reflective layer 21, on one hand, the second voltage signal line COL located in the reflective layer 21 can be overlapped with the metal layer below, i.e. have a larger line width, and the voltage value transmitted by the first voltage signal line ROW received by each pixel element 2 can be closer, thereby improving the uniformity of the display screen; on the other hand, an additional metal layer does not need to be manufactured independently, and the process cost is saved.
Optionally, the solid state total reflection display panel further includes: a first scan driving circuit (not shown in the figure), electrically connected to the control end of each first control switch tube M, i.e. the gate of the first control switch tube M; a second scan driving circuit (not shown in the figure) is electrically connected to the control end of each second control switch tube T, i.e. the gate of the second control switch tube T.
Specifically, the first scan driving circuit is used to provide scan signals to drive the first control switch tubes M to be conducted one by one, and the second scan driving circuit is used to provide scan signals to drive the second control switch tubes T to be conducted one by one, for example, the first scan driving circuit controls the conduction of the first control switch tube M, at this time, the second scan driving circuit controls the conduction of the first second control switch tube T, i.e. signal input is performed on the first row and first column of pixel units 2, then, the conduction of the first control switch tube M is maintained, the conduction of the second control switch tube T is controlled by the second scan driving circuit, i.e. signal input is performed on the first row and second column of pixel units 2, and so on, after the scanning of the first row of pixel units 2 is completed, the first scan driving circuit controls the conduction of the second first control switch tube M, at this time, the second scan driving circuit controls the conduction of the first second control switch tube T, the signal input is performed on the pixel units 2 in the first row and the first column in the second row, then the second first control switch tube M is kept turned on, the second scanning driving end line controls the second control switch tube T to be turned on, that is, the signal input is performed on the pixel units 2 in the second row and the second column in the second row, and so on, after the scanning of the pixel units 2 in the second row is completed, the pixel units 2 in the third row are scanned in the same manner, so that the one-by-one scanning of each pixel unit 2 is realized, and the refreshing of the whole picture is realized.
Optionally, the solid state total reflection display panel further includes: and the driving chip (not shown in the figure) is electrically connected to the control end of each first control switch tube M and the control end of each second control switch tube T.
Specifically, the driving chip is directly connected to the first control switch tube M and the second control switch tube T, and different from the driving mode by the scanning driving circuit, because the phase change material layer 23 corresponding to the pixel unit 2 has the characteristic of bistable state, the state can be maintained, therefore, for refreshing the picture, it is not necessary to periodically perform signal input for each pixel unit 2, it is only necessary to perform signal input for the pixel unit 2 with change in the new picture, so as to change the state of the phase change material layer 23 corresponding to the pixel unit 2, therefore, the pixel unit 2 to be changed in state can be directly searched by the driving chip to perform signal input, it is not necessary to perform continuous scanning by using the scanning driving circuit, and the power consumption of the driving mode is low.
Alternatively, as shown in fig. 6, fig. 6 is a schematic diagram of an equivalent circuit structure of a partial region of another solid state total reflection display panel according to an embodiment of the present invention, where the solid state total reflection display panel includes two first power signal lines Vrow and two second power signal lines Vcol; the first voltage signal line ROW includes a first end and a second end, the first end of the first voltage signal line ROW is electrically connected to one first power signal line Vrow through one first control switch tube M, and the second end of the first voltage signal line ROW is electrically connected to the other first power signal line Vrow through the other first control switch tube M; the second voltage signal line COL includes a first end and a second end, the first end of the second voltage signal line COL is electrically connected to one second power signal line Vcol through one second control switch transistor T, and the second end of the second voltage signal line COL is electrically connected to the other second power signal line Vcol through the other second control switch transistor T.
Specifically, the first voltage signal line ROW needs to be connected to a ROW of pixel units 2, the second voltage signal line COL needs to be connected to a column of pixel units 2, and voltage drops are generated on the signal lines in the signal transmission process, so that voltage values received at different positions have differences.
As shown in fig. 7, fig. 7 is a schematic structural diagram of a display device according to an embodiment of the present invention, and the embodiment of the present invention further provides a display device including the solid state total reflection display panel 100.
Specifically, the specific structure of the solid state total reflection display panel 100 is the same as that of the above embodiments, and is not described herein again. The display device can be any electronic equipment with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic paper book or a television.
Alternatively, as shown in fig. 1 and 8, fig. 8 is a timing diagram of a crystallization period and an amorphization period of a pixel unit in an embodiment of the invention, when the same period is a crystallization period t1, the crystallization period t1 sequentially includes a crystallization period t11 and a crystallization discharge period t12, in which the second power signal line Vcol outputs a first voltage H1, the first power signal line Vrow outputs a second voltage H2, a voltage difference between the second voltage terminal V2 and the first voltage terminal V1 is H1-H2, H1 > H2 in the crystallization period t11, the diode D is turned on, and the phase change material layer 23 is melted by the heat generated by the heating device R, crystallization occurs after maintaining the temperature for a certain time, the second power signal line Vcol outputs a third voltage H3, the first power signal line V12 outputs a second voltage H8, the second voltage terminal vrv 6 and the first voltage difference between the crystallization discharge terminal V73742 and the crystallization discharge terminal H3 < H3, at this time, the diode D is turned off, no current passes through the heating device R, heating is stopped, the phase change material layer 23 is annealed to be in a crystallized state, meanwhile, in a crystallization stage t11 and a crystallization discharge stage t12, the first voltage signal line ROW corresponding to the pixel unit 2 is conducted with the first power signal line Vrow, the second voltage signal line COL corresponding to the pixel unit 2 is conducted with the second power signal line Vcol, and in the crystallization discharge stage t12, the voltage on the second power signal line Vcol is switched from the higher first voltage H1 to the lower third voltage H3, so that the higher voltage on the second voltage signal line COL is released, and adverse effects on other pixel units 2 are prevented; when the same time period is the amorphization time period t2, the amorphization time period t2 includes an amorphization phase t21 and an amorphization discharge phase t22 in sequence, in the amorphization phase t21, the second power supply signal line Vcol outputs a first voltage H1, the first power supply signal line Vrow outputs a fourth voltage H4, the voltage difference between the second voltage terminal V2 and the first voltage terminal V1 is H1-H4 > H1-H2, the diode D is turned on, and the phase change material layer 23 is melted at a higher temperature by the heat generated by the heating device R, in the amorphization discharge phase t22, the second power supply vcno ol outputs a third voltage H3, the first power supply signal line Vrow outputs a second voltage H2, wherein H1 > H2 > H3 > H4, the voltage difference between the second voltage terminal V2 and the first voltage terminal V1 is H3-H2, when the diode R is turned off, the phase change material layer is melted by the heating device 23, and the diode is solidified. The pixel unit 2 is in an amorphous state, and at the same time, in the amorphizing stage t21 and the amorphizing discharging stage t22, the first voltage signal line ROW and the first power signal line Vrow corresponding to the pixel unit 2 are conducted, the second voltage signal line COL and the second power signal line Vcol corresponding to the pixel unit 2 are conducted, and in the amorphizing discharging stage t22, the voltage on the second power signal line Vcol is switched from the higher first voltage H1 to the lower third voltage H3, so that the higher voltage on the second voltage signal line COL is released, and the adverse effect on other pixel units 2 is prevented. It should be noted that, when a signal is input to a certain pixel element 2 to switch the corresponding phase-change material layer 23 between different states, only one of the first voltage signal line ROW and the second voltage signal line COL corresponding to another pixel element 2 has a voltage, so that no signal is input to any other pixel element 2, and the corresponding phase-change material layer 23 maintains the previous state.
Optionally, the driving method comprises: controlling the first control switch tubes M to be conducted one by one to realize scanning of the line-by-line pixel units 2, and controlling the second control switch tubes T to be conducted one by one within the conducting time of the same first control switch tube M to realize scanning of each pixel unit 2 in each line one by one in the scanning process of each line of pixel units 2, wherein the specific process refers to the driving process in the structure including the first scanning driving circuit and the second scanning driving circuit in the above embodiment; or, the second control switch tubes T are controlled to be turned on one by one to scan the pixel units 2 in each column, and the first control switch tubes M are controlled to be turned on one by one within the turn-on time of the same second control switch tube T to scan each pixel unit 2 in each column one by one in the scanning process of each pixel unit 2 in each column.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (8)

1. A solid state total reflection display panel, comprising:
an array substrate;
the pixel units are positioned on the array substrate and arranged in a matrix manner along the row direction and the column direction, and each pixel unit comprises a heating device, a reflecting layer, a resonant cavity and a phase-change material layer which are sequentially stacked;
each pixel unit further comprises a first voltage end, a second voltage end and a diode, wherein in each pixel unit, the heating device and the diode are connected in series between the first voltage end and the second voltage end, the cathode of the diode is electrically connected to the first voltage end, the anode of the diode is electrically connected to the first voltage end through the cathode of the diode, and the anode of the diode is electrically connected to the second voltage end;
the first voltage ends of the pixel units in one row are electrically connected with a first voltage signal line;
the second voltage ends of the pixel units in one row are electrically connected with a second voltage signal line;
a first power supply signal line for supplying a first power supply signal;
a second power supply signal line for supplying a second power supply signal;
a first control switch tube electrically connected between the first voltage signal line and the first power signal line for controlling the connection or disconnection between the first voltage signal line and the first power signal line;
a second control switch tube electrically connected between the second voltage signal line and the second power signal line for controlling the connection or disconnection between the second voltage signal line and the second power signal line;
the second control switch tube is a PMOS transistor, and the first control switch tube is an NMOS transistor;
the solid state total reflection display panel comprises a semiconductor layer, a first metal layer, a second metal layer, the heating device, the reflecting layer, the resonant cavity and the phase change material layer which are sequentially stacked in a direction perpendicular to the plane of the solid state total reflection display panel;
a PN junction of the diode is positioned on the semiconductor layer, the anode and the cathode of the diode are positioned on the second metal layer, and the anode and the cathode are electrically connected to the PN junction through a through hole;
the active layers of the first control switch tube and the second control switch tube are positioned on the semiconductor layer, the source electrodes and the drain electrodes of the first control switch tube and the second control switch tube are positioned on the second metal layer, the source electrodes and the drain electrodes are electrically connected to the active layers through via holes, and the grid electrodes of the first control switch tube and the second control switch tube are positioned on the first metal layer;
a third metal layer is arranged between the heating device and the second metal layer;
one of the first voltage signal line and the second voltage signal line is located in the third metal layer, and the other one is located in the first metal layer or the second metal layer.
2. The solid state total reflective display panel according to claim 1, further comprising:
the first scanning driving circuit is electrically connected with the control end of each first control switch tube;
and the second scanning driving circuit is electrically connected to the control end of each second control switch tube.
3. The solid state total reflective display panel according to claim 1, further comprising:
and the driving chip is electrically connected to the control end of each first control switch tube and the control end of each second control switch tube.
4. The solid state total reflective display panel according to claim 1,
the solid state total reflection display panel comprises two first power supply signal lines and two second power supply signal lines;
the first voltage signal line includes a first end and a second end, the first end of the first voltage signal line is electrically connected to one of the first power signal lines through one of the first control switch tubes, and the second end of the first voltage signal line is electrically connected to the other of the first power signal lines through the other of the first control switch tubes;
the second voltage signal line includes a first end and a second end, the first end of the second voltage signal line is electrically connected to one of the second power signal lines through one of the second control switch tubes, and the second end of the second voltage signal line is electrically connected to the other of the second power signal lines through the other of the second control switch tubes.
5. A display device comprising the solid state total reflection display panel according to any one of claims 1 to 4.
6. A driving method for the solid state total reflection display panel according to any one of claims 1 to 4, comprising:
in the same time interval, only one first voltage signal line and the first power signal line are controlled to be conducted through the first control switch tube, and the other first voltage signal lines and the first power signal line are controlled to be cut off;
and in the same time period, only one second voltage signal wire and the second power signal wire are controlled to be conducted through the second control switch tube, and the other second voltage signal wires and the second power signal wire are controlled to be cut off.
7. The driving method according to claim 6,
when the same period is a crystallization period, the crystallization period sequentially includes a crystallization stage in which the second power signal line outputs a first voltage H1, the first power signal line outputs a second voltage H2, and a crystallization discharge stage in which the second power signal line outputs a third voltage H3, the first power signal line outputs the second voltage H2;
when the same period is an amorphization period, the amorphization period sequentially includes an amorphization period in which the second power signal line outputs the first voltage H1, the first power signal line outputs a fourth voltage H4, and an amorphization discharge period in which the second power signal line outputs the third voltage H3, the first power signal line outputs the second voltage H2, where H1 > H2 > H3 > H4.
8. The driving method according to claim 6, characterized by comprising:
controlling the first control switch tubes to be conducted one by one, and controlling the second control switch tubes to be conducted one by one within the conducting time of the same first control switch tube;
or the second control switch tubes are controlled to be conducted one by one, and the first control switch tubes are controlled to be conducted one by one within the same conducting time of the second control switch tubes.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105677112A (en) * 2016-02-24 2016-06-15 上海天马微电子有限公司 Touch display panel and touch display device
CN205563508U (en) * 2016-02-04 2016-09-07 天马微电子股份有限公司 Array substrate and touch display screen
CN106125989A (en) * 2016-07-29 2016-11-16 厦门天马微电子有限公司 Display floater and comprise its display device
CN205752176U (en) * 2016-07-12 2016-11-30 上海天马微电子有限公司 Flexible OLED display panel and flexible OLED display device
CN107479259A (en) * 2017-08-25 2017-12-15 上海天马有机发光显示技术有限公司 Display panel and display device
CN108538907A (en) * 2018-06-28 2018-09-14 武汉天马微电子有限公司 Organic light emitting display panel and organic light emitting display device
CN108878455A (en) * 2018-06-29 2018-11-23 厦门天马微电子有限公司 A kind of array substrate, display panel and display device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7002197B2 (en) * 2004-01-23 2006-02-21 Hewlett-Packard Development Company, L.P. Cross point resistive memory array
US7307268B2 (en) * 2005-01-19 2007-12-11 Sandisk Corporation Structure and method for biasing phase change memory array for reliable writing
KR100695164B1 (en) * 2005-11-09 2007-03-14 삼성전자주식회사 Non-volatile memory device of hybrid type having both a transistor and a diode as a switching device
GB201709734D0 (en) * 2017-06-19 2017-08-02 Bodle Tech Ltd Display
CN108388059A (en) * 2018-03-01 2018-08-10 上海天马微电子有限公司 Solid state total reflection display panel and display device
CN109143650A (en) * 2018-09-29 2019-01-04 上海天马微电子有限公司 Solid state total reflection display panel and display device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN205563508U (en) * 2016-02-04 2016-09-07 天马微电子股份有限公司 Array substrate and touch display screen
CN105677112A (en) * 2016-02-24 2016-06-15 上海天马微电子有限公司 Touch display panel and touch display device
CN205752176U (en) * 2016-07-12 2016-11-30 上海天马微电子有限公司 Flexible OLED display panel and flexible OLED display device
CN106125989A (en) * 2016-07-29 2016-11-16 厦门天马微电子有限公司 Display floater and comprise its display device
CN107479259A (en) * 2017-08-25 2017-12-15 上海天马有机发光显示技术有限公司 Display panel and display device
CN108538907A (en) * 2018-06-28 2018-09-14 武汉天马微电子有限公司 Organic light emitting display panel and organic light emitting display device
CN108878455A (en) * 2018-06-29 2018-11-23 厦门天马微电子有限公司 A kind of array substrate, display panel and display device

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