CN110277411B - Array substrate, organic electroluminescent display panel and display device - Google Patents
Array substrate, organic electroluminescent display panel and display device Download PDFInfo
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- CN110277411B CN110277411B CN201910561634.7A CN201910561634A CN110277411B CN 110277411 B CN110277411 B CN 110277411B CN 201910561634 A CN201910561634 A CN 201910561634A CN 110277411 B CN110277411 B CN 110277411B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
Abstract
According to the array substrate, the organic electroluminescence display panel and the display device, in the second interval region of the bending region, the second contact area between the first inorganic insulating layer and the second inorganic insulating layer is increased to be larger than the first contact area in the first interval region of the non-bending region, the first inorganic insulating layer and the second inorganic insulating layer can be ensured to be in full contact in the second interval region, the stress effect of different materials between the first inorganic insulating layer and the second inorganic insulating layer on the films is weakened, the bending performance at the position of the second interval region is enhanced, the problems of bending fracture or film falling off and the like at the position of the second interval region are prevented, and the normal work of the bending region is ensured.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, an organic electroluminescent display panel and a display device.
Background
At present, the edge of the display area of the existing curved display screen can be bent along the bending axis to the back of the display panel to form curved display. In the bending area, the curvatures of the bending parts are different, and the bending curvature of the bending part closest to the bending axis is the largest, so that the bending stress is larger at the part of the bending area in the display panel closer to the bending axis, the problems of bending fracture or film layer falling (Peeling) are more likely to occur, and the display panel cannot normally work in the bending area.
Disclosure of Invention
The embodiment of the invention provides an array substrate, an organic electroluminescent display panel and a display device, which are used for solving the problem that a bending area is easy to break.
The embodiment of the invention provides an array substrate, which is provided with a display area, wherein the display area is divided into a bending area and a non-bending area; the bending area is provided with a bending shaft extending along a first direction; the display area is internally provided with a plurality of pixel circuits which are arranged on a substrate in an array mode and a plurality of power supply voltage signal lines which extend along the first direction and are arranged along the second direction, and the first direction and the second direction are perpendicular to each other; each pixel circuit comprises a capacitor, wherein a first electrode block of the capacitor is electrically connected with the power supply voltage signal, one side surface of the first electrode block is adjacent to the first inorganic insulating layer, and the other side surface of the first electrode block is adjacent to the second inorganic insulating layer;
in the non-bending region, in a first spacing region between two adjacent first electrode blocks along the second direction, a first contact area is formed between the first inorganic insulating layer and the second inorganic insulating layer;
in the bending area, at least part of the second interval area between two adjacent first electrode blocks along the second direction is provided with a second contact area between the first inorganic insulating layer and the second inorganic insulating layer;
the area of the first spacer region is equal to the area of the second spacer region; the first contact area is smaller than the second contact area.
In a possible implementation manner, in the array substrate provided in the embodiment of the present invention, in the bending region, at least a portion of two adjacent first electrode blocks along the second direction are disconnected from each other; at the off position, the first inorganic insulating layer and the second inorganic insulating layer are in contact with each other.
In a possible implementation manner, in the array substrate provided in the embodiment of the present invention, in a unit area close to the bending axis, the first electrode blocks disconnected from each other have a first number; the first electrode blocks disconnected from each other have a second number in a unit area region away from the bending axis, the first number being greater than the second number.
In a possible implementation manner, in the array substrate provided by the embodiment of the present invention, opposite side edges between two first electrode blocks close to the bending axis have a first shortest distance, and opposite side edges between two first electrode blocks far away from the bending axis have a second shortest distance, where the first shortest distance is greater than the second shortest distance.
In a possible implementation manner, in the array substrate provided in the embodiment of the present invention, in the non-bending region, two adjacent first electrode blocks along the second direction are conducted through a first connection portion; in the first spacing region, the first inorganic insulating layer and the second inorganic insulating layer at the position of the first connection portion are not in contact with each other, and the first inorganic insulating layer and the second inorganic insulating layer at the position other than the position of the first connection portion are in contact with each other.
In a possible implementation manner, in the array substrate provided in the embodiment of the present invention, in the non-bending region, two adjacent first electrode blocks along the second direction are conducted through a first connection portion; in the first spacing region, the first inorganic insulating layer and the second inorganic insulating layer at the position of the first connection portion are not in contact with each other, and the first inorganic insulating layer and the second inorganic insulating layer at the position other than the first connection portion are in contact with each other;
in the bending area, at least part of two first electrode blocks adjacent along the second direction are conducted through a second connecting part; in the second spacing region, the first inorganic insulating layer and the second inorganic insulating layer at the second connecting portion are not in contact with each other, and the first inorganic insulating layer and the second inorganic insulating layer at the other positions than the second connecting portion are in contact with each other;
an orthographic projection area of the first connecting portion on the substrate base plate is larger than an orthographic projection area of the second connecting portion on the substrate base plate, and the first contact area in the first spacing region is smaller than the second contact area in the second spacing region.
In a possible implementation manner, in the array substrate provided in the embodiment of the present invention, at least one of the second connection portions has a plurality of hollow structures, the hollow structures in the second connection portion are arranged along the first direction, and the first inorganic insulating layer and the second inorganic insulating layer are in contact with each other through the hollow structures.
In a possible implementation manner, in the array substrate provided in an embodiment of the present invention, the hollow structure of the second connection portion is a circle, an ellipse, a diamond, or a polygon.
In a possible implementation manner, in the array substrate provided in the embodiment of the present invention, the second connection portion near the bending axis has a first orthographic projection area, and the second connection portion far from the bending axis has a second orthographic projection area, where the first orthographic projection area is smaller than the second orthographic projection area.
In a possible implementation manner, in the array substrate provided in the embodiment of the present invention, in the bending region, a part of the two adjacent first electrode blocks along the second direction is conducted through the second connection portion, another part of the two adjacent first electrode blocks along the second direction is conducted through a third connection portion, and the area occupied by the third connection portion and the area occupied by the first connection portion are the same; and in the bending area, the second connecting part is closer to the bending axis relative to the third connecting part.
In a possible implementation manner, in the array substrate provided in the embodiment of the present invention, in the bending region, a part of the two adjacent first electrode blocks along the second direction is electrically connected through the second connection portion, and another part of the two adjacent first electrode blocks along the second direction is disconnected from each other; and in the bending area, the broken part is closer to the bending axis relative to the second connecting part.
In a possible implementation manner, the array substrate provided in the embodiment of the present invention includes a gate metal layer, a capacitor metal layer, and a source drain metal layer, which are sequentially stacked on the substrate;
the first inorganic insulating layer is positioned between the grid metal layer and the capacitor metal layer, and the second inorganic insulating layer is positioned between the capacitor metal layer and the source drain metal layer;
the gate metal layer comprises a second electrode block of the capacitor;
the capacitor metal layer comprises a first electrode block of the capacitor;
the source-drain metal layer comprises the power supply voltage signal line.
On the other hand, the embodiment of the invention also provides an organic electroluminescent display panel, which comprises the array substrate provided by the embodiment of the invention.
On the other hand, the embodiment of the invention also provides a display device, which comprises the organic electroluminescent display panel provided by the embodiment of the invention.
The invention has the following beneficial effects:
according to the array substrate, the organic electroluminescent display panel and the display device provided by the embodiment of the invention, in the second interval region of the bending region, the second contact area between the first inorganic insulating layer and the second inorganic insulating layer is increased to be larger than the first contact area in the first interval region of the non-bending region, so that the first inorganic insulating layer and the second inorganic insulating layer can be ensured to be fully contacted in the second interval region, the stress effect of different materials between the first inorganic insulating layer and the second inorganic insulating layer on the films is weakened, the bending performance at the position of the second interval region is enhanced, the problems of bending fracture or film falling off and the like at the position of the second interval region are prevented, and the normal work of the bending region is ensured.
Drawings
FIG. 1 is a schematic structural diagram of a curved display screen in the prior art;
FIG. 2 is a schematic structural diagram of an array substrate in the prior art;
FIG. 3 is a schematic structural diagram of an array substrate after bending a film layer;
fig. 4 is a schematic diagram of an array substrate according to an embodiment of the present invention before bending;
fig. 5 is a schematic diagram of an array substrate according to an embodiment of the invention after being bent;
fig. 6 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 7 is a schematic view of each film layer in the array substrate according to the embodiment of the invention;
fig. 8 is a schematic structural diagram of a bending region in an array substrate according to an embodiment of the present invention;
fig. 9 is another schematic structural diagram of a bending region in an array substrate according to an embodiment of the invention;
fig. 10 is a schematic structural diagram of an array substrate according to an embodiment of the invention;
fig. 11 is another schematic structural diagram of a bending region in an array substrate according to an embodiment of the invention;
fig. 12 is a schematic structural diagram of an array substrate according to an embodiment of the invention;
fig. 13 is another schematic structural diagram of a bending region in an array substrate according to an embodiment of the invention;
fig. 14 is a circuit layout of a non-bending region in the array substrate according to the embodiment of the present invention;
fig. 15 is a circuit layout of a bending region in an array substrate according to an embodiment of the present invention;
fig. 16 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
At present, as shown in fig. 1, an edge of a display area of a conventional curved display screen is bent toward a back surface of a display panel along a bending axis X (as shown by an arrow in fig. 1), so as to form a curved display. In the region where the bending occurs, the curvatures of the respective bending portions are different, and the bending portion closest to the bending axis X has the largest bending curvature, so that the portion closer to the bending axis X in the bending region in the display panel is subjected to a larger bending stress.
As shown in fig. 2, in the array substrate of the organic electroluminescent display panel, pixel circuits arranged in an array and a power supply voltage signal line PVDD connected to the pixel circuits are disposed in a display area; wherein the power supply voltage signal lines PVDD extend in the first direction a and are arranged in the second direction b, the power supply voltage signal lines PVDD being electrically connected to one electrode block MC of the capacitor in the pixel circuit (connection holes not shown in fig. 2). In order to balance the voltage drop problem of the power supply voltage signal lines PVDD, conventionally, the electrode blocks MC in each pixel circuit are connected to each other in the second direction b through the connecting trace M, and the power supply voltage signal lines PVDD extending along the first direction a are matched to form a grid-shaped distribution. When the array substrate is bent along the bending axis X in the bending area of the array substrate in the direction indicated by the arrow in fig. 2, as shown in fig. 3, since the connection trace M is different from the adjacent inorganic insulating layers 001 and 002 in material, the stress generated by bending during bending is also different, and the connection trace M in the bending area is easily subjected to bending fracture or film layer falling (Peeling), and the like, thereby directly damaging the adjacent electrode blocks, and causing the display panel to fail to work normally in the bending area.
The embodiment of the invention provides an array substrate, an organic electroluminescent display panel and a display device, aiming at the problem that a bending area is easy to break in the prior art. In order to make the objects, technical solutions and advantages of the present invention clearer, specific embodiments of an array substrate, an organic electroluminescent display panel and a display device according to embodiments of the present invention are described in detail below with reference to the accompanying drawings. It should be understood that the preferred embodiments described below are only for illustrating and explaining the present invention and are not to be used for limiting the present invention. And the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
The shapes and sizes of the various elements in the drawings are not to scale and are merely intended to illustrate the invention.
An embodiment of the present invention provides an array substrate, as shown in fig. 4 and 5, having a display area a, where the display area a is divided into a bending area a1 and a non-bending area a 2; the bending region a1 has a bending axis X extending along the first direction a, the bending region a1 bends toward the back surface of the array substrate along the bending axis X, and a curved display is formed in the bending region a 1; the bending region a1 can be located at any position of the display region a, and the general bending region a1 is located at two sides of the non-bending region a 2;
as shown in fig. 6, the display area a has a plurality of pixel circuits 200 arranged in an array on a substrate 100, and a plurality of power voltage signal lines PVDD extending along a first direction a and arranged along a second direction b, the first direction a and the second direction b being perpendicular to each other;
as shown in fig. 6, each pixel circuit 200 includes a capacitor C having a first electrode block C1 and a second electrode block C2, the first electrode block C1 of the capacitor C being electrically connected to a power supply voltage signal line PVDD (for convenience of viewing, only one pixel circuit 200 and one second electrode block C2 of the capacitor in the upper left corner are shown in fig. 6, and connection holes of the power supply voltage signal line PVDD and the first electrode block C1 are not shown); as shown in fig. 6, one side surface of the first electrode block C1 is adjacent to the first inorganic insulating layer 001, and the other side surface of the first electrode block C1 is adjacent to the second inorganic insulating layer 002;
as shown in fig. 6, in the non-bending region a2, in the first spacing region B1 between two adjacent first electrode blocks C1 along the second direction B, the first inorganic insulating layer 001 and the second inorganic insulating layer 002 have a first contact area S1 therebetween; as can be seen from the actual circuit layout of the non-bent region a2 shown in fig. 14, the first spacing region B1 is a region between two first electrode blocks C1 in adjacent pixel circuits, which has a length in the first direction a not greater than that of the first electrode block C1, and which has a width in the second direction B equal to the spacing between the two first electrode blocks C1;
as shown in fig. 6, in the bending region a1, at least a portion of the second spacing region B2 between two adjacent first electrode blocks C1 along the second direction B has a second contact area S2 between the first inorganic insulating layer 001 and the second inorganic insulating layer 002; as can be seen from the actual circuit layout of the bending region a1 shown in fig. 15, the second spacing region B2 is a region between two first electrode blocks C1 in adjacent pixel circuits, which has a length in the first direction a not greater than that of the first electrode block C1, and which has a width in the second direction B equal to the spacing between the two first electrode blocks C1;
the area of the first spacing region B1 is equal to the area of the second spacing region B2; the first contact area S1 is smaller than the second contact area S2.
Specifically, in the array substrate provided in the embodiment of the present invention, the first inorganic insulating layer 001 and the second inorganic insulating layer 002 are generally SiO/SiN material layers, and when they are in sufficient contact with each other, the problem of breaking or falling off due to different stresses will not occur during bending, and after another film layer made of different material is added between them, the problem of breaking or falling off due to uneven stresses will easily occur during bending. Therefore, in the second spacing region B2 of the bending region a1, the second contact area S2 between the first inorganic insulating layer 001 and the second inorganic insulating layer 002 is increased to be larger than the first contact area S1 in the first spacing region B1 of the non-bending region a2, so that the first inorganic insulating layer 001 and the second inorganic insulating layer 002 can be ensured to be in full contact in the second spacing region B2, the stress action of the film material made of different materials between the first inorganic insulating layer 001 and the second inorganic insulating layer 002 on the film material is weakened, the bending performance at the position of the second spacing region B2 is enhanced, the problems of bending fracture or film falling off at the position of the second spacing region B2 are prevented, and the normal operation of the bending region a1 is ensured.
Optionally, as shown in fig. 7, the array substrate provided in the embodiment of the present invention generally includes a gate metal layer 003, a capacitor metal layer 004, and a source-drain metal layer 005, which are sequentially stacked on a substrate 100; an active layer 006 between the substrate 100 and the gate metal layer 003; wherein the content of the first and second substances,
the first inorganic insulating layer 001 is located between the gate metal layer 003 and the capacitor metal layer 004, and the second inorganic insulating layer 002 is located between the capacitor metal layer 004 and the source-drain metal layer 005; a gate insulating layer 007 is generally disposed between the gate metal layer 003 and the active layer 006;
the gate metal layer 003 includes a second electrode block C2 of the capacitance C, and a pattern such as a scan line;
the capacitance metal layer 004 includes the first electrode block C1 of the capacitance C, and a pattern such as a control line;
the source-drain metal layer 005 includes a power supply voltage signal line PVDD, and a pattern such as a Data line Data.
Specifically, in the array substrate provided by the embodiment of the present invention, the first electrode block C1 and the second electrode block C2 are overlapped with each other to form a capacitor C; the power voltage signal line PVDD is electrically connected to the first electrode block C1 through a via hole penetrating the second inorganic insulating layer 002. In order to balance the voltage drop problem of the power supply voltage signal lines PVDD, conventionally, it is necessary to electrically connect the first electrode blocks C1 in each of at least some of the pixel circuits 200 in the second direction b, and form a grid-like distribution in accordance with the power supply voltage signal lines PVDD extending in the first direction a.
Based on this, optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 6, in the non-bending region a2, two adjacent first electrode blocks C1 along the second direction b are conducted through the first connection portion 10; in the first partition region B1, the first inorganic insulating layer 001 and the second inorganic insulating layer 002 at the position of the first connection portion 10 are not in contact with each other, and the first inorganic insulating layer 001 and the second inorganic insulating layer 002 at the other positions than the first connection portion 10 are in contact with each other. Fig. 14 shows one specific circuit layout of three pixel circuits 200 arranged along the second direction b in the non-bent region a 2.
Specifically, in the first spacing region B1, the area of the first spacing region B1 excluding the area of the first connection portion 10 is the first contact area S1 of the first inorganic insulating layer 001 and the second inorganic insulating layer 002. When the areas of the first and second spaced regions B1 and B2 are the same and the area occupied by the first connection portion 10 is constant, the area occupied by the connection portion in the second spaced region B2 is reduced, so that the second contact area S2 can be increased.
Based on this, optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 6, in the bending region a1, at least a part of two first electrode blocks C1 adjacent along the second direction B may be disconnected from each other, that is, in the second separation region B2, no connection portion is provided; at the off position, the first inorganic insulating layer 001 and the second inorganic insulating layer 002 are in contact with each other. Fig. 15 shows one specific circuit layout of three pixel circuits 200 arranged along the second direction b in the bending region a 1.
Specifically, by disconnecting the two first electrode blocks C1 in the second separation region B2, that is, without providing the connection portions, it can be ensured that the first inorganic insulating layer 001 and the second inorganic insulating layer 002 of the same type of material are in complete contact in the second separation region B2, and there is no area without contact, so that the stress effect of the connection portions of different materials on the inorganic insulating layers is weakened to the minimum.
Specifically, as shown in fig. 6, in the bending region a1, all the second spacing regions B2 between two adjacent first electrode blocks C1 along the second direction B may be disconnected from each other, that is, no connecting portion is provided, so that the bending performance at the second spacing region B2 position may be enhanced as much as possible, the problems of bending fracture or film layer falling off at the second spacing region B2 position are prevented, and the normal operation of the bending region a1 is ensured.
Alternatively, in the array substrate provided in the embodiment of the invention, as shown in fig. 8, in the bending region a1, two adjacent first electrode blocks C1 along the second direction b may be partially disconnected from each other, that is, the third connection portion 30 is disposed between two adjacent first electrode blocks C1 along the second direction b, and the area occupied by the third connection portion 30 is the same as that occupied by the first connection portion 10 in the non-bending region a 2. In a unit area region P close to the bending axis X, the first electrode blocks C1 disconnected from each other have a first number n 1; in a unit area region Q away from the bending axis X, the mutually disconnected first electrode blocks C1 have a second number n2, the first number n1 being greater than the second number n 2.
Specifically, since the bending portion closest to the bending axis X has the largest bending curvature, the portion closer to the bending axis X is subjected to the larger bending stress. Therefore, the closer to the bending axis X, the greater the number of disconnections can be set. In this way, the second contact area S2 is increased as much as possible at a position where breakage is more likely to occur, and the third connection portion 30 is provided at a position where breakage is relatively less likely to occur, thereby alleviating the problem of voltage drop of the power supply voltage signal line PVDD.
Similarly, since the bending curvature of the bending portion closest to the bending axis X is the largest, the closer to the bending axis X, the greater the bending stress. Therefore, alternatively, in the array substrate provided by the embodiment of the invention, as shown in fig. 9, the opposite side between the two first electrode blocks C1 close to the bending axis X has a first shortest distance d1, the opposite side between the two first electrode blocks C1 far away from the bending axis X has a second shortest distance d2, and the first shortest distance d1 may be greater than the second shortest distance d 2. That is, the closer to the bending axis X, the larger the breaking distance can be set. This increases the second contact area S2 as much as possible at the position where the breakage is more likely to occur.
Specifically, in order to reduce the problem of cracking or dropping in the bending region a1 while alleviating the problem of voltage drop of the power supply voltage signal line PVDD as much as possible, alternatively, in the array substrate provided in the embodiment of the present invention, as shown in fig. 10, in the non-bending region a2, two adjacent first electrode blocks C1 in the second direction b are electrically connected through the first connection portion 10; in the first spacing region B1, the first inorganic insulating layer 001 and the second inorganic insulating layer 002 at the position of the first connection portion 10 are not in contact with each other, and the first inorganic insulating layer 001 and the second inorganic insulating layer 002 at the other positions than the first connection portion 10 are in contact with each other;
in the bending region a1, two adjacent first electrode blocks C1 at least partially along the second direction b are conducted through the second connecting portion 20; in the second partition region B2, the first inorganic insulating layer 001 and the second inorganic insulating layer 002 located at the second connection portion 20 are not in contact with each other, and the first inorganic insulating layer 001 and the second inorganic insulating layer 002 located at the other positions than the second connection portion 20 are in contact with each other;
an orthographic projection area of the first connection portion 10 on the base substrate 100 is larger than an orthographic projection area of the second connection portion 20 on the base substrate 100, and a first contact area S1 in the first spaced region B1 is smaller than a second contact area S2 in the second spaced region B2.
Specifically, by reducing the area occupied by the second connection portion 20, the second contact area S2 in the second spacing region B2 can be increased, so that under the condition of alleviating the voltage drop problem of the power supply voltage signal line PVDD, the stress action of the second connection portion 20 on the first inorganic insulating layer 001 and the second inorganic insulating layer 002 is weakened, the bending performance at the position of the second spacing region B2 is enhanced, the problems of bending fracture or film layer falling off at the position of the second spacing region B2 are prevented, and the normal operation of the bending region a1 is ensured.
Specifically, since the pitch between the first electrode blocks C1 is relatively fixed, in order to achieve reduction in the area occupied by the second connection part 20, as shown in fig. 10, the width of the second connection part 20 may be reduced, i.e., the second connection part 20 may be thinner than the first connection part 10.
In order to further enhance the bending resistance, optionally, in the array substrate provided in the embodiment of the invention, as shown in fig. 11, at least one second connection portion 20 has a plurality of hollow structures, each hollow structure in the second connection portion 20 is arranged along the first direction a, and the first inorganic insulating layer 001 and the second inorganic insulating layer 002 are in contact with each other through the hollow structures. That is, the second connection portion 20 and the first connection portion 10 have the same width, but the hollow structure is added inside the second connection portion 20 to reduce the occupied area.
Optionally, in the array substrate provided in the embodiment of the present invention, as shown in fig. 11, the hollow structures of the second connection portion 20 may be in a shape of a circle, an ellipse, a diamond, or a polygon, and the number of the hollow structures may be set according to needs, which is not limited herein.
Specifically, since the bending portion closest to the bending axis X has the largest bending curvature, the portion closer to the bending axis X is subjected to the larger bending stress. Therefore, the area of the second connection portion 20 can be set smaller as the distance from the bending axis X is closer. In this way, the second contact area S2 is increased as much as possible at a position where the breakage is more likely to occur, and the second connection portion 20 occupying a larger area is provided at a position where the breakage is relatively less likely to occur, thereby alleviating the problem of the voltage drop of the power supply voltage signal line PVDD.
Based on this, optionally, in the above array substrate provided by the embodiment of the present invention, as shown in fig. 11, the second connection portion 20 close to the bending axis X has a first forward projection area 20S1, the second connection portion 20 far from the bending axis X has a second forward projection area 20S2, and the first forward projection area 20S1 is smaller than the second forward projection area 20S 2. Specifically, the occupied area of the second connection portion 20 can be reduced by providing a larger area of the hollow structure in the second connection portion 20 near the bending axis X.
In order to alleviate the voltage drop problem of the power supply voltage signal line PVDD as much as possible in the bending region a1, optionally, in the array substrate provided in the embodiment of the invention, as shown in fig. 12, in the bending region a1, a part of the two adjacent first electrode blocks C1 along the second direction b is conducted through the second connection portion 20, another part of the two adjacent first electrode blocks C1 along the second direction b is conducted through the third connection portion 30, and the occupied areas of the third connection portion 30 and the first connection portion 10 are the same; and in the bending region a1, the second connection portion 20 is closer to the bending axis than the third connection portion 30. That is, the second connection portion 20 having a small occupied area is provided in a region closer to the bending axis X, and the third connection portion 30 having a large occupied area is provided in a region farther from the bending axis X. In this way, the second contact area S2 is increased as much as possible at a position where the breakage is more likely to occur, and the third connection portion 30 occupying a larger area is provided at a position where the breakage is relatively less likely to occur, thereby alleviating the problem of the voltage drop of the power supply voltage signal line PVDD.
In order to simultaneously reduce the possibility of breakage in the bending region a1 and alleviate the problem of voltage drop of the power supply voltage signal line PVDD, optionally, in the array substrate provided in the embodiment of the invention, as shown in fig. 13, in the bending region a1, a part of the two first electrode blocks C1 adjacent along the second direction b is electrically connected through the second connecting portion 20, and another part of the two first electrode blocks C1 adjacent along the second direction b is disconnected from each other; and within the bending region a1, the break is closer to the bending axis than the second connection 20. That is, the two first electrode blocks C1 are directly disconnected in a region closer to the bending axis X, and the second connection portion 20 is provided in a region farther from the bending axis X. In this way, the second contact area S2 is increased as much as possible at a position where the breakage is more likely to occur, and the second connection portion 20 having a small area is provided at a position where the breakage is relatively less likely to occur, thereby alleviating the problem of the voltage drop of the power supply voltage signal line PVDD.
Based on the same inventive concept, an embodiment of the present invention further provides an organic electroluminescent display panel, including: the array substrate provided by the embodiment of the invention generally further comprises a protective cover plate arranged above the array substrate. Other essential components of the organic electroluminescent display panel are understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present invention. The implementation of the organic electroluminescent display panel can refer to the above embodiments of the array substrate, and repeated details are not repeated.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, as shown in fig. 16, including the organic electroluminescent display panel provided by the embodiment of the present invention. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. Other essential components of the display device are understood by those skilled in the art, and are not described herein or should not be construed as limiting the invention. The implementation of the display device can refer to the above embodiments of the array substrate, and repeated descriptions are omitted.
According to the array substrate, the organic electroluminescent display panel and the display device provided by the embodiment of the invention, in the second interval region of the bending region, the second contact area between the first inorganic insulating layer and the second inorganic insulating layer is increased to be larger than the first contact area in the first interval region of the non-bending region, so that the first inorganic insulating layer and the second inorganic insulating layer can be ensured to be fully contacted in the second interval region, the stress effect of different materials between the first inorganic insulating layer and the second inorganic insulating layer on the films is weakened, the bending performance at the position of the second interval region is enhanced, the problems of bending fracture or film falling off and the like at the position of the second interval region are prevented, and the normal work of the bending region is ensured.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (14)
1. The array substrate is characterized by comprising a display area, wherein the display area is divided into a bending area and a non-bending area; the bending area is provided with a bending shaft extending along a first direction;
the display area is internally provided with a plurality of pixel circuits which are arranged on a substrate in an array mode and a plurality of power supply voltage signal lines which extend along the first direction and are arranged along the second direction, and the first direction and the second direction are perpendicular to each other; each pixel circuit comprises a capacitor, wherein a first electrode block of the capacitor is electrically connected with the power supply voltage signal, one side surface of the first electrode block is adjacent to the first inorganic insulating layer, and the other side surface of the first electrode block is adjacent to the second inorganic insulating layer;
in the non-bending region, in a first spacing region between two adjacent first electrode blocks along the second direction, a first contact area is formed between the first inorganic insulating layer and the second inorganic insulating layer;
in the bending area, at least part of the second interval area between two adjacent first electrode blocks along the second direction is provided with a second contact area between the first inorganic insulating layer and the second inorganic insulating layer;
the area of the first spacer region is equal to the area of the second spacer region; the first contact area is smaller than the second contact area.
2. The array substrate according to claim 1, wherein in the bending region, at least two first electrode blocks adjacent to each other along the second direction are disconnected from each other; at the off position, the first inorganic insulating layer and the second inorganic insulating layer are in contact with each other.
3. The array substrate of claim 2, wherein the first electrode blocks disconnected from each other have a first number in a unit area near the bending axis; the first electrode blocks disconnected from each other have a second number in a unit area region away from the bending axis, the first number being greater than the second number.
4. The array substrate of claim 2, wherein the opposite side edges between the two first electrode blocks near the bending axis have a first shortest distance, and the opposite side edges between the two first electrode blocks far away from the bending axis have a second shortest distance, and the first shortest distance is greater than the second shortest distance.
5. The array substrate according to any one of claims 2 to 4, wherein in the non-bending region, two adjacent first electrode blocks along the second direction are conducted through a first connecting portion; in the first spacing region, the first inorganic insulating layer and the second inorganic insulating layer at the position of the first connection portion are not in contact with each other, and the first inorganic insulating layer and the second inorganic insulating layer at the position other than the position of the first connection portion are in contact with each other.
6. The array substrate according to claim 1, wherein in the non-bending region, two adjacent first electrode blocks along the second direction are conducted through a first connecting portion; in the first spacing region, the first inorganic insulating layer and the second inorganic insulating layer at the position of the first connection portion are not in contact with each other, and the first inorganic insulating layer and the second inorganic insulating layer at the position other than the first connection portion are in contact with each other;
in the bending area, at least part of two first electrode blocks adjacent along the second direction are conducted through a second connecting part; in the second spacing region, the first inorganic insulating layer and the second inorganic insulating layer at the second connecting portion are not in contact with each other, and the first inorganic insulating layer and the second inorganic insulating layer at the other positions than the second connecting portion are in contact with each other;
an orthographic projection area of the first connecting portion on the substrate base plate is larger than an orthographic projection area of the second connecting portion on the substrate base plate, and the first contact area in the first spacing region is smaller than the second contact area in the second spacing region.
7. The array substrate of claim 6, wherein at least one of the second connection portions has a plurality of hollow structures, the hollow structures in the second connection portion are arranged along the first direction, and the first inorganic insulating layer and the second inorganic insulating layer are in contact with each other through the hollow structures.
8. The array substrate of claim 7, wherein the hollow structure of the second connecting portion is circular, oval, diamond-shaped or polygonal.
9. The array substrate of claim 6, wherein the second connecting portion near the bending axis has a first orthographic projection area, and the second connecting portion away from the bending axis has a second orthographic projection area, the first orthographic projection area being smaller than the second orthographic projection area.
10. The array substrate according to any one of claims 6 to 8, wherein in the bending region, part of the two first electrode blocks adjacent to each other along the second direction are conducted through the second connecting portion, the other part of the two first electrode blocks adjacent to each other along the second direction are conducted through a third connecting portion, and the area occupied by the third connecting portion and the area occupied by the first connecting portion are the same; and in the bending area, the second connecting part is closer to the bending shaft relative to the third connecting part.
11. The array substrate according to any one of claims 6 to 8, wherein in the bending region, part of the two first electrode blocks adjacent to each other along the second direction are electrically connected through the second connecting portion, and the other part of the two first electrode blocks adjacent to each other along the second direction are disconnected from each other; and in the bending area, the broken part is closer to the bending shaft relative to the second connecting part.
12. The array substrate according to any one of claims 1 to 4 and 6 to 9, comprising a gate metal layer, a capacitor metal layer and a source drain metal layer which are sequentially stacked on the substrate;
the first inorganic insulating layer is positioned between the grid metal layer and the capacitor metal layer, and the second inorganic insulating layer is positioned between the capacitor metal layer and the source drain metal layer;
the gate metal layer comprises a second electrode block of the capacitor;
the capacitor metal layer comprises a first electrode block of the capacitor;
the source-drain metal layer comprises the power supply voltage signal line.
13. An organic electroluminescent display panel comprising the array substrate according to any one of claims 1 to 12.
14. A display device comprising the organic electroluminescent display panel according to claim 13.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107437400A (en) * | 2017-09-04 | 2017-12-05 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
| CN207896091U (en) * | 2018-03-22 | 2018-09-21 | 京东方科技集团股份有限公司 | array substrate and display device |
| CN109037244A (en) * | 2018-08-02 | 2018-12-18 | 武汉天马微电子有限公司 | A kind of display panel and display device |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107437400A (en) * | 2017-09-04 | 2017-12-05 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
| CN207896091U (en) * | 2018-03-22 | 2018-09-21 | 京东方科技集团股份有限公司 | array substrate and display device |
| CN109037244A (en) * | 2018-08-02 | 2018-12-18 | 武汉天马微电子有限公司 | A kind of display panel and display device |
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Effective date of registration: 20211026 Address after: No.8 liufangyuan Road, Dongyi Industrial Park, Donghu New Technology Development Zone, Wuhan, Hubei Province Patentee after: WUHAN TIANMA MICRO-ELECTRONICS Co.,Ltd. Patentee after: Wuhan Tianma Microelectronics Co.,Ltd. Shanghai Branch Address before: Room 509, building 1, 6111 Longdong Avenue, Pudong New Area, Shanghai 201201 Patentee before: SHANGHAI TIANMA AM-OLED Co.,Ltd. |