CN110247750B - Network transmission device and state synchronization method thereof - Google Patents
Network transmission device and state synchronization method thereof Download PDFInfo
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- CN110247750B CN110247750B CN201811130397.0A CN201811130397A CN110247750B CN 110247750 B CN110247750 B CN 110247750B CN 201811130397 A CN201811130397 A CN 201811130397A CN 110247750 B CN110247750 B CN 110247750B
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- H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
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Abstract
The invention discloses a network transmission device and a state synchronization method thereof, wherein the network transmission device comprises: the physical layer device, the media access controller connected with the physical layer device, and the state converter respectively connected with the physical layer device and the media access controller; the state converter is used for acquiring a state value of a register in the physical layer device, converting the acquired state value into a state value in a standard register format, and writing the converted state value into the register; and the media access controller is used for acquiring the state value of the register in the state converter and setting the working mode according to the acquired state value. The network transmission device can convert the acquired state value into the state value in the standard register format, so that the state value acquired by the subsequent media access controller is in the standard register format, thereby smoothly completing the negotiation synchronization process between the media access controller and the physical layer device and ensuring the normal data communication.
Description
Technical Field
The present invention relates to the field of network transmission technologies, and in particular, to a network transmission device and a state synchronization method thereof.
Background
A Physical Layer Device (PHY) is a key component for connecting each network element to a Physical medium, and when a Media Access Controller (MAC) and the PHY perform rate adaptation synchronization, the MAC needs to set its own state according to the state of the PHY to achieve the purpose of negotiation. For example, the physical layer device operates in 10M/full duplex mode, and the medium access controller can also operate in 10M/full duplex mode through the speed adaptation synchronization process.
However, if the PHY register is not a standard register, the MAC controller may obtain an incorrect value, resulting in a failure of negotiation and a failure of data communication. For example, if the standard register defines 00 to indicate that the mac operates in 100M/half-duplex mode, 01 to indicate that the mac operates in 10M/full-duplex mode, and the non-standard register defines 00 to indicate that the mac operates in 10M/full-duplex mode, and 01 to indicate that the mac operates in 100M/half-duplex mode, then if the status value obtained by the mac is 01, the mac performs parsing according to the bit definition of the standard register, and the physical layer device operates in 10M/full-duplex mode, and the physical layer device actually operates in 100M/half-duplex mode, so that the register status value obtained by the mac does not reflect the actual operating mode of the physical layer device, and finally the mac and the physical layer device fail to communicate data due to inconsistency of the operating mode settings.
Disclosure of Invention
The embodiment of the invention provides a network transmission device and a state synchronization method thereof, which are used for solving the problems that in the prior art, negotiation fails and data communication cannot be normally carried out due to nonstandard PHY registers.
In a first aspect, an embodiment of the present invention provides a network transmission apparatus, including: the physical layer device, a media access controller connected with the physical layer device, and a state converter respectively connected with the physical layer device and the media access controller; wherein the content of the first and second substances,
the state converter is used for acquiring a state value of a register in the physical layer device, converting the acquired state value into a state value in a standard register format, and writing the converted state value into the register;
and the media access controller is used for acquiring the state value of the register in the state converter and setting a working mode according to the acquired state value.
In a possible implementation manner, in the network transmission apparatus provided in the embodiment of the present invention, the state converter is further configured to determine whether a register in the physical layer device is standard; if so, directly writing the acquired state value into a register; if not, the acquired state value is converted into the state value in the standard register format, and the converted state value is written into the register.
In a possible implementation manner, in the network transmission apparatus provided in this embodiment of the present invention, the state converter is further configured to, if a register in the physical layer device is a non-standard register, extract valid information in the obtained state value, and write the valid information into a corresponding bit in the register according to a format of the standard register.
In a possible implementation manner, in the network transmission apparatus provided in the embodiment of the present invention, if the corresponding status values of the valid information in the non-standard register and the standard register are the same and the corresponding bits are different, the status converter is configured to write the obtained status value into the register according to the bits specified by the standard register.
In a possible implementation manner, in the network transmission apparatus provided in the embodiment of the present invention, if the corresponding state values of the valid information in the non-standard register and the standard register are different and the corresponding bits are different, the state converter is configured to extract the valid information in the acquired state values, convert the valid information into the state value specified by the standard register, and write the converted state value into the register according to the bits specified by the standard register.
In a possible implementation manner, in the network transmission apparatus provided in an embodiment of the present invention, the state converter includes: the first processing unit is connected with the physical layer device, and the second processing unit is connected with the first processing unit and the media access controller;
the first processing unit is configured to acquire a state value of a register in the physical layer device, convert the acquired state value into a state value in a standard register format, and write the converted state value into a register in the second processing unit;
and the media access controller is used for acquiring the state value of the register in the second processing unit and setting a working mode according to the acquired state value.
In a possible implementation manner, in the network transmission apparatus provided in an embodiment of the present invention, the state converter includes: the third processing unit is connected with the physical layer device and the media access controller, and the fourth processing unit is connected with the media access controller;
the third processing unit is configured to acquire a state value of a register in the physical layer device, convert the acquired state value into a state value in a standard register format, and send the converted state value to the media access controller;
the media access controller is configured to write the received state value into a register of the fourth processing unit, obtain the state value of the register in the fourth processing unit, and set a working mode according to the obtained state value.
In a second aspect, an embodiment of the present invention provides a method for synchronizing states of the network transmission device, where the method includes:
the state converter acquires a state value of a register in the physical layer device, converts the acquired state value into a state value in a standard register format, and writes the converted state value into the register;
and the media access controller acquires the state value of a register in the state converter and sets a working mode according to the acquired state value.
In a possible implementation manner, in the state synchronization method provided in an embodiment of the present invention, the acquiring, by the state converter, a state value of a register in a physical layer device, converting the acquired state value into a state value in a standard register format, and writing the converted state value into the register includes:
the state converter judges whether a register in the physical layer device is standard or not; if so, directly writing the acquired state value into a register; if not, the acquired state value is converted into the state value in the standard register format, and the converted state value is written into the register.
In a possible implementation manner, in the state synchronization method provided in an embodiment of the present invention, if a register in the physical layer device is not standard, the converting module converts the obtained state value into a state value in a standard register format, and writes the converted state value into the register, where the converting module includes:
and the state converter extracts effective information in the acquired state value and writes the effective information into corresponding bits in a register according to the format of a standard register.
The invention has the following beneficial effects:
the embodiment of the invention provides a network transmission device and a state synchronization method thereof, wherein the network transmission device comprises: the physical layer device, the media access controller connected with the physical layer device, and the state converter respectively connected with the physical layer device and the media access controller; the state converter is used for acquiring a state value of a register in the physical layer device, converting the acquired state value into a state value in a standard register format, and writing the converted state value into the register; and the media access controller is used for acquiring the state value of the register in the state converter and setting the working mode according to the acquired state value. The network transmission device provided by the embodiment of the invention can convert the acquired state value into the state value in the standard register format by arranging the state converter, so that the state value acquired by the subsequent media access controller is in the standard register format, the negotiation synchronization process between the media access controller and the physical layer device is smoothly completed, and the normal data communication is ensured.
Drawings
Fig. 1 is a schematic structural diagram of a network transmission device according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an implementation procedure of the network transmission apparatus shown in FIG. 1;
FIG. 3 is a flow chart of data processing between the state converter and the data interface T1;
FIG. 4 is a flow chart of data processing between the state converter and the data interface T2;
fig. 5 is a second schematic structural diagram of a network transmission device according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of an implementation procedure of the network transmission apparatus shown in FIG. 5;
FIG. 7 is a flowchart of a process of the first processing unit and the data interface T4;
fig. 8 is a data processing flow chart between the second processing unit and the data interface T5;
fig. 9 is a data processing flow chart between the second processing unit and the data interface T6;
fig. 10 is a third schematic structural diagram of a network transmission device according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of an implementation procedure of the network transmission apparatus shown in FIG. 10;
fig. 12 is a data processing flow chart between the third processing unit and the data interface T8;
FIG. 13 is a data processing flow between the fourth processing unit and the data interface T10;
FIG. 14 is a flowchart of a state synchronization method according to an embodiment of the present invention;
11, a physical layer device; 12. a media access controller; 13. a state converter; 131. a first processing unit; 132. a second processing unit; 133. a third processing unit; 134. and a fourth processing unit.
Detailed Description
The embodiment of the invention provides a network transmission device and a state synchronization method thereof, aiming at the problems that negotiation is failed and data communication cannot be normally carried out due to nonstandard PHY registers in the prior art.
The following describes in detail a specific implementation of a network transmission device and a state synchronization method thereof according to an embodiment of the present invention with reference to the accompanying drawings. The sizes and shapes of the structures in the drawings are not to be considered true scale, but are merely illustrative of the present invention.
In a first aspect, an embodiment of the present invention provides a network transmission apparatus, as shown in fig. 1, including: a physical layer device 11, a media access controller 12 connected with the physical layer device 11, and a state converter 13 respectively connected with the physical layer device 11 and the media access controller 12; wherein the content of the first and second substances,
the state converter 13 is configured to obtain a state value of a register in the physical layer device 11, convert the obtained state value into a state value in a standard register format, and write the converted state value into the register;
and the media access controller 12 is configured to obtain a state value of a register in the state converter, and set a working mode according to the obtained state value.
The network transmission device provided by the embodiment of the invention can convert the acquired state value into the state value in the standard register format by arranging the state converter, so that the state value acquired by the subsequent media access controller is in the standard register format, the negotiation synchronization process between the media access controller and the physical layer device is smoothly completed, and the normal data communication is ensured.
In the embodiment of the present invention, by setting the state converter 13 connected to the physical layer device 11 and the mac 12, the state converter 13 obtains the state value of the register from the physical layer device 11 through the data interface T1, converts the obtained state value into the state value in the standard register format, and writes the converted state value into the register, when speed adaptation synchronization is required, the mac 12 obtains the state value of the register from the state converter 13 through the data interface T2, specifically, the mac 12 can obtain the state value of the register in a polling manner, so that the state value of the register obtained by the mac 12 is defined according to the format of the standard register, thereby enabling the mac 12 and the physical layer device 11 to successfully complete a negotiation synchronization process, and the normal data communication can be ensured. The polling may be understood as periodically reading the value of the register to determine whether the connection (link) status, rate, etc. of the external network has changed. Specifically, the mac 12 and the phy layer device 11 may communicate data through a data interface T3.
Further, in the network transmission apparatus provided in the embodiment of the present invention, the state converter is further configured to determine whether a register in the physical layer device is standard; if so, directly writing the acquired state value into a register; if not, the acquired state value is converted into the state value in the standard register format, and the converted state value is written into the register.
In a specific implementation, the state converter may determine whether the register is standard by determining a value of a bit in the register, for example, whether the physical layer device operates in a long-distance mode or a short-distance mode may be determined by determining a value of a bit in the register, so as to indirectly determine whether the register in the physical layer device is standard. Before the state converter executes conversion operation, whether the register in the physical layer device is standard or not is judged, if the register standard does not need conversion operation, the obtained state value is directly written into the register, repeated conversion operation can be avoided, the processing process is simplified, and the running speed can be improved.
Specifically, in the network transmission apparatus provided in the embodiment of the present invention, the state converter is specifically configured to, if a register in the physical layer device is not standard, extract valid information in the obtained state value, and write the valid information into a corresponding bit in the register according to a format of a standard register.
If the registers in the physical layer device are not standard, the state translator extracts the valid information in the retrieved state values, as also illustrated by the above example, defining 00 in the standard register indicates operation in 100M/half-duplex mode, 01 indicates operation in 10M/full-duplex mode, and the definition of 00 in the non-standard register indicates that the non-standard register works in a 10M/full-duplex mode, 01 indicates that the non-standard register works in a 100M/half-duplex mode, if the acquired state value of the non-standard register is 00, the valid information that can be extracted into the status value according to the bit definition of the non-standard register is in a 10M/full duplex mode, the status converter can write the valid information into the corresponding bit according to the format of the standard register, that is, the state value (01) for the valid information is written into the corresponding register bit, thereby realizing the conversion of the state value of the non-standard register into the state value of the standard register.
In practical application, the meaning of the bits specified by the normal register and the non-normal register is different, so that whether the state values of the same valid information specified by the normal register and the non-normal register are the same or not can be judged, and then the specific mode of conversion can be determined according to the situation.
Specifically, if the corresponding state values of the valid information in the non-standard register and the standard register are the same and the corresponding bits are different, the state converter is configured to write the acquired state value into the register according to the bits specified by the standard register. For example, if the state value defined in the non-standard register as two or three bits is 00 indicating that the non-standard register operates in the 100M/half duplex mode, and the state value defined in the standard register as four or five bits is 00 indicating that the non-standard register operates in the 100M/half duplex mode, the acquired state value 00 may be directly written into the four or five bits of the register.
And if the corresponding state values of the effective information in the non-standard register and the standard register are different and the corresponding bits are different, the state converter is used for extracting the effective information in the acquired state values, converting the effective information into the state value specified by the standard register, and writing the converted state value into the register according to the bits specified by the standard register. For example, if the state value defined in the non-standard register is two or three bits 00 indicating that the non-standard register operates in the 100M/half duplex mode, and the state value defined in the standard register is four or five bits 01 indicating that the non-standard register operates in the 100M/half duplex mode, after the state value 00 located in the two or three bits is acquired, the corresponding valid information is first extracted according to the state value 00 to obtain the 100M/half duplex mode, then the 100M/half duplex mode is converted into the state value 01 specified in the standard register, and the converted state value 01 is written into the four or five bits of the register.
In specific implementation, the state converter may be implemented by a device such as a CPU, a single chip Microcomputer (MCU), a CPLD, or an FPGA, or may be implemented by other devices as long as functions of acquiring a state value of a register in a physical layer device, converting a state value of a non-standard register into a state value of a standard register, storing the converted state value in an internal register, and returning the state value in the internal register when the mac polls the state converter are implemented, and the state converter is not limited herein.
Referring to fig. 1, the Data interfaces T1 and T2 may be Management interfaces to access the relevant modules, and the Data interfaces T1 and T2 may be implemented by Management Data Input/Output (MDIO), Serial Management Interface (SMI), I2C, Universal Asynchronous Receiver/Transmitter (UART), Serial Peripheral Interface (SPI), or other interfaces as long as the interfaces have a function of accessing registers of the corresponding modules, and the Data interfaces T1 and T2 are not limited herein. The data Interface T3 is a Media Independent Interface, and may be composed of a Reduced Gigabit Media Independent Interface (RGMII), a Gigabit Media Independent Interface (GMII), a Media Independent Interface (MII), a simplified Media Independent Interface (RMII), an SMII, an S3MII, and other Media Independent interfaces, as long as data link between the Media access controller 12 and the physical layer device 11 can be realized, and the data Interface T3 is not limited.
In specific implementation, the network transmission apparatus shown in fig. 1 may be implemented by the following steps:
as shown in fig. 2, includes:
s201, the state converter acquires a state value of a register in the physical layer device through a data interface T1;
s202, converting the acquired state value into a state value in a standard register format by a state converter, and storing the state value in an internal register;
s203, the media access controller obtains the state value of the internal register of the state converter through polling of the data interface T2, sets the self working mode and completes negotiation.
As shown in fig. 3, the data processing flow between the state converter and the data interface T1 includes:
s301, acquiring a state value of a register in the physical layer device through a data interface T1;
s302, judging whether the acquisition is successful; if yes, go to step S303; if not, returning to the step S301;
and S303, converting the acquired state value into a state value in a standard register format, and storing the state value in an internal register.
The data processing flow between the state converter and the data interface T2, as shown in fig. 4, includes:
s401, receiving data of a data interface T2; the data is used for acquiring the state value of the register from the state converter;
s402, judging whether the receiving is successful; if yes, go to step S403; if not, returning to the step S401;
and S403, after the data are analyzed, returning the state value in the internal register through the data interface T2.
In practical applications, the function of the state converter can be implemented by a Central Processing Unit (CPU), a single chip Microcomputer (MCU), a Complex Programmable Logic Device (CPLD), a Field Programmable Gate Array (FPGA), or other devices, or can be implemented by two devices, and the two implementation manners will be described in detail below with reference to the drawings.
The implementation mode is as follows:
as shown in fig. 5, the state converter 13 includes: a first processing unit 131 connected to the physical layer device 11, and a second processing unit 132 connected to the first processing unit 131 and the mac 12;
the first processing unit 131 is configured to acquire a state value of a register in the physical layer device 11, convert the acquired state value into a state value in a standard register format, and write the converted state value into a register in the second processing unit 132;
the mac 12 is configured to obtain a state value of a register in the second processing unit 132, and set a working mode according to the obtained state value.
In the first implementation manner, since the state converter 13 includes the first processing unit 131 and the second processing unit 132, the first processing unit 131 is configured to complete functions of acquiring a state value of a register in the physical layer device 11, determining whether the register of the physical layer device 11 is standard, converting the state value of the register, and writing the converted state value of the standard register into the register of the second processing unit 132. The second register 132 is used to store a status value and return the status value to the mac 12 upon polling, and thus, the function of the status converter 13 can be implemented by the first processing unit 131 and the second processing unit 132.
Specifically, the first processing unit 131 may be implemented by a device such as a CPU, a single chip, a CPLD, or an FPGA, as long as the function of acquiring a state value of a register in the physical layer device 11, converting the state value into a state value of a standard register, and writing the converted state value into the second processing unit 132 can be implemented, which is not limited herein. The second processing unit 132 may be implemented by a device such as a CPU, a single chip microcomputer, a CPLD, an FPGA, a PHY (standard register definition), and the like, as long as the function of returning the converted state value when polling is performed at the data interface T6 of the mac 12 can be implemented, which is not limited herein.
In fig. 5, the data interfaces T4 and T6 function as management interfaces to access the relevant modules, and may be MDIO, SMI, I2C, UART, SPI, and the like, as long as the function of accessing the registers of the corresponding modules can be achieved, which is not limited herein. In the figure, the data interface T5 may be a network interface, PCIE, USB, or the like, or may be another interface, which is not limited herein. In the figure, the data interface T7 is a media independent interface, for example, a media independent interface such as RGMII, GMII, MII, RMII, SMII, S3MII, etc., which is used for data link between the mac 12 and the phy device 11, and other media independent interfaces may also be used, which are not limited herein.
In specific implementation, the network transmission apparatus shown in fig. 5 may be implemented by the following steps:
as shown in fig. 6, includes:
s501, the first processing unit obtains a state value of a register in the physical layer device through a data interface T4;
s502, the first processing unit converts the acquired state value into a state value in a standard register format, and writes the state value into the second processing unit through a data interface T5;
s503, the media access controller obtains the state value of the register in the second processing unit through polling of the data interface T6, sets the working mode of the media access controller and completes negotiation.
As shown in fig. 7, a processing flow of the first processing unit and the data interface T4 includes:
s601, acquiring a state value of a register in a physical layer device through a data interface T4;
s602, judging whether the acquisition is successful; if yes, go to step S603; if not, returning to the step S601;
and S603, converting the acquired state value into a state value in a standard register format by the first processing unit, and writing the state value into the second processing unit through a data interface T5.
As shown in fig. 8, the data processing flow between the second processing unit and the data interface T5 includes:
s701, receiving data of a data interface T5;
s702, judging whether the receiving is successful; if yes, go to step S703; if not, executing step S701;
and S703, writing the received data into a register.
As shown in fig. 9, the data processing flow between the second processing unit and the data interface T6 includes:
s801, receiving data of a data interface T6;
s802, judging whether the receiving is successful; if yes, go to step S803; if not, returning to the step S801;
s803, after the data is analyzed, the status value in the register is returned through the data interface T6.
The implementation mode two is as follows:
as shown in fig. 10, the state converter 13 includes: a third processing unit 133 connected to the physical layer device 11 and the medium access controller 12, and a fourth processing unit 134 connected to the medium access controller 12;
a third processing unit 133, configured to obtain a state value of a register in the physical layer device 11, convert the obtained state value into a state value in a standard register format, and send the converted state value to the media access controller 12;
the mac 12 is configured to write the received state value into a register of the fourth processing unit 134, obtain the state value of the register in the fourth processing unit 134, and set a working mode according to the obtained state value.
In the second implementation manner, the state converter 13 includes a third processing unit 133 and a fourth processing unit 134, where the third processing unit 133 is configured to complete functions of acquiring a state value of a register in the physical layer device 11, determining whether the register of the physical layer device 11 is standard, converting the state value of the register, and the like, and send the converted state value of the standard register to the mac 12, and the mac 12 writes the converted state value into the register of the fourth processing unit 134. The fourth register 134 is used to store the status value and return the status value to the mac 12 during polling, so that the function of the state converter 13 can be implemented by the third processing unit 133 and the fourth processing unit 134.
Specifically, the third processing unit 133 may be implemented by a device such as a CPU, a single chip, a CPLD, or an FPGA, as long as the function of acquiring a state value of a register in the physical layer device 11, converting the state value into a state value of a standard register, and then sending the converted state value to the media access controller 12 can be implemented, which is not limited herein. The fourth processing unit 134 may be implemented by a device such as a CPU, a single chip microcomputer, a CPLD, an FPGA, a PHY (standard register definition), and the like, as long as a function of returning a converted state value when polling is performed at the data interface T9 of the mac 12 can be implemented, which is not limited herein.
In fig. 10, the data interfaces T8 and T10 function as management interfaces to access the relevant modules, and may be MDIO, SMI, I2C, UART, SPI, and the like, as long as the function of accessing the registers of the corresponding modules can be achieved, which is not limited herein. In the figure, the data interface T9 may be MDIO, SMI, or the like, or may be another interface, which is not limited herein. In the figure, the data interface T11 is a media independent interface, for example, a media independent interface such as RGMII, GMII, MII, RMII, SMII, S3MII, etc., which is used for data link between the mac 12 and the phy device 11, and other media independent interfaces may also be used, which are not limited herein.
In specific implementation, the network transmission apparatus shown in fig. 10 may be implemented by the following steps:
as shown in fig. 11, includes:
s901, the third processing unit obtains the state value of the register in the physical layer device through a data interface T8;
s902, the third processing unit converts the acquired state value into a state value in a standard register format, and then indirectly writes the state value into the fourth processing unit through the media access controller by using a data interface T9;
and S903, the media access controller obtains the state value of the register in the fourth processing unit through polling of the data interface T10, sets the working mode of the media access controller and completes negotiation.
As shown in fig. 12, a data processing flow between the third processing unit and the data interface T8 includes:
s1001, acquiring a state value of a register in a physical layer device through a data interface T8;
s1002, judging whether the acquisition is successful or not; if yes, go to step S1003; if not, returning to the step S1001;
s1003, the third processing unit converts the acquired state value into a state value in a standard register format, and indirectly writes the state value into the fourth processing unit through the media access controller by using a data interface T9;
s1004, judging whether the writing is successful or the rewriting times are more than 3; if yes, returning to the step S1001; if not, rewriting is carried out.
As shown in fig. 13, a data processing flow between the fourth processing unit and the data interface T10 includes:
s1101, receiving data of a data interface T10;
s1102, judging whether the receiving is successful; if yes, go to step S1103; if not, returning to the step S1101;
s1103, analyzing data; if the register operation is read, executing step S1104; if the operation is a suction register operation, step S1105 is executed;
s1104, returning the state value of the register through a data interface T10;
s1105, saving the data to the corresponding bit in the register.
In a second aspect, based on the same inventive concept, embodiments of the present invention provide a state synchronization method for a network transmission apparatus, where a principle of the state synchronization method for solving the problem is similar to that of the network transmission apparatus, so that reference may be made to the implementation of the state synchronization method in the network transmission apparatus for implementation of the state synchronization method, and repeated details are not repeated.
As shown in fig. 14, the method for synchronizing states of the network transmission device according to the embodiment of the present invention includes:
step S1201, the state converter obtains the state value of the register in the physical layer device, converts the obtained state value into the state value in the standard register format, and writes the converted state value into the register;
step S1202, the mac obtains a state value of a register in the state converter, and sets a working mode according to the obtained state value.
Further, in the state synchronization method provided in the embodiment of the present invention, in step S1201, the method may include:
the state converter judges whether a register in the physical layer device is standard or not; if so, directly writing the acquired state value into a register; if not, the acquired state value is converted into the state value in the standard register format, and the converted state value is written into the register.
Specifically, in the state synchronization method provided in this embodiment of the present invention, in step S1201, if the register in the physical layer device is not standard, the converting step converts the obtained state value into a state value in a standard register format, and writes the converted state value into the register, which may include:
and the state converter extracts effective information in the acquired state value and writes the effective information into corresponding bits in the register according to the format of the standard register.
According to the network transmission device and the state synchronization method thereof provided by the embodiment of the invention, the state converter is arranged, so that the acquired state value can be converted into the state value in the standard register format, the state value acquired by the subsequent media access controller is in the standard register format, the negotiation synchronization process between the media access controller and the physical layer device is smoothly completed, and the normal data communication is ensured.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. A network transmission apparatus, comprising: the physical layer device, a media access controller connected with the physical layer device, and a state converter respectively connected with the physical layer device and the media access controller; wherein the content of the first and second substances,
the state converter is used for acquiring a state value of a register in the physical layer device, converting the acquired state value into a state value in a standard register format, and writing the converted state value into the register;
and the media access controller is used for acquiring the state value of the register in the state converter and setting a working mode according to the acquired state value.
2. The network transmission apparatus of claim 1, wherein the state converter is further configured to determine whether a register in the physical layer device is standard; if so, directly writing the acquired state value into a register; if not, the acquired state value is converted into the state value in the standard register format, and the converted state value is written into the register.
3. The network transmission apparatus of claim 2, wherein the state converter is further configured to extract valid information from the obtained state value and write the valid information into a corresponding bit in a register according to a standard register format if the register in the physical layer device is a non-standard register.
4. The network transmission apparatus of claim 3, wherein if the valid information is the same as the corresponding status value in the non-standard register and the corresponding bit is different, the status converter is configured to write the obtained status value into the register according to the bit specified by the standard register.
5. The network transmission apparatus according to claim 3, wherein if the valid information has different corresponding status values and different corresponding bits in the non-standard register and the standard register, the status converter is configured to extract the valid information from the acquired status values, convert the valid information into the status value specified in the standard register, and write the converted status value into the register according to the bits specified in the standard register.
6. A network transmission arrangement as claimed in any one of claims 1 to 5, wherein the state converter comprises: the first processing unit is connected with the physical layer device, and the second processing unit is connected with the first processing unit and the media access controller;
the first processing unit is configured to acquire a state value of a register in the physical layer device, convert the acquired state value into a state value in a standard register format, and write the converted state value into a register in the second processing unit;
and the media access controller is used for acquiring the state value of the register in the second processing unit and setting a working mode according to the acquired state value.
7. A network transmission arrangement as claimed in any one of claims 1 to 5, wherein the state converter comprises: the third processing unit is connected with the physical layer device and the media access controller, and the fourth processing unit is connected with the media access controller;
the third processing unit is configured to acquire a state value of a register in the physical layer device, convert the acquired state value into a state value in a standard register format, and send the converted state value to the media access controller;
the media access controller is configured to write the received state value into a register of the fourth processing unit, obtain the state value of the register in the fourth processing unit, and set a working mode according to the obtained state value.
8. A method for synchronizing the status of network transmission devices according to any one of claims 1 to 7, comprising:
the state converter acquires a state value of a register in the physical layer device, converts the acquired state value into a state value in a standard register format, and writes the converted state value into the register;
and the media access controller acquires the state value of a register in the state converter and sets a working mode according to the acquired state value.
9. The state synchronization method of claim 8, wherein the state converter acquires a state value of a register in the physical layer device, converts the acquired state value into a state value in a standard register format, and writes the converted state value into the register, comprising:
the state converter judges whether a register in the physical layer device is standard or not; if so, directly writing the acquired state value into a register; if not, the acquired state value is converted into the state value in the standard register format, and the converted state value is written into the register.
10. The state synchronization method according to claim 9, wherein if the register in the physical layer device is not standard, the state converter converts the obtained state value into a state value in a standard register format, and writes the converted state value into the register, and includes:
and the state converter extracts effective information in the acquired state value and writes the effective information into corresponding bits in a register according to the format of a standard register.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1251926A (en) * | 1998-10-16 | 2000-05-03 | 三星电子株式会社 | Analog converter and method thereof |
| CN1390417A (en) * | 1999-09-21 | 2003-01-08 | (美国)捷迅公司 | Reduced hardware network adapter and communication method |
| DE102008008051A1 (en) * | 2008-02-08 | 2009-08-20 | Qimonda Ag | Memory module for registered dual in-line memory module or fully buffered dual in-line memory module type, has memory unit and protocol conversion unit, which has status register set with status register |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI277874B (en) * | 2005-06-24 | 2007-04-01 | Via Tech Inc | Method for access non-standard register in serial advanced technology attachment (SATA) device |
| TW200700994A (en) * | 2005-06-24 | 2007-01-01 | Via Tech Inc | Method for access non-standard register in standard interface device |
| BR112012013507A2 (en) * | 2009-12-04 | 2016-06-07 | Napatech As | Distributed data frame processing across multiple adapters using time stamp and central controller |
-
2018
- 2018-09-27 CN CN201811130397.0A patent/CN110247750B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1251926A (en) * | 1998-10-16 | 2000-05-03 | 三星电子株式会社 | Analog converter and method thereof |
| CN1390417A (en) * | 1999-09-21 | 2003-01-08 | (美国)捷迅公司 | Reduced hardware network adapter and communication method |
| DE102008008051A1 (en) * | 2008-02-08 | 2009-08-20 | Qimonda Ag | Memory module for registered dual in-line memory module or fully buffered dual in-line memory module type, has memory unit and protocol conversion unit, which has status register set with status register |
Non-Patent Citations (2)
| Title |
|---|
| TDM通道承载以太网业务的速率适配器设计与实现;罗速;《中国优秀硕士论文学位论文全文数据库（电子期刊）》;20140131;全文 * |
| 基于FPGA的RGMII与MII协议转换器的实现;周建文 等;《信息技术与网络安全》;20171130(第23期);全文 * |
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