CN110247643B - Maximum pulse width protection and maximum duty ratio protection analog circuit of transmitter - Google Patents
Maximum pulse width protection and maximum duty ratio protection analog circuit of transmitter Download PDFInfo
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- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
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Abstract
The invention relates to the technical field of control protection of transmitters, and discloses a maximum pulse width protection and maximum duty cycle protection analog circuit of a transmitter. The constant current source comprises a positive constant current signal and a negative constant current signal, the positive constant current signal and the negative constant current signal are used for constant current charging or constant current discharging of the charging capacitor, one end of the charging capacitor is grounded, the other end of the charging capacitor is connected to the positive input end of the comparator, the negative input end of the comparator is connected with a reference voltage, and the second diode is connected between the output end and the positive input end of the comparator. The scheme utilizes the switched current source to charge and discharge the capacitor, and the switching of the constant current source can be positive and negative voltage or the switching of two positive voltages following the switching of the deletion control signal, so that the energy borne by the transmitter is metered, and the over-pulse width protection or the energy accumulation protection is realized; compared with the prior art, the invention reduces the cost, reduces the volume and improves the reliability through a simple analog circuit.
Description
Technical Field
The invention relates to the technical field of control protection of transmitters, in particular to a maximum pulse width protection and maximum duty ratio protection analog circuit of a transmitter.
Background
The transmitter is a device for converting radio frequency low-power signals into high power, and can be physically divided into a vacuum transmitter and a solid-state transmitter. The core amplifier of the vacuum transmitter adopts an electric vacuum device, usually a traveling wave tube; the core amplifying device of the solid-state transmitter adopts a semiconductor device. The transmitter from the signal output characteristics can be classified into a continuous wave transmitter and a pulse type transmitter. Continuous wave transmitters can continuously output stable power, while pulse type transmitters can only output pulse power according to a certain frequency and a certain duty ratio, and the output pulse width or the duty ratio exceeds the allowable maximum value, so that the transmitter can be damaged. This is mainly due to the fact that the pulse-type transmitter generates a large amount of heat during pulse operation, and the heat dissipation capability of the pulse-type transmitter is designed according to the average heat consumption in order to achieve high pulse power output with a small volume. Therefore, when the operating pulse exceeds the designed value, heat cannot be dissipated in time, and heat accumulation causes overheating of devices, causing amplifier failure, so that it is necessary to protect the maximum duty cycle and the maximum pulse width of the transmitter to improve the reliability of the transmitter application.
The transmitter usually adopts grid control to realize pulse output, and the pulse width of the grid control is the pulse width of microwave output. At present, a digital circuit (usually a CPLD, an FPGA, or a DSP) is used in a commonly used protection manner, a width and a period of a pulse signal are measured by a counting method, a duty ratio is calculated, and then an actual pulse width and the duty ratio are compared with a set value to determine whether the pulse width or the duty ratio is exceeded, so as to perform a corresponding protection action.
The digital circuit is complex in design, high in cost due to the fact that software and hardware of high-speed devices need to be matched at the same time, single-particle overturning, latching and the like of the digital circuit in the application of satellite-borne signals and the like exist, and the analog circuit is safer, smaller, easier to maintain and lower in cost.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: in view of the above existing problems, an analog circuit for maximum pulse width protection and maximum duty cycle protection of a transmitter is provided.
The technical scheme adopted by the invention is as follows: an analog circuit for maximum pulse width protection and maximum duty cycle protection of a transmitter, comprising: the constant current source comprises a positive constant current signal and a negative constant current signal for constant current charging or constant current discharging of the charging capacitor, one end of the charging capacitor is grounded, the other end of the charging capacitor is connected to the positive input end of the comparator, the negative input end of the comparator is connected with a reference voltage, and the second diode is connected between the output end and the positive input end of the comparator.
Furthermore, the maximum pulse width protection and maximum duty cycle protection analog circuit of the transmitter further comprises a first diode, and the charging capacitor is connected with the first diode in parallel.
Further, the constant current source and a grid control signal of the transmitter are synchronously switched to obtain positive and negative constant current signals.
Further, constant current charging is carried out on the charging capacitor in a time period when the grid control signal is on, and constant current discharging is carried out on the charging capacitor in a time period when the grid control signal is off.
Furthermore, the maximum pulse width protection and maximum duty cycle protection analog circuit of the transmitter further comprises a current source waveform generating circuit, the current source waveform generating circuit comprises an operational amplifier, a first resistor and a voltage source reference voltage, the output end of the operational amplifier is respectively connected with the positive input end of the comparator and the charging capacitor, the first resistor is used for detecting the current of the charging capacitor to obtain a detection voltage, the detection voltage and the voltage source reference voltage are respectively input to the negative input end and the positive input end of the operational amplifier, and the operational amplifier is used for generating a constant current source.
Furthermore, the charging capacitor is connected with the first resistor and then grounded, a node between the charging capacitor and the first resistor is connected to a negative input end of the operational amplifier, and a positive input end of the operational amplifier is connected with a voltage source reference voltage.
Further, the maximum pulse width protection and maximum duty cycle protection analog circuit of the transmitter further includes a first reference positive voltage and a voltage source reference voltage generation circuit, the reference positive voltage is superposed with the detection voltage of the first resistor and then input to the negative input end of the operational amplifier, an output signal of the voltage source reference voltage generation circuit is provided to the positive input end of the operational amplifier, and the voltage source reference voltage output by the voltage source reference voltage generation circuit includes two switched positive voltages.
Further, the voltage source reference voltage generating circuit comprises a second reference positive voltage, a forward pulse voltage, a triode, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor and a second capacitor, the triode is controlled to be switched on and off by an external digital logic signal, the base electrode of the triode is connected with the forward pulse voltage through an eighth resistor, the collector of the triode is connected with a fifth resistor and then connected with a second reference positive voltage, a sixth resistor is arranged between the emitter and the collector of the triode, the emitter of the triode is grounded after being connected with a seventh resistor, the seventh resistor is connected with a second capacitor in parallel, and the emitter of the triode is connected to the positive input end of the operational amplifier through a ninth resistor, and two different voltage source reference voltages are respectively provided for the positive input end of the operational amplifier in the processes of conduction and disconnection of the triode.
Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows: the scheme utilizes the switched current source to charge and discharge the capacitor, and the switching of the constant current source can be positive and negative voltage or the switching of two positive voltages following the switching of the deletion control signal, so that the energy borne by the transmitter is metered, and the over-pulse width protection or the energy accumulation protection is realized; compared with the prior art, the invention reduces the cost, reduces the volume and improves the reliability through a simple analog circuit.
Drawings
Fig. 1 is a schematic structural diagram of an analog circuit embodiment 1 of maximum pulse width protection and maximum duty cycle protection of a transmitter according to the present invention.
Fig. 2 is a schematic diagram of a maximum pulse width protection waveform of embodiment 1.
Fig. 3 is a waveform diagram of maximum duty protection (energy accumulation protection) in embodiment 1.
Fig. 4 is a schematic structural diagram of an analog circuit embodiment 2 of maximum pulse width protection and maximum duty cycle protection of a transmitter according to the present invention.
Fig. 5 is a schematic diagram of simulation waveforms of example 2.
Fig. 6 is a schematic diagram of a maximum pulse width protection waveform of embodiment 2.
Fig. 7 is a waveform diagram of maximum duty protection (energy accumulation protection) in embodiment 2.
Fig. 8 is a schematic structural diagram of an analog circuit embodiment 3 of maximum pulse width protection and maximum duty cycle protection of a transmitter according to the present invention.
Fig. 9 is a schematic diagram of a maximum pulse width protection waveform of embodiment 3.
Fig. 10 is a waveform diagram illustrating charge and discharge equalization of the capacitor in embodiment 3.
Fig. 11 is a waveform diagram of maximum duty protection (energy accumulation protection) in embodiment 3.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
Example 1
An analog circuit for maximum pulse width protection and maximum duty cycle protection of a transmitter, comprising: the constant current source Ipulse comprises a positive constant current signal and a negative constant current signal for constant current charging or constant current discharging of the charging capacitor, wherein a grid control signal of a transmitter of the constant current source Ipulse is synchronously switched, so that the switching of the constant current charging or constant current discharging process can be realized, and the output current I is output when the grid is openediAnd current I is absorbed when the grid is closedO。
(1) Realizing maximum pulse width wave protection
Charging capacitor C is opened at gridonIn the time period of (1) using a constant current source to supply a current IiCharging is carried out, and a current I is applied to a charging capacitor C in a time period of gate off toffOConstant current discharge is performed. Assuming that the initial voltage of the capacitor Cc is 0, then:
wherein, the variation of the delta U capacitor voltage, and delta T is the charging/discharging time.
The increment of the capacitor voltage when the gate is on is:
the decrement of the capacitor voltage when the gate is closed is as follows:
due to t in practical applicationonThe voltage increment of the capacitor in a certain period reaches the reference voltage Vref, the comparator is turned, once the high level output by the comparator is fed back to the positive input end of the comparator through the diode D2, the output of the comparator is locked at the high level, and the maximum pulse width t allowed by the pulse type amplifier is obtained at the momentonmax。
When the transmitter is applied in a pulse mode, the duty ratio is generally low, and the discharge current I is designedOAt the maximum allowable pulse width tonmaxJust every cycle the voltage of the capacitor can be brought to 0, i.e. now:
ΔUon＝ΔUoff
where T is the pulse period.
That is, the discharge current satisfies the following equation:
the corresponding protection circuit waveforms are shown in fig. 2 for the comparator output voltage Vout, the reference voltage Vref and the capacitor voltage, and the current source waveform provided by the constant current source.
The constant current source is used to charge/discharge the capacitor because the voltage on the capacitor is proportional to the charge/discharge time.
(2) Energy accumulation protection
The voltage of the capacitor is in direct proportion to the working time of the TWT, if the single pulse time exceeds the maximum pulse width limit of the TWT, the capacitor voltage triggers the comparator to overturn for protection, if the single period does not reach the maximum pulse width limit, the capacitor voltage is accumulated for multiple periods, and the maximum duty ratio dmax determines the proportion of the charging current and the discharging current of the capacitor. Namely, the capacitance charge-discharge balance at the TWT maximum duty ratio, namely, at this time, the "increment" is decrement ":
then
IidmaxT＝Io(1-dmax)T
The proportion of the charging and discharging current is as follows:
when the decrement is larger than or equal to the increment in a single period (namely the duty ratio is smaller than or equal to the maximum duty ratio dmax), the voltage on the capacitor in each period can return to the initial 0 voltage (the capacitor cannot be charged to a negative voltage due to the existence of a diode connected with the capacitor in parallel), when the increment is larger than the decrement, the voltage of the capacitor cannot be charged to 0 in each period, residual voltage exists, and if the residual voltage exists in each subsequent period, the capacitor voltage can be accumulated cycle by cycle until the capacitor voltage reaches the reference voltage Vref, and the comparator is protected by overturning. As shown in fig. 3.
It can be understood here that although at this time tonThe individual pulse width does not reach the maximum pulse width allowed by the transmitter, but because the duty cycle is lower than allowed by the transmitter, the transmitter is at tonThe amount of heat generated is at toffThe heat of the transmitter is accumulated and increased cycle by cycle due to complete dissipation within the time and failure of balance, and the accumulated energy is accumulated by the protection circuit, so that the maximum bearing value is reached for protection.
Example 2
The current source waveform generating circuit is added on the basis of the embodiment 1, the formed circuit principle is as shown in fig. 4, an operational amplifier N1 is used for generating a constant current source, and C1 is the circuit in the embodiment 1A charging capacitor, wherein R is a resistance value of a first resistor, the first resistor R1 is used for detecting a charging current Ic of a charging capacitor C1, the charging capacitor is connected to the first resistor and then grounded, a node between the charging capacitor and the first resistor is a detection voltage point, a detection voltage Vs ═ R Ic, a reference voltage v1_ pulse is generated by connecting a resistor to generate an input voltage Vin connected to a positive input terminal of an operational amplifier, the operational amplifier N1 compares the detection voltage Vs with the input voltage Vin and amplifies an error voltage between the detection voltage Vs and the input voltage Vin, when the detection voltage Vs is smaller than the input Vin, an output voltage of the operational amplifier N1 rises, the charging current increases, and the detection voltage Vs increases to reduce the difference between the detection voltage Ic and Vin, otherwise, when the detection voltage Vs is larger than Vin, the operational amplifier N1 controls the detection voltage Vs to decrease in a feedback manner, so that the Vs voltage can well track a waveform of the input Vin, and the charging current Ic is Vs/R Vin/R, the waveform of the capacitor charging current Ic can track the waveform of Vin. The voltage to ground V on the capacitor CCG：
The input voltage to the positive terminal of comparator N2 is increased by the specified offset Vin compared to fig. 1, so that the voltage comparison result is the same as in example 1 by simply increasing the forward voltage value of Vin to Vref. Simulation waveforms of example 2 are shown in fig. 6 and 7, respectively.
Example 3
In embodiment 2, the input control signal source (reference voltage v1_ pulse) needs a negative reference, and the operational amplifier needs to output a negative voltage, so that a negative power supply is needed. On the basis of the embodiment 2, the embodiment 3 is further improved, and the circuit schematic diagram is shown in fig. 8: the voltage source reference circuit further comprises a first reference positive voltage vref2.5 and a voltage source reference voltage generating circuit, wherein the reference positive voltage vref2.5 is superposed with the detection voltage of the first resistor and then is input to the negative input end of the operational amplifier N1, an output signal of the voltage source reference voltage generating circuit is provided for the positive input end of the operational amplifier, and the voltage source reference voltage output by the voltage source reference voltage generating circuit comprises two different positive voltages.
One of the implementation structures of the voltage source reference voltage generation circuit is as follows: comprises a second reference positive voltage vref, a forward pulse voltage V2_ pulse, a triode V8, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9 and a second capacitor C2, the transistor V8 is controlled by external digital logic signal to turn on and off, the base of the transistor V8 is connected with the forward pulse voltage V2_ pulse through an eighth resistor R8, the collector of the triode V8 is connected with a fifth resistor R5 and then connected with a second reference positive voltage vref, a sixth resistor R6 is arranged between the emitter and the collector of the triode, the emitter of the triode V8 is connected with the seventh resistor R7 and then grounded, the seventh resistor R7 is connected in parallel with the second capacitor C2, the emitter of the triode is connected to the positive input end of the operational amplifier through the ninth resistor R9, and two different voltage source reference voltages are respectively provided for the positive input end of the operational amplifier in the process of switching on and switching off the triode; the specific generation principle is as follows.
(1) A first voltage reference vref2.5 in the forward direction is connected in series to the lower end of the capacitance current detection resistor R1. Thus, the feedback voltage of the capacitor current is superimposed with the positive voltage of the first voltage reference (here, the reference voltage of 2.5V), and when the reference of the forward input terminal of the operational amplifier N1 is higher than 2.5V, the operational amplifier output becomes large to charge the capacitor, and when the reference of the forward input terminal of the operational amplifier N1 is lower than 2.5V, the operational amplifier output becomes small to discharge the capacitor, and the operational amplifier N1 can omit the negative voltage source.
(2) The input control signal may be implemented using digital logic signals. The switching transistor V8 is controlled by an external digital logic signal to be turned on and off, so that the voltage dividing resistor R6 can be short-circuited or not short-circuited to obtain two different switched reference voltages, and the input voltage at the positive input end of the operational amplifier N1 can be controlled to follow the input control signal to switch between the two reference voltages, where the two reference voltages are positive voltages. The entire control circuit can be implemented with a single positive voltage supply.
The corresponding simulation waveforms are shown in fig. 11, and it can be seen that the charging current of the charging capacitor tracks the reference voltage waveform well.
Example 3 quantitative design example:
the maximum allowable output pulse width of a certain transmitter is 200us, firstly, the capacity of a charging capacitor is determined to be 0.1uF, the resistance value of a current detection resistor is 1k omega, a bias reference Vref2.5 is 2.5V, the forward charging current of the capacitor is 0.5mA, and then the forward charging is the detection voltage U of the current detection resistorR0.5mA 1k Ω, 0.5V, the positive amplitude of Vin is Vinon2.5V + 0.5V-3V. It can be seen that the voltage increase of the capacitor at 200us charging is:
the comparison reference voltage of the comparator N2 is set to: delta U + UR+UREFAt 200us, comparator N2 outputs a toggle output protection signal, as shown in fig. 9, 1+0.5+ 2.5-4V.
If the maximum duty cycle allowed by the transmitter is 20%, the turn-off time is 200 us/20% × (1-20%) to 800us at the maximum pulse width of 200us, and thus the maximum pulse width can be obtained
Then discharge current IO＝IiWhen 0.5mA/4 equals 0.125mA, the voltage drop of the current detection resistor is as follows: vRoffWhen-0.125 mA 1k Ω -0.125V, the input voltage Vin at turn-off is: vinoffVref+VR2.5V +0.125V 2.375V. Then the capacitance charge and discharge are equalized at this point as shown in fig. 10.
Assuming that the pulse width of the gate control signal is 100us, the period is 400us, and the duty ratio is 25%, the maximum allowable duty ratio of the transmitter is exceeded, but the single-period pulse width does not check the maximum 200us limit of the transmitter, so the single-period does not cause the protection circuit to act. Increment per cycle of
Assuming n cycles of post-protection, then when n Δ UT+ΔUi+VREF+VRonIf the voltage is greater than or equal to 4V, i.e. nx0.125 +0.5+2.5+0.5 is greater than or equal to 4V, then n is greater than or equal to 4, i.e. protection is triggered after 4 cycles, as shown in FIG. 11. Therefore, the circuit realizes energy accumulation protection (namely over duty cycle protection) after 4 periods.
The invention is not limited to the foregoing embodiments. The invention extends to any novel feature or any novel combination of features disclosed in this specification and any novel method or process steps or any novel combination of features disclosed. Those skilled in the art to which the invention pertains will appreciate that insubstantial changes or modifications can be made without departing from the spirit of the invention as defined by the appended claims.
Claims (6)
1. An analog circuit for maximum pulse width protection and maximum duty cycle protection of a transmitter, comprising: the constant current source comprises a positive constant current signal and a negative constant current signal for constant current charging or constant current discharging of the charging capacitor, one end of the charging capacitor is grounded, the other end of the charging capacitor is connected to the positive input end of the comparator, the negative input end of the comparator is connected with a reference voltage, and the second diode is connected between the output end and the positive input end of the comparator;
the maximum pulse width protection and maximum duty cycle protection analog circuit of the transmitter further comprises a first diode, and the charging capacitor is connected with the first diode in parallel;
the maximum pulse width protection and maximum duty cycle protection analog circuit of the transmitter further comprises a current source waveform generating circuit, the current source waveform generating circuit comprises an operational amplifier, a first resistor and a voltage source reference voltage, the output end of the operational amplifier is respectively connected with the positive input end of a comparator and a charging capacitor, the first resistor is used for detecting the current of the charging capacitor to obtain a detection voltage, the detection voltage and the voltage source reference voltage are respectively input to the negative input end and the positive input end of the operational amplifier, and the operational amplifier is used for generating a constant current source.
2. The analog circuit for maximum pulse width protection and maximum duty cycle protection of a transmitter of claim 1, wherein the constant current source is switched in synchronization with a gate control signal of the transmitter to obtain positive and negative constant current signals.
3. The maximum pulse width protection and maximum duty cycle protection analog circuit of claim 2, wherein the charging capacitor is charged with a constant current during a time period when the gate control signal is on, and wherein the charging capacitor is discharged with a constant current during a time period when the gate control signal is off.
4. The analog maximum pulse width protection and maximum duty cycle protection circuit of claim 1, wherein said charging capacitor is connected to a first resistor and then to ground, a node between said charging capacitor and said first resistor is connected to a negative input of an operational amplifier, and a positive input of said operational amplifier is connected to a voltage source reference voltage.
5. The maximum pulse width protection and maximum duty cycle protection analog circuit of claim 4, further comprising a first positive reference voltage, a voltage source reference voltage generating circuit, wherein the positive reference voltage is superimposed with the detected voltage of the first resistor and is inputted to the negative input terminal of the operational amplifier, an output signal of the voltage source reference voltage generating circuit is provided to the positive input terminal of the operational amplifier, and the voltage source reference voltage outputted by the voltage source reference voltage generating circuit comprises two positive voltages which are switched.
6. The analog circuit for maximum pulse width protection and maximum duty cycle protection of a transmitter according to claim 5, wherein the voltage source reference voltage generating circuit comprises a second reference positive voltage, a forward pulse voltage, a triode, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, and a second capacitor, the triode is controlled to be turned on and off by an external digital logic signal, the base of the triode is connected with the forward pulse voltage through the eighth resistor, the collector of the triode is connected with the second reference positive voltage after being connected with the fifth resistor, the sixth resistor is arranged between the emitter and the collector of the triode, the emitter of the triode is connected with the seventh resistor and then grounded, the seventh resistor is connected with the second capacitor in parallel, and the emitter of the triode is connected with the forward input terminal of the operational amplifier through the ninth resistor, the triode provides two different voltage source reference voltages to the positive input end of the operational amplifier in the process of conduction and disconnection respectively.
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| CN113572485B (en) * | 2021-06-28 | 2022-05-20 | 中国船舶重工集团公司第七二三研究所 | Over-pulse width protection circuit of traveling wave tube modulator |
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| JP4098214B2 (en) * | 2003-10-24 | 2008-06-11 | シャープ株式会社 | Infrared transmitter circuit and electronic device |
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