CN110230436B - Control and telemetering circuit applied to cube star separation device - Google Patents

Control and telemetering circuit applied to cube star separation device Download PDF

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Publication number
CN110230436B
CN110230436B CN201910432340.4A CN201910432340A CN110230436B CN 110230436 B CN110230436 B CN 110230436B CN 201910432340 A CN201910432340 A CN 201910432340A CN 110230436 B CN110230436 B CN 110230436B
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resistor
capacitor
pin
circuit
vin1
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CN110230436A (en
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邓寒玉
从伟晨
范书珲
马海宁
张翔
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Nanjing University of Science and Technology
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Nanjing University of Science and Technology
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B64—AIRCRAFT; AVIATION; COSMONAUTICS
    • B64G—COSMONAUTICS; VEHICLES OR EQUIPMENT THEREFOR
    • B64G1/00—Cosmonautic vehicles
    • B64G1/22—Parts of, or equipment specially adapted for fitting in or to, cosmonautic vehicles
    • B64G1/64—Systems for coupling or separating cosmonautic vehicles or parts thereof, e.g. docking arrangements
    • B64G1/645—Separators
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
    • E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
    • E05B47/0001—Operating or controlling locks or other fastening devices by electric or magnetic means with electric actuators; Constructional features thereof
    • E05B47/0002—Operating or controlling locks or other fastening devices by electric or magnetic means with electric actuators; Constructional features thereof with electromagnets
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
    • E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
    • E05B47/02—Movement of the bolt by electromagnetic means; Adaptation of locks, latches, or parts thereof, for movement of the bolt by electromagnetic means
    • E05B47/023—Movement of the bolt by electromagnetic means; Adaptation of locks, latches, or parts thereof, for movement of the bolt by electromagnetic means the bolt moving pivotally or rotatively
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
    • E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
    • E05B47/0001—Operating or controlling locks or other fastening devices by electric or magnetic means with electric actuators; Constructional features thereof
    • E05B47/0002—Operating or controlling locks or other fastening devices by electric or magnetic means with electric actuators; Constructional features thereof with electromagnets
    • E05B2047/0007—Operating or controlling locks or other fastening devices by electric or magnetic means with electric actuators; Constructional features thereof with electromagnets with two or more electromagnets
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
    • E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
    • E05B2047/0072—Operation
    • E05B2047/0073—Current to unlock only

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Remote Sensing (AREA)
  • Aviation & Aerospace Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The invention provides a control and telemetry circuit applied to a cube separation device, which comprises a working circuit, a backup circuit and an interface circuit, wherein the front end of the interface circuit is connected with a rocket control and telemetry cable, the rear end of the interface circuit is connected with the working circuit and the backup circuit, the interface circuit comprises a first connector COM1, a first reed pipe K1 and a second reed pipe K2 which are connected with the first connector COM1, the first connector COM1 comprises No. 1-9 pins, the No. 2 pin and the No. 7 pin are respectively connected with two ends of a first reed pipe K1, the No. 1 pin and the No. 6 pin are respectively connected with two ends of a second reed pipe K2, the No. 4 pin and the No. 5 pin are connected with the working circuit, and the No. 8 pin and the No. 9 pin are connected with the backup circuit. The control circuit and the telemetering circuit of the invention both adopt a double backup design, any one path of work can ensure that the satellite is normally ejected and can give a rocket a correct telemetering signal, and compared with other satellite separation schemes, the reliability is high.

Description

Control and telemetering circuit applied to cube star separation device
Technical Field
The invention relates to the technical field of satellite transmission, in particular to a control and remote measuring circuit applied to a cubic satellite separation device.
Background
In recent years, with the rapid development of technologies such as communication, photoelectric elements, materials, sensors and the like, the cubic satellite with the characteristics of low cost and high functional density is gradually raised, so that the development cost and the development period of the satellite are greatly reduced, and the cubic satellite can be used for remote measurement and test.
The separation device is used as an important subsystem of the cube satellite, and the task of the separation device is to ensure the satellite and smoothly separate the satellite from the rocket. The existing satellite separation mode at home and abroad mostly adopts explosion bolts or carbon knife thread burning, the explosion bolts separate the satellite by using the impact force generated by gunpowder stored in the explosion bolts, and have complex structure and low safety; the carbon knife wire burning utilizes the electric energy stored in the self-contained super capacitor module to heat the carbon knife and burn out the fixing rope, so that the satellite pops out, and the carbon knife wire burning device is large in size and low in safety. The bolt explosion mode usually needs a plurality of bolts to work in a matched mode, all the bolts must be guaranteed to be disconnected simultaneously, the difficulty is high, in addition, the fact that the remains are easy to damage the satellite and the rocket when the bolts are disconnected is guaranteed, therefore, a protection structure needs to be correspondingly arranged, the structure is complex, the size is large, and the bolt explosion mode is not suitable for a cube star. The carbon knife wire burning mode needs to provide very large power instantly to enable the carbon knife to heat and blow the protection rope, a plurality of groups of super capacitors are generally adopted to store electric energy and release energy after receiving rocket control signals, but the super capacitors are low in energy density and large in size, have inherent defects of self-discharge, are not suitable for long-time storage, need to be charged regularly and are troublesome to maintain.
Disclosure of Invention
The invention aims to provide a control and remote measuring circuit which is safe, reliable and small in size and is applied to a cubic satellite separation device.
In order to achieve the purpose outlined above, the technical solution adopted by the present invention is as follows:
a control and telemetry circuit applied to a cube separation device comprises a working circuit, a backup circuit and an interface circuit, wherein the front end of the interface circuit is connected with a rocket control and telemetry cable, the rear end of the interface circuit is connected with the working circuit and the backup circuit, the interface circuit comprises a first connector COM1, a first reed pipe K1 and a second reed pipe K2 which are connected with the first connector COM1, the first connector COM1 comprises pins 1-9, wherein the pin 2 and the pin 7 are respectively connected with two ends of the first reed pipe K1, the pin 1 and the pin 6 are respectively connected with two ends of the second reed pipe K2, the pin 4 and the pin 5 are connected with the working circuit, and the pin 8 and the pin 9 are connected with the backup circuit;
the working circuit comprises a first operational amplifier U1, a first NMOS transistor Q1, a first voltage-stabilizing diode D1, a third voltage-stabilizing diode D3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a second capacitor C2 and a third capacitor C3, wherein a No. 5 pin of the first connector COM1 is the positive electrode VIN1 & lt + & gt of a first input end of the working circuit, a No. 4 pin of the first connector COM1 is the negative electrode VIN1 & lt- & gt of the first input end of the working circuit,
a pin No. 5 of the first operational amplifier U1 is connected with one end of a second capacitor C2, a pin No. 3 is respectively connected with one end of a third capacitor C3, one end of an eighth resistor R8 and one end of a seventh resistor R7, a pin No. 4 is respectively connected with one end of a first capacitor C1 and one end of a fourth resistor R4 which are connected in parallel and one end of a third resistor R3, a pin No. 1 is respectively connected with the other end of the first capacitor C1 and the fourth resistor R4 which are connected in parallel and one end of a fifth resistor R5,
the other end of the seventh resistor R7 is respectively connected with the cathode of the first voltage-stabilizing diode D1 and one end of the sixth resistor R6,
the S stage of the first NMOS transistor Q1 is respectively connected with one end of a first resistor R1, one end of a second resistor R2 and the other end of a third resistor R3 which are connected in parallel, the G stage is connected with the other end of a fifth resistor R5,
the pin No. 2 of the first operational amplifier U1 is connected with VIN1-, the anode of the first voltage-stabilizing diode D1 is connected with VIN1-, the other end of the eighth resistor R8 is connected with VIN1-, the other end of the third capacitor C3 is connected with VIN1-, the other end of the second capacitor C2 is connected with VIN1-, the other end of the first resistor R1 and the second resistor R2 which are connected in parallel is connected with VIN1-,
the cathode of the third voltage-stabilizing diode D3 is connected with a first output anode VOUT1+, and the anode is connected with a first output cathode VOUT 1-;
the first input end positive electrode VIN1+ is connected with the other end of the sixth resistor R6, and the first input end positive electrode VIN1+ is connected with the first output positive electrode VOUT1 +; the D stage of the first NMOS transistor Q1 is connected with a first output cathode VOUT 1-;
the backup circuit comprises a second operational amplifier U2, a second NMOS transistor Q2, a second voltage-regulator diode D2, a fourth voltage-regulator diode D4, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a fourth capacitor C4, a fifth capacitor C5 and a sixth capacitor C6,
a pin 5 of the second operational amplifier U2 is connected with one end of a fifth capacitor C5, a pin 3 is respectively connected with one end of a sixth capacitor C6, one end of a sixteenth resistor R16 and one end of a fifteenth resistor R15, a pin 4 is respectively connected with one end of a fourth capacitor C4 and one end of a twelfth resistor R12 which are connected in parallel and one end of an eleventh resistor R11, a pin 1 is respectively connected with the other end of the fourth capacitor C4 and the twelfth resistor R12 which are connected in parallel and one end of a thirteenth resistor R13,
the other end of the fifteenth resistor R15 is respectively connected to the cathode of the second zener diode D2 and one end of the fourteenth resistor R14,
the S stage of the second NMOS transistor Q2 is respectively connected with one end of a ninth resistor R9 and a tenth resistor R10 which are connected in parallel and the other end of an eleventh resistor R11, the G stage is connected with the other end of a thirteenth resistor R13,
pin 2 of the second operational amplifier U2 is connected to VIN2-, the anode of the second zener diode D2 is connected to VIN2-, the other end of the sixteenth resistor R16 is connected to VIN2-, the other end of the sixth capacitor C6 is connected to VIN2-, the other end of the fifth capacitor C5 is connected to VIN2-, the other end of the parallel-connected ninth resistor R9 and the other end of the tenth resistor R10 is connected to VIN2-,
the cathode of the fourth voltage stabilizing diode D4 is connected with a second output anode VOUT2+, and the anode is connected with a second output cathode VOUT 2-;
a second input end positive electrode VIN2+ is connected with the other end of the fourteenth resistor R14, and a second input end positive electrode VIN2+ is connected with a second output positive electrode VOUT2 +; the D stage of the second NMOS transistor Q2 is connected to the second output negative pole VOUT 2-.
Further, pins 4, 5, 8 and 9 of the first connector COM1 are connected to the rocket input voltage, which is nominally 28 ± 4V, for a time duration of 0.2s to 3 s.
Further, the first capacitor C1, the second capacitor C2, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5 and the sixth capacitor C6 are all ceramic capacitors.
Further, the fourth resistor R4 and the twelfth resistor R12 are both 1M Ω.
Further, the first capacitor C1 and the fourth capacitor C4 are both 100pF in size.
Further, at least one of the operating circuit and the backup circuit operates.
Compared with the prior art, the invention has the following beneficial effects:
(1) the invention has simple and effective design, small device volume, compact layout and high function integration level, and occupies small volume compared with explosion bolts and carbon knife burning lines;
(2) the control circuit and the telemetering circuit of the invention both adopt a double backup design, any one path of work can ensure that the satellite is normally ejected and can give a rocket a correct telemetering signal, and compared with other satellite separation schemes, the reliability is high.
The above objects, features and advantages and the operation of the present invention will be described in detail with reference to the accompanying drawings.
Drawings
FIG. 1 is a schematic diagram of the electromagnetic locking and unlocking structure of the present invention.
Fig. 2 is a schematic diagram of the internal structure of the electromagnetic locking and unlocking structure of the present invention.
Fig. 3 is a schematic diagram of a push plate structure of the satellite separation device of the present invention.
Fig. 4 is a circuit diagram of the operation of the present invention.
Fig. 5 is a diagram of a backup circuit of the present invention.
Fig. 6 is a circuit diagram of the interface of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
With reference to fig. 1-3, the cube star unlocking separation mechanism of the present invention employs an electromagnetic locking and unlocking structure to unlock and open the top cover 2, the electromagnetic locking and unlocking structure is disposed outside a main frame structure for placing a cube star and is used to lock and unlock the top cover 2 and the upper cross beam 5, the electromagnetic locking and unlocking structure comprises a lock frame 7, two power-off electromagnets 6, an internal lock frame 19, two lock connecting rods 20 (which are matched with the locking plate 1 on the top cover 2 to lock the top cover 2), two lock suction plates 21 and two tension springs 22, one end of each lock suction plate 21 is connected with the corresponding power-off electromagnet 6 through magnetic force, the other end is hinged with the corresponding lock connecting rod 20, one end of each tension spring 22 is connected with the internal lock frame 19, the other end is connected with the corresponding lock connecting rod 20, the two lock connecting rods 20 are respectively hinged to two sides of the internal lock frame 19, the lock connecting rod 20 can rotate around the lock inner frame 19 through the power loss of the power loss type electromagnets 6, so that the top cover 2 and the upper cross beam 5 are unlocked, the two power loss type electromagnets 6 are respectively connected with the working circuit and the backup circuit, at least one of the two power loss type electromagnets 6 can work, after the power loss type electromagnets 6 are electrified and demagnetized, the top cover 2 is opened, the cube star is ejected from the inside of the main frame structure under the action of a push plate at the bottom of the main frame structure, after the push plate reaches a designated position, the upper magnets 3 of the push plate reach the position near the reed pipes of the interface circuit, the reed pipes are switched from open to closed, and the rocket can receive a remote measuring signal.
With reference to fig. 4-6, the control and telemetry circuit applied to the cube separation device of the present invention includes a working circuit, a backup circuit and an interface circuit, the front end of the interface circuit is connected to a rocket control and telemetry cable, the back end of the interface circuit is connected to the working circuit and the backup circuit, with reference to fig. 6, the interface circuit includes a first connector COM1, a first reed switch K1 and a second reed switch K2 connected to the first connector COM1, the first connector COM1 includes pins 1-9, where pin 2 and pin 7 are respectively connected to two ends of a first reed switch K1, pin 1 and pin 6 are respectively connected to two ends of a second reed switch K2, pin 4 and pin 5 are connected to the working circuit, and pin 8 and pin 9 are connected to the backup circuit;
with reference to fig. 4, the working circuit includes a first operational amplifier U1, a first NMOS transistor Q1, a first zener diode D1, a third zener diode D3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a second capacitor C2, and a third capacitor C3, a pin 5 of the first connector COM1 is a positive electrode VIN1+ of a first input terminal of the working circuit, a pin 4 is a negative electrode VIN1 of the first input terminal of the working circuit,
a pin No. 5 of the first operational amplifier U1 is connected with one end of a second capacitor C2, a pin No. 3 is respectively connected with one end of a third capacitor C3, one end of an eighth resistor R8 and one end of a seventh resistor R7, a pin No. 4 is respectively connected with one end of a first capacitor C1 and one end of a fourth resistor R4 which are connected in parallel and one end of a third resistor R3, a pin No. 1 is respectively connected with the other end of the first capacitor C1 and the fourth resistor R4 which are connected in parallel and one end of a fifth resistor R5,
the other end of the seventh resistor R7 is respectively connected with the cathode of the first voltage-stabilizing diode D1 and one end of the sixth resistor R6,
the S stage of the first NMOS transistor Q1 is respectively connected with one end of a first resistor R1, one end of a second resistor R2 and the other end of a third resistor R3 which are connected in parallel, the G stage is connected with the other end of a fifth resistor R5,
the pin No. 2 of the first operational amplifier U1 is connected with VIN1-, the anode of the first voltage-stabilizing diode D1 is connected with VIN1-, the other end of the eighth resistor R8 is connected with VIN1-, the other end of the third capacitor C3 is connected with VIN1-, the other end of the second capacitor C2 is connected with VIN1-, the other end of the first resistor R1 and the second resistor R2 which are connected in parallel is connected with VIN1-,
the cathode of the third voltage-stabilizing diode D3 is connected with a first output anode VOUT1+, and the anode is connected with a first output cathode VOUT 1-;
the first input end positive electrode VIN1+ is connected with the other end of the sixth resistor R6, and the first input end positive electrode VIN1+ is connected with the first output positive electrode VOUT1 +; the D stage of the first NMOS transistor Q1 is connected with a first output cathode VOUT 1-;
with reference to fig. 5, the backup circuit includes a second operational amplifier U2, a second NMOS transistor Q2, a second zener diode D2, a fourth zener diode D4, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6,
a pin 5 of the second operational amplifier U2 is connected with one end of a fifth capacitor C5, a pin 3 is respectively connected with one end of a sixth capacitor C6, one end of a sixteenth resistor R16 and one end of a fifteenth resistor R15, a pin 4 is respectively connected with one end of a fourth capacitor C4 and one end of a twelfth resistor R12 which are connected in parallel and one end of an eleventh resistor R11, a pin 1 is respectively connected with the other end of the fourth capacitor C4 and the twelfth resistor R12 which are connected in parallel and one end of a thirteenth resistor R13,
the other end of the fifteenth resistor R15 is respectively connected to the cathode of the second zener diode D2 and one end of the fourteenth resistor R14,
the S stage of the second NMOS transistor Q2 is respectively connected with one end of a ninth resistor R9 and a tenth resistor R10 which are connected in parallel and the other end of an eleventh resistor R11, the G stage is connected with the other end of a thirteenth resistor R13,
pin 2 of the second operational amplifier U2 is connected to VIN2-, the anode of the second zener diode D2 is connected to VIN2-, the other end of the sixteenth resistor R16 is connected to VIN2-, the other end of the sixth capacitor C6 is connected to VIN2-, the other end of the fifth capacitor C5 is connected to VIN2-, the other end of the parallel-connected ninth resistor R9 and the other end of the tenth resistor R10 is connected to VIN2-,
the cathode of the fourth voltage stabilizing diode D4 is connected with a second output anode VOUT2+, and the anode is connected with a second output cathode VOUT 2-;
a second input end positive electrode VIN2+ is connected with the other end of the fourteenth resistor R14, and a second input end positive electrode VIN2+ is connected with a second output positive electrode VOUT2 +; the D stage of the second NMOS transistor Q2 is connected to the second output negative pole VOUT 2-.
Further, pins 4, 5, 8 and 9 of the first connector COM1 are connected to the rocket input voltage, which is nominally 28 ± 4V, for a time duration of 0.2s to 3 s.
Further, the first capacitor C1, the second capacitor C2, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5 and the sixth capacitor C6 are all ceramic capacitors.
Further, the fourth resistor R4 and the twelfth resistor R12 are both 1M Ω.
Further, the first capacitor C1 and the fourth capacitor C4 are both 100pF in size.
Further, at least one of the operating circuit and the backup circuit operates.
The control and remote measuring circuit applied to the cube satellite separation device of the invention is applied to the satellite separation mechanism and comprises the following relevant working processes:
the rocket is connected with the circuit board but is not powered, and the satellite is arranged in the separation device; at the moment, the input ends VIN1+ and VIN 1-are in a floating state, no voltage is input, the output ends VOUT1+ and VOUT 1-are not output, the electromagnet is in a power-off state, the pressure of more than 4.5kg is kept, and the satellite is locked in the separation device; the satellite presses a push plate in the separating device at the bottom of the separating device, a small magnet 5 arranged on the push plate is not close to a first reed switch K1, the reed switch is in a disconnected state, and a rocket telemetering end displays a high level to indicate that the satellite is still in the separating device;
the satellite is being ejected from the detaching device when the rocket is connected to the circuit board and a 28V pulsed voltage is provided. At this time, the input terminals VIN1+, VIN 1-input voltage 28V, VIN 1-are simultaneously the reference ground of the separation control circuit; the voltage of 28V is added to an input end VIN1+, the voltage of the non-inverting input end of the first operational amplifier U1 is 2.12V after passing through a sixth resistor R6, a seventh resistor R7 and an eighth resistor R8, the voltage of the inverting input end of the first operational amplifier U1 is about 2.12V according to the principles of virtual short and virtual disconnection of the operational amplifier, then the circuit charges two ends of a first capacitor C1 to the power supply voltage 28V of the first operational amplifier U1, the conduction voltage of a first NMOS tube Q1 is reached, the first NMOS tube Q1 is conducted, the voltage of the electromagnet is 28V at the moment, the electromagnet is electrified and demagnetized, a separating device is released, and a satellite pops up. Two parallel resistors are connected in series between the electromagnet and the voltage input end of the rocket: the main function of the first resistor R1 and the second resistor R2 is to eliminate surge current. At the moment, the push plate starts to be pushed out and does not reach the final position, the small magnet 3 arranged on the push plate is not close to the first reed pipe K1, the reed pipe is still in a disconnected state, and the rocket telemetering end shows a high level, which indicates that the satellite is not completely ejected.
When the rocket is connected with the circuit board and 28V pulse voltage is cut off, the satellite is ejected from the separation device. At the moment, the satellite input end is powered off, the fourth resistor R4 releases the charge on the first capacitor C1 quickly, the first NMOS tube Q1 is disconnected, the electromagnet is disconnected with the rocket input end, the reverse electromotive force generated by the coil in the electromagnet can be prevented from backflushing the rocket, and meanwhile the reverse electromotive force on the coil can be eliminated by the third diode D3. And the push plate reaches the final position, the small magnet 3 arranged on the push plate is close to the first reed pipe K1, the reed pipe is in a closed state, and the remote measuring end of the rocket displays a low level to indicate that the satellite is completely ejected.
The fifth ceramic capacitor C5 and the sixth ceramic capacitor C6 are used for filtering, and the reliability of the circuit is enhanced.
The foregoing illustrates and describes the principles, general features, and advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (6)

1. A control and telemetering circuit applied to a cube separation device is characterized in that: the rocket working circuit comprises a working circuit, a backup circuit and an interface circuit, wherein the front end of the interface circuit is connected with a rocket control and telemetry cable, the rear end of the interface circuit is connected with the working circuit and the backup circuit, the interface circuit comprises a first connector COM1, a first reed switch K1 and a second reed switch K2 which are connected with the first connector COM1, the first connector COM1 comprises No. 1-9 pins, wherein the No. 2 pin and the No. 7 pin are respectively connected with two ends of the first reed switch K1, the No. 1 pin and the No. 6 pin are respectively connected with two ends of the second reed switch K2, the No. 4 pin and the No. 5 pin are connected with the working circuit, and the No. 8 pin and the No. 9 pin are connected with the backup circuit;
the working circuit comprises a first operational amplifier U1, a first NMOS transistor Q1, a first voltage-stabilizing diode D1, a third voltage-stabilizing diode D3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a second capacitor C2 and a third capacitor C3, wherein a No. 5 pin of the first connector COM1 is the positive electrode VIN1 & lt + & gt of a first input end of the working circuit, a No. 4 pin of the first connector COM1 is the negative electrode VIN1 & lt- & gt of the first input end of the working circuit,
a pin No. 5 of the first operational amplifier U1 is connected with one end of a second capacitor C2, a pin No. 3 is respectively connected with one end of a third capacitor C3, one end of an eighth resistor R8 and one end of a seventh resistor R7, a pin No. 4 is respectively connected with one end of a first capacitor C1 and one end of a fourth resistor R4 which are connected in parallel and one end of a third resistor R3, a pin No. 1 is respectively connected with the other end of the first capacitor C1 and the fourth resistor R4 which are connected in parallel and one end of a fifth resistor R5,
the other end of the seventh resistor R7 is respectively connected with the cathode of the first voltage-stabilizing diode D1 and one end of the sixth resistor R6,
the S stage of the first NMOS transistor Q1 is respectively connected with one end of a first resistor R1, one end of a second resistor R2 and the other end of a third resistor R3 which are connected in parallel, the G stage is connected with the other end of a fifth resistor R5,
the pin No. 2 of the first operational amplifier U1 is connected with VIN1-, the anode of the first voltage-stabilizing diode D1 is connected with VIN1-, the other end of the eighth resistor R8 is connected with VIN1-, the other end of the third capacitor C3 is connected with VIN1-, the other end of the second capacitor C2 is connected with VIN1-, the other end of the first resistor R1 and the second resistor R2 which are connected in parallel is connected with VIN1-,
the cathode of the third voltage-stabilizing diode D3 is connected with a first output anode VOUT1+, and the anode is connected with a first output cathode VOUT 1-;
the first input end positive electrode VIN1+ is connected with the other end of the sixth resistor R6, and the first input end positive electrode VIN1+ is connected with the first output positive electrode VOUT1 +; the D stage of the first NMOS transistor Q1 is connected with a first output cathode VOUT 1-;
the backup circuit comprises a second operational amplifier U2, a second NMOS transistor Q2, a second voltage-regulator diode D2, a fourth voltage-regulator diode D4, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a fourth capacitor C4, a fifth capacitor C5 and a sixth capacitor C6,
a pin 5 of the second operational amplifier U2 is connected with one end of a fifth capacitor C5, a pin 3 is respectively connected with one end of a sixth capacitor C6, one end of a sixteenth resistor R16 and one end of a fifteenth resistor R15, a pin 4 is respectively connected with one end of a fourth capacitor C4 and one end of a twelfth resistor R12 which are connected in parallel and one end of an eleventh resistor R11, a pin 1 is respectively connected with the other end of the fourth capacitor C4 and the twelfth resistor R12 which are connected in parallel and one end of a thirteenth resistor R13,
the other end of the fifteenth resistor R15 is respectively connected to the cathode of the second zener diode D2 and one end of the fourteenth resistor R14,
the S stage of the second NMOS transistor Q2 is respectively connected with one end of a ninth resistor R9 and a tenth resistor R10 which are connected in parallel and the other end of an eleventh resistor R11, the G stage is connected with the other end of a thirteenth resistor R13,
pin 2 of the second operational amplifier U2 is connected to VIN2-, the anode of the second zener diode D2 is connected to VIN2-, the other end of the sixteenth resistor R16 is connected to VIN2-, the other end of the sixth capacitor C6 is connected to VIN2-, the other end of the fifth capacitor C5 is connected to VIN2-, the other end of the parallel-connected ninth resistor R9 and the other end of the tenth resistor R10 is connected to VIN2-,
the cathode of the fourth voltage stabilizing diode D4 is connected with a second output anode VOUT2+, and the anode is connected with a second output cathode VOUT 2-;
a second input end positive electrode VIN2+ is connected with the other end of the fourteenth resistor R14, and a second input end positive electrode VIN2+ is connected with a second output positive electrode VOUT2 +; the D stage of the second NMOS transistor Q2 is connected to the second output negative pole VOUT 2-.
2. The circuit according to claim 1, wherein pins 4, 5, 8 and 9 of the first connector COM1 are connected to a rocket input voltage, which is nominally 28 ± 4V, for a duration of 0.2s to 3 s.
3. The circuit of claim 1, wherein the first capacitor C1, the second capacitor C2, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5 and the sixth capacitor C6 are all ceramic capacitors.
4. The circuit of claim 1, wherein the fourth resistor R4 and the twelfth resistor R12 are both 1M Ω in size.
5. The circuit of claim 1, wherein the first capacitor C1 and the fourth capacitor C4 are each 100pF in size.
6. The circuit of any of claims 1-5, wherein at least one of the operational circuit and the backup circuit is operational.
CN201910432340.4A 2019-05-23 2019-05-23 Control and telemetering circuit applied to cube star separation device Active CN110230436B (en)

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