CN110221461B - Display device and control circuit board - Google Patents
Display device and control circuit board Download PDFInfo
- Publication number
- CN110221461B CN110221461B CN201910461565.2A CN201910461565A CN110221461B CN 110221461 B CN110221461 B CN 110221461B CN 201910461565 A CN201910461565 A CN 201910461565A CN 110221461 B CN110221461 B CN 110221461B
- Authority
- CN
- China
- Prior art keywords
- circuit board
- transmission
- array substrate
- printed circuit
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 114
- 239000000758 substrate Substances 0.000 claims abstract description 70
- 230000005611 electricity Effects 0.000 claims description 2
- 230000002159 abnormal effect Effects 0.000 abstract description 15
- 230000005856 abnormality Effects 0.000 description 14
- 239000004973 liquid crystal related substance Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Landscapes
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Structure Of Printed Boards (AREA)
Abstract
The invention discloses a display device which comprises an array substrate, a printed circuit board, a control circuit board and a plurality of source electrode driving units, wherein a digital power supply signal output pin of a power supply chip and a transmission circuit of the power supply chip are communicated among a flexible flat cable, the printed circuit board, the source electrode driving units and the array substrate. The invention also discloses another display device and a control circuit board. The transmission circuit between the digital power supply signal output pin and the enable pin on the control circuit board of the display device forms a current loop through the input and output sections distributed on the flexible flat cable, the printed circuit board, the source electrode driving unit and the array substrate, when the current loop works normally, a high-voltage signal on the control circuit board can be input to the array substrate, and the problem that the array substrate is burnt due to the fact that short circuits occur due to abnormal connection among the flexible flat cable, the printed circuit board, the source electrode driving unit and the array substrate is effectively avoided.
Description
Technical Field
The invention relates to the technical field of liquid crystal, in particular to two display devices and a control circuit board.
Background
With the development of the liquid crystal display field, the liquid crystal display has been widely used in the fields of television, mobile communication, medical treatment, and the like.
In the production and assembly process of the liquid crystal display, the array substrate is electrically connected with the printed circuit board through the source electrode driving unit module, the printed circuit board is connected with the control circuit board through the flexible flat cable, and the array substrate is easily short-circuited and burnt due to the abnormality in the two connection processes, so that the liquid crystal display capable of preventing the array substrate from being burnt due to the abnormal connection is needed.
Disclosure of Invention
The invention mainly aims to provide a display device, an array substrate and a control circuit board, and aims to solve the technical problem that the array substrate is short-circuited and burnt due to abnormal connection among the array substrate, the printed circuit board and the control circuit board in the production and assembly process of a liquid crystal display so as to reduce the risk of short-circuit and burning of the array substrate.
To achieve the above object, the present invention provides a display device including:
array substrate, printed circuit board, control circuit board and connection array substrate with printed circuit board's a plurality of source drive unit, control circuit board pass through flexible flat cable with the printed circuit board electricity is connected, control circuit board includes power chip, power chip's digital power signal output pin with it has transmission circuit to communicate between power chip's the enable pin, transmission circuit communicate in flexible flat cable printed circuit board source drive unit and between the array substrate.
Optionally, the transmission circuit includes a first transmission section disposed on the flexible flat cable, a second transmission section disposed on the printed circuit board, a third transmission section disposed on the source driving unit, and a fourth transmission section disposed on the array substrate, and the first transmission section, the second transmission section, the third transmission section, and the fourth transmission section include an input section and an output section
Optionally, at least two third transmission segments are disposed on the source driving unit.
Optionally, two rows of pins are disposed on two sides of the source driving unit along the length direction, and the two third transmission segments are disposed on the pins at the middle edges of the two rows of pins respectively.
Optionally, the output section and the input section of the adjacent source driving units are communicated.
Optionally, the transmission circuit includes a plurality of transmission segments disposed on the control circuit board;
one end of each transmission section is connected with each enabling pin of the power chip in a one-to-one correspondence mode, and the other end of each transmission section is communicated with the flexible flat cable.
In addition, in order to achieve the above object, the present invention further provides a display device, where the display device includes an array substrate, a printed circuit board, a control circuit board, and a plurality of source driving units connecting the array substrate and the printed circuit board, the control circuit board is connected to the printed circuit board through a flexible flat cable, the control circuit board includes a power chip, a transmission circuit is communicated between a digital power signal output pin of the power chip and an enable pin of the power chip, and the transmission circuit is communicated among the flexible flat cable, the printed circuit board, and the source driving units.
In addition, in order to achieve the above object, the present invention further provides a control circuit board, wherein the control circuit board includes a power chip, and the control circuit board includes a power signal output pin and an input pin; a digital power signal output pin of the power chip is electrically connected with a power signal output pin of the control circuit board; and an enabling signal input pin of the power supply chip is electrically connected with an input pin of the control circuit board.
According to the two display devices and the control circuit board provided by the invention, the transmission circuit between the digital power supply signal output pin and the enable pin on the control circuit board of the display device forms a current loop through the input and output sections distributed on the flexible flat cable, the printed circuit board, the source electrode driving unit and the array substrate, when the current loop works normally, a high-voltage signal on the control circuit board can be input to the array substrate, and the problem of array substrate burnout caused by short circuit due to abnormal connection among the flexible flat cable, the printed circuit board, the source electrode driving unit and the array substrate is effectively avoided.
Drawings
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a power chip of a display device according to an embodiment of the present disclosure before modification;
FIG. 3 is a partially enlarged schematic view of the display device in the embodiment shown in FIG. 1;
FIG. 4 is a schematic structural diagram of a display device according to another embodiment of the present application;
FIG. 5 is a schematic structural diagram of a display panel according to another embodiment of the present application;
fig. 6 is a schematic structural diagram of a display device according to another embodiment of the present application.
The reference numbers illustrate:
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that all the directional indications (such as up, down, left, right, front, and rear … …) in the embodiment of the present application are only used to explain the relative position relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indication is changed accordingly.
In addition, the descriptions referred to as "first", "second", etc. in this application are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit ly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a display device 1 provided in the present application, where the display device 1 includes:
the array substrate 10 is a pixel array formed of a plurality of pixel units, a plurality of gate lines, a plurality of source lines, and a plurality of active switches.
And a source driving unit 20 for supplying display data and a source driving signal to the pixel unit.
The printed circuit board 30 transmits the received control signal to the source driving unit.
The flexible flat cable 40 connects the printed circuit board 30 and the control circuit board 50, and transmits a control signal generated by the control circuit board 50 to the printed circuit board 30.
The control circuit board 50 may classify a control signal output by the power chip 501 on the control circuit board into a high voltage signal and a low voltage signal, where the high voltage signal output pin of the power chip 501 includes signals such as VGH (gate on voltage), VGL (gate off voltage), VAAA (analog power signal), HVAA (half-voltage analog power signal), and the low voltage signal includes DVDD (digital power signal) (3.3V), a differential data signal, and a ground signal.
A transmission circuit is communicated between the digital power signal output pin 5011 and the enable pin 5012 of the power chip 501, and the transmission circuit is communicated between the flexible flat cable 40, the printed circuit board 30, the source driving unit 20 and the array substrate 10.
To better explain how the display device provided by the present application reduces the risk of burning out the array substrate, the reason that the connection among the array substrate, the printed circuit board and the control circuit board is easy to cause the array substrate to be short-circuited and burnt out in the production and assembly process of the liquid crystal display before the improvement is proposed in the present application will be explained.
As shown in fig. 2, before the improvement proposed in the present application, the internal structure of the power chip, which is usually integrated with the control circuit board, generates a low voltage signal DVDD of 3.3V when a voltage of 12V is input, and transmits DVDD3.3V to the high voltage enable signal, and the enable signal pin generates high voltage signals such as VAA, VGH, VGL and the like after receiving the enable signal.
The control circuit board transmits high-voltage signals to the array substrate through the flexible flat cables, the printed circuit board and the source electrode driving unit. The flexible flat cable is detachably connected with the control circuit board and the printed circuit board in an inserting mode. Because the number of interface pins on the flexible flat circuit is large and the arrangement is fine, the plugging abnormality is easily caused by the misalignment of the interface pins when the flexible flat circuit is plugged with a control circuit board or a printed circuit board. The source electrode driving module is connected with the printed circuit board and the array substrate through anisotropic conductive adhesive. Similarly, the number of the interface pins at the two ends of the connection is large and the arrangement is fine, which is also easy to cause abnormal connection because the interface pins are not aligned one by one.
When the plugging abnormality or the connection abnormality occurs, because a transmission path still exists between the control circuit board and the array substrate, a high-voltage signal output by the control circuit is still transmitted to the array substrate along the transmission path, and the array substrate is burnt out due to short circuit.
In order to solve the problem of short circuit and burning of the array substrate caused by abnormal plugging or abnormal connection, as shown in fig. 1, in the display device provided in the present application, a transmission circuit is communicated between the digital power signal output pin 5011 and the enable pin 5012 of the power chip 501, and the transmission circuit is communicated between the flexible flat cable 40, the printed circuit board 30, the source driving unit 20 and the array substrate 10.
Along the transmission path, the digital power signal output from the pin 5011 is input to the array substrate 10 sequentially through the flexible flat cable 40, the printed circuit board 30, and the source driving unit 20, and then input to the enable pin 5012 sequentially through the source driving unit 20, the printed circuit board 30, and the flexible flat cable 40. When the plugging abnormality occurs between the flexible flat cable 40 and the control circuit board 50 or the printed circuit board 30, or the connection abnormality occurs between the source driving module 20 and the printed circuit board 30 or the array substrate 10, the transmission path may be interrupted, and the digital power signal cannot be input to the enable pin 5012 along the transmission path and cannot be output as a high voltage signal, so as to avoid the problem of short circuit and burnout of the array substrate caused by transmitting the high voltage signal to the array substrate when the plugging abnormality or the connection abnormality occurs.
Further, as shown in fig. 1, the transmission circuit between the digital power signal output pin 5011 and the enable pin 5012 includes a first transmission section 401 disposed on the flexible flat cable 40, a second transmission section 301 on the printed circuit board 30, a third transmission section 201 on the source driving unit 20, and a fourth transmission section 101 on the array substrate 10, and the first transmission section, the second transmission section, the third transmission section, and the fourth transmission section all include an input section and an output section.
It should be noted that, in the first transmission section of the flexible flat cable, the input section includes a transmission section in which the working current direction is input from the control circuit board to the printed circuit board through the flexible flat cable, and the output section includes a transmission section in which the working current direction is output from the printed circuit board to the control circuit board through the flexible flat cable; on a second transmission section of the printed circuit board, the input section comprises a transmission section of which the working current direction is input from the flexible flat cable to the source electrode driving unit through the printed circuit board, and the output section comprises a transmission section of which the working current direction is output from the source electrode driving unit to the flexible flat cable through the printed circuit board; on a third transmission section of the source electrode driving unit, the input section comprises a transmission section of which the working current direction is input from the printed circuit board to the array substrate through the source electrode driving unit, and the output section comprises a transmission section of which the working current direction is output from the array substrate to the printed circuit board through the source electrode driving unit; on a fourth transmission section on the array substrate, the input section comprises a transmission section of which the working current direction is input from the source electrode driving unit to the array substrate, and the output section comprises a transmission section of which the working current direction is output from the array substrate to the source electrode driving unit.
The transmission circuit between the digital power signal output pin 5011 and the enable pin 5012 forms a current loop through the input and output sections distributed on the flexible flat cable, the printed circuit board, the source driving unit and the array substrate, when the current loop works normally, a high-voltage signal on the control circuit board can be input to the array substrate, and the problem of array substrate burnout caused by short circuit due to abnormal connection among the flexible flat cable, the printed circuit board, the source driving unit and the array substrate is effectively avoided.
As shown in fig. 1, in an embodiment, at least two third transmission segments 201 are disposed on the source driving unit 20. Since each of the third transmission segments 201 includes an input segment and an output segment, and both ends of each of the input segment and the output segment are located at the connection positions of the source driving unit 20, the printed circuit board 30 and the array substrate 10, the increase in the number of the input segments and the output segments increases the probability of finding connection abnormalities at the connection positions, and further reduces the risk of array substrate burnout due to short circuit caused by the connection abnormalities.
Optionally, two rows of pins are disposed on two sides of the source driving unit 20 along the length direction, and the two third transmission segments are disposed on the pins at the middle edges of the two rows of pins, respectively.
The source driving units 20 are connected to the interface pins on the array substrate 10 in a one-to-one correspondence manner through one row of pins, and are also connected to the interface pins on the printed circuit board 30 in a one-to-one correspondence manner through the other row of pins. When the pins at the edges of the two rows of pins are connected with the corresponding interface pins, the two third transmission segments 201 can be correctly connected, and when the pins at the edges are connected correctly, it indicates that the pins located in the middle between the pins at the edges are also correctly connected one by one. Therefore, when the two third transmission segments 201 of the source driving unit 20 are respectively disposed at the pins at the middle edge of the two rows of pins, if any one of the pins between the edge pin and the edge pin is abnormal in connection, the transmission circuit between the digital power signal output pin and the enable pin can be in an open circuit state, so as to more effectively avoid the problem of array substrate burnout due to abnormal connection short circuit.
Further, as shown in the enlarged view of fig. 3, the upper side and the lower side of the source driving unit 20 have a row of pins, the third transmission section 201 on the left side includes a transmission section between the first pin on the left side of the upper side and the first pin on the left side of the lower side, a transmission section between the second pin on the left side of the upper side and the second pin on the left side of the lower side, and the third transmission section 201 on the right side includes a transmission section between the first pin on the right side of the upper side and the first pin on the right side of the lower side, a transmission section between the second pin on the right side of the upper side and the second pin on the right side of the lower side.
In the above transmission line layout manner, when the two third transmission segments 201 of the source driving unit 20 are respectively disposed at the outermost pins of the two rows of pins, if any one of the two rows of pins of the source driving unit 20 is abnormally connected, the transmission circuit between the digital power signal output pin 5011 and the enable pin 5012 can be in an open circuit state, and the high-voltage signal output by the control circuit board 50 cannot be input to the array substrate 10, so that the problem of array substrate burnout due to short circuit caused by abnormal connection is avoided to the greatest extent.
Alternatively, the output section and the input section of the adjacent source driving units 20 are communicated. As shown in fig. 1, the first source driving unit, the second source driving unit, the third source driving unit and the fourth source driving unit are arranged from right to left in sequence. The output section on the left side of the first source electrode driving unit is communicated with the input section on the right side of the adjacent second source electrode driving unit, and the output section on the left side of the second source electrode driving unit is communicated with the input section on the right side of the adjacent third source electrode driving unit. The output section and the input section of the adjacent source driving units are communicated, and the communicated lines can be arranged on the side edge of the printed circuit board 30 along the length direction, so that the influence of the newly added communicated lines on the original wiring of the printed circuit board 30 is reduced, and the wiring design of the printed circuit board 30 is simplified.
Optionally, in an embodiment, as shown in fig. 4, the display device includes, in order from right to left, a first source driving unit, a second source driving unit, a third source driving unit, and a fourth source driving unit. The third transmission section for communicating the printed circuit board 30 and the array substrate 10 is disposed on the spaced source driving units, that is, the output section of the first source driving unit is communicated with the input section of the third source driving unit, the output section of the third source driving unit is communicated with the flexible flat cable, and the input section and the output section are not disposed on the second source driving unit and the fourth source driving unit.
Similarly, when the display device includes a greater number of source driving units, part of the source driving units may be selected to be arranged in the input section and the output section according to a preset rule, where the preset rule may be to select the source driving units at uniform intervals, or may be to select the source driving units according to the importance of a wiring area corresponding to the position of the source driving unit or the difficulty of wiring. When the display device comprises a large number of source driving units, part of the source driving units are selected according to a preset rule to arrange the input section and the output section instead of arranging the input section and the output section of each source driving unit, so that the problem of array substrate burnout caused by short circuit due to abnormal connection can be effectively avoided, and meanwhile, the wiring design on a printed circuit board connected with the source driving units and the array substrate is simplified.
Alternatively, in an embodiment, as shown in fig. 5, the transmission circuit between the digital power signal output pin 5011 and the enable pins (5012, 5014, 5015) includes a plurality of transmission sections disposed on the control circuit board 50;
one end of each transmission segment is connected to each enable pin (5012, 5014, 5015) of the power supply chip in a one-to-one correspondence, and the other end is communicated with the flexible flat cable 40. Because the enable pins correspond to the output of different high-voltage signals one to one, the digital power signals transmitted back from the flexible flat cable are connected with the enable pins on the power chip in one to one correspondence according to the plurality of branch transmission sections, so that when the power chip is provided with a plurality of enable pins corresponding to a plurality of high-voltage signals, the problem that the array substrate is burnt due to abnormal connection and short circuit can be avoided.
As shown in fig. 6, the present invention also proposes a display device 2, the display device 2 including:
the array substrate 10 is a pixel array formed of a plurality of pixel units, a plurality of gate lines, a plurality of source lines, and a plurality of active switches.
And a source driving unit 20 for supplying display data and a source driving signal to the pixel unit.
The printed circuit board 30 transmits the received control signal to the source driving unit.
The flexible flat cable 40 connects the printed circuit board 30 and the control circuit board 50, and transmits a control signal generated by the control circuit board 50 to the printed circuit board 30.
The control circuit board 50 may classify control signals output by the power chip 501 on the control circuit board into high voltage signals and low voltage signals, where the high voltage signals include VGH (gate on voltage), VGL (gate off voltage), VAAA (analog power signal), HVAA (semi-analog power signal), and the like, and the low voltage signals include DVDD (digital power signal) (3.3V), differential data signals, ground signals, and the like.
A transmission circuit is communicated between the digital power signal output pin 5011 and the enable pin 5012 of the power chip 501, and the transmission circuit is communicated among the flexible flat cable 40, the printed circuit board 30 and the source driving unit 20.
Along the transmission path, the digital power signal output from the pin 5011 is input to the source driver 20 through the flexible flat cable 40 and the printed circuit board 30 in sequence, and then input to the enable pin 5012 through the printed circuit board 30 and the flexible flat cable 40 in sequence. When the plugging abnormality occurs between the flexible flat cable 40 and the control circuit board 50 or the printed circuit board 30, or the connection abnormality occurs between the source driving module 20 and the printed circuit board 30, the transmission path may be interrupted, and the digital power signal cannot be input to the enable pin 5012 along the transmission path, and cannot be output as a high voltage signal, so as to avoid the problem of short circuit and burning of the array substrate caused by transmitting the high voltage signal to the array substrate when the plugging abnormality or the connection abnormality occurs.
Optionally, the transmission circuit between the digital power signal output pin and the enable pin includes a first transmission section disposed on the flexible flat cable, a second transmission section disposed on the printed circuit board, and a third transmission section disposed on the source driving unit, and the first transmission section, the second transmission section, and the third transmission section all include an input section and an output section.
Optionally, at least two third transmission segments are disposed on the source driving unit. Because each third transmission section comprises the input section and the output section, and the two ends of each input section or each output section are positioned at the connecting parts of the source driving unit, the printed circuit board and the array substrate, the probability of finding abnormal connection at the connecting parts is improved due to the increase of the number of the input sections and the output sections, and the risk of burning the array substrate due to short circuit caused by abnormal connection is further reduced.
In addition, the invention also provides a control circuit board which comprises a power supply chip, wherein the control circuit board comprises a power supply signal output pin and an input pin, the digital power supply signal output pin of the power supply chip is electrically connected with the power supply signal output pin of the control circuit board, and the enable signal input pin of the power supply chip is electrically connected with the input pin of the control circuit board.
The above description is only an alternative embodiment of the present application, and not intended to limit the scope of the present application, and all equivalent changes made by using the contents of the specification and drawings or directly/indirectly applied to other related technical fields are included in the scope of the present application.
Claims (7)
1. The utility model provides a display device, its characterized in that, display device includes array substrate, printed circuit board, control circuit board and connects array substrate with a plurality of source drive unit of printed circuit board, control circuit board pass through flexible flat cable with the printed circuit board electricity is connected, control circuit board includes power chip, power chip's digital power signal output pin with the intercommunication has transmission circuit between power chip's the enable pin, transmission circuit communicate in flexible flat cable printed circuit board source drive unit and between the array substrate, be provided with two at least third transmission sections on the source drive unit, adjacent source drive unit's output section and input section intercommunication.
2. The display device according to claim 1, wherein the transmission circuit includes a first transmission section disposed on the flexible flat cable, a second transmission section disposed on the printed circuit board, a third transmission section disposed on the source driving unit, and a fourth transmission section disposed on the array substrate, and the first transmission section, the second transmission section, the third transmission section, and the fourth transmission section each include an input section and an output section.
3. The display device according to claim 1, wherein two rows of pins are disposed on two sides of the source driving unit along a length direction, and two of the third transmission segments are disposed on the pins at the middle edges of the two rows of pins, respectively.
4. A display device as claimed in any one of claims 1 to 3, characterized in that:
the transmission circuit comprises a plurality of transmission sections arranged on the control circuit board;
one end of each transmission section is connected with each enabling pin of the power chip in a one-to-one correspondence mode, and the other end of each transmission section is communicated with the flexible flat cable.
5. The display device is characterized by comprising an array substrate, a printed circuit board, a control circuit board and a plurality of source electrode driving units connected with the array substrate and the printed circuit board, wherein the control circuit board is connected with the printed circuit board through a flexible flat cable, the control circuit board comprises a power chip, a digital power supply signal output pin of the power chip is communicated with an enabling pin of the power chip through a transmission circuit, and the transmission circuit forms a current loop through input and output sections distributed among the flexible flat cable, the printed circuit board and the source electrode driving units.
6. The display device according to claim 5, wherein the transmission circuit includes a first transmission section disposed on the flexible flat cable, a second transmission section disposed on the printed circuit board, and a third transmission section disposed on the source driving unit, the first transmission section, the second transmission section, and the third transmission section each including an input section and an output section.
7. The display device according to claim 5, wherein at least two third transmission segments are provided on the source driving unit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910461565.2A CN110221461B (en) | 2019-05-29 | 2019-05-29 | Display device and control circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910461565.2A CN110221461B (en) | 2019-05-29 | 2019-05-29 | Display device and control circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110221461A CN110221461A (en) | 2019-09-10 |
CN110221461B true CN110221461B (en) | 2021-07-06 |
Family
ID=67818607
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910461565.2A Active CN110221461B (en) | 2019-05-29 | 2019-05-29 | Display device and control circuit board |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110221461B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110930960B (en) * | 2019-12-09 | 2021-10-15 | 大峡谷照明系统(苏州)股份有限公司 | Display control device |
CN112738981B (en) * | 2020-12-21 | 2022-04-12 | 苏州精濑光电有限公司 | FPC board and test system |
CN115171583A (en) * | 2022-07-12 | 2022-10-11 | 武汉华星光电技术有限公司 | Display panel and electronic terminal |
CN117669462A (en) * | 2022-08-24 | 2024-03-08 | 长鑫存储技术有限公司 | Circuit layout structure and chip |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104157250A (en) * | 2014-07-25 | 2014-11-19 | 京东方科技集团股份有限公司 | Display device and manufacture method thereof |
CN106384581A (en) * | 2016-11-11 | 2017-02-08 | 惠科股份有限公司 | Display panel and display |
CN208805661U (en) * | 2018-09-12 | 2019-04-30 | 重庆惠科金渝光电科技有限公司 | Display panel and display device |
CN111161664A (en) * | 2020-02-13 | 2020-05-15 | Tcl华星光电技术有限公司 | Display device and terminal |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100855810B1 (en) * | 2002-07-29 | 2008-09-01 | 비오이 하이디스 테크놀로지 주식회사 | Liquid crystal display |
KR100855502B1 (en) * | 2007-03-28 | 2008-09-01 | 엘지디스플레이 주식회사 | Liquid crystal display and driving method thereof |
CN103680384B (en) * | 2012-09-26 | 2016-05-11 | 乐金显示有限公司 | There is the display unit of flexible membrane cable |
JP2019101211A (en) * | 2017-12-01 | 2019-06-24 | シャープ株式会社 | Display device |
CN207925646U (en) * | 2018-02-09 | 2018-09-28 | 成都海微特科技有限公司 | A kind of miniature ultra wide band power splitter |
-
2019
- 2019-05-29 CN CN201910461565.2A patent/CN110221461B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104157250A (en) * | 2014-07-25 | 2014-11-19 | 京东方科技集团股份有限公司 | Display device and manufacture method thereof |
CN106384581A (en) * | 2016-11-11 | 2017-02-08 | 惠科股份有限公司 | Display panel and display |
CN208805661U (en) * | 2018-09-12 | 2019-04-30 | 重庆惠科金渝光电科技有限公司 | Display panel and display device |
CN111161664A (en) * | 2020-02-13 | 2020-05-15 | Tcl华星光电技术有限公司 | Display device and terminal |
Also Published As
Publication number | Publication date |
---|---|
CN110221461A (en) | 2019-09-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110221461B (en) | Display device and control circuit board | |
US7267555B2 (en) | Electrical connectors between electronic devices | |
CN113963622A (en) | Display panel and display device | |
CN101251660A (en) | Display device | |
CN109872667B (en) | Signal detection system and display device | |
CN110827782A (en) | Drive circuit and liquid crystal display device | |
CN109496062B (en) | Circuit board and display device | |
CN112468748A (en) | Adapter plate applied to display screen and display device | |
US20180336828A1 (en) | Display panel and display device | |
CN111754907A (en) | Display device | |
KR100923825B1 (en) | Memory module and memory system suitable for high speed operation | |
KR100350650B1 (en) | Liquid crystal display device | |
US11711900B2 (en) | Display panel and display module | |
JP2005215530A (en) | Liquid crystal display device | |
US7133106B2 (en) | Liquid crystal display device with flexible printed circuit board | |
CN111028797B (en) | Display driving circuit and liquid crystal display panel | |
CN100495492C (en) | Display panel module | |
CN109976009B (en) | Display panel, chip and flexible circuit board | |
CN213938127U (en) | Adapter plate applied to display screen and display device | |
US20200103702A1 (en) | Logic board assembly, display device and liquid crystal display | |
CN107146587A (en) | Source electrode drive circuit and display panel | |
CN108064405A (en) | Display panel | |
CN113539101B (en) | Array substrate, display panel and display device | |
CN111429802A (en) | Display device and electronic apparatus | |
CN114189978B (en) | display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |