CN110196830A - A kind of information realtime interactive terminal based on embedded system - Google Patents
A kind of information realtime interactive terminal based on embedded system Download PDFInfo
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- CN110196830A CN110196830A CN201910454485.4A CN201910454485A CN110196830A CN 110196830 A CN110196830 A CN 110196830A CN 201910454485 A CN201910454485 A CN 201910454485A CN 110196830 A CN110196830 A CN 110196830A
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
- G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
Abstract
The present invention discloses a kind of information realtime interactive terminal based on embedded system, including CPU main control module, SPI extension communication module, level switch module and power management module；CPU main control module includes core processor AM3358, reset circuit, clock circuit, download circuit, FLASH circuit and SDRAM circuit；AM3358 has 6 configurable serial ports and 2 high speed SPI interfaces；CPU main control module extends communication module with SPI by high speed SPI interface and connect, SPI signal is converted to rs 232 serial interface signal and is transmitted to level switch module by SPI extension communication module, CPU main control module can configure serial ports and connect with level switch module, received Transistor-Transistor Logic level is converted to RS422 level to communicate with external equipment, power management module is system power supply.The present invention efficiently solves the problem of communication serial ports deficiency, while can freely configure the input/output state of serial ports.
Description
Technical field
The present invention relates to a kind of information realtime interactive terminal, especially a kind of information realtime interactive based on embedded system
Terminal belongs to the device field of communication serial port extension.
Background technique
In recent years, it with hardware modularity, the increasingly maturation of Integration Design, is usually needed when designing actual hardware system
Kernel control chip is wanted to have Multi-serial port, in order to be communicated and controlled with external component.With satellite receiver systems
When the increase of middle acquisition data, antenna and display and control terminal, satellite data resolve module interactive satellite signal data, gradually can all it go out
The problem of existing communication serial port deficiency, present invention mainly solves serial ports quantities in module communication process each in satellite receiver systems not
The problem of foot realizes serial ports expansion, achievees the purpose that having enough serial ports carries out data forwarding and interaction.
Currently, UART (Universal Asynchronous Receiver Transmitter, UART Universal Asynchronous Receiver Transmitter)
Interface using more and more extensive, both provide UART interface in many equipment.The microprocessor of industrial application generally all only wraps
Include 2 UART ports.It sends in actual industrial data in acquisition applications system, in order to save resource, microprocessor directly passes through
UART port and equipment carry out data interaction.The UART port that microprocessor certainly will be will lead in this way is inadequate, in order to facilitate connecing for equipment
Enter, therefore extending UART port is a kind of ideal solution.During system operation, in order to fully ensure that the communication technology
Reliability, it should during interface selection, by the analysis of traffic rate, communication distance and anti-interference ability, into
The determination of row communication mode, to improve the value of communication.
In view of can connect multiple bus devices in the SPI/IIC bus of microprocessor, in order to make full use of resource,
The extension to UART interface can be realized in practical application by SPI/IIC interface.SPI is a kind of communication work mould of full duplex
While main side sends data, data also are being sent from end likes:.So spi bus data transmission bauds is on the whole, than
Iic bus is fast, can reach several Mbps.In point-to-point communication, need to address different from iic bus, SPI interface does not need
It is addressed to operate, it appears simple and efficient.The UART expanded using SPI can meet the requirement of standard serial port UART,
And it is easy to operate.Baud rate, data bit, stop position and the check bit of serial ports can be set, sending and receiving for data all may be used
By user's self-defining.
The technical field at present, there are many kinds of the chips that can carry out spi bus extended serial port, and WK2124 is the 4 of SPI interface
Channel UART device, SPI bridge joint 4 enhancing function serial ports (UART) functions of extension may be implemented in it.The subchannel of extension
UART has following functional characteristics: the baud rate of each subchannel UART, word length, verification format can be independently arranged；Every height
Channel has the independent 256BYTE FIFO of transmitting-receiving, and the interruption of FIFO can be programmed trigger point by user demand.
Summary of the invention
For the above-mentioned prior art, the technical problem to be solved in the present invention is to provide one kind can efficiently solve communication string
Mouthful insufficient problem, realize data forwarding in satellite receiver systems between each module and information exchange based on embedded system
The information realtime interactive terminal of system.
In order to solve the above technical problems, a kind of information realtime interactive terminal based on embedded system of the invention, including
CPU main control module, SPI extension communication module, level switch module and power management module；
CPU main control module includes core processor AM3358, reset circuit, clock circuit, download circuit, FLASH circuit
And SDRAM circuit；AM3358 carries out signal processing；Reset circuit reset mode includes hand-reset and electrification reset；Clock
Circuit provides core processor AM3358 work clock；Download circuit download program code in program development process；FLASH electricity
Road storage program area, user program code guarantee that ARM can power on self-starting；SDRAM circuit provides memory, core for system
Heart processor AM3358 has 6 configurable serial ports and 2 high speed SPI interfaces；
Power management module includes filter, AC/DC power adapter, DC/DC switching power regulators and LDO linearly steady
Depressor；
CPU main control module extends communication module with SPI by high speed SPI interface and connect, and SPI, which will extend communication module, to be received
SPI signal be converted to rs 232 serial interface signal and level switch module be transmitted to by serial ports, CPU main control module can configure serial ports and electricity
Received Transistor-Transistor Logic level is converted to RS422 level and communicated with external equipment by flat conversion module connection, level switch module,
Power management module is system power supply.
1 serial ports in 6 configurable serial ports connect with PC machine carry out program together as debugging interface and with network interface
Downloading；4 serial ports are configured to UART interface and connect level switch module；1 serial ports and CAN port are multiplexed, and are configured to the end CAN
After mouthful, information exchange is carried out with the external equipment with CAN port.
SPI extends communication module and uses 2 WK2124 chips, and WK2124 chip operation is in slave pattern, 1 WK2124 chip
1 SPI port is converted into 4 High Speed Serials, High Speed Serial baud rate is up to 1.5Mbps under 3.3V condition of power supply.
Level switch module uses ADM2582E chip.
Power management module selects alternating current 220V alternating current as input, and filter is filtered 220V electric main, then
Alternating current is carried out by AC/DC and turns DC decompression, it is finally each by switching power regulators DC/DC and linear voltage regulator LDO output system
Voltage needed for module.
The invention has the advantages that: the present invention innovatively to propose a kind of method of SPI expanding multiple serial ports, the invention proposes
UART interface extension is mainly carried out using WK2124 chip, the baud rate of each subchannel UART, word length, verification format can be only
It erects and sets, highest can provide the traffic rate of 2Mbps.For the CPU module that the terminal uses for AM3358, it has communication interface
It is abundant, the advantages that cost is relatively low, the high speed information real-time, interactive terminal based on AM3358 is designed, to meet satellite receiver simultaneously
To the demand of communication information forwarding or data interaction in system.CPU main control module mainly realizes flexible configuration input, output end
Mouthful, it realizes being organized in pairs for distinct interface, promotes interface compatibility and flexibility；SPI extension communication module mainly realize by
The SPI interface of CPU module is extended to High Speed Serial, meets the needs of system is to communication serial ports quantity；WK2124 provides standard
Spi bus interface, it is only necessary to which microprocessor can provide the SPI or SPI-bus analogue interface of standard.Using WK2124 to AM3358
SPI interface be extended, power management module is whole system power supply, has achieved the purpose that communication serial port extends, while can
Freely to configure the input/output state of serial ports, meet satellite navigation receiver system for communication information forwarding and interactive interface
Demand.It entirely designs simple and direct, economical, there is versatility, it is convenient to use the corresponding communication of UART port connection expanded
Module realizes the acquisition and communication of data, reaches and promotes data forwarding or information exchange ability in satellite receiver systems
Purpose, while improving communication distance, reliability and stability, have it is easy to operate, be easy design and the advantages such as realize, can be with
It is generalized in other industrial systems, therefore there is very high industrial application value.
Detailed description of the invention
Fig. 1 is specific system construction drawing of the invention；
Fig. 2 is system construction drawing of the invention；
Fig. 3 is the program flow diagram of the initialization function of the method for the present invention；
Fig. 4 is the program flow diagram of the receiver function of the method for the present invention；
Fig. 5 is the program flow diagram of the principal function of the method for the present invention；
Fig. 6 is the functional block diagram of WK2124.
Specific embodiment
The specific embodiment of the invention is described further with reference to the accompanying drawing.
Present system structure is as depicted in figs. 1 and 2, including CPU main control module, SPI extend communication module, level conversion
Module and power management module:
CPU main control module includes core processor AM3358, reset circuit, clock circuit, download circuit, FLASH circuit
And SDRAM circuit；Core processor of the AM3358 as system is responsible for the signal processing work of system；The reset
The purpose of circuit is reset system, has hand push button to reset and electrification reset two ways；The clock circuit needs to provide CPU
Work clock input, the speed of service of program are determined by it；The download circuit is mainly used in program development process to journey
The downloading of sequence code；Deposit operation system, user program code etc., guarantee ARM can be powered on the FLASH circuit in systems
Self-starting；The SDRAM circuit is a kind of high-speed dynamic random access memory with sync cap, and the system is made to have the interior of abundance
It deposits.
SPI extends communication module, handles the SPI signal from AM3358, generates rs 232 serial interface signal and extraneous progress
Communication.
Level switch module includes ADM2582E chip, Transistor-Transistor Logic level and RS422 level is mutually converted, Jin Eryu
External equipment carries out remote, high speed communication.
Power management module includes filter, AC/DC power adapter, DC/DC switching power regulators and LDO linearly steady
Depressor is responsible for whole system power supply.
The core processor AM3358 of CPU main control module, it have 6 configurable serial ports, can be configured to UART interface or
Person's CAN port；With 2 tunnel high speed SPI interfaces, can be used for realizing serial ports expansion；With network interface, for information transmission or journey
Sequence downloading.
6 configurable serial ports of AM3358, serial ports 0 are used as debugging interface and network interface ETH0 together, progress are connect with PC machine
The downloading of program；Serial ports 1, serial ports 2, serial ports 3 and serial ports 5 are configured to UART interface, directly can externally interact by level conversion
Data；Serial ports 4 and CAN port are multiplexed, and after being configured to CAN port, carry out information exchange with the external equipment with CAN port.
It includes 2 WK2124 chip circuits, the two-way SPI interface with core processor AM3358 that SPI, which extends communication module,
Connection, Lai Shixian serial ports expansion.Because of slave device of the WK2124 as the terminal, the slave pattern of SPI is only supported.In the design,
Realize that SPI communication needs 4 lines: synchronised clock (SCK) line is gone here and there on MISO and MOSI line for realizing main device and from device
The synchronization of row data transmission；Main output/and from input (MOSI) line, the output for main device or the input from device；Primary input/
From output (MISO) line, the input for main device or the output from device；Piece selected control system (CS) line, for the choosing from equipment
It selects.
It includes 2 WK2124 chips that SPI, which extends communication module, passes through setting SPI clock initial polarity CPOL and initial phase
Position CPHA is " 0 ", makes SPI mode 0 of the WK2124 chip operation in 4 kinds of operating modes of SPI.
WK2124 chip in SPI extension communication module can be realized to be turned by 1 SPI port (baud rate is up to 10Mbps)
Change 4 High Speed Serials into, its baud rate can reach 1.5Mbps under 3.3V condition of power supply.2 WK2124 can provide 8
Serial ports meets in satellite receiver systems in addition 4 High Speed Serials built in AM3358, amount to 12 serial ports to communication serial port
The requirement of quantity.
The design of level switch module is based on ADM2582E chip, which can realize 12 UART interfaces
Transistor-Transistor Logic level is converted to RS422 level, and then carries out remote, high speed communication with external equipment.
Power management module is responsible for whole system power supply.In the design, select alternating current 220V alternating current as input, filtering
Device is filtered 220V electric main, then carries out alternating current by AC/DC and turn DC decompression, finally by switching power regulators DC/
Voltage needed for DC and each module of linear voltage regulator LDO output system is each module for power supply of system.
(1) core processor that CPU main control module is selected is AM3358, and AM3358 uses SPI interface and peripheral hardware WK2124
When being communicated, communication different phase it can be to the different data bits write parameters of " status register SR ", we pass through
These register flags are read to understand communication state.The host side that AM3358 is communicated as SPI, holotype receive and dispatch process and thing
Part is described as follows:
A. CS signal wire is controlled, initial signal is generated；
B. data to be sent are written in " data register DR ", which, which can be stored in, sends buffer area；
C. communication starts, and SCK clock brings into operation.MOSI is data one one transmitting out in transmission buffer area
It goes；MISO then data one one is stored into reception buffer area；
D. when having sent a frame data, " TXE flag bit " in " status register SR " can be set to 1, indicate to pass
A frame is finished, it is empty to send buffer area；Similarly, when having received a frame data, " RXNE flag bit " can be set to 1, table
Show and transfer a frame, receives buffer area non-empty；
E. when " TXE flag bit " is 1, if also to continue to send data, number is written toward " data register DR " again
According to；Deng until " RXNE flag bit " be 1 when, by reading " data register DR " it is available receive buffer area in it is interior
Hold.
(2) it is interrupted if enabling TXE or RXNE, TXE or RXNE can generate SPI interrupt signal when setting 1, and entrance is same
Service function is interrupted, can be which event by checking register-bit to understand, then distinguish after arriving SPI interrupt service routine
It is handled.Also dma mode can be used to receive and dispatch the data in " data register DR ".
(3) SPI extends slave generator terminal of the WK2124 chip as the terminal device in communication module, its each subchannel
The baud rate of UART, word length, verification format can be independently arranged, and highest can provide the traffic rate of 2Mbps.Each subchannel
Have and transmit/receive independent 256Byte FIFO, the interruption of FIFO can be programmed trigger point by user demand.
A.WK2124 sends data procedures are as follows: AM3358 first sends out the data for needing to be sent to substring mouth by main interface
It is sent to FIFO, then the data in FIFO are sent according to corresponding baud rate.When need send data to
When the sub- equipment of WK2124 connection, then need that corresponding data are written to WK2124 by main interface, then data using
WK2124 is transferred to specified substring mouth (sub- equipment).This completes the transmissions of a data.
B.WK2124 receives data procedures are as follows: in the case where the receive capabilities of substring mouth are enabled, substring mouth RX pin
The data received can be temporarily stored in the reception FIFO of substring mouth, and AM3358 is needed actively to go in the reception FIFO of WK2124
It takes.
(4) level switch module by step (3) expand the 8 sub- serial ports come and the included 4 sub- serial ports of AM3358 into
Line level conversion, is converted to RS422 level for Transistor-Transistor Logic level, and then connect with external equipment, is communicated.RS422 interface standard
Full name be " electrical characteristic of balanced voltage digital interface circuit ", be that a kind of single machine is sent, the received unidirectional, balance of multimachine passes
Defeated specification is formulated concurrent by American Electronics Industry Association EIA.RS422 interface uses the group of balance receiver and differential receiver
Close, because have driving capability strong, the transmission of long transmission distance, supporting bus, anti-common mode interference ability by force, signal tolerance it is good etc. all
More advantages are used widely in a variety of industrial control data communication situations.This modular circuit selects ADM2582E chip, it can be incited somebody to action
Transistor-Transistor Logic level is converted to RS422 level, and circuit is simple, easy to accomplish.The serial data and satellite reception that WK2124 is extended
Other each equipment are connected in machine system.Reached effective expanding communication serial ports quantity, meet in satellite receiver systems for
The demand of forwarding or the interaction of data, while improving communication distance, reliability and stability.
The program flow diagram of initialization function, receiver function and principal function is as shown in attached drawing 3, attached drawing 4 and attached drawing 5, mainly
Steps are as follows:
(1) collectivity Scheme Design of system is determined first.Hardware platform is constructed according to actual needs, is choosing hardware platform
When, it is mainly in view of the factors such as economy and the stability of chip.Four modules of this system are carried out pair according to objective function
Than research, most suitable device is selected.The core controller of system CPU module selects AM3358, it has 6 configurable strings
Mouthful, it can be configured to UART interface or CAN port.It has the SPI communication interface of high speed, convenient for being communicated with high-speed equipment, this
In design, it to be used for extended serial port.CAN2.0A and CAN2.0B standard, side are supported in its 2 controller LAN (CAN) ports
Just industrial application；For its highest dominant frequency up to 1GHz, the execution speed of program is fast, guarantees the real-time of system.AM3358 micro process
Device has condition not available for other processors and advantage from performance and cost, and therefore, choosing uses it as the master control of the terminal
Chip.
SPI extends communication module and selects WK2124 chip, it is 4 channel UART devices of SPI interface, it can be achieved that SPI is total
Line extends 4 enhancing function serial ports (UART) functions.The baud rate of the UART of the subchannel of each extension, word length, verification format
It can independently be configured.
(2) it is designed followed by software programming.Program most starts to initialize AM3358, carries out first overall
Initialize installation, including open L1-Cache, initialize the library HAL, be arranged clock, delay initialization, to its in minimum system
The initialization of his device, such as SDRAM, most important of which is that controlling register to as the overall situation to by iic bus
The initial configuration of EEPROM.
Next the two-way spi bus of AM3358 is initialized.Since WK2124 is only operable on SPI mode 0, make
For the main control chip AM3358 of clock supplier and controlling party, need its clock initial polarity CPOL and initial phase CPHA
It is set as " 0 ".CS, SCK, MOSI signal are all controlled by AM3358 and are generated, and the signal of MISO is generated by WK2124, and AM3358 is logical
Cross the data that the signal wire reads WK2124.There is no device address in SPI protocol, addressed using CS signal wire, MOSI with
The signal of MISO is only just effective when CS is low level, and in each clock cycle of SCK, MOSI and MISO just transmit one
Data.
Spi bus is arranged to work in holotype, transmission mode is Double wire transmission, 8 bit data frames structures, the initial pole of clock
Property and initial phase be both configured to " 0 ", enable the setting such as SPI.It is noted herein that in principle, to the first of WK2124
Beginningization is to be carried out by spi bus, but in actual program, the initialization program of SPI is needed to be encapsulated in WK2124's
In initialization program.Initialization to WK2124 includes: enabled clock, and setting pin is push-pull output, upper pull-mode and high speed
Mode.Further include the setting of register: the setting by controlling global register and substring mouth register enables clock, multiple
Seat serial ports realizes the enabled and configuration to 8 sub- serial ports UART operating modes, baud rate and substring mouth fifo status.Pass through
The initialization program realizes the normal work of 8 UART interfaces of extension.
Finally AM3358 4 UART carried itself are initialized, setting and data bit including baud rate stop
The setting of stop bit, parity check bit and hardware flow control position etc..Before to interface Configuration of baud rate, 16 groups of numbers are first defined
Array, the selection of multiple baud rates can be carried out, meet the needs of Practical Project.
(3) after initialization program, writing for data receiver function is carried out.Data receiver function is divided into two parts,
It is the reception of 8 UART of reception and the external extension of 4 included UART of AM3358 respectively.For WK2124, when having
When external data arrives, data are stored in FIFO first, are more than or equal to the reception FIFO set when receiving the data amount check in FIFO
When trigger point, the interruption is generated.When receiving the data amount check in FIFO less than trigger point, which is removed.It trigger point can
It is configured with controlling register by FCR substring mouth FIFO.
Triggering is interrupted, and the flag bit that corresponding substring mouth channel interrupt register is arranged is 1, into interrupt function.It is interrupting
In function, SPI by read global interrupt flag register GIFR, come judge be who generate interruption, and then be arranged EEPROM
Corresponding flag bit, AM3358 are being scanned reading to EEPROM always, then activate the receive capabilities of respective channel, actively go
It goes to take in the reception FIFO of WK2124, carries out the reception of data.The trigger point that WK2124 supports each sub- serial port setting different, connects
Different trigger points can be independently arranged by receiving FIFO and sending FIFO, and the size by the way that trigger point is arranged realizes that 8 UART's is excellent
First grade sequence.And 4 AM3358 included UART courses of work are also similar, the reception FIFO of data deposit before this, reach touching
After hair point, triggering is interrupted, into interrupt function.The respective flag position of EEPROM is set in interrupt function, is activated corresponding
UART port completes the reception of data in principal function.
(4) process of data transmission function is relatively simple, after the initialization of each UART port, so that it may carry out data
It has sent.The port UART of data is accordingly sent according to user demand configuration first, corresponding the machine UART is called directly accordingly
UART program (configuration uses transmission FIFO) is sent, realizes that data are sent.For the UART of WK2124 extension, instructed by SPI
It realizes that the data of corresponding WK2124 subchannel are sent, is sent to substring mouth fifo data register FDAT.It should be noted that
It being written during FIFO, a command byte is first written, corresponding data byte is then written again, fifo address increases automatically,
Multiple data can be once written in the operation into FIFO, but no more than 256 bytes, it usually needs first inquire WK2124
Transmission FIFO in how many byte etc. it is to be sent, the byte number of write-in FIFO is then determined again, else if FIFO is
Expired, then data are written, FIFO will overflow.
(5) priority that data send function is lower than receiver function, this is because needing to carry out reality when the data arrives
When data receiver, and send can temporarily be interrupted, do not influence data transmission accuracy.Hair is returned after having received data
Function is sent, transmission program is continued to complete.
The advantages of the design is that FIFO has been used in data transmission procedure, receives AM3358 and sends data latency time, leads to
It is data cached to cross FIFO, AM3358 is made there are more resources to go to handle other port datas.Improve response speed.To guarantee
Serial high-speed communication.
(6) it is noted that WK2124 interruption is divided into two-stage, level-one is total interrupt switch, and second level is that substring mouth interrupts.It
Each substring mouth have oneself independent interruption system, the usage mode interrupted is: first in initialization function, making
It can total interrupt switch；Next the respective interrupt of corresponding substring mouth is enabled.And needs are interrupted for sending and receiving the contact FIFO
It is arranged by register and interrupts contact, that is, interrupts the condition of generation.We should be according to such as lower section after interruption has come
Formula processing is interrupted: first determine whether be which substring mouth interruption, read global interrupt flag register, next to judge specific
Interrupt source, read substring mouth interrupt flag register.
(7) in principal function, initialization function, including some necessary global registers of initialization and substring mouth are first carried out
Register.Next receiver function is carried out according to the transmitting-receiving demand of user and sends the calling of function.It needs to follow when receiving data
Ring scans EEPROM, this is because the interrupt priority level of receiver function is higher, after reception FIFO reaches contact, in triggering
It is disconnected, current transmission function or other functions can be suspended, the corresponding flag bit of setting EEPROM activates corresponding UART to carry out
The reception of data.And the priority that data send function is lower, its delay process will not influence the accuracy of transmission data, institute
Not need scan round EEPROM, it is only necessary to which judgement is the UART of local UART or extension, and then calls respective transmission
Function, principal function flow chart are as shown in Fig. 5.
(8) power supply module is equivalent to the heart of system, and the electrical stability of system decides that can system work normally.Such as
Fruit power is less than system power, even if power supply, system may work, but cannot normally work, and lead to part of module
Work disorder.For the versatility for meeting equipment, guarantee to power under any environment, the design selects alternating current 220V alternating current to make
For input, both ensure that in this way it is universal, will not rely solely on battery power supply, solve dead battery capability or replacement electricity
The trouble in pond.Before 220V alternating current is converted to direct current, needs first to be filtered 220V alternating current with filter, mention
The stability of high power module.Next alternating current is carried out by AC/DC and turns DC decompression, and mainly have switch in terms of DC decompression
Power regulator DC/DC and linear voltage regulator LDO, the advantage of switching power regulators are that input voltage range is big, and voltage
High conversion efficiency meets system requirements.The stability of linear stabilizer output voltage is relatively good, and transfer efficiency is lower, is suitable for
Input voltage and the lesser circuit of output voltage pressure difference.Multiple module groups and work are selected in the design, be CPU main control module,
SPI expanding communication module and level switch module provide stable direct current 3.3V voltage, ensure that stability, the peace of power module
Full property and high efficiency.
In conjunction with above-mentioned analysis, obtain following analysis result: the high speed information based on ARM proposed through the invention is real-time
Interactive terminal, CPU main control module can realize flexible configuration input, output port, while can realize different according to the demand of user
Interface is organized in pairs, and promotes interface compatibility and flexibility；SPI extends communication module and expands 2 SPI interfaces of AM3358
Exhibition is the High Speed Serial that 8 baud rates can configure, and meets the needs of system is to communication serial ports quantity；By to FIFO and interruption letter
Several settings and calling improves the rate and stability of data transmission；Transistor-Transistor Logic level is finally converted into RS422 level, is promoted
Communication distance, reliability and stability meet the needs of Practical Project.The terminal can not only be applied to satellite receiver system
In system, it can also apply in other each industrial systems, meet Practical Project demand, there is certain realistic meaning.
Claims (5)
1. a kind of information realtime interactive terminal based on embedded system, it is characterised in that: extended including CPU main control module, SPI
Communication module, level switch module and power management module；
The CPU main control module includes core processor AM3358, reset circuit, clock circuit, download circuit, FLASH circuit
And SDRAM circuit；AM3358 carries out signal processing；Reset circuit reset mode includes hand-reset and electrification reset；Clock
Circuit provides core processor AM3358 work clock；Download circuit download program code in program development process；FLASH electricity
Road storage program area, user program code guarantee that ARM can power on self-starting；SDRAM circuit provides memory, core for system
Heart processor AM3358 has 6 configurable serial ports and 2 high speed SPI interfaces；
The power management module includes filter, AC/DC power adapter, DC/DC switching power regulators and LDO linearly steady
Depressor；
CPU main control module extends communication module with SPI by high speed SPI interface and connect, and SPI extends communication module will be received
SPI signal is converted to rs 232 serial interface signal and is transmitted to level switch module by serial ports, and CPU main control module can configure serial ports and level
Received Transistor-Transistor Logic level is converted to RS422 level and communicated with external equipment by conversion module connection, level switch module, electricity
Source control module is system power supply.
2. a kind of information realtime interactive terminal based on embedded system according to claim 1, it is characterised in that: 6
1 serial ports in configurable serial ports as debugging interface and and network interface the downloading of progress program is connect with PC machine together；4 serial ports
It is configured to UART interface and connects level switch module；1 serial ports and CAN port are multiplexed, and after being configured to CAN port, and are had
The external equipment of CAN port carries out information exchange.
3. a kind of information realtime interactive terminal based on embedded system according to claim 1 or 2, it is characterised in that:
SPI extension communication module uses 2 WK2124 chips, and WK2124 chip operation is in slave pattern, and 1 WK2124 chip is by 1
A SPI port is converted into 4 High Speed Serials, and High Speed Serial baud rate is up to 1.5Mbps under 3.3V condition of power supply.
4. according to claim 1 to 3 any information realtime interactive terminals based on embedded system, it is characterised in that:
The level switch module uses ADM2582E chip.
5. a kind of information realtime interactive terminal based on embedded system according to claim 1, it is characterised in that: described
Power management module selects alternating current 220V alternating current as input, and filter is filtered 220V electric main, then by AC/DC into
Quotations electricity turns DC decompression, finally the electricity as needed for switching power regulators DC/DC and each module of linear voltage regulator LDO output system
Pressure.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112198862A (en) * | 2020-09-18 | 2021-01-08 | 中国辐射防护研究院 | On-line experimental test system for total dose effect of extensible microcontroller |
| CN114615104A (en) * | 2022-03-14 | 2022-06-10 | 鹍骐科技（北京）股份有限公司 | Intelligent serial port communication method and system realized based on domestic FPGA |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101127023A (en) * | 2006-08-17 | 2008-02-20 | 四川维肯电子有限公司 | Universal asynchronous serial extended chip of multi-bus interface |
| CN203276266U (en) * | 2013-04-13 | 2013-11-06 | 云南莱克科技有限公司 | Intelligent adapter |
-
2019
- 2019-05-29 CN CN201910454485.4A patent/CN110196830A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101127023A (en) * | 2006-08-17 | 2008-02-20 | 四川维肯电子有限公司 | Universal asynchronous serial extended chip of multi-bus interface |
| CN203276266U (en) * | 2013-04-13 | 2013-11-06 | 云南莱克科技有限公司 | Intelligent adapter |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112198862A (en) * | 2020-09-18 | 2021-01-08 | 中国辐射防护研究院 | On-line experimental test system for total dose effect of extensible microcontroller |
| CN114615104A (en) * | 2022-03-14 | 2022-06-10 | 鹍骐科技（北京）股份有限公司 | Intelligent serial port communication method and system realized based on domestic FPGA |
| CN114615104B (en) * | 2022-03-14 | 2023-11-28 | 鹍骐科技（北京）股份有限公司 | Intelligent serial port communication method and system based on domestic FPGA |
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